Power combining circuit, power amplifier chip and radio frequency front end module

Abstract

The application discloses a power synthesis circuit, a power amplifier chip and a radio frequency front end module. The power synthesis circuit comprises a first power amplifier and a second power amplifier, a power synthesis output port, a first capacitor and a second capacitor, a first inductor and a second inductor, a third inductor and an isolation resistor. The first capacitor, the first inductor and the third inductor constitute a first high-pass pi network, the second capacitor, the second inductor and the third inductor constitute a second high-pass pi network, both of the two high-pass pi networks are equivalent to 3 lambda / 4 transmission lines, and both are connected to the power synthesis output port. The original DC blocking capacitor of the power amplifier output end is reused as a series capacitor of the high-pass pi network, the original choke inductor of the power amplifier is reused as a parallel inductor of the high-pass pi network, only a matching inductor and an isolation resistor need to be newly added to realize two-way power synthesis, the number of passive devices is greatly reduced, the chip area and the substrate area are significantly saved, and the cost is reduced.

Description

Technical Field

[0001] This invention relates to the field of radio frequency integrated circuit technology, specifically to a power combining circuit, a power amplifier chip, and a radio frequency front-end module, which is particularly suitable for power combining of radio frequency power amplifiers and can realize on-chip power combining of two power amplifiers without adding additional passive components. Background Technology

[0002] Radio frequency (RF) power amplifiers are widely used in wireless communication systems, and their output power is one of the key indicators for measuring system performance. Generally, RF power amplifiers have two structures: single-ended and power-combining. Power-combining structures can achieve higher output power than single-ended structures, making them more suitable for high-power applications.

[0003] Common power combining methods include Wilkinson power combining and differential power combining. Wilkinson power combining is based on λ / 4 transmission lines and isolation resistors, such as... Figure 1 As shown, the relationship between the characteristic impedance of a λ / 4 transmission line and the input / output port impedance is used to meet the requirements of power combining and port matching. Here, λ is the wavelength of the RF signal in the medium, and its value is determined by the operating frequency and the dielectric constant of the medium. Differential power combining requires a transformer. However, both transmission lines and transformers, these passive components, consume a large chip area and are not easily integrated into the chip. In RF integrated circuit design, chip area directly determines production cost; therefore, how to achieve power combining with a smaller area and fewer components is an important issue that urgently needs to be addressed.

[0004] To overcome the problem of excessive space occupied by transmission lines, those skilled in the art have proposed using a low-pass network composed of lumped elements (inductors and capacitors) to equivalently replace the λ / 4 transmission line, thereby forming a lumped Wilkinson power combiner. For example... Figure 2 As shown, traditional lumped Wilkinson power combining is achieved through two low-pass π networks (each consisting of a series inductor and two parallel capacitors) and an isolation resistor. While this structure avoids direct transmission lines, it still requires additional series inductors and parallel capacitors to construct the low-pass networks, consuming additional chip area. Furthermore, the series inductor is relatively large and has high on-chip inductance losses, which is detrimental to power transfer. Summary of the Invention

[0005] The purpose of this invention is to propose a power combining circuit, a power amplifier chip, and an RF front-end module to achieve power combining within the chip, reduce the number of passive components, avoid setting a large number of additional matching components on the substrate, thereby reducing the substrate area occupied and lowering the overall solution cost.

[0006] To achieve the above objectives, this invention proposes a power combining circuit for use in an RF power amplifier, comprising: First power amplifier and second power amplifier; The power combining output port is used to output the combined RF signal; A first capacitor and a second capacitor, wherein the first capacitor is connected in series between the output terminal of the first power amplifier and the power combining output port, and the second capacitor is connected in series between the output terminal of the second power amplifier and the power combining output port; A first inductor and a second inductor, wherein one end of the first inductor is connected to the output terminal of the first power amplifier and the other end is connected to the power supply voltage terminal; one end of the second inductor is connected to the output terminal of the second power amplifier and the other end is connected to the power supply voltage terminal. The third inductor is connected between the power combining output port and ground; And an isolation resistor, connected between the output terminal of the first power amplifier and the output terminal of the second power amplifier; The first capacitor, the first inductor, and the third inductor constitute a first high-pass π-type network, and the second capacitor, the second inductor, and the third inductor constitute a second high-pass π-type network. The transmission matrix of the first high-pass π-type network is equivalent to a transmission line with an electrical length of 3λ / 4, and the transmission matrix of the second high-pass π-type network is equivalent to another transmission line with an electrical length of 3λ / 4. The first high-pass π-type network and the second high-pass π-type network are connected together at the power combining output port to form a two-way power combining network.

[0007] Furthermore, the first capacitor and the second capacitor are configured to serve as series capacitor elements in the first high-pass π-network and the second high-pass π-network, and simultaneously as DC blocking capacitors at the output terminals of the first power amplifier and the second power amplifier.

[0008] Furthermore, the first inductor and the second inductor are configured to serve as parallel inductor elements in the first high-pass π-network and the second high-pass π-network, and simultaneously as power supply choke inductors in the first power amplifier and the second power amplifier.

[0009] Secondly, the present invention provides a power amplifier module, including a substrate and a power amplifier chip bonded to the substrate. The power amplifier chip integrates: First power amplifier and second power amplifier; The power combining output port is used to output the combined RF signal; A first capacitor and a second capacitor are connected in series between the output terminal of the first power amplifier and the power combining output port, and the second capacitor is connected in series between the output terminal of the second power amplifier and the power combining output port. The first capacitor and the second capacitor serve as DC blocking capacitors at the output terminals of the first power amplifier and the second power amplifier, respectively. An isolation resistor (R) is connected between the output terminal of the first power amplifier (Q1) and the output terminal of the second power amplifier (Q2); The substrate is provided with: A first inductor and a second inductor, one end of the first inductor is connected to the output terminal of the first power amplifier and the other end is connected to the power supply voltage terminal, one end of the second inductor is connected to the output terminal of the second power amplifier and the other end is connected to the power supply voltage terminal, and the first inductor and the second inductor serve as the power supply choke inductors of the first power amplifier and the second power amplifier, respectively. Also includes: The third inductor is connected between the power combining output port and ground; The third inductor, together with the first capacitor and the first inductor, constitutes a first high-pass π-type network, and the third inductor, together with the second capacitor and the second inductor, constitutes a second high-pass π-type network. The transmission matrix of the first high-pass π-type network is equivalent to a transmission line with an electrical length of 3λ / 4, and the transmission matrix of the second high-pass π-type network is equivalent to another transmission line with an electrical length of 3λ / 4. The first high-pass π-type network and the second high-pass π-type network are connected together at the power combining output port to form two power combining networks.

[0010] Furthermore, the third inductor is a coil inductor disposed on the packaging substrate; Alternatively, the third inductor may be formed by bonding wires between the power amplifier chip and the substrate, the bonding wires being connected between the pads of the power combining output port (Rfout) and the ground of the substrate.

[0011] Thirdly, the present invention also proposes a radio frequency front-end module, including the power amplifier module described in the second aspect.

[0012] The beneficial effects of this invention are as follows: (1) Significantly reduced chip area: This invention combines the series capacitor in the power combining network with the original DC blocking capacitor of the power amplifier, and the parallel inductor with the original choke inductor of the power amplifier, eliminating the need for additional independent DC blocking capacitors and choke inductors for power combining. Compared with the prior art, this invention only requires adding a third inductor (matching inductor) and an isolation resistor to the original power amplifier chip to achieve complete power combining function, greatly reducing the number of passive components and significantly saving chip area and manufacturing cost.

[0013] (2) Reduced substrate area and complexity: In traditional lumped Wilkinson power combining schemes, most matching components (inductors and capacitors) need to be placed on the substrate, occupying a large amount of substrate area. In the power combining scheme of the present invention, the first capacitor, the second capacitor, and the isolation resistor can all be integrated inside the chip, and only the first inductor, the second inductor, and the third inductor (matching inductor) are placed outside the chip. Furthermore, since the inductance value of the third inductor is relatively small, it can be further replaced by bonding wires, which further reduces the substrate area and packaging complexity.

[0014] (3) Reduce the number of passive components: Compared with the traditional low-pass network-based structure, the power combining scheme proposed in this invention reduces the number of inductors from 4 to 3 and the number of capacitors from 5 to 2. All capacitors and resistors can be integrated inside the chip, which greatly reduces the substrate area and lowers the overall cost of the scheme.

[0015] (4) Good RF performance: Simulation and experimental results show that the power combining structure of the present invention has good port matching, low insertion loss and high isolation at the operating frequency, and achieves high output power and power combining efficiency.

[0016] (5) Easy to integrate on chip: The power combining scheme proposed in this invention is fully compatible with standard integrated circuit manufacturing process. The first capacitor, the second capacitor and the isolation resistor can all be implemented through on-chip process without additional special process steps, which is convenient for mass production.

[0017] The present invention has other features and advantages, which will be apparent from or will be set forth in detail in the accompanying drawings and the following detailed description, which together serve to explain the particular principles of the invention. Attached Figure Description

[0018] The above and other objects, features and advantages of the present invention will become more apparent from the accompanying drawings, in which like reference numerals generally denote like parts.

[0019] Figure 1 This is a circuit schematic of a traditional Wilkinson power combiner based on a λ / 4 transmission line.

[0020] Figure 2 The circuit diagram shows the traditional lumped form Wilkinson power combiner based on a low-pass π-type network structure, where (a) is the transmission line equivalent model and (b) is the lumped form structure.

[0021] Figure 3 The circuit diagram of the lumped form Wilkinson power combiner based on the high-pass π-type network structure of the present invention is shown in (a) as the equivalent model of the high-pass π-type network with 3λ / 4 transmission lines, and (b) as the lumped form Wilkinson power combining structure of the high-pass π-type network.

[0022] Figure 4 This is a circuit structure diagram of a power combining circuit according to Embodiment 1 of the present invention.

[0023] Figure 5 This is a circuit diagram of a power amplifier module according to Embodiment 2 of the present invention.

[0024] Figure 6 This is a schematic diagram of a traditional Wilkinson power combining structure based on a low-pass network.

[0025] Figure 7 The simulation results of S11, S22, and S33 of the power amplifier module in Embodiment 2 of the present invention are shown.

[0026] Figure 8 The simulation results of S31 and S32 of the power amplifier module in Embodiment 2 of the present invention are shown.

[0027] Figure 9 The diagram shows the simulation results of the power amplifier module in Embodiment 2 of the present invention at S12.

[0028] Figure 10 The graph shows the measured output power of the power amplifier module in Embodiment 2 of the present invention. Detailed Implementation

[0029] The invention will now be described in more detail with reference to the accompanying drawings. While preferred embodiments of the invention are shown in the drawings, it should be understood that the invention can be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that the invention will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.

[0030] The working principle of a traditional Wilkinson power combiner and the basic principle of this invention will be explained as follows.

[0031] Figure 1The circuit schematic of a conventional Wilkinson power combiner based on a λ / 4 transmission line is shown. Figure 1 As shown, the two input signals are combined at the output port after passing through two λ / 4 transmission lines respectively. The impedance of the power combined output port is Z3, and the isolation resistor R is connected between the input terminals of the two transmission lines. Here, λ is the wavelength of the radio frequency signal in the medium. The characteristic impedance Z0 of the λ / 4 transmission line, the input port impedance Z1, and the output port impedance Z2 satisfy the requirements of power combining and port matching. 2 = Z1 Z2. Traditional Wilkinson synthesizers utilize the impedance transformation characteristics of a λ / 4 transmission line to achieve in-phase synthesis of two signals, while using isolation resistors to absorb reflected power between the two signals, thereby improving isolation.

[0032] Figure 2 A traditional lumped form Wilkinson power combiner is shown. For example... Figure 2 As shown in (a), the λ / 4 transmission line can be equivalently replaced by a low-pass π-type network consisting of a series inductor L and two parallel capacitors C. Figure 2 Figure (b) shows a lumped Wilkinson power combining structure using low-pass π-networks. Each low-pass π-network consists of a series inductor and two parallel capacitors. One low-pass π-network is composed of the first inductor L, the first capacitor C, and a capacitor C0 (with a capacitance of C / 2). The other low-pass π-network is composed of the second inductor L, the second capacitor C, and a capacitor C0. The two low-pass π-networks are connected together at the output port, and power combining is achieved in conjunction with the isolation resistor R. In this traditional structure, the series inductor is large in size, consuming additional chip area. Furthermore, the on-chip inductor has high losses, which is not conducive to power transmission. In addition, all components are additional matching components and are not reused with the original peripheral components of the PA.

[0033] Figure 3 This invention illustrates a lumped form Wilkinson power combiner based on a high-pass π-type network structure. For example... Figure 3 As shown in (a), a transmission line with an electrical length of 3λ / 4 can be equivalently replaced by a high-pass π-type network consisting of a series capacitor C and two parallel inductors L. Here, λ is the wavelength of the radio frequency signal in the medium. Compared with the λ / 4 transmission line, the 3λ / 4 transmission line has the same impedance transformation characteristics, only differing in phase by 180°, and therefore is also suitable for Wilkinson power combining. Figure 3Figure (b) shows a lumped Wilkinson power combining structure based on a high-pass π-network. Each high-pass π-network includes a series capacitor and two parallel inductors. One high-pass π-network consists of a first capacitor C1, a first inductor L1, and a third inductor L3, while the other high-pass π-network consists of a second capacitor C2, a second inductor L2, and a third inductor L3. The capacitance values ​​of the first capacitor C1 and the second capacitor C2 are equal, the inductance values ​​of the first inductor L1 and the second inductor L2 are equal, and the inductance value of the third inductor L3 is half the inductance value of the first inductor L1. The two high-pass π-networks are connected to the same output port and power combining is achieved in conjunction with the isolation resistor R.

[0034] For a 3λ / 4 transmission line, its transmission matrix is ​​shown below, where Z0 represents the characteristic impedance of the transmission line:

[0035] for Figure 3 The high-pass π-type network shown in Figure (a) has the following transmission matrix, where L is the inductance of a single parallel inductor in the high-pass π-type network, C is the capacitance of the series capacitor in the high-pass π-type network, and ω is the angular frequency (ω=2πf, f is the operating frequency):

[0036] By making the two transfer matrices equal, we can obtain:

[0037] That is, when the parallel inductance L and series capacitor C in a high-pass π-type network satisfy the above relationship, the high-pass π-type network can be equivalent to replacing a 3λ / 4 transmission line.

[0038] Example 1

[0039] Figure 4 This illustration shows a specific implementation of a miniaturized Wilkinson power combining structure provided in this embodiment. For example... Figure 4 As shown, the power combining circuit provided in this embodiment includes: A first power amplifier Q1 and a second power amplifier Q2. Optionally, the first power amplifier Q1 and the second power amplifier Q2 are transistors, and the output terminals of the first power amplifier Q1 and the second power amplifier Q2 are the collector terminal (for bipolar transistors) or the drain terminal (for field-effect transistors), respectively. In a preferred embodiment, the first power amplifier Q1 and the second power amplifier Q2 are heterojunction bipolar transistors (HBTs), with their collector terminal being the output terminal.

[0040] The power combining output port Rfout is used to output the combined RF signal. This port is the output terminal of the power combining circuit and is connected to an external load (such as an antenna or the next stage circuit). The impedance of the external load is Z_ant, which is typically a standard 50Ω impedance.

[0041] A first capacitor C1 and a second capacitor C2 are connected in series between the output of the first power amplifier Q1 and the power combining output port Rfout, and the second capacitor C2 is connected in series between the output of the second power amplifier Q2 and the power combining output port Rfout. In this embodiment, the first capacitor C1 and the second capacitor C2 also serve as DC blocking capacitors at the outputs of Q1 and Q2, isolating the DC voltage between the collectors / drains of Q1 and Q2 to prevent DC current from flowing into the output load. On the other hand, the first capacitor C1 and the second capacitor C2 also serve as series capacitor elements in the first high-pass π-type network and the second high-pass π-type network, respectively, participating in the impedance transformation of power combining. Therefore, the first capacitor C1 and the second capacitor C2 achieve the functional reuse of the DC blocking capacitor and the series capacitor in the high-pass π-type network, eliminating the need for additional series capacitors dedicated to power combining.

[0042] A first inductor L1 and a second inductor L2 are connected. One end of the first inductor L1 is connected to the output of the first power amplifier Q1, and the other end is connected to the power supply voltage VCC. One end of the second inductor L2 is connected to the output of the second power amplifier Q2, and the other end is connected to the power supply voltage VCC. In this scheme, the first inductor L1 and the second inductor L2 also serve as power choke inductors for Q1 and Q2, providing DC bias voltage to the collector / drain of Q1 and Q2 while preventing radio frequency signals from entering the power supply and causing losses or interference. On the other hand, the first inductor L1 and the second inductor L2 also serve as parallel inductors in the first and second high-pass π-type networks, respectively, participating in impedance transformation for power combining. Similarly, L1 and L2 achieve functional multiplexing of choke inductors and parallel inductors in the high-pass π-type network, eliminating the need for additional parallel inductors dedicated to power combining.

[0043] The third inductor L3 is connected between the power combining output port Rfout and ground. The third inductor L3 is a matching inductor added in this scheme to achieve power combining, and its inductance value satisfies the relationship L3 = L1 / 2. The third inductor L3 provides the parallel inductance required by the two high-pass π-type networks at the output, and together with the first capacitor C1, the second capacitor C2, the first inductor L1, and the second inductor L2, forms a complete high-pass π-type network pair.

[0044] An isolation resistor R is connected between the output terminals of the first power amplifier Q1 and the second power amplifier Q2. The isolation resistor R improves the isolation between the two power amplifiers, absorbs reflected power, and prevents crosstalk from the output signal of one amplifier to the output terminal of the other. In this embodiment, the preferred resistance value of the isolation resistor R is R = 2... ,in This is the equivalent load impedance required at the output of either the first power amplifier Q1 or the second power amplifier Q2. The isolation resistor R is a standard component of Wilkinson power combiners and is added in this invention to achieve power combining.

[0045] Optionally, the power combining circuit of this embodiment further includes a first bypass capacitor C3 and a second bypass capacitor C4, as shown in the reference. Figure 10 The first bypass capacitor C3 is connected between the power supply voltage terminal VCC and ground, and the second bypass capacitor C4 is also connected between VCC and ground. The first bypass capacitor C3 and the second bypass capacitor C4 are used to treat the power supply voltage terminal VCC as equivalent to AC ground in the RF signal path, so that the first inductor L1 and the second inductor L2 form inductors connected in parallel to ground in the RF equivalent circuit, thus correctly realizing the topology of the high-pass π-type network. When the capacitance value of the bypass capacitor is chosen to be sufficiently large (typically tens to hundreds of picofarads), its impedance is close to zero at the RF operating frequency, and the VCC node can be regarded as RF ground. In this case, one end of the first inductor L1 is AC grounded through the first bypass capacitor C3, and one end of the second inductor L2 is AC grounded through the second bypass capacitor C4. Both the first inductor L1 and the second inductor L2 form inductors connected in parallel to ground. In a preferred embodiment, the first bypass capacitor C3 and the second bypass capacitor C4 are on-chip integrated capacitors, integrated inside the chip near the VCC pad of the power supply voltage terminal, in order to shorten the metal interconnect length between the capacitor and the VCC pad, reduce the interconnect parasitic inductance, thereby reducing the impedance of the high-frequency decoupling path and improving the high-frequency decoupling effect.

[0046] like Figure 4 As shown, the third inductor L3, together with the first capacitor C1 and the first inductor L1, forms a first high-pass π-type network, and the third inductor L3, together with the second capacitor C2 and the second inductor L2, forms a second high-pass π-type network. The outputs of the first and second high-pass π-type networks are connected to the power combining output port Rfout, forming two power combining networks. The first and second high-pass π-type networks are equivalent to transmission lines with an electrical length of 3λ / 4. The two high-pass π-type networks are connected together at the power combining output port Rfout, that is, the two networks share the third inductor L3 as the parallel inductor at the output, thus forming two power combining networks.

[0047] During radio frequency (RF) signal transmission, the first power amplifier Q1 and the second power amplifier Q2 amplify the two RF input signals, respectively. The amplified RF signals simultaneously enter a first high-pass π-type network composed of a first capacitor C1, a first inductor L1, and a third inductor L3, and a second high-pass π-type network composed of a second capacitor C2, a second inductor L2, and a third inductor L3. During this process, the first capacitor C1 and the second capacitor C2 isolate the DC voltage at the output terminals of the first power amplifier Q1 and the second power amplifier Q2, respectively, and simultaneously participate in the impedance transformation of the RF signals as series arms of their respective high-pass π-type networks. The two signals undergo impedance transformation through the two high-pass π-type networks (by...). Transform to After in-phase power combining, the output is superimposed at the power combining output port Rfout. Throughout the process, DC isolation, impedance transformation and power combining are completed synchronously. The first capacitor C1, the second capacitor C2, the first inductor L1 and the second inductor L2 all simultaneously carry their respective DC functions (DC blocking or choking) and RF functions (series capacitor or parallel inductor).

[0048] In a preferred embodiment, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 are equal to ensure the symmetry of the two power amplifiers and the balance of the two signals. Similarly, the inductance values ​​of the first inductor L1 and the second inductor L2 are equal to ensure symmetry between the two paths.

[0049] In this embodiment, the parameter values ​​of each component satisfy the following relationship, so that the two high-pass π-type networks are equivalent to two 3λ / 4 transmission lines at the center operating frequency f:

[0050] in, This is the equivalent load impedance required at the output of the first power amplifier (Q1) or the second power amplifier (Q2). This represents the characteristic impedance of an equivalent 3λ / 4 transmission line. , L1 is the load impedance required for the power combining output port (Rfout); L2 and L1 are the inductance values ​​of the first inductor and the second inductor, respectively; C1 is the capacitance value of the first capacitor and the second capacitor; L3 is the inductance value of the third inductor; and R is the resistance value of the isolation resistor.

[0051] The derivation of the above relationships is based on the condition that the transmission matrices are equal (see the basic principles section of this invention for details). When the values ​​of each component satisfy the above relationships, the two high-pass π-type networks are precisely equivalent to two 3λ / 4 transmission lines at the center operating frequency f, thereby realizing all the functions of Wilkinson power combining.

[0052] In one specific embodiment, the operating frequency f = 2.5 GHz, =50Ω, When =12.5Ω, ≈35.36Ω. Therefore, L1 = L2 = 35.36 / (2π × 2.5 × 10⁻⁶). 9 )≈2.25nH, C1=C2=1 / (2π×2.5×10 9 (×35.36)≈1.8pF, L3≈1.125nH, R=25Ω. It should be noted that the above values ​​are for illustrative purposes only; specific values ​​can be adjusted according to the actual operating frequency and impedance requirements.

[0053] It should be noted that in the original operating circuits of the first power amplifier Q1 and the second power amplifier Q2, the output terminals of both power amplifiers Q1 and Q2 already have DC blocking capacitors connected in series, and the power supply voltage terminals VCC each have choke inductors connected in parallel. This solution cleverly reuses these existing DC blocking capacitors and choke inductors on the power amplifiers as series capacitors and parallel inductors in the power combining network, thus eliminating the need for additional independent power combining inductors and capacitors. Compared to traditional solutions, this solution is equivalent to adding only a third inductor L3 (matching inductor) and an isolation resistor R to the original power amplifier structure, achieving complete dual-path power combining functionality and significantly reducing the increase in passive components.

[0054] Example 2

[0055] Figure 5 The circuit structure of a power amplifier module according to this embodiment is shown. The power amplifier module of this embodiment is implemented based on the power combining circuit of embodiment 1.

[0056] like Figure 5 As shown, the power amplifier module of this embodiment includes a substrate and a power amplifier chip bonded to the substrate; The power amplifier chip integrates: The first power amplifier Q1 and the second power amplifier Q2 are both transistors. Optionally, the first power amplifier Q1 and the second power amplifier Q2 are HBT transistors, with their collector terminals as output terminals, their base terminals as input RF signals, and their emitters grounded. The transistor size is selected according to the power level requirements. In this embodiment, the first power amplifier Q1 and the second power amplifier Q2 are of the same size to ensure symmetry between the two circuits.

[0057] The power combining output port Rfout is used to output the combined RF signal; A first capacitor C1 and a second capacitor C2 are connected in series between the output terminal of the first power amplifier Q1 and the power combining output port Rfout, and the second capacitor C2 is connected in series between the output terminal of the second power amplifier Q2 and the power combining output port Rfout. The first capacitor C1 is a DC blocking capacitor at the output terminal of the first power amplifier Q1, and the second capacitor C2 is a DC blocking capacitor at the output terminal of the second power amplifier Q2.

[0058] An isolation resistor R is connected between the output terminals of the first power amplifier Q1 and the second power amplifier Q2, serving as the isolation resistor for the Wilkinson power combiner.

[0059] The substrate is provided with: One end of the first inductor L1 is connected to the output terminal of the first power amplifier Q1, and the other end is connected to the power supply voltage terminal VCC; one end of the second inductor L2 is connected to the output terminal of the second power amplifier Q2, and the other end is connected to the power supply voltage terminal VCC. The first inductor L1 is the power supply choke inductor of the first power amplifier Q1, and the second inductor L2 is the power supply choke inductor of the second power amplifier Q2. In this embodiment, both the first inductor L1 and the second inductor L2 are implemented using on-chip spiral inductors, and the inductance values ​​are set according to the operating frequency and impedance requirements.

[0060] In this embodiment, the first capacitor C1, the second capacitor C2, and the isolation resistor R are all on-chip integrated components, located inside the power amplifier chip. The first capacitor C1 and the second capacitor C2 are implemented using on-chip metal-insulator-metal (MIM) capacitors or metal-oxide-metal (MOM) capacitors, with capacitance values ​​set according to the operating frequency and impedance requirements. The isolation resistor R is implemented using a polysilicon resistor or a thin-film resistor, with a resistance value of 2... Z opt The first inductor L1 and the second inductor L2 are implemented on the substrate using spiral inductors. The integration of these components is fully compatible with standard RF integrated circuit manufacturing processes and requires no additional process steps.

[0061] The power amplifier module in this embodiment also includes a third inductor L3, which is located outside the chip and connected between the power combining output port Rfout and the ground of the substrate.

[0062] Optionally, the third inductor L3 can be an inductor coil mounted on the substrate, or it can be formed by a ground bonding wire between the chip and the substrate. In this embodiment, the third inductor L3 is formed by a ground bonding wire of the chip: one end of the bonding wire is connected to the pad of the power combining output port Rfout on the chip, and the other end is connected to the ground pad or ground plane on the substrate. The inductance is controlled by controlling the length and curvature of the bonding wire to satisfy the relationship L3 = L1 / 2. The diameter and length of the bonding wire can be selected according to the required inductance and parasitic parameter requirements. Since the inductance of the third inductor L3 is relatively small (usually less than 2nH), using a bonding wire can achieve a high quality factor Q value, reduce the insertion loss of the power combining network, and does not occupy any chip area.

[0063] Further, refer to Figure 4 The module in this embodiment also includes a first bypass capacitor C3 and a second bypass capacitor C4 integrated on the chip. The first bypass capacitor C3 and the second bypass capacitor C4 are respectively connected between the power supply voltage terminal VCC and ground. In this embodiment, the first bypass capacitor C3 and the second bypass capacitor C4 are implemented using on-chip MIM capacitors. The capacitance value should be selected to ensure that the power supply voltage terminal VCC presents a low impedance (i.e., AC ground) to ground at the operating frequency. Typically, the capacitance values ​​of the first bypass capacitor C3 and the second bypass capacitor C4 range from 10pF to 100pF, with the specific value determined according to the operating frequency.

[0064] like Figure 5 As shown, the third inductor L3, together with the first capacitor C1 and the first inductor L2, forms a first high-pass π-type network, and the third inductor L3, together with the second capacitor C2 and the second inductor L2, forms a second high-pass π-type network. The transmission matrix of the first high-pass π-type network is equivalent to a transmission line with an electrical length of 3λ / 4, and the transmission matrix of the second high-pass π-type network is equivalent to another transmission line with an electrical length of 3λ / 4. The two high-pass π-type networks are connected together at the power combining output port Rfout, sharing the third inductor L3, thus realizing two-way power combining. At the same time, since the first capacitor C1 and the second capacitor C2 are both DC blocking capacitors, and the first inductor L1 and the second inductor L2 are both choke inductors, the entire power combining network is completed only by adding a third inductor L3 (bonding alloy wire) and an isolation resistor R, which is a very small incremental improvement compared to the original power amplifier chip structure.

[0065] The specific parameter requirements for each component in this embodiment are the same as in Embodiment 1, and will not be repeated here.

[0066] It should be noted that in the chip layout design, the first capacitor C1 and the second capacitor C2 should be arranged symmetrically, as should the first inductor L1 and the second inductor L2, to ensure the symmetry and phase consistency of the two RF paths. The isolation resistor R is placed between the output terminals of the first power amplifier Q1 and the second power amplifier Q2, and should be close to the two output terminals on the layout to reduce parasitic effects. The third inductor L3 (bonding alloy wire) is led from the Rfout pad of the power combining output port to the external ground plane, and its routing should be kept away from other sensitive circuits to avoid electromagnetic coupling interference.

[0067] This embodiment focuses on describing the relevant structures at the output of the power amplifier module used for power combining. The input matching network, bias circuit, inter-stage matching network, and other auxiliary circuits of the power amplifier chip can all be implemented using conventional techniques in the art, and will not be elaborated upon here. This module can be implemented using standard RF integrated circuit manufacturing processes and can be applied to various wireless communication systems requiring high output power, such as 5G base stations, WiFi access points, and satellite communication terminals.

[0068] The power combining in this embodiment is based on the Wilkinson power combining architecture. Unlike traditional structures, the power combining in this scheme is based on 3λ / 4 transmission lines instead of λ / 4 transmission lines. The advantage of this is that its lumped equivalent circuit can be transformed into an LC high-pass network composed of series capacitors and parallel inductors; and the series capacitors can be combined with the DC blocking capacitors required by the PA, and the parallel inductors to ground can be combined with the choke inductors required by the PA, thereby greatly reducing the additional chip area occupied by power combining.

[0069] This solution cleverly reuses the existing DC blocking capacitor and choke inductor on the power amplifier chip as the series capacitor and parallel inductor of the power combining network, thus eliminating the need for additional independent power combining inductors and capacitors. Compared to traditional solutions, this solution is equivalent to adding only a third inductor L3 (matching inductor) and an isolation resistor R to the original power amplifier chip structure, achieving complete dual-path power combining functionality and significantly reducing the increase in passive components.

[0070] Figure 6 A traditional power combining structure based on a low-pass network is shown for comparison. Figure 5 and Figure 6 (The components marked in red need to be implemented on the substrate). It can be seen that in the traditional structure, all matching components (4 inductors L, 5 capacitors C and isolation resistor R) need to be added separately. All inductors are placed on the substrate, and most of the capacitors are also placed on the substrate, occupying a large amount of substrate area.

[0071] Table 1 compares the number of passive devices required for the two power combining methods:

[0072] As shown in Table 1, compared with the traditional low-pass network-based structure, the power combining structure in the power amplifier module of this embodiment reduces the number of inductors from 4 to 3 and the number of capacitors from 5 to 2. Furthermore, all capacitors and resistors can be integrated inside the chip. Moreover, the matching inductor can be made of bonding wires, and only two inductors are placed on the substrate, which greatly reduces the substrate area and lowers the overall solution cost.

[0073] Figure 7 , Figure 8 and Figure 9 The simulation results based on the power amplifier module of this embodiment are shown, with a simulation frequency of 2.5 GHz. Port 1 and port 2 are the two input ports to be combined, and port 3 is the output port after power combining.

[0074] Figure 7 The simulation results for S11, S22, and S33 are shown. As can be seen from the figure, at a working frequency of 2.5 GHz, the return losses of the three ports S11, S22, and S33 are all less than -45 dB, indicating that the structure achieves good impedance matching at both the input and output ports. Good port matching ensures maximum power transfer and minimal signal reflection, which is a fundamental prerequisite for the normal operation of a power combiner.

[0075] Figure 8 The simulation results for S31 and S32 are shown. S31 represents the transmission coefficient from port 1 to port 3, and S32 represents the transmission coefficient from port 2 to port 3. As can be seen from the figure, both S31 and S32 are approximately -3.01dB, perfectly consistent with the theoretical value. In an ideal Wilkinson power combiner, when two signals are combined with equal amplitude and in phase, the transmission coefficient to the output of each signal is -3dB (i.e., the power is halved), and the output power after combining the two signals is equal to the sum of the two input powers. The transmission coefficient of -3.01dB indicates that this structure does not introduce additional insertion loss, and the power combining efficiency is close to 100%.

[0076] Figure 9 The simulation results for S12 are shown. S12 represents the isolation between port 1 and port 2, i.e., the degree to which the output signal of one power amplifier leaks to the output of the other power amplifier. As can be seen from the figure, S12 is less than -50dB, indicating good isolation between the two input ports. High isolation ensures minimal crosstalk between the two power amplifiers, allowing each amplifier to operate independently without affecting the others. This is crucial for ensuring the quality of the synthesized signal and the stability of the system.

[0077] Figure 10The results are based on actual measurements of the power amplifier module in this embodiment. As can be seen from the figure, at an operating frequency of 2.69 GHz, the power amplifier achieves an output power of 35.5 dBm (approximately 3.5 W), indicating that the amplifier has high output power and verifying the feasibility and superiority of the power combining scheme of this invention in practical applications.

[0078] Example 3

[0079] This embodiment provides an RF front-end module, including the power amplifier module of Embodiment 2 above.

[0080] The power amplifier module is mounted on the module substrate of the RF front-end module, and its power combining output port Rfout is used to output the power combined RF signal. The power amplifier module can be a standalone packaged device with its module substrate mounted on the module substrate, or it can be integrated with other devices of the RF front-end module on the same module substrate.

[0081] The power combining output port Rfout of the power amplifier module is connected to the radio frequency signal transmission line on the module substrate, and the combined radio frequency signal is output outward along the signal transmission line.

[0082] Depending on the actual application requirements, the RF front-end module of this embodiment can also be equipped with one or more of the following on the path from the power combining output port Rfout to the antenna: a general filter, an RF switch, a duplexer / multiplexer, a coupler, and an impedance matching network.

[0083] In addition, the RF front-end module of this embodiment may also include auxiliary devices such as a low-noise amplifier (connected to the receiver of the RF switch), a power management circuit, a controller, and a package housing.

[0084] All of the above-mentioned devices are conventional and general-purpose devices in this field. Their specific selection, quantity and connection relationship can be flexibly configured according to the application scenario (such as 5G, WiFi, Bluetooth, etc.), and none of them constitute a limitation on the scope of protection of this invention.

[0085] The various embodiments of the present invention have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments.

Claims

1. A power combining circuit, applied to an RF power amplifier, characterized in that, include: First power amplifier (Q1) and second power amplifier (Q2); The power combining output port (Rfout) is used to output the combined RF signal; A first capacitor (C1) and a second capacitor (C2) are connected in series between the output terminal of the first power amplifier (Q1) and the power combining output port (Rfout), and the second capacitor (C2) is connected in series between the output terminal of the second power amplifier (Q2) and the power combining output port (Rfout). A first inductor (L1) and a second inductor (L2), one end of the first inductor (L1) is connected to the output terminal of the first power amplifier (Q1), and the other end is connected to the power supply voltage terminal (VCC). One end of the second inductor (L2) is connected to the output terminal of the second power amplifier (Q2), and the other end is connected to the power supply voltage terminal (VCC). The third inductor (L3) is connected between the power combining output port (Rfout) and ground; And an isolation resistor (R) is connected between the output terminal of the first power amplifier (Q1) and the output terminal of the second power amplifier (Q2); The first capacitor (C1), the first inductor (L1), and the third inductor (L3) constitute a first high-pass π-type network, and the second capacitor (C2), the second inductor (L2), and the third inductor (L3) constitute a second high-pass π-type network. The output terminals of the first high-pass π-type network and the second high-pass π-type network are connected to the power combining output port (Rfout) to form two power combining networks. The first high-pass π-type network and the second high-pass π-type network are respectively equivalent to transmission lines with an electrical length of 3λ / 4.

2. The power combining circuit according to claim 1, characterized in that, The first capacitor (C1) and the second capacitor (C2) are configured to serve as series capacitor elements in the first high-pass π-network and the second high-pass π-network, and simultaneously as DC blocking capacitors at the output terminals of the first power amplifier (Q1) and the second power amplifier (Q2).

3. The power combining circuit according to claim 1, characterized in that, The first inductor (L1) and the second inductor (L2) are configured to serve as parallel inductor elements in the first high-pass π-network and the second high-pass π-network, and simultaneously as power supply choke inductors in the first power amplifier (Q1) and the second power amplifier (Q2).

4. The power combining circuit according to claim 1, characterized in that, The parameter values ​​of the first inductor (L1), the second inductor (L2), the first capacitor (C1), the second capacitor (C2), the third inductor (L3), and the isolation resistor (R) satisfy the following relationship, so that the first high-pass π-type network and the second high-pass π-type network are equivalent to transmission lines with an electrical length of 3λ / 4 at the center operating frequency f: in, The equivalent load impedance required at the output of the first power amplifier (Q1) or the second power amplifier (Q2) is... This represents the characteristic impedance of an equivalent 3λ / 4 transmission line. , The required external load impedance for the power combining output port (Rfout).

5. The power combining circuit according to claim 1, characterized in that, Also includes: A first bypass capacitor (C3) and a second bypass capacitor (C4), wherein the first bypass capacitor (C3) is connected between the power supply voltage terminal (VCC) and ground, and the second bypass capacitor (C4) is connected between the power supply voltage terminal (VCC) and ground; The first bypass capacitor (C3) and the second bypass capacitor (C4) are used to treat the power supply voltage terminal (VCC) as AC ground in the radio frequency signal path, so that the first inductor (L1) and the second inductor (L2) form an inductor connected in parallel to ground.

6. The power combining circuit according to claim 1, characterized in that, The first power amplifier (Q1) and the second power amplifier (Q2) are transistors, and the output terminals of the first power amplifier (Q1) and the second power amplifier (Q2) are the collector terminal and the drain terminal of the transistor, respectively.

7. A power amplifier module, characterized in that, Includes a substrate and a power amplifier chip bonded to the substrate; the power amplifier chip integrates: First power amplifier (Q1) and second power amplifier (Q2); The power combining output port (Rfout) is used to output the combined RF signal; A first capacitor (C1) and a second capacitor (C2) are connected in series between the output terminal of the first power amplifier (Q1) and the power combining output port (Rfout), and the second capacitor (C2) is connected in series between the output terminal of the second power amplifier (Q2) and the power combining output port (Rfout). The first capacitor (C1) is a DC blocking capacitor at the output terminal of the first power amplifier (Q1), and the second capacitor (C2) is a DC blocking capacitor at the output terminal of the second power amplifier (Q2). An isolation resistor (R) is connected between the output terminal of the first power amplifier (Q1) and the output terminal of the second power amplifier (Q2); The substrate is provided with: A first inductor (L1) and a second inductor (L2) are connected. One end of the first inductor (L1) is connected to the output terminal of the first power amplifier (Q1), and the other end is connected to the power supply voltage terminal (VCC). One end of the second inductor (L2) is connected to the output terminal of the second power amplifier (Q2), and the other end is connected to the power supply voltage terminal (VCC). The first inductor (L1) is the power supply choke inductor of the first power amplifier (Q1), and the second inductor (L2) is the power supply choke inductor of the second power amplifier (Q2). Also includes: The third inductor (L3) is connected between the power combining output port (Rfout) and the ground of the substrate; The third inductor (L3), together with the first capacitor (C1) and the first inductor (L1), constitutes a first high-pass π-type network, and the third inductor (L3), together with the second capacitor (C2) and the second inductor (L2), constitutes a second high-pass π-type network. The transmission matrix of the first high-pass π-type network is equivalent to a transmission line with an electrical length of 3λ / 4, and the transmission matrix of the second high-pass π-type network is equivalent to another transmission line with an electrical length of 3λ / 4. The first high-pass π-type network and the second high-pass π-type network are connected together at the power combining output port (Rfout) to form two power combining networks.

8. The power amplifier module according to claim 7, characterized in that, The third inductor (L3) is a coil inductor disposed on the packaging substrate; Alternatively, the third inductor (L3) may be formed by bonding wires between the power amplifier chip and the substrate, the bonding wires being connected between the pads of the power combining output port (Rfout) and the ground of the substrate.

9. The power amplifier module according to claim 7, characterized in that, The power amplifier chip also integrates: A first bypass capacitor (C3) and a second bypass capacitor (C4), wherein the first bypass capacitor (C3) is connected between the power supply voltage terminal (VCC) and ground, and the second bypass capacitor (C4) is connected between the power supply voltage terminal (VCC) and ground; The first bypass capacitor (C3) and the second bypass capacitor (C4) are used to convert the power supply voltage terminal (VCC) into AC ground at the radio frequency signal frequency, so that the first inductor (L1) and the second inductor (L2) form an inductor connected in parallel to ground in the radio frequency equivalent circuit.

10. A radio frequency front-end module, characterized in that, Includes the power amplifier module as described in any one of claims 7-9.

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