Method for manufacturing a vibration device and method for manufacturing an electronic component

Abstract

Provided are a method for manufacturing a vibration device and a method for manufacturing an electronic component, the vibration device including a vibration element, a base substrate having a bonding region that surrounds the vibration element in plan view, and a cover that is bonded to the bonding region of the base substrate and that, together with the base substrate, hermetically seals the vibration element, the method for manufacturing the vibration device including a step of bonding the bonding region of the base substrate to the cover by thermocompression bonding a bonding layer containing at least Cu (copper), to hermetically seal the vibration element in a space surrounded by the base substrate and the cover.

Description

Technical Field

[0001] This invention relates to a method for manufacturing a vibration device and a method for manufacturing electronic components. Background Technology

[0002] Patent Document 1 discloses a structure for a vibrating device in which the vibrating element is hermetically sealed under reduced pressure by directly bonding a silicon substrate to a cover. Direct bonding is a bonding method in which identical materials are bonded together in close contact. Examples of direct bonding include diffusion bonding and room temperature activation bonding. Examples of bonding materials include gold (Au).

[0003] Patent Document 1: Japanese Patent Application Publication No. 2020-195116

[0004] However, the method described in Patent Document 1 is expensive because it uses gold, which is also a precious metal, as the bonding material. Summary of the Invention

[0005] A method for manufacturing a vibrating device, the vibrating device comprising: a vibrating element; a base substrate having a bonding region surrounding the vibrating element when viewed from above; and a cover that is bonded to the bonding region of the base substrate and together with the base substrate hermetically seals the vibrating element, the method comprising the steps of bonding the bonding region of the base substrate to the cover by hot pressing a bonding layer containing at least Cu (copper), thereby hermetically sealing the vibrating element in a space surrounded by the base substrate and the cover.

[0006] A method for manufacturing an electronic component, the electronic component comprising: a functional element; a base substrate having a bonding region surrounding the functional element when viewed from above; and a cover that is bonded to the bonding region of the base substrate and hermetically seals the functional element together with the base substrate, the method comprising the steps of bonding the bonding region of the base substrate to the cover by hot pressing a bonding layer containing at least Cu (copper), thereby hermetically sealing the functional element in a space surrounded by the base substrate and the cover. Attached Figure Description

[0007] Figure 1 It is a three-dimensional view showing the structure of the vibrating device.

[0008] Figure 2 It is an exploded perspective view showing the structure of the vibrating device.

[0009] Figure 3 It is along Figure 1 The cross-sectional view of the vibrating device along line AA is shown.

[0010] Figure 4 This is a cross-sectional view showing the structure of the bonding layer.

[0011] Figure 5 This is a flowchart illustrating a method for manufacturing a vibrating device.

[0012] Figure 6A This is a cross-sectional view showing the manufacturing method of the vibrating device.

[0013] Figure 6B This is a cross-sectional view showing the manufacturing method of the vibrating device.

[0014] Figure 7 This is a diagram illustrating the bonding conditions in the manufacturing process of a vibrating device.

[0015] Figure 8 This is a diagram illustrating the bonding conditions in the manufacturing process of a vibrating device.

[0016] Figure 9 This is a cross-sectional view showing the structure of a modified example of a vibrating device.

[0017] Figure 10A This is a cross-sectional view showing a method for manufacturing a modified vibrating device.

[0018] Figure 10B This is a cross-sectional view showing a method for manufacturing a modified vibrating device.

[0019] Figure 11 This is a cross-sectional view showing the structure of a modified example of a vibrating device.

[0020] Figure 12 This is a cross-sectional view showing the structure of a modified example of a vibrating device.

[0021] Figure 13 This is a cross-sectional view showing the structure of an electronic component in a modified example.

[0022] Label Explanation

[0023] 10…base substrate, 10a…first surface, 10b…second surface, 20…cover, 21…recess, 30, 30A, 30B, 30C, 30D…bonding layer, 30a…bonding area, 31…titanium layer, 32…copper layer, 33…titanium layer, 40…external connection terminal, 41…through electrode, 43…aluminum electrode, 50…semiconductor substrate, 51…integrated circuit, 70…vibrating element, 70A…frame, 71…vibrating substrate, 72…excitation electrode, 73… …excitation electrode, 74…bump, 75…wiring pattern, 100, 100A, 100B, 100C…vibration device, 1000…etalon, 1005…wavelength variable interference filter as a functional element, 1006…housing, 1051…first substrate as cover, 1052…second substrate as base substrate, 1053…bonding layer, 1054…first reflective film, 1055…second reflective film, 1061…base, 1062…cover. Detailed Implementation

[0024] In the following figures, the three mutually orthogonal axes are designated as the X-axis, Y-axis, and Z-axis for explanation. The direction along the X-axis is designated as the "X direction," the direction along the Y-axis as the "Y direction," and the direction along the Z-axis as the "Z direction." The direction of the arrow is the "+" direction, and the direction opposite to the "+" direction is designated as the "-" direction. Additionally, the "+Z" direction is sometimes referred to as "up" or "above," and the "-Z" direction as "down" or "below." Viewing from the "+Z" direction is also referred to as a planar view or a top view. Furthermore, the surface on the "+" side of the Z-direction is designated as the upper surface, and the surface on the opposite side of the Z-direction is designated as the lower surface.

[0025] Furthermore, in the following description, for example, the term "on the substrate" relative to the substrate indicates any of the following situations: disposed above the substrate in contact with the substrate; disposed above the substrate through other structures; or partially disposed above the substrate in contact with the substrate and partially disposed above the substrate through other structures.

[0026] First, refer to Figures 1-3 The structure of the vibrating device 100 is described.

[0027] like Figure 1 As shown, the vibration device 100 has: a base substrate 10; a cover 20 disposed on the base substrate 10; and a bonding layer 30 that bonds the base substrate 10 and the cover 20.

[0028] A semiconductor substrate 50 is disposed on the upper surface of the base substrate 10, i.e., on the bonding layer 30 side (see reference). Figure 3 The lower surface of the base plate 10 has an external connection terminal 40 for electrical connection to the outside.

[0029] A vibration element 70 is disposed on the base plate 10 (see reference). Figure 2 , Figure 3 The bonding layer 30 is arranged in a ring on the base plate 10 in a manner that surrounds the vibrating element 70. By providing the cover 20 on the base plate 10, the vibrating element 70 can be airtightly sealed.

[0030] like Figure 2 and Figure 3 As shown, the base substrate 10 of the vibration device 100 has: a first surface 10a on one side where the vibration element 70 is disposed; and a second surface 10b on the side opposite to the first surface 10a and where the external connection terminal 40 is disposed.

[0031] When viewed from above, the bonding layer 30 is arranged in a ring on the base substrate 10 in a manner that surrounds the vibrating element 70. In the base substrate 10, the area where the bonding layer 30 is disposed is referred to as the bonding region 30a.

[0032] The base substrate 10 is, for example, a silicon substrate. The cover 20 is, for example, silicon (Si). The bonding layer 30 is a multilayer film containing copper (Cu). Specifically, the bonding layer 30 is a multilayer film of titanium (Ti), copper (Cu), and titanium (Ti), or a multilayer film of titanium (Ti), copper (Cu), and titanium tungsten (TiW).

[0033] As described above, a semiconductor substrate 50 having an integrated circuit 51 is disposed on the first surface 10a side of the base substrate 10. The integrated circuit 51 is a circuit having active components such as transistors.

[0034] The vibrating element 70 is mounted on the first surface 10a of the base substrate 10 in a cantilever beam configuration. The vibrating element 70 includes: a vibrating substrate 71; an excitation electrode 72 disposed on the upper surface of the vibrating substrate 71; and an excitation electrode 73 disposed on the lower surface of the vibrating substrate 71. The vibrating element 70 vibrates when a voltage is applied. The vibrating element 70 is electrically connected to the integrated circuit 51 of the semiconductor substrate 50 via bumps 74 and wiring patterns 75 connected to the excitation electrodes 72 and 73.

[0035] A recess 21, which serves as a vacuum chamber, is provided in the cover 20. A copper-containing thin film layer, which also functions as a bonding layer 30, is formed in the cover 20 from the joining region 30a to the recess 21. By bonding the base substrate 10 to the cover 20 using the bonding layer 30, the vibrating element 70 is vacuum-sealed. Thus, a sealed space S is formed inside the vibrating device 100.

[0036] An external connection terminal 40 is formed on the second surface 10b of the base substrate 10. The external connection terminal 40 is electrically connected to the aluminum electrode 43 of the semiconductor substrate 50 via a through electrode 41 and a conductive film 42 disposed through the base substrate 10. The aluminum electrode 43 is electrically connected to the integrated circuit 51 of the semiconductor substrate 50.

[0037] Next, refer to Figure 4 The structure of the bonding layer 30 is described in detail.

[0038] like Figure 4 As shown, the bonding layer 30 bonds the base substrate 10 to the cover 20. The bonding layer 30 is a laminated film formed by stacking a titanium (Ti) layer 31, a copper (Cu) layer 32, and a titanium (Ti) layer 33 from the side of the base substrate 10.

[0039] The thickness of the copper layer 32, which forms the main body of the bonding layer 30, is, for example, 60 nm. Alternatively, to also function as the wiring pattern 75, the thickness can be selected in the range of approximately 10 nm to 150 nm depending on the wiring resistance. The thickness of the titanium layers 31 and 33 is, for example, 10 nm.

[0040] Specifically, as the thickness of the copper layer 32 increases, the thickness of the bonding layer 30 also increases, and the surface roughness of the bonding layer 30 increases. Therefore, the thickness of the copper layer 32 is preferably set to a thickness that does not increase the wiring resistance.

[0041] Titanium layer 31 is formed to improve adhesion to the silicon-based substrate 10. Titanium layer 33 is formed to improve adhesion to the silicon-based cover 20.

[0042] The bonding layer 30, which includes the copper layer 32, is formed, for example, by sputtering and patterned using photolithography. The bonding layer 30 bonds the base substrate 10 to the cover 20 by thermocompression bonding (TCB). Furthermore, to mitigate heat-induced stress, the titanium layers 31 and 33 can also be titanium tungsten (TiW) with a lower Young's modulus than the titanium layers 31 and 33.

[0043] Figure 4 The images show SEM (scanning electron microscope) images of the bonding layers 30 after bonding at two different bonding temperatures: 230°C and 250°C. It can be seen that the interfaces of the bonding layers 30 disappear after bonding, and the bonding layers 30 become integrated. Figure 4 In the bonding layer 30 shown, the titanium layers 31 and 33 have a thickness of 20 nm, and the copper layer 32 has a thickness of 80 nm.

[0044] Grain boundaries were observed in the cross-section of copper layer 32, but not in the cross-section of the bonding interface. Furthermore, it was found that the bonding layer 30 showed no difference in state at both 230°C and 250°C, indicating that low-temperature hot-press bonding could be achieved.

[0045] First, refer to Figures 5-8 The manufacturing method of the vibration device 100 is described.

[0046] like Figure 5 As shown, firstly, the manufacturing method of the cover 20 will be explained. In step S11, the silicon wafer that becomes the cover 20 is cleaned.

[0047] Next, in step S12, a mask is formed. Specifically, as follows: Figure 6A As shown, in order to form a recess 21 in the cover 20, a mask using a resist is formed, for example, in the area overlapping with the recess 21.

[0048] Next, in step S13, a recess 21 is formed. Specifically, as follows: Figure 6A As shown, the resist pattern is used as a mask to etch the cover 20. This forms a recess 21 in the cover 20.

[0049] Next, in step S14, a bonding layer 30B constituting the bonding layer 30 is formed (see reference). Figure 6B Specifically, a multilayer film of titanium (Ti) layer 33 and copper (Cu) layer 32 is formed from the lower layer, i.e., the cover body 20 side, along the entire inner surface of the bonding region 30a of the cover body 20. For example, sputtering can be used as a method for forming the bonding layer 30.

[0050] The thickness of the titanium layer 33 is, for example, 10 nm. The thickness of the copper layer 32 is, for example, 40 nm. In this way, by making the thickness of the bonding layer 30B thinner, the surface roughness of the mirror polished (MP) surface of the silicon wafer can be kept constant, and the surface roughness of the bonding layer 30B can be suppressed from becoming rougher.

[0051] The surface roughness Ra (arithmetic mean roughness) of the bonding layer 30B is, for example, 3 nm or less. Preferably, by suppressing the surface roughness Ra to 0.3 nm, the bonding force based on surface tension can be maximized, and the generation of voids at the bonding interface can be suppressed.

[0052] Next, the manufacturing method of the vibrating element 70 will be described. In step S21, the vibrating element 70 is formed using a known manufacturing method.

[0053] Next, the manufacturing method of the base substrate 10 will be described. In step S31, a semiconductor substrate 50 is formed. Specifically, first, a silicon wafer is prepared. Then, using a known manufacturing method, a semiconductor substrate 50 having an integrated circuit 51 is formed on the silicon wafer, i.e., the base substrate 10.

[0054] Next, in step S32, a through electrode 41, a wiring pattern 75, and a bonding layer 30A are formed on the base substrate 10. Specifically, first, the through electrode 41 is formed using TSV (Through Silicon Via) technology. Then, a stacked film of titanium (Ti) layer 31 and copper (Cu) layer 32 is formed from the lower layer, i.e., the base substrate 10 side.

[0055] In this way, since the same material is used to form both the wiring pattern 75 and the bonding layer 30A, it can be used as both the wiring pattern 75 and the bonding layer 30A, which simplifies the manufacturing process.

[0056] Furthermore, since the bonding layer 30B formed on the cover 20 and the bonding layer 30A formed on the base substrate 10 are laminated films containing titanium layers 33 and 31, when the base substrate 10 and the cover 20 are silicon substrates, the adhesion between copper (Cu) and silicon (Si) can be improved by titanium (Ti). As a result, the bonding strength between the base substrate 10 and the cover 20 can be improved.

[0057] For example, sputtering can be used as a method for forming the bonding layer 30A. Then, photolithography and etching are used to form the wiring pattern 75 and the bonding layer 30A.

[0058] The thickness of the titanium layer 31 is, for example, 10 nm. The thickness of the copper layer 32 is, for example, 40 nm. In this way, by making the thickness of the bonding layer 30A thinner, the surface roughness of the mirror polished (MP) surface of the silicon wafer can be kept constant, and the surface roughness of the bonding layer 30A can be suppressed from becoming rougher.

[0059] The surface roughness Ra (arithmetic mean roughness) of the bonding layer 30A is, for example, 3 nm or less. Preferably, by suppressing the surface roughness Ra to 0.3 nm, it is possible to suppress the formation of voids at the bonding interface and maximize the bonding force based on surface tension.

[0060] Next, in step S33, bump 74 is formed. Specifically, bump 74 is formed on the aluminum electrode 43 and wiring pattern 75 that are electrically connected to the integrated circuit 51. Bump 74 is a gold (Au) bump, formed by plating or the like.

[0061] Next, in step S41, the vibrating element 70 is joined. Specifically, the vibrating element 70 is joined to the base substrate 10 via the bump 74. Specifically, during joining, the base substrate 10 is heated to approximately 200°C. At this time, organic matter or the like may sometimes adhere as residue to the surface of the base substrate 10. Therefore, after joining the vibrating element 70 to the base substrate 10, the surface of the base substrate 10 is irradiated with ultraviolet light in a vacuum to remove the organic residue from the surface.

[0062] In addition, treatments such as steam plasma treatment, formic acid treatment, ethanol impregnation treatment, and acetic acid impregnation treatment can be performed to prevent the formation of an oxide film such as copper oxide (CuO) on the outermost surface of the copper layer 32 constituting the bonding layer 30, or to reduce the oxide film. Thus, the terminals (not shown) of the vibrating element 70 are electrically connected to the wiring pattern 75.

[0063] In this way, by preventing the formation of an oxide film on the surface of the bonding layer 30 or reducing the oxide film, it is possible to suppress the adhesion of organic matter and the like as residues to the surface of the bonding layer 30, thereby enabling the base substrate 10 and the cover 20 to be airtightly sealed.

[0064] Next, in steps S51 to S53 (the sealing process), the base substrate 10 and the cover 20 are joined. First, in step S51, alignment is performed. Specifically, in a vacuum, the bonding surfaces of the silicon wafer that becomes the base substrate 10 and the silicon wafer that becomes the cover 20 are placed face to face. Then, alignment is performed while observing the image using a camera, using alignment marks provided on each silicon wafer as a reference.

[0065] In addition, in order to suppress the oxidation of the surface of the copper layer 32 in a vacuum, the time from the formation of the bonding layer 30 in step S14 to the alignment process in step S51 is set to less than 1 minute.

[0066] Next, in step S52 (the pressurization process), contact and pressure are applied. Specifically, the bonding layer 30A formed on the base substrate 10 is brought into contact with the bonding layer 30B formed on the cover 20 (see reference). Figure 6B At this point, the copper layer 32 on the base substrate 10 side and the copper layer 32 on the cover 20 side begin to bond through surface force. Next, the base substrate 10 and the cover 20 are clamped and pressure is applied, and the bonding layers 30A and 30B are also pressured. Furthermore, the temperature during pressure application is room temperature. The pressure applied is, for example, 10 MPa to 200 MPa.

[0067] Next, in step S53 (heating process, cooling process, release process), heating and cooling are performed. Specifically, the bonding jig that joins the base substrate 10 and the cover 20 is heated to a higher temperature. The heating temperature is, for example, 200°C to 275°C. Through this heating, the copper layers 32 of the bonding layer 30 diffuse into each other, and metal diffusion bonding occurs, causing recrystallization. As a result, the copper layers 32 are integrated, forming new grain boundaries, thereby forming a bonding layer 30 containing the copper layers 32. Afterward, the base substrate 10 and the cover 20 are cooled to room temperature, and the pressure is released.

[0068] In this way, by joining the base substrate 10 and the cover 20 using the above-described process, the influence on the frequency characteristics of the vibrating element 70 can be suppressed, for example, compared to activation bonding using atomic beams, and an airtight seal can be achieved.

[0069] Next, refer to Figure 7 and Figure 8 The bonding conditions for bonding layer 30 are explained. Additionally, Figure 7 The bonding conditions are shown when the base substrate 10 and the cover 20 are silicon substrates. Figure 8 The bonding conditions are shown when the base substrate 10 and the cover 20 are quartz substrates. In silicon and quartz substrates, the optimal bonding conditions vary primarily depending on factors such as Young's modulus.

[0070] like Figure 7 As shown, when the base substrate 10 and the cover 20 are silicon substrates, the pressure applied to the bonding layer 30 is, for example, 80 MPa. In other words, it is 40 kN / 0.5 -3 m 2 Regarding the joining temperature, for example, the worktable on which the vibrating device 100 is mounted is heated to 230°C or 250°C. The joining atmosphere is a vacuum, for example, 5.0 × 10⁻⁶. -6 Pa. The heating rate is 5°C / min. Cooling is performed using N2. The bonding time is, for example, 30 min.

[0071] like Figure 8 As shown, when the base substrate 10 and the cover 20 are quartz substrates, the pressure applied to the bonding layer 30 is, for example, 10 MPa. In other words, it is 10 kN / 1.0 kPa. -3 m 2 Regarding the joining temperature, for example, the worktable on which the vibrating device 100 is mounted is heated to 230°C or 250°C. The joining atmosphere is a vacuum, for example, 5.0 × 10⁻⁶. -6 Pa. The heating rate is 5°C / min. Cooling is performed using N2. The bonding time is, for example, 30 min.

[0072] and Figure 7 Compared to the bonding of silicon substrates to each other, the shown example is in Figure 8 In the bonding of the quartz substrates shown, the required pressure for bonding is 1 / 8. This is considered to be proportional to the actual contact area of ​​the interface at the time of bonding that can be ensured by applying pressure, and is related to the Young's modulus of the substrate material. In this embodiment, the bonding is performed optimally according to the substrate materials being bonded, such as the pressure conditions.

[0073] Furthermore, regardless of the substrate material, the thickness of the bonding layer 30 is kept to be 150 nm or less, and the surface roughness Ra of the bonding interface is suppressed to 0.3 nm or less. This increases the bonding force generated by the surface tension during contact in the bonding process. In addition, by keeping the bonding temperature at a low temperature of around 230°C, changes in the characteristics of the vibrating element 70 can be suppressed, and optimal sealing of the vibrating device 100 can be provided.

[0074] Thus, for example, a bonding layer 30 is formed, consisting of a 20nm titanium layer 31, an 80nm copper layer 32, and a 20nm titanium layer 33. Bonding occurs through the free energy and thermal energy of the metal surfaces, and the bonding layer 30 is completed through the diffusion and reorganization of metal atoms caused by heating. Therefore, after bonding, there is no bonding interface, and a bonding strength close to that of the silicon substrate can be obtained. Furthermore, no gas is generated during bonding, enabling a high degree of hermetic sealing.

[0075] Furthermore, since the base substrate 10 and the cover 20 are joined by hot pressing via the bonding layer 30 containing the copper layer 32, for example, compared with the case of using a bonding layer such as gold (Au), the cost can be suppressed, and the vibrating element 70 can be hermetically sealed using the base substrate 10 and the cover 20.

[0076] Next, in step S54 (thinning I), the first thinning is performed. Specifically, after the base substrate 10 is joined to the cover 20, the base substrate 10 is ground and polished to make it thinner. At this time, in order to release the stress generated by grinding, dry polishing may also be performed as a finishing process.

[0077] Next, in step S55, an external connection terminal 40 is formed. Specifically, the external connection terminal 40 is formed on the second surface 10b of the base substrate 10.

[0078] Next, in step S56, a second thinning process is performed. Specifically, the cover 20 is ground and polished to make it thinner.

[0079] Next, in step S57, the wafer is monolithized. Specifically, based on the state of the silicon wafer, each vibrating device 100 is divided into individual wafers using a cutting method such as dicing. Thus, individual vibrating devices 100 are formed.

[0080] Next, in step S58, the frequency of the vibrating device 100 is adjusted and checked using a known method. Through the above steps, the vibrating device 100 can be manufactured.

[0081] As described above, in the manufacturing method of the vibration device 100 of this embodiment, the vibration device 100 includes: a vibration element 70; a base substrate 10 having a bonding region 30a that surrounds the vibration element 70 when viewed from above; and a cover 20 that is bonded to the bonding region 30a of the base substrate 10 and together with the base substrate 10 hermetically seals the vibration element 70. The manufacturing method of the vibration device 100 includes the following steps: bonding the bonding region 30a of the base substrate 10 to the cover 20 by hot pressing a bonding layer containing at least Cu (copper), thereby hermetically sealing the vibration element 70 in the space surrounded by the base substrate 10 and the cover 20.

[0082] According to this method, since the base substrate 10 and the cover 20 are joined by hot pressing via a bonding layer 30 containing Cu (copper), the cost can be suppressed compared to the case of using a bonding layer such as Au (gold), and the vibrating element 70 can be airtightly sealed by the base substrate 10 and the cover 20.

[0083] Furthermore, in the manufacturing method of the vibration device 100 of this embodiment, the sealing process preferably includes the following steps: pressing the bonding region 30a of the base substrate 10 against the cover 20 at room temperature; heating the base substrate 10 and the cover 20; cooling the base substrate 10 and the cover 20; and releasing the pressure on the base substrate 10 and the cover 20. According to this method, since the base substrate 10 and the cover 20 are joined by thermo-pressing in the above-described steps, the influence on the frequency characteristics of the vibration element 70 can be suppressed, for example, compared to activation bonding using atomic beams, and an airtight seal can be achieved.

[0084] Furthermore, in the manufacturing method of the vibration device 100 of this embodiment, it is preferable to prevent the formation of an oxide film on the surface of the bonding layer 30 or to reduce the oxide film before the bonding region 30a of the base substrate 10 abuts against the cover 20. According to this method, since the formation of an oxide film on the surface of the bonding layer 30 or the reduction of the oxide film is prevented, the adhesion of organic matter and the like as residues to the surface of the bonding layer 30 can be suppressed, thereby enabling the base substrate 10 and the cover 20 to be airtightly sealed.

[0085] Furthermore, in the manufacturing method of the vibration device 100 of this embodiment, it is preferable that the bonding layer 30 is a Ti, Cu, Ti laminate, or a Ti, Cu, TiW laminate. According to this method, since the bonding layer 30 is a Ti-containing laminate as described above, when the base substrate 10 and the cover 20 are Si, the adhesion between Cu and Si can be improved by using Ti. This improves the bonding strength between the base substrate 10 and the cover 20.

[0086] Furthermore, in the manufacturing method of the vibration device 100 of this embodiment, the surface roughness Ra of the bonding surface of the bonding layer 30 is preferably 3 nm or less. According to this method, since the surface roughness Ra is suppressed to 3 nm or less, the generation of voids (holes) can be suppressed, and the bonding force based on surface tension can be improved.

[0087] Furthermore, in the manufacturing method of the vibration device 100 of this embodiment, it is preferable to have a step of forming a wiring pattern 75 on the base substrate 10 before the sealing step. In the step of forming the wiring pattern 75, the wiring pattern 75 is formed simultaneously with the formation of the bonding layer 30 using the same material as the bonding layer 30. According to this structure, the wiring pattern 75 is formed simultaneously with the bonding layer 30 using the same material as the bonding layer 30, so it can serve as both the wiring pattern 75 and the bonding layer 30, thus simplifying the manufacturing process.

[0088] Hereinafter, variations of the above-described embodiments will be described.

[0089] As described above, the vibration device 100 is not limited to the structure described above, and may also be... Figures 9-11 The structure shown. (As illustrated) Figure 9 As shown, in the modified example, the vibration device 100A has a vibration element 70 disposed on the cover 20 side. Even with such a vibration device 100A, the wiring pattern 75 and the bonding layer 30 can be formed using the same material, which simplifies the manufacturing process. Figure 10A and Figure 10B The diagram illustrates the joining process in the manufacturing method of the vibrating device 100A.

[0090] On the other hand, such as Figure 11 As shown, in the modified example of the vibrating device 100B, the base substrate 10 side is formed in a concave shape. Additionally, a semiconductor substrate 50 is disposed on the cover 20 side. A vibrating element 70 is disposed on the base substrate 10. Furthermore, the wiring pattern 75 and the bonding layer 30 can be formed simultaneously. According to this vibrating device 100B, since the semiconductor substrate 50 is disposed on the cover 20 side, it is not necessary to provide a through electrode 41 on the semiconductor substrate 50 to achieve electrical connection to the external connection terminal 40.

[0091] Even with this simplified structure, the vibration device 100B can utilize the same materials to form the wiring pattern 75 and bonding layer 30, thus achieving a structure that is easy to manufacture. Furthermore, an integrated circuit 51 containing a temperature sensor can be disposed on the semiconductor substrate 50. In the modified vibration device 100B, the integrated circuit 51 containing the temperature sensor on the semiconductor substrate 50 is bonded to the vibrating element 70 near the inner side of the space S via a bonding layer 30 with high thermal conductivity. Therefore, a structure can be achieved that minimizes the temperature difference between the vibrating element 70 and the temperature sensor, minimizes the correction error of the temperature sensor to frequency variations caused by temperature changes in the vibrating element 70, and improves frequency accuracy.

[0092] As described above, the vibration device 100 is not limited to the structure described above, and may also be... Figure 12 The structure shown is as follows. The modified vibrating device 100C is constructed by stacking three quartz substrates, and includes a base substrate 10, a frame 70A integrally formed with the vibrating element 70 and forming a chamber, and a cover 20. The bonding layer 30C between the base substrate 10 and the frame 70A is formed by bonding gold (Au) to gold (Au). The bonding layer 30D between the frame 70A and the cover 20 is formed by bonding copper (Cu) to copper (Cu). According to the modified vibrating device 100C, all bonding can be achieved by thermocompression bonding (TCB). Therefore, there is no frequency variation, vacuum sealing can be achieved through a strong bond, and a highly reliable vibrating device 100C can be provided.

[0093] As described above, the application of the bonding layer 30 to the vibrating device 100 is not limited to, for example Figure 13 As shown, the bonding layer 30 can also be applied to electronic components such as the etalon 1000, i.e., a wavelength spectrophotometer. Specifically, the modified etalon 1000 includes a wavelength-variable interference filter 1005 as a functional element and a housing 1006 for housing the wavelength-variable interference filter 1005. Specifically, the functional elements are the first reflective film 1054 and the second reflective film 1055, which will be described later in the wavelength-variable interference filter 1005. The housing 1006 has a base 1061 and a cover 1062. By joining the base 1061 and the cover 1062, an internal receiving space is formed, in which the wavelength-variable interference filter 1005 is housed.

[0094] The wavelength-variable interference filter 1005 includes a first substrate 1051 as a cover and a second substrate 1052 as a base substrate. The first substrate 1051 and the second substrate 1052 are bonded together by a bonding layer 1053 having the same function as the bonding layer 30 described above. A first reflective film 1054 is provided on the first substrate 1051, and a second reflective film 1055 is provided on the second substrate 1052. The first reflective film 1054 and the second reflective film 1055 are arranged opposite each other with a gap G between them.

[0095] In addition, as an electronic component, it is not limited to the standard etalon 1000, but can also be an RF-MEMS device, a high-voltage device that requires cooling through high thermal conductivity, a radiative thermal measurement meter, etc.

[0096] In the above-described method for manufacturing the modified standard etalon 1000, the standard etalon 1000 includes: a wavelength-variable interference filter 1005; a second substrate 1052 having a bonding region surrounding the wavelength-variable interference filter 1005 when viewed from above; and a first substrate 1051 bonded to the bonding region of the second substrate 1052, and together with the second substrate 1052, hermetically sealing the wavelength-variable interference filter 1005. The method for manufacturing the standard etalon 1000 includes the following steps: bonding the bonding region of the second substrate 1052 to the first substrate 1051 by hot-pressing a bonding layer 1053 containing at least Cu (copper), thereby hermetically sealing the wavelength-variable interference filter 1005 in the space surrounded by the second substrate 1052 and the first substrate 1051. According to this method, since the second substrate 1052 is bonded to the first substrate 1051 via a Cu-containing bonding layer 1053 by hot pressing, the cost can be suppressed compared to the case of using a bonding layer such as Au, and the wavelength-variable interference filter 1005 can be hermetically sealed by the second substrate 1052 and the first substrate 1051.

[0097] As described above, the semiconductor substrate 50 of the vibrating device 100 is not limited to being disposed on the bonding layer 30 side of the base substrate 10, but may also be disposed on the external connection terminal 40 side of the base substrate 10. In this case, the thinning of the base substrate 10 is performed using a WSS (wafer support system) or the like before bonding, and the WSS is peeled off after bonding. The formation of the through electrode 41 and the external connection terminal 40 of the base substrate 10 is performed before the thinning before bonding. On the other hand, when the semiconductor substrate 50 is located on the bonding layer 30 side, a WSS is not required, and the device can be manufactured with a simpler process. In this case, the formation of the through electrode 41 and the external connection terminal 40 is performed after bonding.

Claims

1. A method for manufacturing a vibrating device, The vibration device includes: Vibrating elements; A base plate having a mating area surrounding the vibrating element when viewed from above; and The cover engages with the mating area of ​​the base substrate and, together with the base substrate, hermetically seals the vibrating element. The method for manufacturing the vibration device includes the following steps: joining the bonding area of ​​the base substrate to the cover by hot pressing a bonding layer containing at least Cu, thereby hermetically sealing the vibration element in the space surrounded by the base substrate and the cover.

2. The method for manufacturing the vibration device according to claim 1, wherein, The sealing process includes the following steps: At room temperature, the bonding area of ​​the base substrate is pressed against the cover body to apply pressure; The base plate and the cover are heated. Cooling the base plate and the cover; and Release the pressure on the base plate and the cover.

3. The method for manufacturing a vibration device according to claim 1, wherein, Before the bonding area of ​​the base substrate is brought into contact with the cover, an oxide film is prevented from forming on the surface of the bonding layer or the oxide film is reduced.

4. The method for manufacturing a vibration device according to claim 1, wherein, The bonding layer is a Ti, Cu, Ti laminate or a Ti, Cu, TiW laminate.

5. The method for manufacturing a vibration device according to claim 1, wherein, The surface roughness Ra of the bonding surface of the bonding layer is less than 3 nm.

6. The method for manufacturing a vibration device according to claim 1, wherein, Prior to the sealing process, a wiring pattern is formed on the base substrate. In the process of forming the wiring pattern, the wiring pattern is formed simultaneously with the formation of the bonding layer using the same material as the bonding layer.

7. A method for manufacturing an electronic component, The electronic component includes: Functional components; A base plate having a bonding area surrounding the functional element when viewed from above; and The cover engages with the engagement area of ​​the base substrate and, together with the base substrate, hermetically seals the functional element. The method for manufacturing the electronic component includes the following steps: bonding the bonding area of ​​the base substrate to the cover by hot pressing a bonding layer containing at least Cu, thereby hermetically sealing the functional element in the space surrounded by the base substrate and the cover.

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