A method for manufacturing a lamb wave piezoelectric resonator and a resonator

Abstract

The application discloses a preparation method of a Lamb wave piezoelectric resonator and the resonator, and belongs to the technical field of micro-electro-mechanical system (MEMS) device preparation. The method takes an SOI wafer as a substrate, forms a peripheral isolation belt in a top silicon layer, prepares an AlN piezoelectric thin film layer and an interdigital electrode on the top silicon layer, performs patterned etching on the AlN layer to simultaneously form a phononic crystal hole array and a release groove, uses the patterned AlN layer as an in-situ mask, etches the top silicon layer by introducing XeF2 gas through the release groove, uses a buried oxygen layer as a longitudinal etching stop layer and the isolation belt as a horizontal etching blocking layer, realizes suspension release of the resonator, and does not need to remove the mask after release. The application simplifies the process, avoids secondary damage to the suspended structure, and realizes accurate and controllable control of the cavity size.

Description

Technical Field

[0001] This invention relates to the field of microelectromechanical system (MEMS) device fabrication technology, and in particular to a method for fabricating a Lamb wave piezoelectric resonator and the resonator itself. Background Technology

[0002] Lamb wave resonators, as acoustic devices based on aluminum nitride (AlN) piezoelectric thin films, combine the advantages of surface acoustic wave (SAW) resonators and bulk acoustic wave (BAW) resonators. They possess a high quality factor (Q value) and can achieve on-chip integration of multiple frequency bands by changing the period and layout of the interdigitated electrodes. They have broad application prospects in fields such as radio frequency communication and high-precision sensors.

[0003] Studies have shown that by applying prestress to Lamb wave resonators and combining them with localized resonant phononic crystal structures, efficient coupled resonance can be achieved, effectively suppressing anchor point loss and improving the device's Q value. Phononic crystal structures can form acoustic band gaps within a specific frequency range, localizing vibrational energy within the resonator and reducing acoustic energy dissipated to the substrate through the support beam. However, such composite structures face significant fabrication challenges in practical micro / nano fabrication.

[0004] Currently, the mainstream fabrication process for Lamb wave resonators employs a back-side etching release method. After completing the front-side piezoelectric thin film deposition and electrode patterning, dry etching is performed from the back of the SOI wafer using photoresist as a mask to remove the underlying silicon. The buried oxide layer (boxing layer) is used as an etching stop layer to achieve suspension release of the thin film region. However, this traditional method is difficult to directly apply to composite devices containing pre-stressed AlN thin films and phononic crystal structures. Because piezoelectric thin films often have high initial stress, back-side etching causes drastic changes in mechanical boundary conditions and a sudden release of stress when removing the bottom support layer, making the ultra-thin device structure extremely prone to buckling or even fracture.

[0005] To address the aforementioned issues, existing research has attempted to utilize isotropic dry release of XeF2 gas in MEMS device fabrication. XeF2 offers unique advantages as a silicon etchant, enabling high-selectivity etching of silicon at room temperature with minimal erosion of materials such as silicon dioxide, silicon nitride, most metals, and polymers. Furthermore, dry etching avoids the surface tension and structural adhesion problems inherent in wet etching processes. However, current MEMS processes employing XeF2 release typically require pre-depositing and patterning a polycrystalline silicon sacrificial layer, with XeF2 etching the sacrificial layer through release holes to form cavities, or necessitate additional masks to protect non-released areas. These methods increase process complexity, and the mask removal process may cause secondary damage to the already suspended brittle structure.

[0006] Furthermore, since the device requires the pre-fabrication of interdigitated metal electrodes (IDTs) on the front side, the fabrication scheme for simultaneously achieving the complete release of the local phonon array and interdigitated electrodes under conditions of high prestress and complex surface morphology is urgently needed. Summary of the Invention

[0007] To achieve the above-mentioned objectives and other advantages of the present invention, a first objective of the present invention is to provide a method for fabricating a Lamb wave piezoelectric resonator, comprising the following steps: An SOI wafer is provided, wherein the SOI wafer comprises, from bottom to top, a bottom silicon layer, a SiO2 buried oxide layer and a top silicon layer; An outer isolation trench is formed in the top silicon layer, and an isolation material is filled in the outer isolation trench to form an isolation strip; An AlN piezoelectric thin film layer is prepared on the top silicon layer; Interdigitated electrodes are formed on the AlN piezoelectric thin film layer; The AlN piezoelectric thin film layer is patterned and etched to form a phononic crystal array structure and a release groove for releasing the top silicon layer. Using the patterned AlN piezoelectric thin film layer as an in-situ masking layer, XeF2 etching gas is introduced into the top silicon layer through the release groove. The SiO2 buried oxide layer is used as a vertical etching stop layer and the isolation band is used as a lateral etching barrier layer. At least a portion of the top silicon layer is removed by isotropic etching, thereby realizing the suspension and release of the AlN piezoelectric thin film layer and the interdigitated electrode.

[0008] Furthermore, the phonon crystal aperture structure and the release groove are defined and etched together by the same mask in the patterning etching step.

[0009] Furthermore, the isolation strip is arranged around the periphery of the resonator main structure, and together with the SiO2 buried oxide layer, it forms a three-dimensional etched confinement boundary.

[0010] Furthermore, the insulating material is SiO2 or SiN.

[0011] Further, after the steps of forming a peripheral isolation trench in the top silicon layer and filling the peripheral isolation trench with isolation material, the method further includes: A chemical mechanical polishing process is used to make the surface of the insulating material flush with the surface of the top silicon layer.

[0012] Further, the step of forming interdigitated electrodes on the AlN piezoelectric thin film layer includes: Photoresist is spin-coated onto the AlN piezoelectric thin film layer, and electrode windows are defined by exposure and development. Sputtering electrode layer material; The photoresist is removed using a stripping process while retaining the metal electrodes within the electrode window to form the interdigitated electrodes.

[0013] Furthermore, in the patterning etching step of the AlN piezoelectric thin film layer, the AlN piezoelectric thin film layer is etched until the surface of the top silicon layer is exposed.

[0014] Furthermore, after the isotropic etching is completed, the patterned AlN piezoelectric thin film layer is retained as the phononic crystal structure of the finished device.

[0015] Furthermore, in the step of preparing the AlN piezoelectric thin film layer on the top silicon layer, the AlN piezoelectric thin film layer is formed by a sputtering process, and the AlN piezoelectric thin film layer contains a preset initial prestress.

[0016] The second objective of this invention is to provide a Lamb wave piezoelectric resonator, which is prepared using the above-described method.

[0017] Compared with the prior art, the beneficial effects of the present invention are: This invention leverages the extremely high etching selectivity of XeF2 gas for SiO2, cleverly combining the natural SiO2 buried oxide layer of the SOI wafer with a pre-defined peripheral SiO2 isolation band. The SiO2 buried oxide layer, acting as a vertical etching stop layer, precisely and uniformly controls the depth of the release cavity; the peripheral SiO2 isolation band, acting as a lateral etching barrier layer, effectively suppresses excessive lateral drilling of the top silicon layer. Together, they construct a rigid three-dimensional etching boundary, achieving precise control over the resonator's levitating release range.

[0018] Traditional processes often require photoresist or silicon dioxide hard masks to be removed after releasing the suspended micromechanical structure, using either a stripping solution or plasma. These post-processing operations can easily cause the already suspended and extremely fragile thin-film structure to break or collapse. This invention directly uses the inherent pores and grooves of aluminum nitride (AlN) phononic crystals as in-situ masks for dry etching. No mask removal post-processing is required after structure release, effectively reducing secondary physical or chemical damage to the device and significantly improving device fabrication yield and reliability.

[0019] In this invention, the phonon crystal aperture structure and the release groove are defined and etched together by the same mask in the AlN patterning etching step. This eliminates the need to design a separate mask for the release process and add additional photolithography steps, further simplifying the process and reducing manufacturing costs.

[0020] In this invention, the release groove and the phononic crystal array structure are formed simultaneously during the AlN patterning etching step. During release, XeF2 gas can enter the top silicon layer through the release groove and the phononic crystal array structure simultaneously for etching, which increases the contact area between the etching gas and silicon, shortens the etching time of large-area silicon substrates, and improves process efficiency.

[0021] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it according to the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Specific embodiments of the present invention are given in detail below with reference to the accompanying drawings. Attached Figure Description

[0022] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this application, illustrate exemplary embodiments of the invention and, together with their description, serve to explain the invention and do not constitute an undue limitation thereof. In the drawings: Figure 1 This is a flowchart illustrating the fabrication method of a Lamb wave piezoelectric resonator. Figure 2 This is a schematic cross-sectional view of the initial structure of an SOI wafer; Figure 3 This is a cross-sectional view showing the formation of the outer isolation zone. Figure 4 This is a top view after the AlN piezoelectric thin film layer and interdigitated electrodes have been fabricated; Figure 5 A cross-sectional view along the AA′ direction after the fabrication of the AlN piezoelectric thin film layer and interdigitated electrodes; Figure 6 A top view of the patterned AlN piezoelectric thin film layer; Figure 7 This is a schematic cross-sectional view of XeF2 after isotropic etching and release. Figure 8 This is a top view of the finished resonator; Figure 9 This is a cross-sectional view of the finished resonator along the AA′ direction. Detailed Implementation

[0023] The present invention will now be further described with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. It should be noted that, without conflict, the various embodiments or technical features described below can be arbitrarily combined to form new embodiments.

[0024] Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without inventive effort are within the scope of protection of this invention.

[0025] The drawing numbers in this application are only used to distinguish the steps in the scheme and are not used to limit the execution order of the steps. The specific execution order is as described in the specification.

[0026] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0027] This invention discloses a complete process flow for constructing a Lamb-wave resonator, used to fabricate an air-gap phononic crystal structure array and interdigitated electrode structure. The core feature of this process lies in its maskless self-aligned release and three-dimensional etching confinement mechanism: on the one hand, during isotropic gas release from the silicon substrate, the inherent micropores and slots of the aluminum nitride (AlN) phononic crystal are directly used as in-situ release masks, replacing the photoresist or hard masks introduced in traditional processes. No post-processing steps such as photoresist or mask removal are required after device release. On the other hand, to prevent excessive dissipation of the released gas on the top silicon layer, this process combines a pre-set peripheral SiO2 isolation band with the natural SiO2 buried oxide layer of the SOI wafer to construct a rigid three-dimensional etching boundary with high selectivity. The buried oxide layer precisely controls the depth of the cavity, while the isolation band effectively suppresses lateral drilling. The combination of these two achieves high-precision levitation and mechanical stability of the resonator's main structure. The specific scheme is as follows: Example 1 A method for fabricating a Lamb wave piezoelectric resonator, such as Figure 1 As shown, it includes the following steps: S1. Provide SOI wafers as substrates. For example... Figure 2 As shown, the SOI wafer comprises, from bottom to top, a bottom silicon layer, a SiO2 buried oxide layer, and a top silicon layer; In some specific embodiments, the top silicon layer thickness of the SOI wafer is 2μm to 10μm, the SiO2 buried oxide layer thickness is 0.5μm to 3μm, and the bottom silicon layer thickness is 300μm to 500μm. The advantage of using an SOI wafer as a substrate is that its buried oxide layer can serve as a natural etching stop layer for subsequent etching steps, enabling precise control of the depth boundary of the release cavity.

[0028] SOI wafers undergo standard cleaning processes to remove organic contaminants and particles from the wafer surface, including but not limited to RCA standard cleaning. After cleaning, the wafers are placed in an oven for dehydration and baking to remove residual moisture from the surface.

[0029] S2. A peripheral isolation trench is formed in the top silicon layer, and an isolation material is filled in the peripheral isolation trench to form an isolation strip, such as... Figure 3 As shown; In some specific embodiments, photoresist is first spin-coated onto the surface of the top silicon layer, and the pattern of the peripheral isolation trench is defined by exposure and development. Using the photoresist as a mask, the top silicon layer is etched using reactive ion etching (RIE) or inductively coupled plasma etching (ICP) to form the peripheral isolation trench. The depth of the isolation trench is the same as the thickness of the top silicon layer, that is, penetrating the top silicon layer until the SiO2 buried oxide layer is exposed.

[0030] After etching, the photoresist is removed, and a chemical vapor deposition (CVD) process is used to fill the isolation trench with an isolation material. The isolation material is SiO2 or SiN, preferably SiO2, because XeF2 gas has an extremely high etching selectivity for SiO2. The filling method can be plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD), with the deposition temperature controlled below 400°C to avoid thermal damage to the wafer.

[0031] After filling, the wafer surface is planarized using chemical mechanical polishing (CMP) to make the surface of the isolation material flush with the surface of the top silicon layer. After CMP polishing, the isolation band is arranged around the periphery of the resonator main structure, forming a lateral etching barrier layer to suppress excessive lateral drilling of the top silicon layer during subsequent XeF2 etching. In some specific embodiments, the width of the isolation band is 5μm to 20μm, and the distance from the edge of the resonator main structure is 10μm to 50μm.

[0032] In this embodiment, to suppress potential excessive lateral drilling during the isotropic release process of xenon difluoride (XeF2), a silicon dioxide (SiO2) or silicon nitride (SiN) isolation structure is introduced around the silicon support region below the phonon crystal and surface electrode. This isolation band works synergistically with the buried oxide layer (SiO2 layer) at the bottom of the SOI wafer, utilizing an extremely high etch selectivity to construct a strict three-dimensional etch boundary, thereby effectively preventing over-etching of the top silicon layer and ensuring the mechanical stability of the suspended main structure.

[0033] S3. Prepare an AlN piezoelectric thin film layer on the planarized top silicon layer, such as Figure 4 and Figure 5 As shown; In some specific embodiments, the AlN piezoelectric thin film layer is formed by DC magnetron sputtering. The sputtering target is a high-purity aluminum target (purity not less than 99.999%), the working gas is a mixture of argon and nitrogen, wherein the flow ratio of argon to nitrogen is 1:1 to 3:1, the sputtering pressure is 0.3 Pa to 0.8 Pa, the sputtering power is 100 W to 300 W, and the substrate temperature is 200 °C to 400 °C. The thickness of the AlN thin film can be determined according to the operating frequency of the resonator, for example, 1 μm to 3 μm.

[0034] Due to the specific conditions of the sputtering process, the AlN film contains a pre-set initial stress (compressive or tensile stress) after deposition. The stress state and magnitude of the film can be controlled by adjusting the sputtering gas pressure and substrate temperature. The initial stress range of the AlN film is -500 MPa to +500 MPa, where negative values ​​represent compressive stress and positive values ​​represent tensile stress. This initial pre-stress is a key process challenge that needs to be addressed during subsequent suspension and release, and it is also the core of the technical problem solved by the present invention.

[0035] In some preferred embodiments, the sputtered AlN film is annealed at 500°C to 700°C to improve the C-axis preferred orientation and piezoelectric properties of the film.

[0036] S4. Form interdigitated electrodes on the AlN piezoelectric thin film layer, such as... Figure 4 and Figure 5 As shown; In some specific embodiments, the interdigitated electrodes are fabricated using a lift-off process. S41, First, photoresist is spin-coated onto the surface of the AlN piezoelectric thin film layer, and the window pattern of the interdigitated electrodes is defined by exposure and development. The linewidth and spacing of the electrode windows are determined according to the operating frequency of the resonator, for example, the linewidth is 1 μm to 10 μm.

[0037] S42. Subsequently, the electrode layer material is sputtered. The electrode layer material is gold or aluminum, preferably gold. Sputtering can be performed using electron beam evaporation or magnetron sputtering processes, and the electrode layer thickness is 50 nm to 200 nm. S43. After sputtering, the wafer is placed in an acetone solution, and the photoresist is dissolved by ultrasonic assistance. At the same time, the metal layer attached to the photoresist is peeled off, while the metal electrodes within the electrode windows are retained, thereby forming an interdigitated electrode structure.

[0038] The interdigital electrode includes an input interdigital transducer and an output interdigital transducer, which are arranged opposite to each other and are excited by applying an alternating electrical signal to excite Lamb wave resonance.

[0039] S5. Pattern the AlN piezoelectric thin film layer by etching, simultaneously forming a phononic crystal array structure and a release groove for releasing the top silicon layer, such as... Figure 6 As shown, Figure 6 (a) is the overall top view. Figure 6 (b) is a magnified view of a portion of the phononic crystal aperture array; In some specific embodiments, photoresist is coated onto the wafer surface where the interdigitated electrodes have been fabricated, and the phononic crystal aperture structure and release groove pattern are defined by exposure and development. The phononic crystal aperture structure is distributed within the active region of the resonator body (i.e., the region where the interdigitated electrodes are located and the acoustic wave propagation path region), used to form a periodic acoustic impedance mismatch in the phononic crystal, generating an acoustic bandgap, and localizing the vibrational energy within the resonator to reduce anchor point loss. The release groove is distributed around the active region, used to provide a channel for subsequent XeF2 etching gas to enter the top silicon layer. The phononic crystal aperture structure and release groove are defined once by the same mask in the patterning step, eliminating the need to design a separate mask for the release process.

[0040] Using photoresist as a mask, the AlN piezoelectric thin film layer is etched downwards using reactive ion etching (RIE) or inductively coupled plasma etching (ICP) until the surface of the underlying top silicon layer is exposed. The etching gas can be a chlorine-based gas (such as BCl3 / Cl2) or a fluorine-based gas (such as SF6 / Ar). After etching, the photoresist is completely removed.

[0041] S6. Using the patterned AlN piezoelectric thin film layer as an in-situ masking layer, XeF2 etching gas is introduced into the top silicon layer through the release groove. The SiO2 buried oxide layer is used as a vertical etching stop layer, and the isolation band as a lateral etching barrier layer. At least a portion of the top silicon layer is isotropically etched away, achieving the levitation release of the AlN piezoelectric thin film layer and the interdigitated electrodes. Figure 7 As shown.

[0042] In some specific embodiments, the wafer is placed in an XeF2 vapor phase etching apparatus, and the etching chamber pressure is evacuated to below 100 Pa. XeF2 gas is introduced into the etching chamber in a pulsed manner, with each introduction lasting 10-60 seconds, followed by multiple etching cycles with 10-60 second intervals. XeF2 exhibits extremely high etching selectivity for silicon at room temperature, with an etching rate of 1 μm / min to 5 μm / min, while showing almost no etching of materials such as SiO2, AlN, and Au. It is well known in the art that the etching rate of XeF2 gas for AlN is negligible (etching selectivity Si:AlN > 1000:1), therefore, the patterned AlN piezoelectric thin film layer can maintain its structural integrity under these etching conditions, making it feasible as an in-situ masking layer. Thus, XeF2 can selectively remove the top silicon layer without etching the AlN piezoelectric thin film layer, the SiO2 buried oxide layer, the SiO2 insulating band, and the interdigitated electrodes.

[0043] During the etching process, the patterned AlN piezoelectric thin film layer acts as an in-situ masking layer, preventing XeF2 gas from etching the non-released areas, while the exposed top silicon layer in the release trench area is gradually removed by XeF2. In the vertical direction, XeF2 etching stops at the surface of the SiO2 buried oxide layer. The SiO2 buried oxide layer acts as a vertical etching stop layer, precisely and uniformly controlling the depth bottom boundary of the release cavity (1000). In the lateral direction, the outer SiO2 isolation band acts as a lateral etching barrier layer, effectively suppressing excessive lateral drilling of the top silicon layer. The buried oxide layer and the isolation band work together to construct a rigid three-dimensional etching boundary, realizing precise control of the resonator's floating release range.

[0044] After the isotropic etching is completed, the patterned AlN piezoelectric thin film layer is retained as the phononic crystal structure of the finished device, without the need for additional removal or separate preparation.

[0045] After release, the wafer is diced to form a single resonator die, which can then be packaged and tested for performance.

[0046] In this embodiment, a piezoelectric thin film patterned with a local resonant phonon array structure and a release groove is used as an in-situ masking layer. Isotropic etching is performed on the bottom silicon substrate through the release groove to achieve the suspension and release of the main resonator structure. This method not only eliminates the additional mask preparation and removal process in the traditional process, but also shortens the etching time of large-area silicon substrates by utilizing the phonon crystal hole structure and groove structure.

[0047] Leveraging the extremely high etching selectivity of XeF2 gas for SiO2, this invention ingeniously combines the natural SiO2 buried oxide layer of the SOI wafer with a pre-designed peripheral SiO2 isolation band. The former, acting as a vertical etching stop layer, precisely and uniformly controls the depth boundary of the release cavity; the latter, acting as a lateral etching barrier layer, effectively suppresses excessive lateral drilling of the top silicon layer. Together, they construct a rigid three-dimensional etching boundary, achieving highly precise control over the resonator's floating release range.

[0048] Traditional processes often require photoresist or silicon dioxide hard masks to be removed after releasing the suspended micromechanical structure, using either a stripping solution or plasma etching. These post-processing operations can easily cause the already suspended and extremely fragile thin-film structure to break or collapse. This invention directly uses the inherent pores and grooves of aluminum nitride (AlN) phononic crystals as a mask for dry etching, eliminating the need for any mask removal post-processing steps after structure release, thereby reducing secondary physical or chemical damage to the device.

[0049] Example 2 like Figure 8 and Figure 9As shown, the present invention also provides a Lamb wave piezoelectric resonator, which is fabricated using the method provided in Example 1. For a detailed description of the fabrication method provided in Example 1, please refer to the corresponding description in the above method embodiments, which will not be repeated here.

[0050] The Lamb-wave piezoelectric resonator includes a suspended main body structure and a support structure. The suspended main body structure consists of an AlN piezoelectric thin film layer and interdigitated electrodes formed thereon, suspended above the cavity formed after the top silicon layer of the SOI wafer is etched away. The AlN piezoelectric thin film layer integrates a phonon crystal array structure and a release groove structure. The phonon crystal array structure is located inside the active region of the resonator main body to form an acoustic bandgap to suppress anchor point loss. The release groove is distributed around the active region, serving as an etching gas channel during the release step, and is retained as a slot penetrating the AlN layer in the finished device.

[0051] The phonon crystal aperture array structure serves as both an acoustic energy localization structure and a residual stress release structure in the finished device. This dual-purpose design simplifies the device structure and avoids additional mask fabrication and removal processes. After XeF2 etching, the release groove forms a suspended cavity at the bottom adjacent to the upper surface of the buried oxide layer. The lateral boundary of this cavity is defined by the edge of the release groove in the AlN piezoelectric thin film layer and the inner wall of the outer isolation band, while the longitudinal boundary is defined by the surface of the SiO2 buried oxide layer, forming a highly precise and controllable suspended thin film region.

[0052] The number of devices and processing scale described herein are for the purpose of simplifying the description of the invention. Applications, modifications, and variations of the invention will be readily apparent to those skilled in the art.

[0053] Although embodiments of the present invention have been disclosed above, they are not limited to the applications listed in the specification and embodiments. They can be applied to various fields suitable for the present invention. For those skilled in the art, other modifications can be easily made. Therefore, without departing from the general concept defined by the claims and their equivalents, the present invention is not limited to the specific details and illustrations shown and described herein.

[0054] The apparatus and method provided in the embodiments of this specification are corresponding. Therefore, the apparatus also has similar beneficial technical effects as the corresponding method. Since the beneficial technical effects of the method have been described in detail above, the beneficial technical effects of the corresponding apparatus will not be repeated here.

[0055] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0056] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the apparatus embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the descriptions of the method embodiments.

[0057] The above description is merely an embodiment of this specification and is not intended to limit the scope of one or more embodiments of this specification. Various modifications and variations can be made to one or more embodiments of this specification by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principle of one or more embodiments of this specification should be included within the scope of the claims of one or more embodiments of this specification.

Claims

1. A method for fabricating a Lamb wave piezoelectric resonator, characterized in that, Includes the following steps: An SOI wafer is provided, wherein the SOI wafer comprises, from bottom to top, a bottom silicon layer, a SiO2 buried oxide layer and a top silicon layer; An outer isolation trench is formed in the top silicon layer, and an isolation material is filled in the outer isolation trench to form an isolation strip; An AlN piezoelectric thin film layer is prepared on the top silicon layer; Interdigitated electrodes are formed on the AlN piezoelectric thin film layer; The AlN piezoelectric thin film layer is patterned and etched to form a phononic crystal array structure and a release groove for releasing the top silicon layer. Using the patterned AlN piezoelectric thin film layer as an in-situ masking layer, XeF2 etching gas is introduced into the top silicon layer through the release groove. The SiO2 buried oxide layer is used as a vertical etching stop layer and the isolation band is used as a lateral etching barrier layer. At least a portion of the top silicon layer is removed by isotropic etching, thereby realizing the suspension and release of the AlN piezoelectric thin film layer and the interdigitated electrode.

2. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, The phonon crystal aperture structure and the release groove are defined and etched together by the same mask in the patterning etching step.

3. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, The isolation strip is arranged around the periphery of the main structure of the resonator, and together with the SiO2 buried oxide layer, it forms a three-dimensional etched confinement boundary.

4. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, The insulating material is SiO2 or SiN.

5. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, After the steps of forming a peripheral isolation trench in the top silicon layer and filling the peripheral isolation trench with isolation material, the method further includes: A chemical mechanical polishing process is used to make the surface of the insulating material flush with the surface of the top silicon layer.

6. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, The step of forming interdigitated electrodes on the AlN piezoelectric thin film layer includes: Photoresist is spin-coated onto the AlN piezoelectric thin film layer, and electrode windows are defined by exposure and development. Sputtering electrode layer material; The photoresist is removed using a stripping process while retaining the metal electrodes within the electrode window to form the interdigitated electrodes.

7. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, In the patterning etching step of the AlN piezoelectric thin film layer, the AlN piezoelectric thin film layer is etched until the surface of the top silicon layer is exposed.

8. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, After the isotropic etching is completed, the patterned AlN piezoelectric thin film layer is retained as the phononic crystal structure of the finished device.

9. The method for fabricating a Lamb wave piezoelectric resonator as described in claim 1, characterized in that, In the step of preparing the AlN piezoelectric thin film layer on the top silicon layer, the AlN piezoelectric thin film layer is formed by a sputtering process, and the AlN piezoelectric thin film layer contains a preset initial prestress.

10. A Lamb wave piezoelectric resonator, characterized in that, It is prepared by any one of the preparation methods described in claims 1 to 9.

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