An adaptive single drive circuit for Si / SiC hybrid devices

Abstract

The application discloses an adaptive single-drive circuit for Si / SiC hybrid devices, comprising a drive signal distribution module and a current detection and mode switching module; the drive signal distribution module receives external drive chip signals, is provided with a delay network connected between an output end of the drive chip and a control end of a first switching device, and is provided with a unidirectional conduction device connected in parallel with a second switching device. The current detection and mode switching module compares a detection voltage representing a current of the hybrid device with a reference voltage negatively related to a junction temperature after amplification, and a comparison result controls on-off of the second switching device: when the current is less than a threshold value, the second switching device is turned off, Si IGBT is clamped to an off level, and only SiC MOSFET works; when the current is greater than the threshold value, the second switching device is turned on, Si IGBT receives a drive signal, and the delay network makes the first switching device delay off at a falling edge of the drive signal, so that SiC MOSFET is turned off later than Si IGBT.

Description

Technical Field

[0001] This application relates to the field of power electronics technology, and more particularly to an adaptive single-drive circuit for Si / SiC hybrid devices. Background Technology

[0002] Silicon carbide (SiC), as a third-generation semiconductor material, possesses advantages such as wide bandgap, large temperature coefficient, and high electron mobility. SiC MOSFET devices, with their switching speeds far exceeding those of traditional silicon-based devices, have become a crucial foundation for driving the development of power electronic converters towards higher frequencies, smaller sizes, and higher efficiency. However, the relatively limited current-carrying capacity of SiC MOSFETs restricts their application under high-current conditions. Silicon-based IGBTs, on the other hand, utilize conductivity modulation mechanisms to possess excellent current-carrying capacity. Therefore, Si / SiC hybrid devices, by integrating the high switching speed of SiC MOSFETs with the strong current-carrying capacity of Si IGBTs, effectively overcome the performance limitations of single devices, thereby improving converter power density and reducing system losses.

[0003] Studies have shown that employing different control strategies based on current magnitude is beneficial for further reducing losses in hybrid devices: At low currents, turning on only the SiC MOSFET significantly reduces light-load losses; at high currents, turning both on simultaneously with the SiC MOSFET turning off later than the Si IGBT allows the SiC MOSFET to bear switching losses while the Si IGBT bears current carrying, thus reducing overall losses. Currently, the switching of these control strategies is mostly implemented using digital controllers such as DSPs, with mode switching achieved by adjusting the PWM control signal. Furthermore, existing Si / SiC hybrid devices typically use two independent driver chips to drive the SiC MOSFET and SiIGBT respectively.

[0004] Existing technologies have the following drawbacks: First, the control switching strategy based on digital controllers is highly complex, especially in multi-device converters, requiring a large number of signal control I / O ports. Furthermore, data processing is prone to significant delays, placing high demands on the controller's processing speed and algorithm complexity. Second, using two independent driver chips to drive hybrid devices is not conducive to reducing spurious parameters or improving power density, and it increases circuit complexity. Therefore, there is an urgent need for a single-drive circuit capable of automatically switching the gate drive strategy based on current magnitude, in order to simplify the circuit structure and reduce the burden on the controller while reducing losses in hybrid devices. Summary of the Invention

[0005] Based on the above problems, this application provides an adaptive single-drive circuit for Si / SiC hybrid devices, which can automatically switch the gate drive strategy according to the current of the hybrid device. While reducing the switching loss and conduction loss of the device, it can be achieved with only a single drive chip, simplifying the circuit structure and reducing the burden on the controller.

[0006] In a first aspect, embodiments of this application provide an adaptive single-drive circuit for Si / SiC hybrid devices, comprising:

[0007] A drive signal distribution module is provided, wherein the input terminal of the drive signal distribution module is used to receive the output signal from an external drive chip, and the drive signal distribution module includes a first output terminal, a second output terminal, a first switching device, a second switching device, a delay network, and a unidirectional conduction device; wherein, the first output terminal is used to connect to the gate of a SiC MOSFET and provide a first drive signal, and the second output terminal is used to connect to the base of a Si IGBT and provide a second drive signal;

[0008] A current detection and mode switching module is provided. The input terminal of the current detection and mode switching module receives a detection voltage signal characterizing the magnitude of the current flowing through the hybrid device. The current detection and mode switching module includes a signal amplification unit, a reference voltage generation unit, and a comparison unit. The signal amplification unit amplifies the detection voltage signal and outputs a first comparison signal. The reference voltage generation unit generates a reference voltage that varies negatively with the junction temperature of the hybrid device. The comparison unit is connected to both the signal amplification unit and the reference voltage generation unit, and compares the first comparison signal with the reference voltage. The output terminal of the comparison unit is connected to the control terminal of the second switching device.

[0009] The output terminal of the driving chip is connected to the gate of the SiC MOSFET and the first terminal of the first switching device via the driving signal distribution module. The delay network is connected between the output terminal of the driving chip and the control terminal of the first switching device. The second switching device is connected between the output terminal of the driving chip and the base of the SiIGBT, and the second switching device is used to form a controllable path. The unidirectional conducting device is connected in parallel with the second switching device, and the conduction direction of the unidirectional conducting device is set to clamp the base of the SiIGBT to the off level.

[0010] When the comparison unit determines that the first comparison signal is less than the reference voltage, the output of the comparison unit turns off the second switching device, the controllable path between the output of the driver chip and the base of the Si IGBT is disconnected, and the base of the Si IGBT is clamped at the off level via the unidirectional conduction device.

[0011] When the comparison unit determines that the first comparison signal is greater than the reference voltage, the output of the comparison unit turns on the second switching device, and the controllable path between the output of the driver chip and the base of the Si IGBT is connected, and the base of the Si IGBT receives the driving signal; at the same time, the delay network responds to the falling edge of the output signal of the driver chip, causing the first switching device to turn off with a delay, thereby causing the turn-off time of the SiC MOSFET to lag behind the turn-off time of the Si IGBT;

[0012] The delay time of the delay network is determined by the product of the resistance and capacitance values ​​of the delay network.

[0013] In one possible implementation, the delay network includes a delay resistor and a delay capacitor connected in series. One end of the delay resistor is connected to the output terminal of the driver chip, and the other end of the delay resistor is connected to one end of the delay capacitor. The other end of the delay capacitor is connected to the control terminal of the first switching device. The delay time of the delay network satisfies the following relationship:

[0014]

[0015] in, This is the positive power supply voltage for the driver chip. This is the negative power supply voltage for the driver chip. Let τ be the threshold voltage of the first switching device, and τ be the time constant of the circuit, expressed as:

[0016]

[0017] in, This is the resistance value of the delay resistor. This is the capacitance value of the delay capacitor. This represents the gate-source parasitic capacitance value of the first switching device.

[0018] In one possible implementation, the reference voltage generation unit includes a voltage divider resistor and a negative temperature coefficient thermistor. The voltage divider resistor and the negative temperature coefficient thermistor are connected in series, and the reference voltage is output at the common connection point of the voltage divider resistor and the negative temperature coefficient thermistor. The negative temperature coefficient thermistor is an NTC thermistor, and the relationship between its resistance and temperature satisfies the following:

[0019]

[0020] in, This is the resistance value at temperature T. The nominal resistance value, The absolute temperature is the nominal resistance value, and B is the B-value constant of the thermistor.

[0021] In one possible implementation, the signal amplification unit includes a first operational amplifier and a feedback resistor. The detected voltage signal is differentially input to the non-inverting and inverting inputs of the first operational amplifier. The feedback resistor is connected between the output and inverting inputs of the first operational amplifier. The output voltage of the first operational amplifier and the detected voltage signal satisfy the following condition:

[0022]

[0023] in, The detected voltage signal. The resistance value of the feedback resistor is given. The value of the proportional resistor connected in series with the non-inverting input of the first operational amplifier.

[0024] In one possible implementation, the comparison unit includes a second operational amplifier, the non-inverting input of which receives the first comparison signal, the inverting input of which receives the reference voltage, and the output of which is connected to the control terminal of the second switching device.

[0025] In one possible implementation, the unidirectional conducting device is a diode, the anode of which is connected to the base of the Si IGBT, and the cathode of which is connected to the output terminal of the driving chip.

[0026] In one possible implementation, both the first switching device and the second switching device are low-voltage MOSFETs. The drain of the first switching device is connected to the gate of the SiC MOSFET as a first terminal, the source of the first switching device is connected to the negative power supply terminal of the driver chip, the drain of the second switching device is connected to the base of the Si IGBT, and the source of the second switching device is connected to the output terminal of the driver chip.

[0027] In one possible implementation, the detected voltage signal is the voltage drop across the current sampling resistor, or the voltage signal output by the Rogowski coil integrator circuit.

[0028] In one possible implementation, the current switching threshold corresponding to the reference voltage is set to the knee current value of the hybrid device, which is the current flowing through the SiC MOSFET when the drain-source voltage of the SiC MOSFET is equal to the collector-emitter saturation voltage of the Si IGBT, and the knee current value is negatively correlated with the on-state resistance of the SiC MOSFET.

[0029] In one possible implementation, the drive signal distribution module further includes a drive resistor connected between the output terminal of the drive chip and the first terminal of the first switching device.

[0030] The beneficial effects of the technical solutions provided in some embodiments of this application include at least the following: The gate drive strategy can be automatically switched according to the current magnitude using only a single driver chip, and threshold temperature compensation is achieved using an NTC thermistor, completely eliminating the need for a digital controller. Under low current, only the SiC MOSFET operates; under high current, both operate in tandem, with the SiC MOSFET experiencing delayed turn-off, effectively reducing switching and conduction losses across all operating conditions. The circuit structure is simple and easy to integrate, improving power density and reliability while reducing the burden on the controller. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 An exemplary architecture diagram of an adaptive single-drive circuit for a Si / SiC hybrid device is provided for embodiments of this application;

[0033] Figure 2 A circuit diagram of an adaptive single-drive circuit for a Si / SiC hybrid device provided in an embodiment of this application;

[0034] Figure 3 This is a schematic diagram illustrating the variation of on-state resistance with junction temperature provided in an embodiment of this application.

[0035] Figure 4 This is a schematic diagram of the current amplification and gate strategy switching circuit provided in an embodiment of this application.

[0036] Reference numerals: Drive signal distribution module 101, current detection and mode switching module 102. Detailed Implementation

[0037] To make the features and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0038] In the following description, when referring to the accompanying drawings, the same numbers in different drawings denote the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0039] In the description of this application, it should be understood that the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances. Furthermore, in the description of this application, unless otherwise stated, "multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship.

[0040] Please see Figure 1 , Figure 1 This is an exemplary system architecture diagram of an adaptive single-drive circuit for a Si / SiC hybrid device provided in an embodiment of this application.

[0041] like Figure 1As shown, the system architecture may include a drive signal distribution module 101 and a current detection and mode switching module 102. The input terminal of the drive signal distribution module 101 is used to receive the output signal from an external drive chip. The drive signal distribution module 101 includes a first output terminal, a second output terminal, a first switching device, a second switching device, a delay network, and a unidirectional conduction device. The first output terminal is connected to the gate of the SiC MOSFET and provides a first drive signal; the second output terminal is connected to the base of the Si IGBT and provides a second drive signal. The output terminal of the drive chip is connected to the gate of the SiC MOSFET and the first terminal of the first switching device via the drive signal distribution module 101. The delay network is connected between the output terminal of the drive chip and the control terminal of the first switching device. The second switching device is connected between the output terminal of the drive chip and the base of the Si IGBT to form a controllable path. The unidirectional conduction device is connected in parallel with the second switching device, and the conduction direction of the unidirectional conduction device is set to clamp the base of the Si IGBT to the off level. The current detection and mode switching module 102 receives a detection voltage signal, representing the magnitude of the current flowing through the hybrid device, at its input. This module includes a signal amplification unit, a reference voltage generation unit, and a comparison unit. The signal amplification unit amplifies the detection voltage signal and outputs a first comparison signal. The reference voltage generation unit generates a reference voltage that varies negatively with the junction temperature of the hybrid device. The comparison unit is connected to both the signal amplification unit and the reference voltage generation unit, and compares the first comparison signal with the reference voltage. The output of the comparison unit is connected to the control terminal of the second switching device.

[0042] Please see Figure 2 , Figure 2 A circuit diagram of an adaptive single-drive circuit for a Si / SiC hybrid device provided in an embodiment of this application is shown below. Figure 2 As shown, the drive signal distribution module 101 includes: a drive chip U1 and a drive resistor R. g Current limiting resistor R cl First switching device S d Second switching device S s Delay resistor R d Delay capacitor C d diode D s Among them, the first switching device S d Second switching device S s All are low-voltage N-channel MOSFETs, and the delay network consists of a series delay resistor R. d and delay capacitor C d The unidirectional conduction device uses a diode D. s In one possible implementation, the drive signal distribution module 101 further includes a drive resistor R. gDrive resistor R g Connected to the output terminal of the driver chip U1 and the first switching device S d Between the first terminals. The driving resistor R g Used to limit the peak current output of the driver chip, preventing excessive gate current from damaging the device, and simultaneously adjusting the switching speed of the SiC MOSFET to achieve a balance between switching losses and electromagnetic interference. Typically, R... g The value ranges from 2.2Ω to 47Ω. Optionally, the first switching device S d Second switching device S s All are low-voltage MOSFETs, and the first switching device S d The drain of the first terminal is connected to the gate of the SiC MOSFET. The first switching device S d The source of the second switching device is connected to the negative power supply terminal VEE of the driver chip U1; s The drain of the second switching device S is connected to the base of the Si IGBT. s The source of the MOSFET is connected to the output terminal of the driver chip U1. The low-voltage MOSFET (20V~30V) features low on-resistance, small gate charge, and fast switching speed, making it suitable for high-frequency driving applications. Optionally, the unidirectional conducting device is a diode D. s The diode D s The anode of the diode is connected to the base of the Si IGBT. s The cathode is connected to the output terminal of the driver chip U1. When the second switching device Ss is turned off, the diode D... s Forward conduction clamps the Si IGBT base near the negative power supply voltage (VEE+VF, approximately -7.3V), far below the IGBT threshold voltage, effectively preventing mis-conduction; when S... s When conducting, diode D s Reverse cutoff does not affect the transmission of drive signals.

[0043] In one possible implementation, the delay network includes delay resistors R connected in series. d and delay capacitor C d The delay resistor R d One end of the delay resistor R is connected to the output terminal of the driver chip U1. d The other end is connected to the delay capacitor C d One end of the delay capacitor C d The other end is connected to the first switching device S d The control terminal. This RC network causes the gate voltage of Sd to decrease exponentially when the falling edge of the drive signal arrives, thereby delaying the first switching device S. dThe turn-off of the SiC MOSFET lags behind that of the Si IGBT. The delay time of the delay network satisfies the following relationship:

[0044]

[0045] in, This is the positive power supply voltage for the driver chip. This is the negative power supply voltage for the driver chip. Let τ be the threshold voltage of the first switching device, and τ be the time constant of the circuit, expressed as:

[0046]

[0047] in, This is the resistance value of the delay resistor. This is the capacitance value of the delay capacitor. This is the gate-source parasitic capacitance value of the first switching device. By adjusting... , The value of can be precisely set the delay time (usually from tens of nanoseconds to a few microseconds), thereby optimizing the distribution of switching losses and conduction losses in high current mode.

[0048] The current detection and mode switching module 102 consists of the following components: a first operational amplifier U2, a second operational amplifier U3, proportional resistors R1, R2, R3, and a feedback resistor R. f1 NTC thermistor R T Voltage divider resistor R4, current limiting resistors R5 and R6.

[0049] Specifically, the signal amplification unit includes a first operational amplifier U2 and a feedback resistor R. f1 Detect voltage signal v in The feedback resistor R is input differentially to the non-inverting and inverting input terminals of the first operational amplifier U2. f1 It is connected between the output terminal and the inverting input terminal of the first operational amplifier U2. Specifically, v in The positive terminal is connected to the non-inverting terminal of U2 via a proportional resistor R1, v in The negative terminal is connected to the inverting terminal of U2 via a proportional resistor R2 (usually R2=R1). The output voltage v of the first operational amplifier U2 is... o1 With the detected voltage signal v in The following conditions must be met:

[0050]

[0051] in, The detected voltage signal. The resistance value of the feedback resistor is given. The value of the proportional resistor connected in series with the non-inverting input of the first operational amplifier is given. The differential amplifier structure effectively suppresses common-mode noise and improves detection accuracy; the amplification factor is determined by R. f1 / R1 determines the voltage at the millivolt level. in Magnified to the volt level for easier comparison later.

[0052] It should be noted that the detected voltage signal v in The voltage drop across the current sampling resistor or the voltage signal output by the Rogowski coil integrator circuit can be used. When using the current sampling resistor scheme, a small-value precision resistor is connected in series in the main power circuit, suitable for low-to-medium power applications. When using the Rogowski coil scheme, the Rogowski coil is wrapped around the main circuit conductors, and after integration, a voltage signal proportional to the current is obtained, suitable for high-power or high-frequency applications. This embodiment is not limited to the above two schemes; any detection scheme that can generate a voltage signal proportional to the current of the hybrid device is applicable.

[0053] Additionally, the reference voltage generation unit includes a voltage divider resistor R4 and a negative temperature coefficient thermistor R. T The voltage divider resistor R4 and the negative temperature coefficient thermistor R T The voltage divider resistor R4 and the negative temperature coefficient thermistor R are connected in series. T The reference voltage V is output from the common connection point. ref The negative temperature coefficient thermistor R T For NTC thermistors, the relationship between their resistance and temperature satisfies:

[0054]

[0055] in, This is the resistance value at temperature T. The nominal resistance value, The absolute temperature is the value of the nominal resistance, and B is the constant value of the thermistor. Since the resistance of an NTC thermistor decreases with increasing temperature, the reference voltage V... ref It decreases as the junction temperature increases.

[0056] Further, please refer to Figure 3 , Figure 3 This is a schematic diagram illustrating the change of on-state resistance with junction temperature provided in an embodiment of this application, with reference voltage V. ref The corresponding current switching threshold is set to the knee current value of the hybrid device. The knee current value is the current flowing through the SiC MOSFET when the drain-source voltage of the Si IGBT equals the collector-emitter saturation voltage. The knee current value is negatively correlated with the on-state resistance of the SiC MOSFET. The mathematical expression for the knee current is:

[0057]

[0058] Where V k,IGBT R is the knee voltage of the Si IGBT. ds (T) is the on-state resistance of the SiC MOSFET (a function of junction temperature, with a positive temperature coefficient). Since R... ds (T) increases with increasing temperature, knee current Ik decreases, and reference voltage V ref The threshold is correspondingly reduced, enabling adaptive calibration of the switching threshold with temperature. This ensures that the hybrid device always switches the gate strategy at the optimal current point, avoiding the problems of premature switching at high temperatures and delayed switching at low temperatures caused by a fixed threshold.

[0059] In one possible implementation, the comparison unit includes a second operational amplifier U3, the non-inverting input of which receives a first comparison signal v. o1 The inverting input of the second operational amplifier U3 receives the reference voltage V. ref The output of the second operational amplifier U3 is connected to the second switching device S. s The control terminal. U3 adopts open-loop operating mode: when v o1 >V ref When the output is high (positive power supply voltage), S s On; when v o1 <V ref When the output is low (negative power supply voltage or 0V), S s Turn off. The comparison function is implemented using a general-purpose operational amplifier, eliminating the need for a dedicated comparator chip and reducing circuit costs.

[0060] Further, please refer to Figure 4 , Figure 4 This is a schematic diagram of the current amplification and gate strategy switching circuit provided in an embodiment of this application, as shown below. Figure 4 As shown, the PWM signal output by the driver chip U1 passes through the driver resistor R. g Simultaneously supplied to the SiC MOSFET gate and the first switching device S d The drain electrode. Simultaneously, the current detection signal v in v is obtained after amplification by the signal amplification unit o1 The comparison unit will v o1 With reference voltage V ref Compare them.

[0061] When the hybrid device current is small (v) o1 <V ref The comparison unit outputs a low level, causing the second switching device S to... sWhen the circuit is turned off, the controllable path between the output of the driver chip U1 and the base of the Si IGBT is broken, and the base of the Si IGBT is connected via a unidirectional conduction device (diode D). s When clamped to the off level, the Si IGBT remains off. At this time, only the SiC MOSFET is driven by the PWM signal and operates in a low-current mode, avoiding the switching and conduction losses of the Si IGBT.

[0062] When the current of the hybrid device is large (v) o1 >V ref The comparison unit outputs a high level, causing the second switching device S to... s When the drive chip U1 is turned on, the controllable path between its output and the base of the Si IGBT is established. The base of the Si IGBT receives the drive signal, and the Si IGBT is turned on. Simultaneously, when the falling edge of the PWM signal arrives, due to the delay network (R... d C d The presence of the first switching device S d The gate voltage decreases slowly, S d The turn-off time is delayed, so the turn-off time of the SiC MOSFET lags behind that of the Si IGBT. This enables a high-current operating mode: both are turned on simultaneously, with the SiC MOSFET bearing the switching losses and the Si IGBT bearing the conduction losses, thus minimizing overall losses.

[0063] This application provides an adaptive single-drive circuit for Si / SiC hybrid devices. Through the aforementioned pure hardware circuit structure, a single drive chip can automatically switch the gate drive strategy based on the current magnitude, and threshold temperature compensation is achieved using an NTC thermistor, completely eliminating the need for a digital controller. Under low current conditions, only the SiC MOSFET operates; under high current conditions, both operate collaboratively with a delayed turn-off of the SiC MOSFET, effectively reducing switching and conduction losses across all operating conditions. The circuit structure is simple, easy to integrate, improves power density and reliability, and reduces the burden on the controller.

[0064] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. This program can be stored in a computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. The aforementioned storage medium includes various media capable of storing program code, such as read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks. Unless otherwise specified, the technical features of this embodiment and its implementation schemes can be combined arbitrarily.

[0065] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. It will be apparent to those skilled in the art that various modifications can be made to these embodiments, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An adaptive single-drive circuit for Si / SiC hybrid devices, characterized in that, include: A drive signal distribution module is provided, wherein the input terminal of the drive signal distribution module is used to receive the output signal from an external drive chip, and the drive signal distribution module includes a first output terminal, a second output terminal, a first switching device, a second switching device, a delay network, and a unidirectional conduction device; wherein, the first output terminal is used to connect to the gate of a SiC MOSFET and provide a first drive signal, and the second output terminal is used to connect to the base of a Si IGBT and provide a second drive signal; A current detection and mode switching module is provided. The input terminal of the current detection and mode switching module receives a detection voltage signal characterizing the magnitude of the current flowing through the hybrid device. The current detection and mode switching module includes a signal amplification unit, a reference voltage generation unit, and a comparison unit. The signal amplification unit amplifies the detection voltage signal and outputs a first comparison signal. The reference voltage generation unit generates a reference voltage that varies negatively with the junction temperature of the hybrid device. The comparison unit is connected to both the signal amplification unit and the reference voltage generation unit, and compares the first comparison signal with the reference voltage. The output terminal of the comparison unit is connected to the control terminal of the second switching device. The output terminal of the driving chip is connected to the gate of the SiC MOSFET and the first terminal of the first switching device via the driving signal distribution module. The delay network is connected between the output terminal of the driving chip and the control terminal of the first switching device. The second switching device is connected between the output terminal of the driving chip and the base of the Si IGBT, and the second switching device is used to form a controllable path. The unidirectional conducting device is connected in parallel with the second switching device, and the conduction direction of the unidirectional conducting device is set to clamp the base of the Si IGBT to the off level. When the comparison unit determines that the first comparison signal is less than the reference voltage, the output of the comparison unit turns off the second switching device, the controllable path between the output of the driver chip and the base of the Si IGBT is disconnected, and the base of the Si IGBT is clamped at the off level via the unidirectional conduction device. When the comparison unit determines that the first comparison signal is greater than the reference voltage, the output of the comparison unit turns on the second switching device, and the controllable path between the output of the driver chip and the base of the Si IGBT is connected, and the base of the Si IGBT receives the driving signal; at the same time, the delay network responds to the falling edge of the output signal of the driver chip, causing the first switching device to turn off with a delay, thereby causing the turn-off time of the SiC MOSFET to lag behind the turn-off time of the Si IGBT; The delay time of the delay network is determined by the product of the resistance and capacitance values ​​of the delay network.

2. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The delay network includes a delay resistor and a delay capacitor connected in series. One end of the delay resistor is connected to the output terminal of the driver chip, and the other end of the delay resistor is connected to one end of the delay capacitor. The other end of the delay capacitor is connected to the control terminal of the first switching device. The delay time of the delay network satisfies the following relationship: in, This is the positive power supply voltage for the driver chip. This is the negative power supply voltage for the driver chip. Let τ be the threshold voltage of the first switching device, and τ be the time constant of the circuit, expressed as: in, This is the resistance value of the delay resistor. This is the capacitance value of the delay capacitor. This represents the gate-source parasitic capacitance value of the first switching device.

3. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The reference voltage generation unit includes a voltage divider resistor and a negative temperature coefficient thermistor. The voltage divider resistor and the negative temperature coefficient thermistor are connected in series, and the reference voltage is output at the common connection point of the voltage divider resistor and the negative temperature coefficient thermistor. The negative temperature coefficient thermistor is an NTC thermistor, and the relationship between its resistance and temperature satisfies the following: in, This is the resistance value at temperature T. The nominal resistance value, The absolute temperature is the nominal resistance value, and B is the B-value constant of the thermistor.

4. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The signal amplification unit includes a first operational amplifier and a feedback resistor. The detected voltage signal is differentially input to the non-inverting and inverting inputs of the first operational amplifier. The feedback resistor is connected between the output and inverting inputs of the first operational amplifier. The output voltage of the first operational amplifier and the detected voltage signal satisfy the following condition: in, The detected voltage signal. The resistance value of the feedback resistor is given. The value of the proportional resistor connected in series with the non-inverting input of the first operational amplifier.

5. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The comparison unit includes a second operational amplifier. The non-inverting input of the second operational amplifier receives the first comparison signal, the inverting input of the second operational amplifier receives the reference voltage, and the output of the second operational amplifier is connected to the control terminal of the second switching device.

6. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The unidirectional conducting device is a diode, the anode of which is connected to the base of the Si IGBT, and the cathode of which is connected to the output terminal of the driving chip.

7. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, Both the first and second switching devices are low-voltage MOSFETs. The drain of the first switching device is connected to the gate of the SiC MOSFET as the first terminal, the source of the first switching device is connected to the negative power supply terminal of the driver chip, the drain of the second switching device is connected to the base of the Si IGBT, and the source of the second switching device is connected to the output terminal of the driver chip.

8. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The detected voltage signal is either the voltage drop across the current sampling resistor or the voltage signal output by the Rogowski coil integrator circuit.

9. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The current switching threshold corresponding to the reference voltage is set as the knee current value of the hybrid device. The knee current value is the current flowing through the SiC MOSFET when the drain-source voltage of the SiC MOSFET is equal to the collector-emitter saturation voltage of the Si IGBT. The knee current value is negatively correlated with the on-state resistance of the SiC MOSFET.

10. The adaptive single-drive circuit for Si / SiC hybrid devices according to claim 1, characterized in that, The drive signal distribution module further includes a drive resistor, which is connected between the output terminal of the drive chip and the first terminal of the first switching device.

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