A circuit application method for realizing conversion from LVTTL level to LVPECL level

CN122993695APending Publication Date: 2026-10-27JIANGSU ALLRAY
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Patent Information

Application Number
CN202611177165.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-05
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

当前,LVTTL/LCPECL电平转换芯片采用BiCMOS ECL工艺,基本由海外企业持有完整电路架构专利,国内没有该类别集成芯片,芯片供货受海外供应链管控,存在断供、长交期风险,且芯片单价高昂,生产物料成本极高

Benefits of technology

本发明采用国产通用三极管、阻容器件搭建电路实现单端LVTTL信号向LVPECL信号的转换。旨在规避国外电平转换芯片专利保护架构,全部使用国产分立器件,消除供应链和高昂成本问题。另本发明电路结构简洁,元器件数量少,成本极低,PCB占用面积小,兼容FPGA、国产MCU输出的LVTTL单端信号。

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Abstract

The application discloses a circuit application method for realizing LVTTL level to LVPECL level conversion, when LVTTL input high level is 3.3V, R1 and R2 are divided, the base potential of Q1 is lifted, VBE is increased, Q1 works in the amplification zone, the conduction current is greatly increased, the current flows through R5 to output positive LVPECL voltage signal, at this time, the emitter voltage of Q2 is greater than the base voltage, Q2 is in the cut-off state, and the conduction current is basically not generated; when LVTTL input low level is 0V, the base potential of Q1 is reduced, Q1 is cut off, and the conduction current is basically 0, at this time, Q2 is powered by the power supply VCC, VBE is increased, works in the amplification zone, the conduction current is greatly increased, and flows through R5 to output reverse LVPECL voltage signal. The application adopts domestic general-purpose triode and resistance-capacitance devices to build a circuit to realize conversion of single-ended LVTTL signal to LVPECL signal, and eliminates the problems of supply chain and high cost. In addition, the circuit structure is simple, the number of components is small, the cost is extremely low, the PCB occupies a small area, and the LVTTL single-ended signal output by FPGA and domestic MCU is compatible.
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Description

Technical Field

[0001] This invention relates to the field of optical communication technology, and in particular to a circuit application method for converting LVTTL level to LVPECL level. Background Technology

[0002] Currently, the alarm signal interface of 1*9 integrated optical modules mainly uses LVPECL, while the alarm signal output of integrated main control chips is LVTTL. Therefore, a circuit solution is needed to convert LVTTL level to LVPECL level. Currently, LVTTL / LVPECL level conversion chips use BiCMOS ECL technology, and the complete circuit architecture patents are basically held by overseas companies. There are no integrated chips of this type in China, and chip supply is controlled by overseas supply chains, posing risks of supply disruptions and long lead times. Furthermore, the chip unit price is high, resulting in extremely high production material costs. The industry urgently needs an LVTTL to LVPECL circuit solution built entirely with domestically produced general-purpose discrete transistors and resistors / capacitors to circumvent the patent barriers of imported chips and achieve LVPECL level output at low cost. Summary of the Invention

[0003] This invention provides a circuit application method for converting LVTTL level to LVPECL level. It uses domestically produced general-purpose transistors and resistors / capacitors to build the circuit and achieve the conversion of single-ended LVTTL signals to LVPECL signals. The aim is to circumvent the patent protection architecture of foreign level conversion chips, using only domestically produced discrete components, thus eliminating supply chain and high cost issues. Furthermore, this invention features a simple circuit structure, few components, extremely low cost, small PCB footprint, and compatibility with LVTTL single-ended signals output from FPGAs and domestically produced MCUs.

[0004] A circuit application method for converting LVTTL level to LVPECL level: When the LVTTL input is high (3.3V), R1 and R2 divide the voltage, causing the base potential of Q1 to rise, VBE to increase, and Q1 to operate in the amplification region. The conduction current increases significantly, and the current flows through R5 to output a positive LVPECL voltage signal. At this time, the emitter voltage of Q2 is greater than the base voltage, and Q2 is in the cutoff state, with almost no conduction current. When the LVTTL input is low (0V), the base potential of Q1 decreases, Q1 is cut off, and the conduction current is basically zero. At this time, Q2 is powered by the power supply VCC, VBE increases, and it operates in the amplification region. The conduction current increases significantly, and the current flows through R5 to output a reverse LVPECL voltage signal.

[0005] Furthermore, the input terminal outputs an LVTTL alarm wave signal from the optical module's main control integrated chip.

[0006] Furthermore, Q1 and Q2 use domestically produced SOT-23 S9013 NPN transistors.

[0007] Furthermore, the resistor values ​​are R1=200Ω, R2=7.5kΩ, R3=800Ω, R4=2kΩ, and R5=100Ω.

[0008] Furthermore, VCC is connected to the standard 3.3V power supply of the optical module; the LOS port is connected to the LVTTL single-ended alarm output pin of the main control chip, and the differential output port LVPECL is connected to the alarm signal receiving pin of the optical module.

[0009] Furthermore, after power-on, the voltage divider network stably outputs a 2.0V reference potential. When the LVTTL input switches between high and low levels, the LVPECL outputs a standard LVPECL level signal, which is then connected to a 1*9 optical module.

[0010] The embodiments of the present invention have the following beneficial effects: This invention uses domestically produced general-purpose transistors and resistors / capacitors to build a circuit to convert single-ended LVTTL signals to LVPECL signals. It aims to circumvent the patent protection architecture of foreign level conversion chips, using only domestically produced discrete components, thus eliminating supply chain and high cost issues. Furthermore, this invention features a simple circuit structure, few components, extremely low cost, small PCB footprint, and compatibility with LVTTL single-ended signals output from FPGAs and domestically produced MCUs. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the LVTTL to LVPECL circuit based on the S9013 NPN transistor of this invention.

[0012] Figure 2 The circuit's operating state when the LVTTL input is high.

[0013] Figure 3 The circuit's operating state when the LVTTL input is low. Detailed Implementation

[0014] Example:

[0015] See Figures 1-3This invention consists of four functional units: a reference voltage divider bias unit, an NPN transistor differential amplifier core unit, an LVPECL output matching unit, and a 3.3V power supply unit. The core components are two domestically produced NPN transistors, Q1 and Q2. After the circuit is powered on, when the LVTTL input is high (3.3V), R1 and R2 divide the voltage, causing the base potential of Q1 to rise, VBE to increase, and Q1 to operate in the amplification region. The conduction current increases significantly, and the current flows through R5 to output a positive LVPECL voltage signal. At this time, the emitter voltage of Q2 is greater than the base voltage, and Q2 is in the cutoff state, with almost no conduction current. When the LVTTL input is low (0V), the base potential of Q1 decreases, Q1 is cut off, and the conduction current is basically zero. At this time, Q2 is powered by the power supply VCC, VBE increases, and it operates in the amplification region. The conduction current increases significantly, flowing through R5 to output a reverse LVPECL voltage signal.

[0016] The power supply voltage VCC=3.3V, and the input terminal is the LVTTL alarm wave signal output by the optical module main control integrated chip; the component configuration is as follows: Q1 and Q2 are domestic SOT-23 S9013 NPN transistors, and the resistor values ​​are R1=200Ω, R2=7.5kΩ, R3=800Ω, R4=2kΩ, and R5=100Ω; Complete the surface mount device soldering according to the schematic diagram. Connect VCC to the standard power supply of the 3.3V optical module. Connect the LOS port to the LVTTL single-ended alarm output pin of the main control chip, and connect the differential output port LVPECL to the alarm signal receiving pin of the optical module.

[0017] After power-on, the voltage divider network stably outputs a 2.0V reference potential. When switching between high and low levels of the LVTTL input, the LVPECL outputs a standard LVPECL level signal. When connected to a 1*9 optical module, it undergoes 72 hours of high and low temperature aging without alarms, false triggers, or waveform distortion.

[0018] The core amplifier device, the S9013, is a domestically produced, universal surface-mount transistor with ample supply channels and no risk of supply disruption. Compared to imported conversion chips such as the SY100ELT series and MAX9371 series, the material cost of the entire circuit is reduced by more than 60%, resulting in significant economic benefits for mass production of optical modules.

[0019] With only 2 S8050 transistors and 5 surface mount resistors, the number of components is small; all components are in standard SMT surface mount packages, resulting in high yield rates for automated soldering, making it suitable for mass production of fiber optic modules; the PCB layout is simple, occupying a small board area, and it is not only suitable for 1*9 optical modules, but also compatible with small SFP / SFP+ optical modules.

[0020] Not only can it be used for LOS alarm signal conversion in optical modules, but it can also be used for FPGA clock output and single-ended to differential signal conversion in industrial test instruments, and is compatible with all 0-3.3V standard LVTTL single-ended digital signals.

[0021] The static common-mode voltage is locked at 2.0V, strictly matching the official electrical standard of 3.3V LVPECL.

[0022] This invention uses domestically produced general-purpose transistors and resistors / capacitors to build a circuit to convert single-ended LVTTL signals to LVPECL signals. It aims to circumvent the patent protection architecture of foreign level conversion chips, using only domestically produced discrete components, thus eliminating supply chain and high cost issues. Furthermore, this invention features a simple circuit structure, few components, extremely low cost, small PCB footprint, and compatibility with LVTTL single-ended signals output from FPGAs and domestically produced MCUs.

[0023] The above are merely some embodiments of the present invention. For those skilled in the art, various modifications and improvements can be made without departing from the inventive concept of the present invention, and all such modifications and improvements fall within the scope of protection of the present invention.

Claims

1. A circuit application method for converting LVTTL level to LVPECL level, characterized in that: When the LVTTL input is high (3.3V), the voltage divider between R1 and R2 causes the base potential of Q1 to rise, increasing VBE. Q1 operates in the amplification region, and the on-current increases significantly. The current flows through R5, outputting a positive LVPECL voltage signal. At this time, the emitter voltage of Q2 is greater than the base voltage, and Q2 is in the off state, generating almost no on-current. When the LVTTL input is low (0V), the base potential of Q1 decreases, Q1 is off, and the on-current is almost zero. At this time, Q2 is powered by VCC, VBE increases, and it operates in the amplification region. The on-current increases significantly, flowing through R5, outputting a reverse LVPECL voltage signal.

2. The circuit application method for converting LVTTL level to LVPECL level as described in claim 1, characterized in that: The input terminal outputs an LVTTL alarm wave signal from the optical module's main control integrated chip.

3. The circuit application method for converting LVTTL level to LVPECL level as described in claim 1, characterized in that: Q1 and Q2 use domestically produced SOT-23 S9013 NPN transistors.

4. The circuit application method for converting LVTTL level to LVPECL level according to claim 1, characterized in that: The resistor values ​​are R1=200Ω, R2=7.5kΩ, R3=800Ω, R4=2kΩ, and R5=100Ω.

5. The circuit application method for converting LVTTL level to LVPECL level according to claim 1, characterized in that: The VCC port connects to the standard 3.3V power supply of the optical module; the LOS port connects to the LVTTL single-ended alarm output pin of the main control chip, and the differential output port LVPECL connects to the alarm signal receiving pin of the optical module.

6. The circuit application method for converting LVTTL level to LVPECL level according to claim 1, characterized in that: After power-on, the voltage divider network stably outputs a 2.0V reference potential. When the LVTTL input switches between high and low levels, the LVPECL outputs a standard LVPECL level signal, which is connected to a 1*9 optical module.