A system and control method for interference detection based on double-ring coupled oscillation
Patent Information
- Application Number
- CN202611165689.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-03
- Publication Date
- 2026-10-27
AI Technical Summary
[0002]当前传感器前端电路普遍依赖外部晶振,存在成本高、体积大、温漂与抗干扰能力差等缺陷
1、干扰检测无需外部晶振,降低成本与体积。本发明采用基于双环耦合振荡的自同步模块构建时序基准单元,依靠自同步模块的自稳频、自锁相特性自主生成稳定的基准电压,彻底摆脱了传统传感器前端电路对外部晶振的依赖,电路结构简洁,显著降低了系统的物料成本与硬件体积。
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Figure CN122993700A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of interference detection, specifically to an interference detection system and method based on dual-ring coupled oscillation. Background Technology
[0002] Current sensor front-end circuits generally rely on external crystal oscillators, which have drawbacks such as high cost, large size, temperature drift, and poor anti-interference capability. Conventional interference detection circuit systems mostly use fixed threshold comparison or analog-to-digital sampling schemes, which rely on external reference sources, are susceptible to power supply and temperature fluctuations, and lack distributed node synchronization capabilities.
[0003] Traditional front-end circuits separate timing, sensing, and judgment functions, and there is currently no integrated crystal-free pure hardware interference detection system. At the same time, existing sensing front-ends only have simple level alarm functions, and cannot output standardized phase signals or divide standardized phase steps. They are difficult to connect to high-level applications such as 6D phase encoding and timing reconstruction, and have not formed an integrated hardware architecture of "timing generation-phase output-interference detection-encoding input". Therefore, they cannot support the implementation of the cyclic phase transition topology system in the applicant's parent application 2026107263443 "A Phase Encoding Method and System Based on Cyclic Phase Transition Topology".
[0004] Different sensing scenarios and array partitions have varying requirements for timing frequency and phase reference. Traditional fixed-parameter timing unit debugging and batch configuration are inefficient, and the remote operation and maintenance costs of large-scale arrays remain high. To solve the above engineering problems, this invention is based on the prior application 2026107263443 "A Phase Encoding Method and System Based on Cyclic Phase Transition Topology" and application number 2026110201654 "A Self-Synchronization Module and Phase Control Method Based on Double-Ring Coupled Oscillation". Combining cyclic phase transition topology theory, it creates an interference detection system and control method based on double-ring coupled oscillation that integrates timing generation, interference detection, and phase output. Summary of the Invention
[0005] To overcome the existing technical problems, the present invention provides an interference detection system and control method based on dual-ring coupled oscillation.
[0006] The present invention adopts the following technical solution.
[0007] An interference detection system based on dual-ring coupled oscillation includes: The timing reference unit includes a self-synchronization module, which can output a self-stabilized frequency and self-locked phase reference voltage. The self-synchronization module has a preset sensitive node. The interference injection unit has an input terminal for receiving external interference signals and an output terminal for coupling the external interference signals to the sensitive node to change the voltage of the sensitive node and form a disturbed voltage. The comparison and judgment unit includes a voltage comparator and a voltage divider potentiometer. The input terminal of the voltage divider potentiometer is electrically connected to the self-synchronization module, and the output terminal of the voltage divider potentiometer is electrically connected to the inverting terminal of the voltage comparator to provide an adjustable reference voltage to the voltage comparator. The non-inverting terminal of the voltage comparator is electrically connected to the sensitive node to compare the disturbed voltage of the sensitive node with the adjustable reference voltage to form a node interference indication signal.
[0008] As a further improvement of the present invention, the self-synchronization module includes an inner loop oscillation unit, an outer loop oscillation unit, a cross-coupled network, and an output interface; Both the inner-loop oscillation unit and the outer-loop oscillation unit are formed by cascading at least two oscillation units. A cross-coupling network is located between the inner loop oscillation unit and the outer loop oscillation unit. It can inject the output signal of the inner loop oscillation unit with a frequency of the first initial oscillation frequency into the outer loop oscillation unit with a preset coupling coefficient, and inject the output signal of the outer loop oscillation unit with a frequency of the second initial oscillation frequency into the inner loop oscillation unit with a preset coupling coefficient, so that the oscillation frequencies of the inner loop oscillation unit and the outer loop oscillation unit tend to be consistent and the phase difference is locked. The oscillation unit is equipped with a frequency configuration network, which is used to determine the first initial oscillation frequency and the second initial oscillation frequency. The output interface is used to output a reference voltage.
[0009] As a further improvement of the present invention, the output interface includes a working output interface and a phase difference output interface. The reference voltage is output through the working output interface, and the phase difference output interface is used to output multiple standardized timing phase signals. The multiple standardized timing phase signals are divided into intervals according to a preset number of equal-length phase steps to supply the back-end encoding system.
[0010] As a further improvement of the present invention, the timing reference unit also includes a digital configuration device, which includes a digital configuration interface, adjustable resistor-capacitor components, and a digital potentiometer. The adjustable resistor-capacitor components and the digital potentiometer are electrically connected to the digital configuration interface. The frequency configuration network is composed of fixed resistor-capacitor components and adjustable resistor-capacitor components. The adjustable resistor-capacitor components are programmable capacitors or digitally adjustable resistors. The coupling device of the cross-coupling network adopts a digital potentiometer. The digital configuration device can receive external digital configuration commands and configure the coupling coefficient, the first initial oscillation frequency, the second initial oscillation frequency, and the phase difference according to the external digital configuration commands.
[0011] As a further improvement to the present invention, the number of divisions is six.
[0012] As a further improvement of the present invention, both the inner ring oscillation unit and the outer ring oscillation unit are composed of three oscillation units.
[0013] As a further improvement of the present invention, the cross-coupled network has a coupling device connected in series at the coupling points corresponding to the inner loop oscillation unit and the outer loop oscillation unit. The coupling device is a first fixed resistor, or a common adjustable resistor, or a digital potentiometer.
[0014] A disturbance detection control method based on dual-loop coupled oscillation is also proposed and applied to the disturbance detection system based on dual-loop coupled oscillation mentioned above. The method includes the following steps: S1. The self-synchronization module of the timing reference unit starts automatically upon power-on and outputs a self-stabilized frequency and self-locked phase reference voltage to the voltage divider potentiometer of the comparison judgment unit. The voltage divider potentiometer outputs an adjustable reference voltage to the inverting terminal of the voltage comparator. S2. External interference signals are coupled to sensitive nodes through interference injection units to change the voltage of sensitive nodes and form disturbed voltages. S3. The voltage comparator of the comparison and judgment unit compares the disturbed voltage and the adjustable reference voltage in real time. If the disturbed voltage is greater than the adjustable reference voltage, a high-level alarm signal is output as a node interference indication signal. If the disturbed voltage is less than or equal to the adjustable reference voltage, a low-level alarm signal is output as a node interference indication signal.
[0015] As a further improvement of the present invention, the self-synchronization module includes an inner loop oscillation unit, an outer loop oscillation unit, a cross-coupled network, and an output interface; The specific steps for the self-synchronization module of the timing reference unit to start automatically upon power-on and output a self-stabilized frequency and self-locked phase reference voltage include: S11. Simultaneously power on and start oscillating the inner ring oscillating unit and the outer ring oscillating unit, both of which are formed by cascading at least two oscillating units. S12. The output signal of the inner ring oscillation unit with the first initial oscillation frequency is injected into the outer ring oscillation unit with a preset coupling coefficient through a cross-coupling network, and the output signal of the outer ring oscillation unit with the second initial oscillation frequency is injected into the inner ring oscillation unit with a preset coupling coefficient, so as to adjust the oscillation frequencies of the inner ring oscillation unit and the outer ring oscillation unit to be consistent. S13. The oscillation frequencies of the inner and outer ring oscillation units are kept consistent, and the phase difference between the inner and outer ring oscillation units is gradually stabilized to achieve phase difference locking. S14. Output the reference voltage through the output interface.
[0016] As a further improvement of the present invention, the output interface includes a working output interface and a phase difference output interface. The reference voltage is output through the working output interface, and the phase difference output interface is used to output multiple standardized timing phase signals. The multiple standardized timing phase signals are divided into intervals according to a preset number of equal-length phase steps to supply the back-end encoding system. S1 is preceded by S0, which receives external digital configuration instructions through a digital configuration device and configures the coupling coefficient, first initial oscillation frequency, second initial oscillation frequency and phase difference according to the external digital configuration instructions.
[0017] The beneficial effects of this invention are as follows: 1. Interference detection eliminates the need for an external crystal oscillator, reducing cost and size. This invention employs a self-synchronizing module based on dual-ring coupled oscillation to construct a timing reference unit. Relying on the self-stabilizing and self-locking characteristics of the self-synchronizing module, a stable reference voltage is generated autonomously, completely eliminating the dependence of traditional sensor front-end circuits on external crystal oscillators. The circuit structure is simple, significantly reducing the material cost and hardware size of the system.
[0018] 2. High stability and low drift. The adjustable reference voltage used by the voltage comparator is obtained by dividing the reference voltage output from the self-synchronization module through a voltage divider potentiometer. It shares the same reference source as the operating voltage of the sensitive node, eliminating the need for an external independent reference source. This design fundamentally avoids the level shift problem caused by power fluctuations and ambient temperature changes in external reference sources, effectively suppressing the interference of temperature drift and voltage drift on detection accuracy, and ensuring the accuracy and stability of interference detection in complex environments.
[0019] 3. Pure hardware detection mechanism with fast response and strong anti-interference capability. External interference signals are directly coupled to the sensitive node of the self-synchronization module through the interference injection unit. By changing the voltage of the sensitive node, a disturbed voltage is formed. Then, a voltage comparator compares the disturbed voltage with the adjustable reference voltage, and finally outputs a node interference indication signal. The entire detection process is implemented by pure hardware circuitry, without the need for microcontrollers or software programs. This not only ensures fast interference detection response but also avoids the reliability risks associated with software operation. The circuit has strong anti-interference capability, and the calibration method is simple and intuitive. In addition, the adjustable reference voltage of the input voltage comparator can be flexibly adjusted using a voltage divider potentiometer. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 This is a system framework diagram of the present invention; Figure 2 This is a flowchart of the method of the present invention; Figure 3 This is a schematic diagram of the system of the present invention operating under interference-free conditions; Figure 4 This is a schematic diagram of the system of the present invention operating under interference conditions; Figure 5 These are oscilloscope waveforms of the inner and outer loop oscillation units of the interference-free operating circuit of this invention, measured in actual operation. Figure 6 These are oscilloscope waveforms of the measured level alarm signal and the outer loop oscillation unit of the interference-free operating circuit of this invention. Figure 7 These are oscilloscope waveforms of the inner and outer loop oscillation units measured in the interference circuit of this invention. Figure 8 This is an oscilloscope waveform diagram of the measured level alarm signal and the outer loop oscillation unit of the interference condition circuit of this invention. Detailed Implementation
[0022] The accompanying drawings are for illustrative purposes only and should not be construed as limiting the scope of this patent. To better illustrate this embodiment, some parts in the drawings may be omitted, enlarged, or reduced, and do not represent the actual dimensions of the product.
[0023] It will be understood by those skilled in the art that certain well-known structures and their descriptions may be omitted in the accompanying drawings. The technical solution of the present invention will be further described below with reference to the accompanying drawings and embodiments.
[0024] This invention is an extended hardware implementation of parent application 2026107263443 "A phase encoding method and system based on cyclic phase transition topology" and application number 2026110201654 "A self-synchronization module and phase control method based on dual-ring coupled oscillation".
[0025] Reference Figures 1 to 8 Therefore, this invention proposes an interference detection system based on dual-ring coupled oscillation, comprising: The timing reference unit includes a self-synchronization module, which can output a self-stabilized frequency and self-locked phase reference voltage. The self-synchronization module has a preset sensitive node. The interference injection unit has an input terminal for receiving external interference signals and an output terminal for coupling the external interference signals to the sensitive node to change the voltage of the sensitive node and form a disturbed voltage. The comparison and judgment unit includes a voltage comparator and a voltage divider potentiometer. The input terminal of the voltage divider potentiometer is electrically connected to the self-synchronization module, and the output terminal of the voltage divider potentiometer is electrically connected to the inverting terminal of the voltage comparator to provide an adjustable reference voltage to the voltage comparator. The non-inverting terminal of the voltage comparator is electrically connected to the sensitive node to compare the disturbed voltage of the sensitive node with the adjustable reference voltage to form a node interference indication signal.
[0026] This invention has three core functions. First, interference detection eliminates the need for an external crystal oscillator, reducing cost and size. It offers high stability, low drift, and a purely hardware-based detection mechanism with fast response and strong anti-interference capabilities. Second, it outputs multiple standardized timing phase signals, as well as high-level or low-level alarm signals, as node interference indication signals and singularity marker signals to the back-end encoding system via a phase difference output interface. This enables the back-end encoding system to perform a series of operations, including cyclic phase transition analysis, phase encoding, chaotic transition state marking, timing reconstruction, and anomaly warning. Cyclic phase transition analysis, chaotic transition state marking, and phase encoding are core concepts and operations in parent application 2026107263443, "A Phase Encoding Method and System Based on Cyclic Phase Transition Topology." This invention, combined with another sub-invention 2026110201654, "A Self-Synchronization Module and Phase Control Method Based on Dual-Ring Coupled Oscillation," serves as a practical implementation of the parent application. Third, the system can be deployed in an array, achieving distributed collaborative detection through weakly coupled synchronization, and enabling independent configuration of array partition parameters through a digital configuration device.
[0027] Specifically, the sensitive node in this invention is the CV pin, which does not refer to a specific standard pin of a chip. It is named using the semantics of ControlVoltage. The output of the interference injection unit uses a capacitor or resistor to couple the external interference signal to the sensitive node.
[0028] The formation of a node interference indication signal specifically refers to outputting a high-level or low-level alarm signal as a node interference indication signal, as shown in the reference. Figure 3 Under interference-free operating conditions, the indicator LED on the right is in the dark; under interference conditions, refer to... Figure 4 The indicator LED on the right is lit.
[0029] For reference Figure 5 The oscilloscope waveforms of the inner and outer loop oscillation units in the interference-free operating circuit are shown. The self-synchronization module includes the inner loop oscillation unit, the outer loop oscillation unit, the cross-coupling network, and the output interface. Both the inner and outer ring oscillation units are formed by cascading at least two oscillation units; A cross-coupling network is located between the inner loop oscillation unit and the outer loop oscillation unit. It can inject the output signal of the inner loop oscillation unit with a frequency of the first initial oscillation frequency into the outer loop oscillation unit with a preset coupling coefficient, and inject the output signal of the outer loop oscillation unit with a frequency of the second initial oscillation frequency into the inner loop oscillation unit with a preset coupling coefficient, so that the oscillation frequencies of the inner loop oscillation unit and the outer loop oscillation unit tend to be consistent and the phase difference is locked. The oscillation unit is equipped with a frequency configuration network, which is used to determine the first initial oscillation frequency and the second initial oscillation frequency. The output interface is used to output a reference voltage.
[0030] It should be noted that the self-synchronization module mentioned in this invention is the same self-synchronization module as that in another sub-invention, 2026110201654, "A Self-Synchronization Module and Phase Control Method Based on Dual-Ring Coupled Oscillation". Its structure and effect diagram can be found in the accompanying drawings of that application.
[0031] Here is a brief explanation of how the self-synchronization module works: (a) Frequency convergence mechanism to achieve self-stabilization of frequency.
[0032] Let the first initial oscillation frequency of the inner loop oscillation unit be... The second initial oscillation frequency of the outer ring oscillation unit is Both are set by the frequency configuration network, and can exist in the initial state. .
[0033] The cross-coupling network converts the output signal of the inner loop oscillator unit. The coupling coefficient k is injected into the outer loop oscillation unit, and the output signal of the outer loop oscillation unit is simultaneously... Injecting the same coupling coefficient k into the inner loop oscillator unit creates a bidirectional symmetrical constraint. Under this coupling effect, the actual frequency of the inner loop oscillator unit is pulled towards the outer loop oscillator unit. The outer ring oscillation unit is simultaneously pulled towards the inner ring oscillation unit by the offset. Offset. The system satisfies the following condition when it reaches steady state: = = , in The common locked oscillation frequency after convergence is between the original... and The convergence process is entirely automated by the cross-coupled network, requiring no external reference or digital calibration.
[0034] (II) Phase Difference Locking Mechanism After the inner and outer loop oscillators converge to the same frequency, the cross-coupled network applies a rigid constraint to the instantaneous phase. Let the phase of the inner loop oscillator be... The phase of the outer ring oscillation unit is The phase constraint established by the cross-coupled network is: , in It is determined by the coupling coefficient, injection intensity, and nonlinearity of the oscillating unit. Under symmetrical coupling, It is a constant value and does not drift with time, temperature, or voltage. When it is necessary to adjust the phase difference, it can be approximated by gradually adjusting the coupling coefficient.
[0035] The essence of this phase-locked loop (PLL) is that a closed-loop constraint path is formed by two loops, and any phase deviation will be automatically corrected, eventually converging to a unique stable phase difference. It does not rely on a phase detector or loop filter and belongs to the pure topology-constrained PLL type.
[0036] (III) Drift Self-Inhibition Mechanism Temperature and voltage fluctuations will synchronously change the time constants of the inner and outer loop oscillation units, causing and Drifting in the same direction.
[0037] In a single-ring oscillator, drift is directly manifested as frequency shift; In this module's dual-ring coupling structure, drift is canceled out by differential coupling: phase constraint. Almost unaffected by co-directional drift; locked frequency The sensitivity to single-loop drift is significantly reduced. In engineering, the long-term frequency stability of dual-loop coupling is more than an order of magnitude better than that of single-loop coupling, and the stability depends on the coupling coefficient k.
[0038] (iv) Correspondence with the parent application's "Möbius-like" topology The weakly coupled Möbius-like double-loop phase-locked topology described in this invention is a topological analogy of circuit behavior, not an abstract mathematical concept. The "weakly coupled Möbius-like double-loop phase-locked topology" of this invention is only a topological analogy of the phase constraint behavior of the circuit. Its physical circuit is characterized by: two sets of cascaded oscillating units, inner and outer loops, forming a bidirectional closed-loop phase constraint path through a cross-coupled network. The phase constraint path has no external timing breakpoints and can complete global phase self-locking without external reference. It does not require the physical structure to be a Möbius physical loop.
[0039] The double loop forms a unidirectional closed-loop phase loop path without external reference and without boundary discontinuity through a cross-coupled network, which is mathematically isomorphic to the unilateral, continuous, and self-closing characteristics of the Möbius strip. The phase is self-anchored, self-synchronized, and self-constrained within the coupled loop, achieving self-positioning without an external time reference; therefore, it is named a "weakly coupled Möbius-like double-loop phase-locked topology." For specific details, please refer to the specific embodiments of the parent patent 2026107263443.
[0040] As a further improvement of the present invention, the output interface includes a working output interface and a phase difference output interface. The reference voltage is output through the working output interface, and the phase difference output interface is used to output multiple standardized timing phase signals. The multiple standardized timing phase signals are divided into intervals according to a preset number of equal-length phase steps to supply the back-end encoding system.
[0041] As a further improvement to the present invention, the number of divisions is six.
[0042] The interval is divided according to six equal-length phase steps and supplied to the back-end coding system. It can directly match the timing reference requirements of the six-dimensional phase coding unit in the parent application 2026107263443. At the same time, it can be integrated into the sensor front end to provide a unified timing and phase reference for interference detection and phase sampling.
[0043] This section provides a general explanation of the meaning of the six-dimensional phase coding unit in parent application 2026107263443: it is the smallest complete and optimal unit for describing cyclic phase transition events. The first three bits are position phase units, used to anchor the phase position of the event within the cyclic phase transition period (corresponding to 3D position coordinates in Hamiltonian phase space); the last three bits are momentum phase units, used to anchor the evolution trend and rate of the event (corresponding to 3D momentum coordinates in Hamiltonian phase space). Its completeness can be proven through Lie group representation theory, and its optimality is reflected in the minimization of information entropy and effective control of coding redundancy. Specifically, the six-dimensional phase coding unit corresponds to six equal-length phase steps. Using the local tangent of the curve as the dynamic reference, the deviation direction of each step relative to the tangent (upward deviation corresponds to a positive feature, downward deviation corresponds to a negative feature; positive features can also be called yang features, and negative features can also be called yin features, used to characterize the deviation direction of the phase step relative to the tangent) constitutes the core feature of the momentum phase unit. (Note that the momentum phase unit is not the phase state code; the phase state code is obtained from the deviation direction of each of the six phase steps relative to the tangent.) The six steps combined form... This uniquely corresponding structural form enables aliasing-free and redundancy-free structural encoding. This six-dimensional phase encoding unit solves the technical problems of low-dimensional phase aliasing and the curse of high-dimensionality in existing technologies, achieving minimal complete encoding of cyclic events. This significantly reduces sampling computational overhead and data redundancy. For example, for a phase transition segment of "uniform ascent-plateau-uniform descent," phase state code 110000 can be generated; for a phase transition segment of "accelerated ascent-decelerated ascent-turning descent," phase state code 111000 can be generated. These are different phase states. When the two segments appear consecutively in the time sequence, a phase state transition process of 110000→111000 is formed, clearly demonstrating the state transition relationship.
[0044] At this point, it should be noted that the back-end encoding system is supplied not only with multiple standardized timing phase signals, but also with node interference indication signals formed by high or low level alarm signals, as well as singular point marker signals.
[0045] The method for marking singularity marker signals is consistent with that of parent application 2026107263443. When a continuous phase step breaks through the topological boundary or a discontinuous change occurs in the interference signal, it is determined to be a singularity. The topological boundary is a trend constraint range formed by the local tangent coordinate system as a reference and the nominal slope ratio X / Y=6. The slope ratio can be dynamically adjusted adaptively according to the system signal-to-noise ratio.
[0046] This section provides a general explanation of the meaning of singularities in parent application 2026107263443: Singularities are points of discontinuous abrupt change in trend characteristics appearing in dynamic time-series data. They correspond to bifurcation points in the cyclic trajectory of a dynamic system and are transition nodes between nested cycles of different scales in parent application 2026107263443. They can trigger multi-order phase coding mechanisms and chaotic transition state marking. For more information on the role of singularities in the backend coding system, please refer to the description in parent application 2026107263443.
[0047] As a further improvement of the present invention, the timing reference unit also includes a digital configuration device, which includes a digital configuration interface, adjustable resistor-capacitor components, and a digital potentiometer. The adjustable resistor-capacitor components and the digital potentiometer are electrically connected to the digital configuration interface. The frequency configuration network is composed of fixed resistor-capacitor components and adjustable resistor-capacitor components. The adjustable resistor-capacitor components are programmable capacitors or digitally adjustable resistors. The coupling device of the cross-coupling network adopts a digital potentiometer. The digital configuration device can receive external digital configuration commands and configure the coupling coefficient, the first initial oscillation frequency, the second initial oscillation frequency, and the phase difference according to the external digital configuration commands.
[0048] It should be noted that adjustable resistors and capacitors, digital potentiometers, and digital configuration interfaces are all optional expansion structures. The self-synchronization function of the self-synchronization module can work normally without relying on these types of devices.
[0049] When the frequency configuration network integrates programmable capacitors, the capacitor parameters can be rewritten via a digital configuration interface, enabling programmable switching between different operating frequency bands using the same hardware. The module supports reconfiguration of the first initial oscillation frequency, the second initial oscillation frequency, and the phase difference. The dual-loop coupled topology can autonomously complete secondary frequency convergence and phase locking without disrupting the overall system synchronization.
[0050] This technical solution enables digital, programmable, online parameter tuning, reducing the cost of array-based operation and maintenance. It can integrate adjustable resistors and capacitors with digital potentiometers, and through a digital configuration interface, it allows for online configuration of the first initial oscillation frequency, the second initial oscillation frequency, and the phase difference. It supports differentiated parameter settings for single nodes and partitioned nodes, enabling batch calibration and remote operation and maintenance without hardware modifications. This significantly reduces the on-site debugging and maintenance costs in large-scale array networking scenarios and solves the problem of high debugging and maintenance difficulty of traditional fixed-parameter timing modules.
[0051] As a further improvement of the present invention, both the inner ring oscillation unit and the outer ring oscillation unit are composed of three oscillation units.
[0052] As a further improvement of the present invention, the cross-coupled network has a coupling device connected in series at the coupling points corresponding to the inner loop oscillation unit and the outer loop oscillation unit. The coupling device is a first fixed resistor, or a common adjustable resistor, or a digital potentiometer.
[0053] This invention also proposes a disturbance detection control method based on dual-loop coupled oscillation, applied to the disturbance detection system based on dual-loop coupled oscillation as described above, comprising the following steps: S1. The self-synchronization module of the timing reference unit starts automatically upon power-on and outputs a self-stabilized frequency and self-locked phase reference voltage to the voltage divider potentiometer of the comparison judgment unit. The voltage divider potentiometer outputs an adjustable reference voltage to the inverting terminal of the voltage comparator. S2. External interference signals are coupled to sensitive nodes through interference injection units to change the voltage of sensitive nodes and form disturbed voltages. S3. The voltage comparator of the comparison and judgment unit compares the disturbed voltage and the adjustable reference voltage in real time. If the disturbed voltage is greater than the adjustable reference voltage, a high-level alarm signal is output as a node interference indication signal. If the disturbed voltage is less than or equal to the adjustable reference voltage, a low-level alarm signal is output as a node interference indication signal.
[0054] As a further improvement of the present invention, the self-synchronization module includes an inner loop oscillation unit, an outer loop oscillation unit, a cross-coupled network, and an output interface; The specific steps for the self-synchronization module of the timing reference unit to start automatically upon power-on and output a self-stabilized frequency and self-locked phase reference voltage include: S11. Simultaneously power on and start oscillating the inner ring oscillating unit and the outer ring oscillating unit, both of which are formed by cascading at least two oscillating units. S12. The output signal of the inner ring oscillation unit with the first initial oscillation frequency is injected into the outer ring oscillation unit with a preset coupling coefficient through a cross-coupling network, and the output signal of the outer ring oscillation unit with the second initial oscillation frequency is injected into the inner ring oscillation unit with a preset coupling coefficient, so as to adjust the oscillation frequencies of the inner ring oscillation unit and the outer ring oscillation unit to be consistent. S13. The oscillation frequencies of the inner and outer ring oscillation units are kept consistent, and the phase difference between the inner and outer ring oscillation units is gradually stabilized to achieve phase difference locking. S14. Output the reference voltage through the output interface.
[0055] As a further improvement of the present invention, the output interface includes a working output interface and a phase difference output interface. The reference voltage is output through the working output interface, and the phase difference output interface is used to output multiple standardized timing phase signals. The multiple standardized timing phase signals are divided into intervals according to a preset number of equal-length phase steps to supply the back-end encoding system. S1 is preceded by S0, which receives external digital configuration instructions through a digital configuration device and configures the coupling coefficient, first initial oscillation frequency, second initial oscillation frequency and phase difference according to the external digital configuration instructions.
[0056] It should be noted that if there are no different parameter requirements, S0 can be omitted and the system will run according to the factory-set parameters.
[0057] During normal phase-locked output, the S0 parameter configuration step can be executed again to issue new first initial oscillation frequency, second initial oscillation frequency, coupling coefficient, and phase difference (when the phase difference needs to be adjusted, it can be gradually adjusted by adjusting the coupling coefficient to approximate the result); the system automatically re-enters the coupling traction and dynamic phase-locked process, updates the working parameters, and maintains uninterrupted output and timing synchronization throughout the process, with strong operational continuity, making it suitable for 24 / 7 uninterrupted monitoring scenarios in industrial settings.
[0058] As an embodiment 1 of the present invention: The timing reference unit uses a 500Hz self-synchronization module to output a stable reference voltage; the interference injection unit couples a weak external interference signal to the CV pin (sensitive node) through a capacitor; the comparison and judgment unit compares the disturbed voltage at the CV pin with the adjustable reference voltage in real time.
[0059] As shown in the attached diagram: Figure 3 In the interference-free state, only the timing reference unit LED is lit normally, and the interference indicator LED is not triggered; Figure 4 When interference signals are received, the interference indicator LED of the corresponding node lights up, clearly enabling node interference identification.
[0060] This embodiment is suitable for low-frequency vibration node detection in industrial settings, exhibits excellent temperature drift suppression, and is stable and reliable in operation.
[0061] Example 2: Intermediate Frequency Interference Detection Circuit System In this embodiment, only the timing reference unit is replaced with a 100Hz self-synchronization module; the rest of the circuit topology, interference injection method, and comparison and judgment logic remain consistent with Embodiment 1. The interference injection unit couples a weak external interference signal to the CV pin via a capacitor. Similarly, the comparison and judgment unit outputs a node interference indication signal when the voltage deviates from the adjustable reference voltage, adapting to the electromagnetic interference monitoring scenario of IoT sensor nodes and exhibiting strong anti-interference capability.
[0062] Example 3: Low-frequency interference detection circuit system In this embodiment, only the timing reference unit is replaced with a 10Hz self-synchronization module; the rest of the circuit topology, interference injection method, and comparison and judgment logic remain consistent with Embodiment 1. The interference injection unit couples a weak external interference signal to the CV pin via a capacitor. Similarly, the comparison and judgment unit outputs a node interference indication signal when the voltage deviates from the adjustable reference voltage, making it suitable for electromagnetic interference monitoring scenarios of teaching demonstration sensor nodes and exhibiting strong anti-interference capabilities.
[0063] The above embodiments demonstrate that the core topology and interference detection function of the present invention do not depend on timing modules of specific frequency bands. Only by replacing timing reference units with different parameters, it can be adapted to interference detection scenarios of different frequency bands, exhibiting strong versatility and scalability.
[0064] Example 4: Programmable Multi-Band Interference Detection Circuit System (Dedicated to Array Partition Networking) In this embodiment, the timing reference unit adopts a programmable wideband dual-ring coupled oscillation self-synchronization module, which integrates a programmable capacitor, a digital potentiometer, and an I2C / SPI digital configuration interface.
[0065] Before power-on or during array operation, the host computer can independently set the operating frequency and phase reference of each synchronization module according to the array partition requirements through the digital configuration interface; after completing the parameter configuration, it can automatically lock phase and output the corresponding reference voltage.
[0066] The interference injection, voltage comparison, and status indication logic are completely consistent with the aforementioned embodiments, enabling synchronous interference detection under differentiated timing in different zones. This embodiment is suitable for large-scale distributed sensor arrays and multi-scenario hybrid monitoring systems, and features flexible parameter configuration, remote operation and maintenance, and continuous operation.
[0067] Example 5: A combined application of a circuit system based on a cyclic phase transition topology and a phase encoding system. This embodiment is a joint implementation verification of the present invention, parent application 2026107263443 "A phase encoding method and system based on cyclic phase change topology", and another sub-invention 2026110201654 "A self-synchronization module and phase control method based on dual-ring coupled oscillation", applied to the scenario of comprehensive monitoring of vibration and electromagnetic interference of industrial motor bearings.
[0068] 1. System Setup: The system of this invention is deployed at the motor measuring point. It integrates a self-synchronizing module with dual-ring coupled oscillation (operating frequency 500Hz), an interference injection unit connects to the vibration sensor and the electromagnetic induction probe, and a phase difference output interface connects to the back-end encoding system.
[0069] 2. Power-on operation: After power-on, the self-synchronization module of the dual-ring coupled oscillation starts up and locks in phase, outputting multiple standardized timing and phase signals with stable timing and standardized phase signals. The multiple standardized timing and phase signals are divided into 6 equal-length phase steps, and all phase changes are constrained within the topological boundary with a nominal slope ratio X / Y=6.
[0070] 3. Signal Acquisition and Transmission: Vibration and weak electromagnetic interference signals acquired by the sensors are input into the system of this invention through the interference injection unit, and the comparison and judgment unit outputs a level alarm signal in real time; at the same time, the phase difference output interface continuously outputs.
[0071] 4. Joint encoding and reconstruction: The back-end encoding system receives the phase signal output by the present invention, completes 6-dimensional phase encoding and timing reconstruction, and the reconstructed sequence has a structural overlap of more than 99% with the original signal. Under a strong noise environment of 20dB, the phase signal remains stable and the coding structure overlap is not less than 95%.
[0072] 5. Singularity handling: When the motor shows signs of failure and the vibration signal suddenly breaks through the topological boundary, the present invention immediately outputs a singularity marker signal. The back-end encoding system automatically switches to multi-stage phase encoding mode, analyzes nested loop features and triggers anomaly warning. The overall response delay is <10ms.
[0073] 6. Array operation and maintenance test: The frequency and phase parameters of the entire cell array (the system of this invention) are reconfigured online through the I2C digital interface. All cells (the system of this invention) complete the double-ring topology for secondary phase locking. The interference detection and phase output functions are uninterrupted throughout the process, and the array timing is kept globally synchronized.
[0074] 7. Technical effect verification: Compared with the traditional "crystal oscillator + MCU + AD sampling" solution, this integrated circuit system, combined with the back-end encoding system, reduces data storage space by more than 75% and improves encoding efficiency by 40%. At the same time, it relies on the dual-ring coupling topology to achieve long-term stable operation in a wide temperature range and strong electromagnetic environment.
[0075] Supplementary summary: All the above embodiments demonstrate that this circuit system can operate in both fixed parameter mode and programmable parameter mode without affecting the core interference detection logic, and significantly improves scene adaptability and array expansion capability.
[0076] Reference Figure 7 and Figure 8 As can be seen, when interference occurs, the oscillation frequency and phase difference of the inner and outer loop oscillation units are briefly shifted, and the waveform changes. However, the system still maintains stable output based on the dual-loop coupling topology, without oscillation stoppage or collapse. At the same time, the level alarm signal changes significantly, which intuitively shows that the circuit can accurately identify external interference and has the ability to re-converge and restore phase lock after the interference disappears.
[0077] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the implementation of the present invention. Those skilled in the art can make other variations or modifications based on the above description. It is neither necessary nor possible to exhaustively describe all embodiments here. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the claims of the present invention.
Claims
1. An interference detection system based on dual-ring coupled oscillation, characterized in that, include: The timing reference unit includes a self-synchronization module, which is capable of outputting a self-stabilized frequency and self-locked phase reference voltage, and the self-synchronization module has a preset sensitive node. An interference injection unit is provided, wherein the input terminal of the interference injection unit is used to receive external interference signals, and the output terminal of the interference injection unit is used to couple the external interference signals to the sensitive node to change the voltage of the sensitive node and form a disturbed voltage. The comparison and judgment unit includes a voltage comparator and a voltage divider potentiometer. The input terminal of the voltage divider potentiometer is electrically connected to the self-synchronization module, and the output terminal of the voltage divider potentiometer is electrically connected to the inverting terminal of the voltage comparator to provide an adjustable reference voltage to the voltage comparator. The non-inverting terminal of the voltage comparator is electrically connected to the sensitive node to compare the disturbed voltage of the sensitive node with the adjustable reference voltage to form a node interference indication signal.
2. The interference detection system based on dual-ring coupled oscillation according to claim 1, characterized in that, The self-synchronization module includes an inner loop oscillation unit, an outer loop oscillation unit, a cross-coupled network, and an output interface. Both the inner ring oscillation unit and the outer ring oscillation unit are formed by cascading at least two oscillation units. The cross-coupling network is located between the inner loop oscillation unit and the outer loop oscillation unit. It can inject the output signal of the inner loop oscillation unit at a first initial oscillation frequency into the outer loop oscillation unit with a preset coupling coefficient, and inject the output signal of the outer loop oscillation unit at a second initial oscillation frequency into the inner loop oscillation unit with a preset coupling coefficient, so that the oscillation frequencies of the inner loop oscillation unit and the outer loop oscillation unit tend to be consistent and the phase difference is locked. The oscillation unit is provided with a frequency configuration network, which is used to determine the first initial oscillation frequency and the second initial oscillation frequency. The output interface is used to output the reference voltage.
3. The interference detection system based on dual-ring coupled oscillation according to claim 2, characterized in that, The output interface includes a working output interface and a phase difference output interface. The reference voltage is output through the working output interface. The phase difference output interface is used to output multiple standardized timing phase signals. The multiple standardized timing phase signals are divided into intervals according to a preset number of equal-length phase steps to supply the back-end encoding system.
4. The interference detection system based on dual-ring coupled oscillation according to claim 2, characterized in that, The timing reference unit further includes a digital configuration device, which includes a digital configuration interface, adjustable resistor-capacitor components, and a digital potentiometer. The adjustable resistor-capacitor components and the digital potentiometer are electrically connected to the digital configuration interface. The frequency configuration network consists of fixed resistor-capacitor components and the adjustable resistor-capacitor components. The adjustable resistor-capacitor components are programmable capacitors or digitally adjustable resistors. The coupling device of the cross-coupling network uses the digital potentiometer. The digital configuration device can receive external digital configuration commands and configure the coupling coefficient, the first initial oscillation frequency, the second initial oscillation frequency, and the phase difference according to the external digital configuration commands.
5. The interference detection system based on dual-ring coupled oscillation according to claim 3, characterized in that, The number of divisions is six.
6. The interference detection system based on dual-ring coupled oscillation according to claim 2, characterized in that, Both the inner and outer ring oscillation units consist of three oscillation units.
7. The interference detection system based on dual-ring coupled oscillation according to claim 2, characterized in that, The cross-coupling network has a coupling device connected in series at the coupling points corresponding to the inner and outer ring oscillation units. The coupling device is a first fixed resistor, or a common adjustable resistor, or a digital potentiometer.
8. A disturbance detection control method based on dual-loop coupled oscillation, applied to a disturbance detection system based on dual-loop coupled oscillation as described in any one of claims 1-7, characterized in that, Includes the following steps: S1. The self-synchronization module of the timing reference unit starts automatically upon power-on and outputs a self-stabilized frequency and self-locked phase reference voltage to the voltage divider potentiometer of the comparison judgment unit. The voltage divider potentiometer outputs an adjustable reference voltage to the inverting terminal of the voltage comparator. S2. External interference signals are coupled to the sensitive node through the interference injection unit to change the voltage of the sensitive node and form a disturbed voltage. S3. The voltage comparator of the comparison and judgment unit compares the disturbed voltage and the adjustable reference voltage in real time. If the disturbed voltage is greater than the adjustable reference voltage, a high-level alarm signal is output as a node interference indication signal. If the disturbed voltage is less than or equal to the adjustable reference voltage, a low-level alarm signal is output as a node interference indication signal.
9. The disturbance detection control method based on dual-loop coupled oscillation according to claim 8, characterized in that, The self-synchronization module includes an inner loop oscillation unit, an outer loop oscillation unit, a cross-coupled network, and an output interface; The specific steps for the self-synchronization module of the timing reference unit to start automatically upon power-on and output a self-stabilized frequency and self-locked phase reference voltage include: S11. Simultaneously power on and start oscillating the inner ring oscillating unit and the outer ring oscillating unit, both of which are formed by cascading at least two oscillating units. S12. The output signal of the inner loop oscillation unit with a frequency of the first initial oscillation frequency is injected into the outer loop oscillation unit with a preset coupling coefficient through a cross-coupling network, and the output signal of the outer loop oscillation unit with a frequency of the second initial oscillation frequency is injected into the inner loop oscillation unit with a preset coupling coefficient, so as to adjust the oscillation frequencies of the inner loop oscillation unit and the outer loop oscillation unit to be consistent. S13. The oscillation frequencies of the inner ring oscillation unit and the outer ring oscillation unit are kept consistent, and the phase difference between the inner ring oscillation unit and the outer ring oscillation unit is gradually stabilized to achieve phase difference locking. S14. Output the reference voltage through the output interface.
10. The disturbance detection control method based on dual-loop coupled oscillation according to claim 9, characterized in that, The output interface includes a working output interface and a phase difference output interface. The reference voltage is output through the working output interface. The phase difference output interface is used to output multiple standardized timing phase signals. The multiple standardized timing phase signals are divided into intervals according to a preset number of equal-length phase steps to supply the back-end encoding system. Before S1, there is also S0, which involves receiving an external digital configuration instruction through a digital configuration device and configuring the coupling coefficient, the first initial oscillation frequency, the second initial oscillation frequency, and the phase difference according to the external digital configuration instruction.