4-20ma to adc sampling circuit and method based on superposition principle

Abstract

The application discloses a 4-20mA-to-ADC sampling circuit and method based on a superposition principle, comprising IV conversion, reference buffer, signal superposition amplification and filtering units; a sampling resistor converts current into an initial voltage of 0.4-2.0V; a first operational amplifier constitutes a voltage follower to output a stable reference of 0.8V; a second operational amplifier utilizes equivalent feedback and a grounding resistor to amplify an input signal by 2 times, and reversely superimposes a reference by 1 time, so that Vout=2Vin-Vref is satisfied, and linear output of 0V corresponding to 4mA and 3.2V corresponding to 20mA is realized. The circuit adopts a 3.3V single power supply, is matched with multi-stage decoupling capacitors, has an extremely simple structure, is free of debugging, has strong anti-interference performance, and is suitable for high-precision acquisition of embedded ADCs.

Description

Technical Field

[0001] This application relates to the fields of industrial analog signal conditioning and embedded ADC data acquisition technology, specifically to a dedicated sampling circuit and method that uses a dual operational amplifier hardware architecture to linearly convert industrial standard 4-20mA current signals into 0-3.2V voltage signals based on the principle of circuit superposition, so as to adapt to the ADC of a 3.3V single-supply embedded microcontroller. Background Technology

[0002] In the fields of industrial automation and remote sensor acquisition, 4-20mA current signals have become the industry-standard analog signal transmission method due to their advantages such as long transmission distance, strong anti-electromagnetic interference capability, and no line voltage drop loss. However, most mainstream embedded microcontroller ADC modules currently use a single 3.3V power supply, and their safe sampling voltage range is mostly 0-3.3V. They cannot directly acquire 4-20mA current signals and require signal conditioning circuits for adaptation.

[0003] Existing signal conditioning techniques have the following drawbacks: the voltage signal range generated by conventional single op-amp IV conversion circuits is too small (e.g., 0.2V-1V), which does not match the ADC range. Simple amplification can easily lead to signal overflow, resulting in a range utilization rate of less than 50%. Traditional differential amplifier circuits directly use power supply voltage division to provide the reference without buffer isolation. The subsequent load will directly pull the reference voltage off, resulting in severe zero-point drift and deterioration of linearity. Although multi-stage op-amp cascade conditioning schemes can achieve range amplification, they are complex in structure and introduce multiple errors such as op-amp offset voltage, temperature drift, and high-frequency noise. In addition, the hardware cost is high and the debugging is difficult. Summary of the Invention

[0004] To address the problems of poor range adaptation, large zero drift, and complex circuitry in existing technologies, this application provides a 4-20mA current-accurate conversion ADC sampling circuit and method based on the superposition principle.

[0005] In terms of circuit hardware architecture, this application includes an IV conversion unit, a reference voltage buffer unit, a signal superposition and amplification unit, and a filtering and anti-interference unit.

[0006] The IV conversion unit uses a sampling resistor to convert the input 4-20mA current signal into an initial voltage signal; the reference voltage buffer unit is connected in series across the power supply through a first voltage divider resistor and a second voltage divider resistor, and uses a first operational amplifier to form a voltage follower for buffering and isolation, outputting a stable reference voltage that is not affected by the subsequent load; the signal superposition and amplification unit uses a second operational amplifier, whose non-inverting input receives the initial voltage signal, and whose inverting input is grounded through a grounding resistor and connected to the stable reference voltage output by the first operational amplifier through a feedback resistor.

[0007] By configuring the feedback resistor and the grounding resistor to have the same resistance value, and based on the principle of linear circuit superposition, the signal superposition amplification unit amplifies the input signal by 2 times, while simultaneously superimposing the reference signal by 1 time in the opposite direction, so that the final output voltage strictly meets the fixed mathematical operation formula.

[0008] Meanwhile, the filtering and anti-interference unit sets decoupling capacitor banks at the power supply rail of the circuit and the power supply pins of the two operational amplifiers to suppress high-frequency noise from both the outside and inside.

[0009] Regarding the signal acquisition method, based on the aforementioned hardware circuit, this application provides the following steps to achieve accurate conversion:

[0010] First, the industrial current signal is directly converted into an initial voltage using a sampling resistor;

[0011] Subsequently, a stable reference voltage is output using a series voltage divider and a voltage follower.

[0012] Next, based on the operational amplifier network constructed with equivalent feedback and grounding resistance, the initial voltage and the reference voltage are amplified by a specific factor in the forward direction and superimposed in the reverse direction, and the two signals are fused at the output of the operational amplifier.

[0013] Finally, the output is mapped to the target voltage within the ADC sampling range, thereby completing accurate linear sampling with 4mA corresponding to the ADC zero point and 20mA corresponding to the ADC full scale.

[0014] This invention relates to a 4-20mA to ADC sampling circuit and method based on the superposition principle, which has the following beneficial effects:

[0015] This application sets a fixed resistance ratio between the sampling resistor and the voltage divider resistor, and combines this with equivalent feedback and grounding resistance, utilizing the superposition principle to strictly adhere to V... out =2V in -V ref The design achieves a perfect range mapping from 4-20mA current to 0-3.2V voltage, enabling 100% ADC range utilization and over 99.9% linearity across the entire range, thus completely solving the problems of signal overflow or insufficient range utilization in traditional solutions.

[0016] This application breaks through the complex architecture of conventional multi-stage operational amplifier cascades, achieving integrated signal amplification and bias subtraction using only two operational amplifiers and a minimal number of precision resistors. This simplified structure not only significantly reduces hardware costs and PCB area but also greatly minimizes the superposition of operational amplifier offset voltage, temperature drift, and high-frequency noise, thus significantly improving the long-term stability of the circuit.

[0017] Unlike traditional differential amplifier circuits that directly use the power supply voltage divider as a reference, this application innovatively introduces a voltage follower to isolate and buffer the reference voltage. This design eliminates reference voltage drift caused by load pull in the subsequent stage, ensuring absolute accuracy of the zero point. Simultaneously, the filtering and anti-interference unit incorporates decoupling capacitors at the power supply rails and the power supply pins of the first and second operational amplifiers, forming a comprehensive power supply noise filtering network that significantly enhances the circuit's anti-interference capability in various harsh industrial environments.

[0018] All components in this application have fixed parameters, allowing direct output of standard signals without the need for any adjustable potentiometers, achieving true "no-debugging" and greatly facilitating industrial mass production and rapid field replacement. The circuit uses a single 3.3V power supply, and the power supply and ADC sampling module share the same source, simplifying system power management and avoiding sampling errors caused by ground potential drift. This achieves extremely low production costs and power consumption while ensuring high accuracy. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 It adopts a modular system architecture;

[0021] Figure 2 This is the circuit schematic. Detailed Implementation

[0022] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0023] In the following description, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The following description provides multiple embodiments of this application, which can be substituted or combined with each other. Therefore, this application can also be considered to include all possible combinations of the same and / or different embodiments described. Thus, if one embodiment includes features A, B, and C, and another embodiment includes features B and D, then this application should also be considered to include embodiments containing one or more other possible combinations of A, B, C, and D, even if such embodiments are not explicitly described in the following text.

[0024] The following description provides examples and does not limit the scope, applicability, or examples set forth in the claims. Changes may be made to the function and arrangement of the described elements without departing from the scope of this application. Various processes or components may be appropriately omitted, substituted, or added to the examples. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. Furthermore, features described with respect to some examples may be combined into other examples.

[0025] Figure 1 The modular system architecture of this circuit is demonstrated, and the data flow logic between each signal processing unit and the power supply and ADC sampling module is clearly explained.

[0026] Figure 2 This provides a preferred specific circuit schematic diagram of this application. The following will be combined with... Figure 2 The specific composition, connection relationship and core working principle of each unit are explained in detail.

[0027] In the embodiments of this application, a 4-20mA to ADC sampling circuit based on the superposition principle is provided, including: an IV conversion unit, a reference voltage buffer unit, a signal superposition amplification unit, and a filtering and anti-interference unit;

[0028] The IV conversion unit consists of a sampling resistor Rs. One end of the sampling resistor Rs is connected to a 4-20mA current input signal, and the other end is grounded. It is used to convert the current signal into the corresponding voltage signal Vin.

[0029] The reference voltage buffer unit consists of a first operational amplifier U1, a first voltage divider resistor R1, and a second voltage divider resistor R2. The first voltage divider resistor R1 and the second voltage divider resistor R2 are connected in series between the power supply and ground. The voltage divider connection point between the two is connected to the non-inverting input terminal of the first operational amplifier U1. The inverting input terminal and the output terminal of the first operational amplifier U1 are shorted to form a voltage follower, which is used to output a stable reference voltage Vref.

[0030] The signal superposition and amplification unit consists of a second operational amplifier U2, a feedback resistor Rf, and a grounding resistor Rg. The non-inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the IV conversion unit, and the inverting input terminal of the second operational amplifier U2 is grounded through the grounding resistor Rg and simultaneously connected to the output terminal of the first operational amplifier U1 through the feedback resistor Rf.

[0031] Among them, the grounding resistance Rg and the feedback resistance Rf have the same resistance value;

[0032] The resistance value of the sampling resistor Rs and the ratio of the resistance values ​​of the voltage divider resistors are configured such that: when the input current is 4mA, the voltage at the circuit output terminal is at the lower limit of the ADC sampling range, and when the input current is 20mA, the voltage at the circuit output terminal is at the upper limit of the ADC sampling range.

[0033] Based on the principle of linear circuit superposition, the output voltage of the signal superposition amplification unit satisfies the fixed calculation formula Vout=2Vin−Vref.

[0034] like Figure 2 As shown, the circuit of this application mainly consists of an IV conversion unit, a reference voltage buffer unit, a signal superposition and amplification unit, and a filtering and anti-interference unit.

[0035] In terms of specific circuit connections, the IV conversion unit consists of a sampling resistor Rs. One end of the sampling resistor Rs is directly connected to the externally input 4-20mA current signal, and the other end is connected to signal ground. Its core function is to linearly convert the flowing industrial current signal into an initial voltage signal Vin. Since the current signal itself has a specific physical range, the resistance value of this sampling resistor needs to be specifically pre-configured to ensure that the converted voltage signal is within a reasonable range that is convenient for subsequent operational amplifier processing.

[0036] The reference voltage buffer unit consists of a first operational amplifier U1, a first voltage divider resistor R1, and a second voltage divider resistor R2. In terms of connection, the first voltage divider resistor R1 and the second voltage divider resistor R2 are connected in series between the 3.3V power supply and ground. The voltage divider node located between the two resistors is directly connected to the non-inverting input of the first operational amplifier U1. The inverting input and output of the first operational amplifier U1 are directly shorted, thus constructing a typical voltage follower. The function of this follower is to provide buffer isolation, outputting a highly stable reference voltage Vref at the output of U1 that is unaffected by the load of subsequent circuits.

[0037] The signal superposition and amplification unit consists of a second operational amplifier U2, a feedback resistor Rf, and a grounding resistor Rg. In terms of circuit connections, the non-inverting input of the second operational amplifier U2 is directly connected to the output of the aforementioned IV conversion unit, thereby receiving the initial voltage signal Vin. Simultaneously, the inverting input of the second operational amplifier U2 is connected to signal ground via the grounding resistor Rg, and then connected to the output of the first operational amplifier U1 (i.e., the node containing the reference voltage Vref) via the feedback resistor Rf. Through this specific connection architecture, the second operational amplifier U2 internally forms a composite operational network that performs non-inverting amplification and inverting addition for the two input signal sources.

[0038] The filtering and anti-interference unit is a crucial component for ensuring stable operation of the circuit in harsh industrial environments. In this application, this unit specifically includes three sets of 0.1μF decoupling ceramic capacitors. In the specific PCB physical routing, the first set of decoupling capacitors ( Figure 2 C1) is connected in parallel between the power supply rail and ground of the entire circuit, serving to filter out high-frequency common-mode and differential-mode noise from external power lines; the second set of decoupling capacitors ( Figure 2 C2) is placed close to the first operational amplifier U1 and connected in parallel between the power supply pin of U1 and ground; the third set of decoupling capacitors ( Figure 2 C3 is positioned close to the second operational amplifier U2 and connected in parallel between the power supply pin of U2 and ground. The latter two sets of capacitors are mainly used to absorb transient spike currents generated inside the operational amplifier during high-frequency switching. The three work together to form a comprehensive power supply noise filtering network.

[0039] Based on the hardware architecture consisting of the above four units, this application achieves precise range mapping through a rigorous mathematical parameter ratio.

[0040] Specifically, the grounding resistor Rg and the feedback resistor Rf are configured to be exactly equal. Based on the superposition principle of linear circuits, the signal superposition amplification unit performs a 2x amplification on the voltage signal Vin input at the non-inverting input, and simultaneously performs a 1x inverted superposition on the reference voltage Vref input at the inverting input.

[0041] Therefore, the final output voltage of the op-amp follows a fixed mathematical formula: Vout = 2Vin − Vref. To satisfy the above mapping formula and adapt to the ADC sampling range of 0 to 3.2V, the resistance value of the sampling resistor Rs and the resistance ratio of R1 to R2 are pre-configured so that when the input current is 4mA, the circuit output is exactly at the lower limit of the sampling range (0V), and when the input current is 20mA, the output is exactly at the upper limit of the sampling range (3.2V).

[0042] Furthermore, to ensure zero-point accuracy, the resistance ratio of R1 to R2 is specifically designed such that the reference voltage Vref output by the first operational amplifier U1 is exactly twice the voltage generated by the sampling resistor Rs at the moment of 4mA input current.

[0043] In a specific preferred embodiment, this application provides component selection parameters that are very easy to replicate in industrial batches, as follows:

[0044] The sampling resistor Rs is 100Ω; the first voltage divider resistor R1 is 5kΩ; the second voltage divider resistor R2 is 1.6kΩ; and the feedback resistor Rf and the grounding resistor Rg are both 10kΩ.

[0045] With this configuration, the upper limit of the ADC sampling range is 3.2V, and the lower limit is zero, set to 0V.

[0046] In terms of operational amplifiers, both the first operational amplifier U1 and the second operational amplifier U2 are rail-to-rail input / output operational amplifiers powered by a single 3.3V power supply.

[0047] In terms of power supply, the circuit uses a single 3.3V power supply, and its power supply is shared with the ADC sampling module of the back-end MCU, which completely eliminates potential grounding interference problems.

[0048] The output voltage Vout of the entire circuit can maintain a good linear mapping in the range of 0V to 3.2V according to the change of input current.

[0049] All of the above-mentioned resistive elements are preferably low-temperature drift metal film resistors with an accuracy of 0.1% and a temperature coefficient of ≤±50ppm / ℃ to ensure an extremely low temperature drift coefficient; together with the above-mentioned decoupling network, extremely small temperature drift error and extremely high long-term stability can be achieved in the operating temperature range of -10℃ to 60℃.

[0050] This application also provides a 4-20mA to ADC sampling method based on the superposition principle, implemented using the circuit of the first aspect, including the following steps:

[0051] Step 1: Convert the 4-20mA current input signal into an initial voltage signal Vin using a sampling resistor;

[0052] Step 2: After the power supply is divided by resistors, it is then isolated and buffered by a voltage follower composed of the first operational amplifier to output a stable reference voltage Vref;

[0053] Step 3: Construct a feedback resistor and a grounding resistor with equal resistance through the second operational amplifier. Using the principle of linear superposition, the initial voltage signal Vin is amplified by 2 times in the forward direction, while the reference voltage Vref is amplified by 1 time in the reverse direction. The two are then superimposed at the output to satisfy the formula Vout=2Vin−Vref.

[0054] Step 4: Finally, output the voltage signal mapped to the ADC sampling range to achieve accurate linear sampling with 4mA current corresponding to the ADC sampling zero point and 20mA current corresponding to the ADC sampling full scale.

[0055] In step 1, the voltage generated by the sampling resistor is 0.4V when a 4mA current is input.

[0056] In step 4, the output voltage is 0V when the input current is 4mA, and the output voltage is 3.2V when the input current is 20mA.

[0057] Combination Figure 2 Based on the circuit principle, the operational flow of this application in actual work includes the following ordered steps:

[0058] The first step is that the circuit directly converts the input 4-20mA current signal into an initial voltage signal Vin that varies linearly from 0.4V to 2.0V through the sampling resistor Rs.

[0059] The second step involves the power supply passing through a resistor divider network composed of R1 and R2, and then being isolated and buffered by a voltage follower composed of the first operational amplifier U1. At the output of U1, a stable 0.8V reference voltage Vref, which is not affected by the load of the subsequent stage, is obtained.

[0060] The third step involves using the second operational amplifier U2, with a feedback resistor Rf and a grounding resistor Rg connected to its inverting input with equal resistance, to perform a 2x forward amplification of the initial voltage signal Vin at the non-inverting input and a 1x inverting amplification of the reference voltage Vref at the inverting input, utilizing the superposition principle of linear circuits. These two signals are then superimposed at the output of U2, strictly satisfying the formula Vout = 2Vin − Vref.

[0061] Fourth, the amplified signal is passed through the output of the subsequent stage, and finally output as a voltage signal mapped to the ADC sampling range. Using the specific parameters of this embodiment, when the input current is 4mA, the Vin generated at the sampling resistor Rs is 0.4V, and the output voltage after passing through the calculation circuit is exactly 0V; when the input current is 20mA, the Vin generated at the sampling resistor Rs is 2.0V, and combined with the above calculation formula, the final output voltage is exactly 3.2V.

[0062] Experimental verification shows that the output voltage error of the circuit in this application can be controlled within ±2mV in a wide temperature range, with a linearity of over 99.9%, perfectly achieving the precise linear sampling target of 4mA corresponding to ADC sampling zero point and 20mA corresponding to ADC sampling full scale.

[0063] It should be noted that, for the sake of simplicity, the foregoing method embodiments are all described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, as some steps may be performed in other orders or simultaneously according to this application. Furthermore, those skilled in the art should also understand that the embodiments described in the specification are preferred embodiments, and the actions and modules involved are not necessarily essential to this application.

[0064] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0065] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage device, which may include: a flash drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0066] The foregoing description is merely an exemplary embodiment of this disclosure and should not be construed as limiting the scope of this disclosure. Any equivalent changes and modifications made in accordance with the teachings of this disclosure shall still fall within the scope of this disclosure. Those skilled in the art will readily conceive of embodiments of this disclosure upon considering the specification and practicing the disclosure herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not described herein. The specification and embodiments are to be considered exemplary only, and the scope and spirit of this disclosure are defined by the claims.

Claims

1. A 4-20mA to ADC sampling circuit based on the superposition principle, characterized in that, include: IV conversion unit, reference voltage buffer unit, signal superposition and amplification unit, and filtering and anti-interference unit; The IV conversion unit consists of a sampling resistor Rs. One end of the sampling resistor Rs is connected to a 4-20mA current input signal, and the other end is grounded. It is used to convert the current signal into a corresponding voltage signal Vin. The reference voltage buffer unit consists of a first operational amplifier U1, a first voltage divider resistor R1, and a second voltage divider resistor R2. The first voltage divider resistor R1 and the second voltage divider resistor R2 are connected in series between the power supply and ground. The voltage divider connection point between the two is connected to the non-inverting input terminal of the first operational amplifier U1. The inverting input terminal and the output terminal of the first operational amplifier U1 are shorted to form a voltage follower, which is used to output a stable reference voltage Vref. The signal superposition and amplification unit consists of a second operational amplifier U2, a feedback resistor Rf, and a grounding resistor Rg. The non-inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the IV conversion unit, and the inverting input terminal of the second operational amplifier U2 is grounded through the grounding resistor Rg and simultaneously connected to the output terminal of the first operational amplifier U1 through the feedback resistor Rf. The grounding resistor Rg has the same resistance value as the feedback resistor Rf; The resistance value of the sampling resistor RS and the resistance ratio of the voltage divider resistor are configured such that: when the input current is 4mA, the voltage at the output terminal of the circuit is at the lower limit of the ADC sampling range, and when the input current is 20mA, the voltage at the output terminal of the circuit is at the upper limit of the ADC sampling range. Based on the principle of linear circuit superposition, the output voltage of the signal superposition amplification unit satisfies the fixed calculation formula Vout=2Vin−Vref.

2. The circuit according to claim 1, characterized in that, The resistance ratio of the first voltage divider resistor R1 and the second voltage divider resistor R2 is configured such that the reference voltage Vref output by the first operational amplifier U1 is equal to twice the voltage generated by the sampling resistor Rs when the input current is 4mA.

3. The circuit according to claim 1, characterized in that, The first operational amplifier U1 and the second operational amplifier U2 are both rail-to-rail input / output operational amplifiers powered by the same power supply voltage as the ADC sampling circuit.

4. The circuit according to claim 1, characterized in that, The filtering and anti-interference unit includes a decoupling capacitor bank. The capacitors of the decoupling capacitor bank are respectively disposed between the power supply rail of the circuit, the power supply pin of the first operational amplifier U1, and the power supply pin of the second operational amplifier U2 and ground, in order to suppress the ripple and high-frequency interference of the power supply.

5. The circuit according to claim 1, characterized in that, The sampling resistor RS, voltage divider resistors R1 and R2, feedback resistor Rf, and grounding resistor Rg are all high-precision, low-temperature-coefficient metal film resistors.

6. The circuit according to claim 1, characterized in that, The sampling resistor RS has a resistance of 100Ω; the voltage divider resistor R1 has a resistance of 5kΩ; the voltage divider resistor R2 has a resistance of 1.6kΩ; the feedback resistor Rf and the grounding resistor Rg both have a resistance of 10kΩ.

7. The circuit according to claim 1, characterized in that, The upper limit of the ADC sampling range is 3.2V and the lower limit is 0V. The output voltage Vout of the circuit is linearly mapped between 0V and 3.2V according to the change of input current.

8. The circuit according to claim 1, characterized in that, The circuit is powered by a single 3.3V power supply, and the power supply is shared with the power supply of the ADC sampling module.

9. A 4-20mA current-to-ADC sampling method based on the superposition principle, characterized in that, The circuit described in any one of claims 1 to 8 includes the following steps: Step 1: Convert the 4-20mA current input signal into an initial voltage signal Vin using a sampling resistor; Step 2: After the power supply is divided by resistors, it is then isolated and buffered by a voltage follower composed of the first operational amplifier to output a stable reference voltage Vref; Step 3: Construct a feedback resistor and a grounding resistor with equal resistance through the second operational amplifier. Using the principle of linear superposition, the initial voltage signal Vin is amplified by 2 times in the forward direction, while the reference voltage Vref is amplified by 1 time in the reverse direction. The two are then superimposed at the output to satisfy the formula Vout=2Vin−Vref. Step 4: Finally, output the voltage signal mapped to the ADC sampling range to achieve accurate linear sampling with 4mA current corresponding to the ADC sampling zero point and 20mA current corresponding to the ADC sampling full scale.

10. The method according to claim 9, characterized in that, In step 1, the voltage generated by the sampling resistor is 0.4V when a 4mA current is input; In step 4, the output voltage is 0V when the input current is 4mA, and the output voltage is 3.2V when the input current is 20mA.

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