Extending the radio frequency (RF) range at the front end module (FEM)

Abstract

The present disclosure relates to extending the radio frequency (RF) range at a front end module (FEM), in particular based on an FEM-based architecture and control logic components to extend the RF range of a radio. In an example, a digital transmitter is implemented and comprises a processing circuitry, an antenna and a FEM. The FEM provides a dynamic range for signal transmission, wherein the range is larger than the dynamic range of the processing circuitry. To this end, the FEM comprises a plurality of PA stages and stores associated control logic components. Each of the stages comprises a PA which can have an adjustable gain. The control logic components can define different transmission modes corresponding to different PA stage configurations. Depending on a plurality of transmission parameters, such as a target power output of the FEM and / or a MCS used by the processing circuitry, one of the transmission modes is used in signal transmission to enable a corresponding PA stage configuration.

Description

Cross-references to other applications

[0001] This application claims priority to U.S. Patent Application No. 19 / 189,102, filed April 24, 2025, entitled “EXTENDING RADIO FREQUENCY (RF) RANGEAT FRONT END MODULE (FEM),” the entire contents of which are incorporated herein by reference for all purposes. Background Technology

[0002] The device may include a radio frequency (RF) radio capable of communicating with other devices. Communication may include the transmission of signals by a transmitter of the radio. These signals are typically amplified as part of the RF transmission chain. Attached Figure Description

[0003] Figure 1 Examples of devices including digital transmitters according to various implementation schemes are shown.

[0004] Figure 2 Examples of attenuator circuits that can be used in digital transmitters according to various implementation schemes are illustrated.

[0005] Figure 3 Examples of front-end module (FEM) circuitry for digital transmitters according to various implementation schemes are illustrated, wherein the FEM includes multiple power amplifier (PA) stages.

[0006] Figure 4 Examples of FEM circuits for digital transmitters according to various implementation schemes are illustrated, wherein the FEM includes multiple attenuator stages.

[0007] Figure 5 Examples of current graphs as a function of power are illustrated according to various implementation schemes, where the graphs can be used to define different transmission modes of the FEM.

[0008] Figure 6 Examples of power segments and gain steps that can be used to control the transmission configuration according to various implementation schemes are illustrated.

[0009] Figure 7 Another example is illustrated, showing the power segment and gain step size that can be used to control the transmission configuration according to various implementation schemes.

[0010] Figure 8 Another example of power segment and gain step size based on modulation-decoding scheme (MCS) according to various implementation schemes is illustrated.

[0011] Figure 9Another example of temperature-based power bands and gain steps according to various implementation schemes is illustrated.

[0012] Figure 10 This provides yet another example of temperature-based power bands and gain steps according to various implementation schemes.

[0013] Figure 11 Examples of operational flow / algorithm structures for controlling FEM are illustrated according to various implementation schemes.

[0014] Figure 12 Examples of operational flow / algorithm structures for configuring FEM components according to various implementation schemes are illustrated.

[0015] Figure 13 Examples of devices based on some implementation schemes are shown. Detailed Implementation

[0016] This disclosure relates to the architecture and control logic of a front-end module (FEM) for a wireless radio component to extend the radio frequency (RF) range of the wireless radio component, etc. In one example, the wireless radio component includes a digital transmitter, which in turn includes processing circuitry (e.g., a system-on-chip (SoC) that processes baseband signals for transmission), an antenna, and the FEM. The FEM is coupled to the processing circuitry and the antenna and provides a dynamic range for signal transmission that is greater than the dynamic range of the processing circuitry. To do this, the FEM includes multiple power amplifier (PA) stages (also known as a multi-stage PA topology or an external PA (ePA)) and stores associated control logic. Each of these stages includes a PA that can have an adjustable gain. The control logic can define different transmission modes (also known as FEM modes) corresponding to different configurations of the multi-PA stage topology (e.g., one configuration that turns on a PA stage, another configuration that turns off that PA stage, and yet another configuration in which that PA stage is turned on and its gain is adjusted). Based on multiple transmission parameters, such as the target power output of the FEM and / or the modulation and decoding scheme (MCS) used by the processing circuitry, one of the transmission modes is used (e.g., selected by the processing circuitry and indicated to the FEM via a command). The configuration of the multi-level PA topology (e.g., turning on / off specific PA levels and / or adjusting the gain of specific PAs) is controlled according to the transmission mode.

[0017] In addition to multi-stage PA topologies, FEMs can also include multiple attenuator stages (also known as multi-stage attenuator topologies or external attenuators). These stages can also be controlled based on multiple transmit parameters. Transmit modes allow for gain adjustment to extend dynamic range while mitigating challenges related to signal linearity.

[0018] Transmission modes can be defined for different power range segments, and gain variations can be implemented within each power range. These definitions take into account not only the MCS but also other parameters such as the temperature and / or dynamic range of the processing circuitry.

[0019] Depending on the device and wireless communication (e.g., devices and wireless communication using WiFi), there may be time constraints that could limit the available time to configure the FEM. In the WiFi example, the inter-frame interval could be several microseconds, leaving less than a few microseconds for configuring the FEM between two frames. To support such time constraints, a register 0 (Reg0) implementation can be used at the FEM. In this implementation, the processing circuitry (e.g., a SoC) can transmit a single command to configure the multi-level PA topology and the multi-level attenuator topology. The first information in the command can correspond to a first entry in Reg0, and the remaining information in the command can correspond to a second entry in Reg0. The first entry corresponds to the configuration of the multi-level PA topology, and the second entry corresponds to the configuration of the multi-level attenuator topology. In this way, the FEM can control both topologies within the time constraints based on a single command from the processing circuitry. Although the use of Reg0 is described, other memory implementations in which Reg0 is used in combination with one or more other registers are also possible.

[0020] The aforementioned features (e.g., multi-stage PA topology, multi-stage attenuator topology, transmit mode definition, time constraints, and related data structures and commands) are further described below. These features offer several technical advantages. For example, the wireless performance of digital transmitters is improved (e.g., FEM can extend the dynamic range (DR) of digital transmitters with minimal impact on signal linearity, if any), without increasing the chip area required for analog transmitters with similar performance. These and other technical advantages are further described below.

[0021] The following detailed description refers to the accompanying drawings. The same reference numerals may be used to identify the same or similar elements in different drawings. In the following description, specific details, such as particular structures, architectures, interfaces, technologies, etc., are set forth for illustrative and non-limiting purposes to provide a thorough understanding of various aspects of the various embodiments. However, it will be apparent to those skilled in the art that various aspects of the various embodiments may be practiced in other examples departing from these specific details. In some instances, descriptions of well-known devices, circuits, and methods have been omitted so as not to obscure the description of the various embodiments with unnecessary detail. For the purposes of this document, the phrase “A or B” means (A), (B), or (A and B); and the phrase “based on A” means “at least partially based on A,” for example, it can be “based solely on A” or it can be “partially based on A.”

[0022] Figure 1 Examples of devices 100 including a digital transmitter 110 according to various embodiments are illustrated. The digital transmitter 110 enables the device 100 to transmit signals (e.g., signals encoding information according to communication protocols such as WiFi, Bluetooth, cellular, or other protocols). To do this, the digital transmitter 110 may include components such as processing circuitry 120, an FEM 130, and an antenna 140. The FEM 130 is coupled to the processing circuitry 120 and the antenna 140, whereby the signal output from the processing circuitry 120 is amplified by the FEM 130, and the amplified signal is transmitted by the antenna 140.

[0023] In one example, device 100 can be an Internet of Things (IoT) device, tablet, smartphone, laptop, sensor, home appliance, or any other type of device that supports communication (at least transmission) with other devices. In addition to digital transmitter 110, the device may also include other components such as one or more processors and one or more memories storing instructions that can be executed by the one or more processors to provide different functions and at least partially control the operation of digital transmitter 110. Examples of such components are... Figure 13 Further examples are provided below.

[0024] Processing circuitry 120 can process signals (e.g., baseband signals) for transmission. Signals can be output by processing circuitry 120 at a first output power within a first dynamic range (DR) of processing circuitry 120. In one example, processing circuitry 120 may include a System-on-Chip (SoC) with different processors and memories. Processing circuitry 120 may store FEM control logic 122 (e.g., as a set of instructions in memory that can be executed by a processor). Processing circuitry 120 may also store FEM mode information 124 (e.g., as information that can be used in the execution of FEM control logic 12 to select an FEM mode). FEM control logic 122 can select an FEM mode from a variety of FEM modes for use as part of signal transmission (e.g., for amplifying signals corresponding to packets or frames processed by processing circuitry and to be output from digital transmitter 110). FEM modes may be referred to as transmission modes and may include one or a combination of PA modes or attenuator modes (which will be further described below). FEM mode selection may depend on multiple transmission parameters, such as the target output power (e.g., the power to be used for signal transmission at the FEM output), the output power of processing circuit 120 (e.g., the power of the signal output by processing circuit 120), the MCS rate used by processing circuit 120 in modulation, and temperature (e.g., the ambient temperature of the environment in which device 100 is located or the operating temperature of components of device 100, such as the operating temperature of processing circuit 120 and / or FEM 130). FEM mode information 124 may represent a data structure (e.g., a table) that associates the values ​​of these transmission parameters with FEM modes, enabling the selection of the relevant FEM mode given a specific transmission parameter value.

[0025] FEM 130 can represent the interface between processing circuitry 120 and antenna 140. In the receive path, one FEM function includes improving system-level sensitivity by using an external low-noise amplifier (eLNA). Typically, insertion loss may exist between processing circuitry 120 and antenna 140, which degrades receive performance. The eLNA compensates for insertion loss. In the transmit path, one FEM function includes providing output RF power from an external PA (ePA) to extend range. Implementing a high-power amplifier at processing circuitry 120 is typically challenging. Additionally, due to losses between processing circuitry 120 and antenna 140, power amplification is expected to be close to antenna 140. FEM 130 may include components such as an eLNA, ePA (as further described herein), a low-dropout (LDO) regulator, switches, digital sections, and several mixed-signal circuits for power detection, a temperature sensor, etc. In addition to general purpose input / output (GPIO) and other interfaces with processing circuitry 120, FEM 130 may also include an RF front-end (RFFE) interface. FEM 130 can support several operating modes in the transmit and receive paths (including the FEM modes further described herein) to improve performance and efficiency under various transmit conditions. FEM 130 can interact with several wireless technology subsystems (including WiFi, Bluetooth, ultra-wideband, and even cellular SoCs) (which may be included in processing circuitry 120).

[0026] In one example, FEM 130 includes multi-stage PAs 132 and multi-stage attenuators 134, and stores FEM configuration information 136 (e.g., in memory). The multi-stage PAs 132 may represent ePAs that enable controllable switching of different PA stages and / or adjustment of the gain of one or more PAs. The multi-stage attenuators 134 may represent external attenuators coupled to the input of the ePAs and controllably switchable. Controllable switching of the ePAs and / or external attenuators can be based on the FEM configuration information 136 to achieve a target output power for signal transmission from FEM 130. For example, the FEM configuration information 136 may indicate which stages to turn on and / or off and the PA gain for a specific FEM mode. The FEM mode can be indicated to FEM 130 in commands from processing circuitry 120.

[0027] Antenna 140 can be any type of antenna (including possible antenna arrays supporting beamforming and / or MIMO communication). Generally, the input of antenna 140 is coupled to the output of FEM 130.

[0028] In one example, WLAN and cellular SoC designs tend to utilize maximum integration under advanced scaled CMOS technology. Conventional analog transmitters use mixers, filters, digital-to-analog converters, and power amplifiers (PAs) to deliver a wider RF power dynamic range, but they are significantly larger than digital transmitters. Digital transmit (DTx) and digital power amplifier (DPA) have emerged as a solution to address the need for compact and efficient transmitters that can utilize high-speed switching operation at low voltage and sub-nanometer technology. Several architectures of DTX and DPA exist in polarity and quadrature transmitters, including RFDAC and switched-capacitor topologies. Current-guided RFDAC architectures are commonly used in wireless radio component designs with high channel bandwidth requirements. However, RFDAC-based DTX can have a finite number of effective bits (ENOB), which can limit the deliverable dynamic range (DR) of the transmitter. Any additional DR can come at the cost of extra bits at the RFDAC, which significantly impacts size, power consumption, and performance. Due to linearity limitations, the finite DR of DPA can be difficult to address at the SoC. This problem can be better addressed by implementing solutions outside the SoC. Figure 1 As illustrated in this disclosure, the disclosed solution is implemented at FEM 130.

[0029] Figure 2 Examples of attenuator circuits that can be used in digital transmitters according to various implementation schemes are illustrated. Such circuits may include alternatives to FEM-level solutions, using programmable attenuators or switched attenuators implemented externally to the SoC.

[0030] Figure 2 The top of the diagram illustrates an attenuator circuit 201. This circuit 201 includes a set of switches and a set of attenuators (shown as Pi attenuators on different lines between the switches), each of which provides a specific amount of gain attenuation (e.g., 5dB, 10dB, 12dB, etc.). Specific values ​​in this paragraph and other paragraphs of this disclosure are provided for illustrative purposes only. Other values ​​are also possible. Figure 2 The left switch of the attenuator circuit 201 in the SoC can be coupled to the SoC (or more generally, the processing circuitry) by connecting its input to the output of the SoC. Figure 2 The right switch of attenuator circuit 201 can be coupled to the FEM by connecting its output to the input of the FEM. A GPIO group or some other interface (e.g., an RFFE interface) can control each switch in the circuit, causing a specific attenuator (or no attenuator at all) to be turned on. The FEM can be configured to provide maximum gain, and the turned-on attenuator attenuates that gain to achieve the target power at the FEM's output.

[0031] Figure 2The bottom shows a cascaded attenuator circuit 202. The circuit 202 includes multiple attenuator circuits coupled to each other in a cascaded manner (e.g., in series) (each attenuator circuit is the same as or similar to attenuator circuit 201).

[0032] Circuits 201 or 202 can be implemented as components between the SoC and the FEM on the main logic component board (MLB) or transmit / receive (TR) switch. Generally, the FEM is designed with high PA gain to provide sufficient margin to cover the minimum required gain to compensate for gain variations due to different factors and additional insertion loss between the SoC and the antenna, which can vary significantly across platforms. These additional margins add an extra burden to the attenuator design. Therefore, transmitter performance can be limited.

[0033] In contrast, and as further described in conjunction with the following figures, dynamic range issues can be addressed at the FEM level, in addition to using a programmed attenuator, by combining the PA mode with a lower intrinsic gain optimized for different MCS (e.g., different quadrature amplitude modulation (QAM) rates or other MCS rates). This approach optimizes transmitter performance while moving the ePA to its optimal operating region, particularly for higher MCS rates.

[0034] Generally, FEM-level solutions involve an ePA with several FEM operating modes based on ePA stages (e.g., which can be multiple ePA segments), where these modes can be optimized for different MCS rates and target power at the FEM output. The solution may also include a configuration with a programmable external attenuator that provides adjustable step sizes. Power range segments can be defined to control the ePA and / or external attenuator, taking into account SoC performance, MCS rate, and temperature-dependent ePA gain variations. The SoC can also be at optimal backoff power. Gain step sizes within power segments can be optimized based on multiple transmit parameters, including, for example, MCS (e.g., QAM rate). Because gain can vary with temperature, temperature (ambient temperature and / or operating temperature) can be considered when controlling the ePA and / or external attenuator. An interface can be implemented to program the ePA modes and external attenuator in flexible combinations using, for example, partitioned Reg0 commands under minimum RFFE write commands. This use of commands supports time constraints for controlling the ePA gain and / or external attenuator for each packet transmission. These and other features will be further described in conjunction with the following figures.

[0035] Figure 3Examples of FEM circuitry 300 for digital transmitters according to various embodiments are illustrated, wherein the FEM includes multiple PA stages. Although the FEM circuitry 300 may include other components (e.g., eLNA, LDO regulator, etc.), Figure 3 Only PA levels are shown to illustrate an example of an ePA. Furthermore, although three PA levels are shown, the FEM circuit 300 is not limited to this and may include two or more PA levels (e.g., two PA levels, four PA levels, or any other number). The FEM circuit 300 may be implemented as an FEM (e.g., Figure 1 The FEM (Focus Engine 130) is a component of this system. Generally, the input side of the FEM can be connected to the SoC (or any other type of processing circuitry). The output side of the FEM can be connected to an antenna. The input drive power of the FEM can be the output power P of the SoC or (applicable processing circuitry). out The function. Although the output power P out Within the first dynamic range, however, the output power P of the FEM... out It is possible to achieve gain within an extended second power range, and may depend on the use of one or more PA stages (and the use of attenuation stages for attenuation as described in the following figures).

[0036] As illustrated, the first stage 311 of the FEM circuit 300 includes a PA 310 and a switched matching network (MN) 350. The PA 310 is not illustrated as having adjustable gain but may have adjustable gain. The switched MN 350 may include switching elements (e.g., transistors or diodes) to quickly select between different matching subnetworks, thereby allowing fast and dynamic impedance matching. The inputs of the first stage 311 may correspond to the inputs 301 of the FEM and are connected to the SoC (System-on-a-Chip). Figure 1 The output of the processing circuit 120). The first output of the first stage 311 can be connected to the input of the second stage 312 of the FEM circuit 300, while the second output of the first stage 311 can be connected to the switch 380, thereby realizing that the first stage 311 is turned on while the second stage 312 is also turned on or off.

[0037] The second stage 312 includes a PA 320 and a switch MN 360. PA 320 is illustrated as having adjustable gain but may not. The inputs of the second stage 312 can be connected to the outputs of the first stage 311. The first output of the second stage 312 can be connected to the input of the third stage 313 of the FEM circuit 300, while the second output of the second stage 312 can be connected to a switch 380, thereby enabling the second stage 312 to be turned on while each of the first stage 311 and the third stage 313 is also turned on or off.

[0038] The third stage 313 includes a power amplifier (PA) 330 and a matching network (ON) 370 (e.g., a resonant matching network excluding the switch). PA 330 is illustrated as having adjustable gain but may not have adjustable gain. The input of the third stage 313 can be connected to the output of the second stage 312. The output of the third stage 313 can be connected to a switch 380, thereby enabling the third stage 313 to be turned on while each of the first stage 311 and the second stage 312 is also turned on or off.

[0039] Switch 380 can be connected to three stages 311 to 313 on its input side, while its output can be connected to the output 302 of the FEM. Switch 380 can be controlled (e.g., via a GPIO group or RFFE interface) to turn on and off any one, a combination of, or all of stages 311 to 313. Control can be via commands from the FEM's processor (or more specifically, the controller). In particular, upon receiving a command from the SoC indicating the FEM mode to be used, the FEM's processor can determine the configuration corresponding to the FEM mode from a data structure (e.g., FEM configuration information 136) and can control switch 380 accordingly (in addition to controllably adjusting the PA gain, if applicable). Programmable bias and matching can be used to adjust the gain of each stage while maintaining linearity performance.

[0040] Levels 311 to 313 (or more specifically, their PAs 310, 320, and 330) can, but do not have to, be implemented using the same semiconductor materials. For example, one PA can use gallium arsenide (GaA), while other PAs can use silicon-on-insulator (SOI), silicon-germanium (SiGe), or complementary metal-oxide-semiconductor (CMOS). In other words, mixed topologies using different materials are possible.

[0041] Different FEM modes can be defined. Here, because the FEM circuitry does not include an external attenuator, the FEM mode corresponds to a power mode (also known as an ePA mode or PA mode). Each FEM mode achieves a range of gain within the dynamic range of the FEM, can be optimized for a specific set of transmit parameters, and corresponds to different configurations of stages PA 311 to 313. Any number of FEM modes is possible, and there does not need to be a one-to-one correspondence between the number of FEM modes and the number of possible configurations of PA stages. Transmit parameters may include any or a combination of the target output power of the FEM, the output power of the SoC (or similarly, the input power to the FEM), the MCS (e.g., the specific QAM rate used by the SoC to modulate the signal corresponding to the packet transmission), temperature, and / or the back-off power of the SoC. The configuration corresponding to the FEM mode may include specific switching of stages 311 to 313 (e.g., stage 311 is on while stages 312 to 313 are off, or stages 311 and 312 are on while stage 312 is off). Alternatively or additionally, the configuration may include a specific adjusted gain of the PA (e.g., the gain of PA 320 of the second stage 312 may be controllably adjusted to a specific target value).

[0042] In one example, the ePA is configured to have access to all levels 311 through 313 to enable each level under different backoff powers. Figure 3 In the diagram, the ePA can be a three-tier WLAN ePA for 5GHz to 7GHz. Each tier can be segmented and has programmable bias and matching to adjust gain while maintaining linearity performance. Considering target power, MCS rate, and other transmission parameters, several transmission states are defined based on the above topology to define modes with lower inherent gain when the target power decreases. Several FEM transmission states can be defined, including high power (HP), medium power (MP), low power (LP), and bypass (BP). In the periphery of each PA driver, the bias can be adjusted to meet performance requirements, while the saturated output power (Psat) and gain are also adjusted. Several sub-states, such as MP1, MP2, etc., can be defined at each state as needed. To cover the entire dynamic range, a PA mode with lower inherent gain can be enabled when the target power moves further away from the maximum output power.

[0043] Figure 4 Examples of FEM circuitry 400 for digital transmitters according to various embodiments are illustrated, wherein the FEM includes multiple attenuator stages. FEM circuitry 400 includes... Figure 3The FEM circuit 300 and other components besides the attenuator stages (e.g., eLNA, LDO regulator, etc.). For illustration, three attenuator stages are shown, but different numbers of attenuator stages are possible, including at least one attenuator stage that can be turned on and off (whereby the attenuator stage is bypassed when turned off). The number of attenuator stages may be independent of the number of PA stages in the FEM circuit 300.

[0044] The input 401 of the attenuator stage can be connected to the output of the SoC (or more generally, the processing circuitry). The output of the attenuator stage can be connected to the input of the FEM circuit. When all attenuator stages are turned off, the attenuator stages can be bypassed, thereby allowing the output of the SoC to be connected to the input of the FEM circuit 300.

[0045] As illustrated, the first attenuator stage 410 can be connected to input 401. Its output can be connected to the input of the next attenuator stage 411. Similarly, the output of the next attenuator stage 411 can be connected to the input of the final attenuator stage 412, which in turn is connected to output 402. Each of the three attenuator stages can implement a specific attenuator design (e.g., a Pi attenuator) that provides a specific gain attenuation. The gain attenuation can be different across attenuator stages 410 to 411.

[0046] Each attenuator stage in attenuator stages 410 to 411 can be turned on or off (e.g., bypassed) using a corresponding switch. Figure 4 In the diagram, the input and output of attenuator stage 410 are connected to the first switch 420. When switch 410 is open, attenuator stage 410 is turned on. When switch 410 is closed, attenuator stage 420 is turned off. Similarly, the input and output of attenuator stage 411 are connected to the second switch 421, and the input and output of attenuator stage 412 are connected to the third switch 422.

[0047] Different attenuation configurations can be defined, each corresponding to a specific on / off state of switches 420 to 422 (or the switching of attenuator switches 410 to 412). Configurations can be implemented without any attenuator stage 410, with one attenuator stage, with a combination of attenuator stages, or with all attenuator stages, and can have corresponding gain attenuation (which can be zero or negligible when all attenuation stages 410 to 412 are bypassed, and can be at its maximum value when all these stages 410 to 412 are on).

[0048] exist Figure 4 In the diagram, the FEM mode corresponds to the PA mode (e.g., Figure 3 A combination of attenuation modes (medium) and attenuation modes. Each attenuation mode corresponds to an attenuation level configuration of 410 to 412 and provides a specific gain attenuation. Similar to... Figure 3The PA mode allows you to define the attenuation mode for use by giving a set of transmit parameters (such as the target output power of the FEM, the output power of the SoC, the MCS, the temperature, the back-off power of the SoC, etc.).

[0049] Upon receiving a command from the SoC indicating the FEM mode to be used, the FEM processor can determine the configuration corresponding to the FEM mode from a data structure (e.g., FEM configuration information 136). This configuration may include, in addition to the PA stage configuration, the configuration of attenuator stages 410 to 412 (or equivalently, the states of switches 420 to 422). The FEM can then control switches 420 to 422 accordingly (besides controllably controlling switch 380 and adjusting PA gain).

[0050] The dynamic range can be further extended by adding attenuator stages 410 to 412 at the PA input, relative to the FEM circuit 300. Attenuator stages 410 to 412 can have fine and coarse steps as needed, and can be linear or nonlinear (e.g., binary) steps. The attenuators can also be switchable to generate multiple segments. Combinations of FEM states and attenuator settings are used to further extend the DR range. This allows for programmable or unequal steps as needed. The ePA and external attenuators can have independent stages.

[0051] Figure 5 Examples of graphs illustrating current 520 as a function of power 510 according to various embodiments are shown, where such graphs can be used to define different transmission modes of the FEM according to various embodiments. Current 520 can be the current used in power amplification within the FEM. Power 510 can be the output power of the FEM. Baseline curve 530 and MCS curve 540 are shown.

[0052] These curves can be derived from current and power measurements of the FEM in a laboratory setting. Baseline curve 530 can correspond to the amplification of a signal by the FEM, where the signal corresponds to baseline modulation (e.g., 1K QAM). MCS curve 540 can correspond to the amplification of a signal by the same FEM, where the signal corresponds to a different modulation (e.g., in the illustrated figures, the MCS has a lower MCS rate than the baseline modulation).

[0053] As shown by curves 530 and 540, the MCS affects the performance of the FEM (e.g., current consumption and / or output power). Therefore, the power segment can be defined according to the MCS. Such a definition is shown for both the baseline modulation (with a vertical solid line) and the other MCS modulation (with a vertical dashed line).

[0054] Starting with baseline modulation, two power thresholds P can be defined corresponding to a certain amount of change in current consumption. out-TH1 512 and Pout-TH2 514. In P out-TH1 To the left of 512, the first PA mode can be defined, shown as baseline low power (LP) 532. At both power thresholds P... out-TH1 512 and P out-TH2 Between 514, a second PA mode can be defined, shown as baseline medium power (LP) 534. In P out-TH2 To the right of 514, a third PA mode can be defined, shown as baseline high power (HP) 536. Therefore, three power segments are defined, each corresponding to one of the baseline PA modes.

[0055] Switching to another MCS modulation, the two power thresholds can also be P corresponding to a certain amount of change in current consumption. out-TH2 514 and P out-TH3 516. In P out-TH2 To the left of 514, the first PA mode can be defined, shown as MCS LP 542. At the two power thresholds P... out-TH2 514 and P out-TH3 Between 516, a second PA mode can be defined, shown as MCS MP 544. In P out-TH3 To the right of 516, a third PA mode can be defined, shown as MCS HP 546. Therefore, three power segments are defined, each corresponding to one of the MCS PA modes.

[0056] The number and / or width of power bands do not need to be the same for different modulations. Similarly, the number and / or values ​​of power thresholds do not need to be the same for different modulations. Generally, current and power measurements can be derived based on the type of FEM and / or FEM integration with other data transmitter components to derive different power bands and define different PA modes for each MCS.

[0057] Therefore, PA modes can be defined based on the MCS rate to optimize power amplification performance for each MCS rate, improving efficiency at maximum power (e.g., at lower MCS rates) and backoff power, and / or better utilizing MP and LP modes by switching to MP and LP modes at higher power. One PA mode (e.g., HP) can be optimized for the lower limit of the error vector magnitude, while another PA mode (e.g., also HP) can be optimized for the MCS rate. Switching between PA modes can occur based on the target output power.

[0058] Target power and MCS rate can be combined to extend PA modes to cover the entire RF dynamic range. For example, information (e.g., in the form of data structures such as tables) can be defined based on current and power measurements at different MCS rates across the entire dynamic range of the FEM. This information identifies the PA modes to be used in association with power segments (or power thresholds) and MCS rates. An example of this information is shown in Table 1.

[0059]

[0060] In Table 1, High MCS represents an MCS rate between two rate thresholds, Medium MCS represents an MCS rate less than High MCS and between two rate thresholds, and Low MCS represents an MCS rate less than Medium MCS and below a rate threshold. Transmission Mode 1, Transmission Mode 2, and Transmission Mode 3 represent three different transmission modes. P out This indicates the target output power of the FEM. HP and HP1 represent two different high-power modes (e.g., baseline HP 536 and MCS HP546), MP1, MP2, and MP3 represent three different medium-power modes, and LP1, LP2, and LP represent three different low-power modes. Pi, where "i" is between "1" and "6", represents the power output threshold.

[0061] The SoC can store information (e.g., Table 1) and perform a lookup based on its MCS rate used in signal modulation and the target power output to determine the PA mode that the FEM needs to use in signal amplification. The SoC can indicate the PA mode to the FEM in a command. For example, suppose the MCS rate meets the definition of high MCS and the target output power is 12dBm. Based on the table lookup, the SoC can determine that the HP2 mode should be used and can identify this PA mode to the FEM in a command.

[0062] Figure 6Examples of power segments and gain steps that can be used to control transmit configurations according to various implementations are illustrated. Generally, the dynamic range of the FEM can be wider than that of the SoC (or more generally, the processing circuitry system). Power segments (each corresponding to a PA mode) can be defined on the SoC of the FEM, where each power segment can cover the entire dynamic range of the SoC. For example, the dynamic range of the SoC is between -10dBm and -5dBm, and the dynamic range of the FEM is between 0dBm and 15dBm. Instead of having one power mode for the FEM covering its 0dBm to 15dBm dynamic range, two power segments can be defined: 0dBm to 9dBm and 9dBm to 15dBm. Operating in the first power segment (or PA mode) of 0dBm to 9dBm can cover the entire dynamic range of the SoC (e.g., -10dBm to -5dBm). Similarly, operation in the second power band (or PA mode) of 9dBm to 15dBm can also cover the entire dynamic range of the SoC (e.g., -10dBm to -5dBm). This use of the power band can improve the power amplification and / or transmit parameters of the FEM while covering the entire dynamic range of the SoC.

[0063] Within each power band, a gain step size with a start and an end point can be defined, where the gain varies across the gain step size. The gain step size can be used to determine the specific power output to be used (and possibly the power attenuation), as described further below.

[0064] refer to Figure 6 The details are shown on the vertical axis, illustrating the SoC's power output P. out 610, while the P of the FEM is shown on the horizontal axis. out 620. The dynamic range of the SoC is between a lower power limit (shown as lower limit P) and a maximum power limit (shown as maximum P). The SoC may also have a backoff power limit (shown as upper limit P), where the backoff power is the difference between the maximum power and the upper power limit.

[0065] exist Figure 6In the illustration, the dynamic range of the FEM is divided into four power segments (each power segment is typically labeled as power segment 630 and shown as a rounded rectangle). Each power segment 630 covers the dynamic range of the SOC (or, possibly, the range between the lower and upper power limits, taking backoff power into account), and can be derived from current and power measurements as described above. The power segments may overlap (overlap 640 is shown between the second and third power segments). Within each power segment, a gain step size 650 is defined (shown as a linear function in the figures, but other types of functions are possible). The gain step size 650 begins at a point corresponding to the initial FEM output power within the power segment and ends at a point corresponding to a higher FEM output power within the power segment.

[0066] Generally, the number of power segments does not need to be limited to four. Furthermore, the size of the power segments can vary (e.g., non-uniform power segments can be defined). The overlap can also vary. Additionally, or alternatively, the gain step size can also be different.

[0067] Suppose the SoC determines the target output of the FEM. Based on this target output power, the SoC can determine the power segment (or equivalently, PA mode) for the operation of the FEM and can send a corresponding command to the FEM (which configures its ePA and, possibly, its external attenuator). The power segment can be the power segment into which the target output power falls. Given the gain step of the power segment and the target output power (e.g., the intersection of a vertical line extending from the target output power and the gain step), the SoC can determine its target output power (e.g., a point on the vertical axis with a horizontal line extending through the intersection). The SoC can then configure its power amplifier circuitry to achieve this target power output. Furthermore, the intersection can correspond to an attenuation of the gain from the power segment (e.g., the maximum gain in PA mode). This attenuation can be indicated to the FEM in the command, allowing the FEM to adjust the gain of its ePA and / or turn on an appropriate attenuation stage.

[0068] For illustration, assume the final power band covers the range of 15dBm and 20dBm, corresponding to LP mode. Assume the target output power of the FEM is 17dBm. In this case, the SoC determines that LP mode is applicable and instructs the FEM accordingly. Assuming the intersection of the 17dBm vertical line and the gain step of the final power band results in a target SoC output power of -8dBm, the SoC can control its amplifier circuitry to achieve the -8dBm target.

[0069] As explained above, the power range at the antenna can be significantly wider than the power range provided by the SoC. To cover the entire range of the required dynamic range, this range can be divided into several segments with overlapping coverage.

[0070] The SOC dynamic range varies with the modulation rate, introducing an additional layer of complexity. In examples of RFDAC-based DTX, such transmitters typically offer a lower dynamic range (compared to lower MCS rates) for higher MCS rates. Given an MCS rate, the power band and / or gain step size can be defined.

[0071] Figure 7 Another example is illustrated, illustrating power segments and gain steps that can be used to control transmit configurations according to various implementation schemes. This example is similar to... Figure 6 Examples. For the sake of brevity, these similarities will not be repeated in this article and are equivalently applied. Figure 7 An example. Similar to... Figure 6 An example is shown on the vertical axis, illustrating the power output P of the SOC. out The power output P of the FEM is shown on the horizontal axis. out The dynamic range of the SoC lies between the lower power limit and the maximum power. The SoC may also have a backoff power limit. Four power segments and their overlap are shown. Within each power segment, a gain step size is defined. Gain step sizes for two different modulations are shown: a solid line indicates the gain step size for a relatively high MCS rate 710 (e.g., 1K QAM), while a dashed line indicates the gain step size for a relatively low MCS rate 720 (e.g., 64 QAM).

[0072] The gain step sizes for the two MCS rates, 710 and 720, can be different. For example, and relative to the lower MCS rate 720, the first power segment ( Figure 7 The gain step of the higher MCS rate 710 (on the left) begins with a SoC output power greater than that of the lower MCS rate 720 and ends with the maximum SoC output power. In contrast, the last power segment ( Figure 7 (On the right) The gain steps of the two MCS rates, 710 and 720, are closer to each other. As described above, various power bands and gain steps can be defined based on measurements performed for each MCS rate.

[0073] Therefore, the gain step size in the FEM can be adjusted to ensure optimal performance at each MCS rate, while also supporting designs where the SoC delivers different DRs at different MCS rates. The adjustable gain step size allows the SoC's PA to operate at much higher power for lower MCS rates when the ePA output power decreases. Different gain step sizes may be required for different MCS rates.

[0074] Furthermore, the gain step size in the FEM can be adjusted to ensure the SOC operates within its optimal range. Initially, at high ePA target output power, the SOC operates in the back-off region, which is more linear. As the ePA target output power decreases, the FEM state and attenuator can be adjusted to shift the SOC's PA to a higher power level, thereby maintaining the desired SNR. Adjusting the drive level and gain step size positions the SOC within its optimal region.

[0075] Figure 8 Another example of MCS-based power segmentation and gain step size according to various implementation schemes is illustrated. This example is similar to... Figure 6 Examples. For the sake of brevity, these similarities will not be repeated in this article and are equivalently applied. Figure 8 An example. Similar to... Figure 6 An example is shown on the vertical axis, illustrating the power output P of the SOC. out The power output P of the FEM is shown on the horizontal axis. out The dynamic range of a SoC lies between its lower power limit and maximum power. The SoC may also have a backoff power limit.

[0076] like Figure 8 As illustrated, the definition of power segments can depend on the MCS rate. A power segment at a lower MCS rate 820 can cover a larger dynamic range of the SoC and / or the FEM, relative to a higher MCS rate 810. Furthermore, the number of power segments can also vary depending on the MCS rate (e.g., in...). Figure 8 The diagram shows four power segments for the lower MC rate 820 and three segments for the higher MCS rate 810. Although... Figure 8 Not shown, but the gain step size can also vary between MCS rates. As described above, various power bands can be defined based on measurements performed for each MCS rate.

[0077] Figure 9 Another example of temperature-based power bands and gain steps according to various implementation schemes is illustrated. This example is similar to... Figure 6 Examples. For the sake of brevity, these similarities will not be repeated in this article and are equivalently applied. Figure 9 An example. Similar to... Figure 6 An example is shown on the vertical axis, illustrating the power output P of the SOC. out The power output P of the FEM is shown on the horizontal axis. out The dynamic range of the SoC lies between the lower power limit and the maximum power. The SoC may also have a backoff power limit. Four power bands and their overlap are shown. Within each power band, the gain step size is defined.

[0078] The gain of an FEM can vary depending on several parameters such as frequency and temperature. This variation can be accounted for in the definition of the power band and / or gain step size. Figure 9 In this context, the definition of the gain step size depends on temperature (ambient temperature or operating temperature). As described above, a similar definition can be derived by measuring the gain step size variations at different frequencies and / or temperatures, for variations in the gain step size at different frequencies and / or temperatures, and / or variations in the power band at different frequencies and / or temperatures.

[0079] like Figure 9 As illustrated, the gain step size can be defined for a baseline temperature (or a baseline temperature range). For hotter conditions (e.g., a temperature increase of 910°C above the baseline temperature by a certain temperature threshold, or outside the baseline temperature range but within the hotter temperature range), the gain step size can be adjusted in one or more ways. Figure 9 The adjustment is shown as a leftward shift of the gain step by a certain dBm amount derived from the measurement. This shift corresponds to a decrease in the gain of the PA of the FEM. Conversely, for colder conditions (e.g., a temperature drop of 920°C below the baseline temperature by a certain temperature threshold, or outside the baseline temperature range but within the colder temperature range), the gain step can be adjusted in one or more ways. Figure 9 The adjustment is shown as a horizontal shift of the gain step to the right by a certain dBm amount derived from the measurement. This shift corresponds to an increase in the gain of the PA of the FEM.

[0080] In one example, the SoC stores information defining the baseline gain step size and the displacement per temperature change (or temperature range) (e.g., in a data structure). In another example, the SoC stores information defining not only the baseline gain step size but also the gain step size for each temperature (or temperature range) (e.g., in a data structure). As the ePA gain varies with temperature, the SoC's closed-loop position control (CLPC) adjusts both the gain step size and the SoC drive to meet the target power at each segment.

[0081] Figure 10 Another example of temperature-based power bands and gain steps according to various implementation schemes is illustrated. This example is similar to... Figure 6 Examples. For the sake of brevity, these similarities will not be repeated in this article and are equivalently applied. Figure 10 An example. Similar to... Figure 6 An example is shown on the vertical axis, illustrating the power output P of the SOC. out The power output P of the FEM is shown on the horizontal axis. out The dynamic range of the SoC lies between the lower power limit and the maximum power. The SoC may also have a backoff power limit. Four power bands and their overlap are shown. Within each power band, the gain step size is defined.

[0082] As explained above, the gain of an FEM can vary depending on several parameters such as frequency and temperature. Figure 10 In this context, the definition of the gain step size depends on temperature (ambient temperature or operating temperature). Similar definitions can be derived for gain step size variations across frequency and / or power range variations.

[0083] like Figure 10 As illustrated, the gain step size can be defined for a baseline temperature (or a baseline temperature range). For hotter conditions (e.g., a temperature increase of 1010 degrees Celsius above the baseline temperature by a certain temperature threshold, or conditions outside the baseline temperature range but within the hotter temperature range), the gain step size can be adjusted in one or more ways. Figure 10 The adjustment is shown as a vertical upward shift of the gain step by a certain dBm amount derived from the measurement. This shift corresponds to an increase in the gain of the SoC's PA. Conversely, for colder conditions (e.g., a temperature drop of 1020°C below a certain temperature threshold from the baseline temperature, or outside the baseline temperature range but within the colder temperature range), the gain step can be adjusted in one or more ways. Figure 10 The adjustment is shown as a vertical downward displacement of the gain step by a certain dBm amount derived from the measurement. This displacement corresponds to a reduction in the gain of the SoC's PA.

[0084] Therefore, the SOC dynamic range can be segmented to retain a guard band to adjust the SOC's PA power as the FEM gain changes with temperature. Thus, when the ePA gain changes, the CLPC can adjust only the SOC drive level to meet the target power. In cases where the ePA gain variation is wide or if the SoC dynamic range is limited, the number of power bands (or PA modes) can be increased.

[0085] like Figures 5 to 10 As described, the system-on-a-chip (SoC) can store information defining power segments and gain steps associated with different transmission parameters, including the target output power of the FEM, the target power of the SoC, the MCS rate, temperature, frequency, etc. The power segments may correspond to FEM modes (including PA modes and / or attenuator modes). Points or segments of the gain step within the power segment may correspond to the adjustable gain of the PA within the ePA of the FEM and / or the switchable attenuation stage within the external attenuator of the FEM.

[0086] FEM can store similar information associated with PA configurations (e.g., switching of PA stages and / or adjustment of PA gain) and / or attenuator configurations (e.g., switching of attenuator stages) defining power segments and gain steps (or similarly, FEM modes including PA modes and / or attenuator modes).

[0087] By looking up information stored in the SoC and using one or more transmission parameters from the transmission parameters, the SoC can determine the appropriate FEM mode to use and transmit a command to the FEM indicating the FEM mode to be used. By looking up information stored in the FEM and using the indication of the FEM mode, the FEM can determine the PA and attenuator configuration to use.

[0088] In one example, the FEM can store a set of entries, each indicating the FEM mode (and possibly the FEM configuration of the ePA and external attenuators). The SoC can transmit a command including bits corresponding to one of the entries. By looking up the indicated entry, the FEM can then determine the FEM mode and / or FE configuration. This approach can be used in time-constrained architectures with short inter-frame switching (IFS), such as those with a few microseconds. Specifically, Reg0 of the FEM can store entries. The command can include a first set of bits (e.g., the first five bits) indicating the first entry in Reg0 corresponding to the PA mode and a second set of bits (e.g., the last two bits) indicating the second entry in Reg0 corresponding to the attenuator mode. Thus, a single command can be used to identify two modes and their corresponding configurations.

[0089] Figure 11 Examples of operational flow / algorithm structures 1100 for controlling a FEM according to various embodiments are illustrated. The operational flow / algorithm structure 1100 may be provided by means of a device (e.g., the device includes processing circuitry, such as a SoC, or more generally, Figure 1 The processing circuitry 120) is used to implement this. In some embodiments, the operation flow / algorithm structure 1100 can be implemented by executing instructions stored in a tangible, non-transitory computer-readable storage medium (such as the memory of a device). Although the operation flow / algorithm structure 1100 is described using a specific sequence of steps, it should be understood that the steps described herein are contemplated to be performed in a different sequence than illustrated, and some described steps may be omitted or not performed at all.

[0090] In one example, the operation flow / algorithm structure 1100 includes, at 1102, generating a signal for transmission using one or more transmission parameters, which include at least one of a first output power within a first dynamic range of the processing circuitry, a second output power within a second dynamic range of a front-end module (FEM) coupled to the processing circuitry, or a modulation and decoding scheme (MCS), wherein the second dynamic range is greater than the first dynamic range. For example, the processing circuitry uses the signal to modulate the information for transmission into packets. The MCS may have a specific MCS rate known to the processing circuitry. The target output power of the FEM may be known to the processing circuitry (e.g., based on packet priority or commands from an access point or base station). The target output power of the processing circuitry may also be known to the processing circuitry (based on its dynamic range or derived given the power range, gain step size, and target output power of the FEM as described in the figures above).

[0091] In one example, the operation flow / algorithm structure 1100 includes: at 1104, generating a command indicating the transmission mode of the FEM based on one or more transmission parameters, the FEM including multiple power amplifier (PA) stages, each PA stage including a PA with a corresponding gain, and the multiple PA stages being capable of switching based on the transmission mode to provide a second dynamic range. An example of the FEM circuitry is provided in... Figures 3 to 4 As shown in the figure, and may be referred to as ePA (e.g. Figure 3 (in the middle) or ePA and external attenuator (such as Figure 4 (In the middle). The processing circuitry can store information that associates the FEM mode (e.g., also known as the transmission mode) with one or more transmission parameters (e.g., similar to Table 1). Therefore, the value of the transmission parameter is used to look up this information to identify the FEM mode.

[0092] In one example, the operation flow / algorithm structure 1100 includes: at 1106, sending a command to the FEM. For example, the command may indicate the PA mode to be used and, optionally, the attenuation mode. In another example, the same single command may be directed to Reg0 of the FEM.

[0093] In one example, the operation flow / algorithm structure 1100 includes: at 1108, outputting a signal to the FEM at a first output power. Here, after processing the signal, the SoC amplifies it (e.g., using its own set of amplifiers) and outputs it to the FEM. The timing of the output allows the signal to be output after a time interval (e.g., a few microseconds) from the start of the transmitted command, where this time interval is sufficient for the FEM to process the command and configure its PA and attenuator accordingly.

[0094] Figure 12Examples of operational flow / algorithm structures 1200 for configuring components of an FEM according to various embodiments are illustrated. The operational flow / algorithm structure 1200 may be provided by means of a device (e.g., the device includes an FEM, such as...). Figure 1 This can be implemented using FEM130. In some embodiments, the operation flow / algorithm structure 1200 can be implemented by executing instructions stored in a tangible, non-transitory, computer-readable storage medium (such as the memory of a device). Although the operation flow / algorithm structure 1200 is described using a specific sequence of steps, it should be understood that the steps described herein are contemplated to be performed in a different sequence than illustrated, and some described steps may be omitted or not performed at all.

[0095] In one example, the operation flow / algorithm structure 1200 includes: at 1202, receiving a command indicating the transmission mode. This command can be combined with... Figure 11 The same command described in step 1106.

[0096] In one example, the operation flow / algorithm structure 1200 includes: at 1204, determining a configuration for amplifying the signal, which corresponds to at least one of switching multiple PA stages or switching multiple attenuator stages. For example, this can be done after receiving a command based on a combination of... Figure 11 Step 1108 describes the time interval for receiving the signal. Before receiving the signal, the FEM can determine the PA mode and / or attenuator mode according to the command, and can determine the corresponding PA configuration and / or attenuator configuration.

[0097] In one example, the operation flow / algorithm structure 1200 includes: at 1206, configuring the components of the FEM based on this configuration by at least turning on or off one or more PA stages and / or one or more attenuator stages. By controlling the relevant switches, the relevant PA stages are turned on, and, where applicable, the remaining PA stages are turned off. Similarly, the relevant attenuator stages are turned on, and, where applicable, the remaining attenuator stages are turned off.

[0098] In one example, the operation flow / algorithm structure 1200 includes: at 1208, amplifying the signal for transmission by the antenna. Here, the signal is received after switching of the PA stage and / or PA attenuator, and is amplified (and possibly attenuated) based on the enabled PA stage (and possibly, the enabled attenuator stage).

[0099] Figure 13 Device 1300 is illustrated according to some implementation schemes. Device 1300 is an example of the device described above. For example, device 1300 may implement ePA at the FEM level.

[0100] In one example, device 1300 includes a power source 1312 that can supply power to other components of device 1300. Power source 1312 may include power storage components (e.g., a set of capacitors, a rechargeable battery cell, etc.) and energy harvesting components (e.g., a solar panel). Other components may include at least a processor 1302, a memory 1304, input / output peripherals (I / O) 1308, communication peripherals 1310, and sensors 1314. An interface bus may be configured to communicate, send, and transmit data, control, and commands between the various components of device 1300. Memory 1304 may include computer-readable storage media such as RAM; ROM; electrically erasable programmable read-only memory (EEPROM); hard disk drive; CD-ROM; optical storage devices; magnetic storage devices; and electronic non-volatile computer storage devices such as Flash memory. ® Memory; and other tangible storage media. Any such computer-readable storage medium may be configured to store instructions or program code embodying aspects of this disclosure. Memory 1304 may also include computer-readable signal media. Computer-readable signal media include propagated data signals containing computer-readable program code. Such propagated signals may take any of a variety of forms, including but not limited to electromagnetic, optical, or any combination thereof. Computer-readable signal media include any computer-readable medium that is not a computer-readable storage medium but can convey, propagate, or transmit a program for use in conjunction with device 1300.

[0101] In addition, memory 1304 includes an operating system, programs, and applications. Processor 1302 is configured to execute stored instructions and includes, for example, a logic processing unit, a microprocessor, a digital signal processor, and other processors. I / O peripherals 1308 may include user interfaces such as light sources; alarm devices; keyboards; screens (e.g., touchscreens); microphones; speakers; other input / output devices; and computing components such as graphics processing units; serial ports; parallel ports; universal serial buses; and other input / output peripherals. Sensor 1314 may be configured to detect events or changes in its environment and transmit information about the detected events (sensor data) to other devices, modules, or systems. Examples of such sensors 1314 include: inertial measurement units including accelerometers, gyroscopes, or magnetometers; microelectromechanical systems (MEMS) or nanoelectromechanical systems (NEM) including 3-axis accelerometers, 3-axis gyroscopes, or magnetometers; level sensors; flow sensors; temperature sensors (e.g., thermistors); pressure sensors; barometric pressure sensors; gravimeters; altimeters; image capture devices (e.g., cameras or lensless aperture sensors); light detection and ranging sensors; proximity sensors (e.g., infrared radiation detectors, etc.); depth sensors; ambient light sensors; ultrasonic transceivers; and microphones or other similar audio capture devices. Communication peripherals 1310 are configured to facilitate communication between device 1300 and other systems via a communication network and include, for example, network interface controllers, modems, wireless and wired interface cards, antennas, and other communication peripherals. Communication peripherals 1310 may include digital transmitters having components as described in the previous figures.

[0102] Example

[0103] Further exemplary implementations are provided in the following sections.

[0104] Example 1 includes a digital transmitter comprising: an antenna; processing circuitry configured to process and output a signal, wherein the signal is output from the processing circuitry at a first output power within a first dynamic range; and a front-end module (FEM) coupled to the processing circuitry and the antenna, the FEM having a second dynamic range and configured to amplify the signal for transmission by the antenna at a second output power within the second dynamic range, the second dynamic range being greater than the first dynamic range, wherein: the FEM includes a plurality of power amplifier (PA) stages, each PA stage including a PA with a corresponding gain, the plurality of PA stages being switchable based on one or more transmission parameters to provide the second dynamic range, and the one or more transmission parameters including at least one of the first output power, the second output power, or a modulation and decoding scheme (MCS).

[0105] Example 2 includes the digital transmitter according to Example 1, wherein the corresponding gain of the PA level among the plurality of PA levels can be adjusted based on the one or more transmission parameters.

[0106] Example 3 includes any of the digital transmitters described in Examples 1 to 2, wherein the processing circuitry includes a memory that stores information indicating a plurality of transmission modes and the selection of one of the plurality of transmission modes based on one or more transmission parameters, wherein at least two of the plurality of transmission modes correspond to different switching of the plurality of PA levels.

[0107] Example 4 includes the digital transmitter according to Example 3, wherein a first transmission mode of the plurality of transmission modes corresponds to a lower output power and a lower PA gain of the FEM relative to a second transmission mode of the plurality of transmission modes.

[0108] Example 5 includes a digital transmitter according to any of Examples 1 to 4, wherein the processing circuitry is further configured to select a transmission mode among the plurality of transmission modes based on the one or more transmission parameters, and to transmit a command to the FEM based on the transmission mode, wherein the plurality of PA levels are controllably switched based on the command.

[0109] Example 6 includes a digital transmitter according to any of Examples 1 to 5, wherein the first PA level of the plurality of PA levels includes a semiconductor material different from the semiconductor material of the second PA level of the plurality of PA levels.

[0110] Example 7 includes a digital transmitter according to any of Examples 1 to 6, wherein the FEM further includes a plurality of attenuator stages coupled to the inputs of the plurality of PA stages, wherein: each attenuator stage includes an attenuator with a corresponding gain attenuation, and the plurality of attenuator stages are switchable based on the one or more transmission parameters to provide the second dynamic range.

[0111] Example 8 includes the digital transmitter according to Example 7, wherein the processing circuitry is further configured to select a transmission mode from a plurality of predefined transmission modes based on the second output power and the MCS, and to transmit a command to the FEM based on the transmission mode, wherein each of the plurality of attenuation stages and the plurality of PA stages is controllably switched based on the command.

[0112] Example 9 includes a digital transmitter according to Example 8, wherein the FEM includes register 0 (Reg0), the register 0 (Reg0) includes a first set of entries associated with the plurality of PA levels and a second set of entries associated with the plurality of attenuation levels, wherein the command includes an indication of a first bit of a first entry in the first set and an indication of a second entry in the second set, wherein the plurality of PA levels are controllably switched based on the first entry, and wherein the plurality of attenuation levels are controllably switched based on the second entry.

[0113] Example 10 includes an apparatus comprising: a front-end module (FEM) configured to couple with processing circuitry and an antenna of a digital transmitter and amplify a signal, the signal being (i) output by the processing circuitry at a first output power within a first dynamic range of the processing circuitry, and (ii) transmitted by the antenna at a second output power within a second dynamic range of the FEM, wherein the second dynamic range is greater than the first dynamic range, the FEM comprising a plurality of power amplifier (PA) stages, each PA stage comprising a PA having a corresponding gain, the plurality of PA stages being switchable based on one or more transmission parameters to provide the second dynamic range, and the one or more transmission parameters including at least one of the first output power, the second output power, or a modulation and decoding scheme (MCS).

[0114] Example 11 includes the apparatus according to Example 10, the apparatus further including a memory storing information indicating that the second dynamic range is divided into a plurality of power segments, wherein each of the plurality of power segments indicates a corresponding gain step size that varies within the first dynamic range.

[0115] Example 12 includes the apparatus according to Example 11, wherein a power segment among the plurality of power segments is selected based on the second output power, and wherein the first output power is set and the configuration of the FEM is selected based on the second output power and the corresponding gain step size of the power segment.

[0116] Example 13 includes the apparatus according to Example 12, wherein the FEM further includes a plurality of attenuator stages coupled to the inputs of the plurality of PA stages, wherein the configuration of the FEM includes at least one of switching of the plurality of PA stages or switching of the plurality of attenuator stages.

[0117] Example 14 includes an apparatus according to any of Examples 11 to 13, wherein at least two of the plurality of power segments have different sizes, or the start or end of the gain step is different between the at least two of the plurality of power segments.

[0118] Example 15 includes the apparatus according to any of Examples 11 to 14, wherein the plurality of power segments or corresponding gain steps are based on the MCS.

[0119] Example 16 includes the apparatus according to any of Examples 11 to 15, wherein the plurality of power segments, corresponding gain steps, or the first dynamic range are based on operating temperature or ambient temperature.

[0120] Example 17 includes the apparatus according to any of Examples 10 to 16, wherein the second dynamic range is based on the MCS and is different from another dynamic range of the FEM that can be used for another MCS.

[0121] Example 18 includes an apparatus according to any of Examples 10 to 17, wherein the first dynamic range is based on the MCS and is different from another dynamic range of the processing circuit that can be used for another MCS.

[0122] Example 19 includes a method implemented by a processing circuit, the method comprising: determining one or more transmission parameters, the one or more transmission parameters including at least one of: a first output power within a first dynamic range of the processing circuit, a second output power within a second dynamic range of a front-end module (FEM) coupled to the processing circuit, or a modulation and decoding scheme (MCS), wherein the second dynamic range is greater than the first dynamic range; determining a transmission mode of the FEM based on the one or more transmission parameters, wherein the FEM includes a plurality of power amplifier (PA) stages, wherein each PA stage includes a PA having a corresponding gain, and wherein the plurality of PA stages are switchable based on the transmission mode to provide the second dynamic range; transmitting a command indicating the transmission mode to the FEM; and outputting a signal to the FEM at the first output power.

[0123] Example 20 includes the method according to Example 19, the method further comprising: determining the attenuation of the FEM based on the one or more transmission parameters, wherein the FEM further comprises a plurality of attenuator stages coupled to the inputs of the plurality of PA stages, wherein: each attenuator stage comprises an attenuator with a corresponding gain attenuation, and wherein the plurality of attenuation stages are switchable; and indicating the attenuation in the command.

[0124] As is widely recognized, the use of personally identifiable information should comply with privacy policies and practices that are generally accepted to meet or exceed industry or governmental requirements for protecting user privacy. Specifically, personally identifiable information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use, and the nature of authorized use should be clearly explained to users.

[0125] For one or more embodiments, at least one of the components shown in one or more of the foregoing figures may be configured to perform one or more operations, techniques, processes, or methods described in the Embodiments section below. For example, the baseband circuitry described above in conjunction with one or more of the foregoing figures may be configured to operate according to one or more embodiments described below. Similarly, circuitry associated with the UE, base station, network element, etc., described above in conjunction with one or more of the foregoing figures may be configured to operate according to one or more embodiments described in the Embodiments section below.

[0126] Unless otherwise expressly stated, any embodiment described above may be combined with any other embodiment (or combination of embodiments). The foregoing description of one or more specific embodiments is illustrative and descriptive, but is not intended to be exhaustive or to limit the scope of the embodiments to the precise forms disclosed. In view of the teachings above, modifications and variations are possible, or modifications and variations may be obtained from practice of various embodiments.

[0127] Although the above embodiments have been described in considerable detail, many variations and modifications will become apparent to those skilled in the art once the above disclosure is fully understood. It is intended that the following claims be construed as encompassing all such variations and modifications.

Claims

1. A digital transmitter, the digital transmitter comprising: A processing circuit configured to output a signal at a first output power within a first dynamic range of the processing circuit; and A front-end module (FEM) coupled to the processing circuitry and the antenna, the FEM having a second dynamic range and configured to amplify the signal for transmission by the antenna at a second output power within the second dynamic range, the second dynamic range being greater than the first dynamic range, and the FEM including a plurality of power amplifier (PA) stages, each PA stage including a PA with a corresponding gain, the plurality of PA stages being switchable based on one or more transmission parameters to provide the second dynamic range, and the one or more transmission parameters including at least one of the first output power, the second output power, or a modulation and decoding scheme (MCS).

2. The digital transmitter of claim 1, wherein the corresponding gain of the PA level among the plurality of PA levels can be adjusted based on the one or more transmission parameters.

3. The digital transmitter according to any one of claims 1 to 2, wherein the processing circuitry includes a memory storing information indicating a plurality of transmission modes and the selection of one of the plurality of transmission modes based on the one or more transmission parameters, wherein at least two of the plurality of transmission modes correspond to different switching of the plurality of PA levels.

4. The digital transmitter of claim 3, wherein the first transmission mode of the plurality of transmission modes corresponds to a lower output power and a lower PA gain of the FEM relative to the second transmission mode of the plurality of transmission modes.

5. The digital transmitter according to any one of claims 3 to 4, wherein the processing circuitry is further configured to select a transmission mode among the plurality of transmission modes based on the one or more transmission parameters, and to transmit a command to the FEM based on the transmission mode, wherein the plurality of PA levels are controllably switched based on the command.

6. The digital transmitter according to any one of claims 1 to 5, wherein the first PA level of the plurality of PA levels comprises a semiconductor material different from the semiconductor material of the second PA level of the plurality of PA levels.

7. The digital transmitter according to any one of claims 1 to 6, wherein the FEM further comprises a plurality of attenuator stages coupled at the inputs of the plurality of PA stages, wherein: Each attenuator stage includes an attenuator with a corresponding gain attenuation; and The plurality of attenuation levels can be switched based on one or more transmission parameters to provide the second dynamic range.

8. The digital transmitter of claim 7, wherein the processing circuitry is further configured to select a transmission mode from a plurality of predefined transmission modes based on the second output power and the MCS, and to transmit a command to the FEM based on the transmission mode, wherein each of the plurality of attenuation stages and the plurality of PA stages is controllably switched based on the command.

9. The digital transmitter of any one of claims 7 to 8, wherein the FEM includes register 0 Reg0, register 0 Reg0 including a first set of entries associated with the plurality of PA levels and a second set of entries associated with the plurality of attenuation levels, wherein the command includes an indication of a first bit of a first entry in the first set and an indication of a second entry in the second set, wherein the plurality of PA levels are controllably switched based on the first entry, and wherein the plurality of attenuation levels are controllably switched based on the second entry.

10. An apparatus comprising: antenna; and A front-end module (FEM) coupled to the antenna and configured to be coupled to and amplify a signal from a processing circuit of a digital transmitter, the signal being (i) output by the processing circuit at a first output power within a first dynamic range of the processing circuit, and (ii) transmitted by the antenna at a second output power within a second dynamic range of the FEM, the second dynamic range being greater than the first dynamic range. The FEM includes a plurality of power amplifier (PA) stages, each PA stage including a PA with a corresponding gain, the plurality of PA stages being switchable based on one or more transmission parameters to provide the second dynamic range, and the one or more transmission parameters including at least one of the first output power, the second output power, or a modulation and decoding scheme (MCS).

11. The apparatus of claim 10, further comprising a memory storing information indicating that the second dynamic range is divided into a plurality of power segments, wherein each of the plurality of power segments indicates a corresponding gain step size that varies within the first dynamic range.

12. The apparatus of claim 11, wherein a power segment among the plurality of power segments is selected based on the second output power, and wherein the first output power is set and the configuration of the FEM is selected based on the second output power and the corresponding gain step size of the power segment.

13. The apparatus of any one of claims 11 to 12, wherein the FEM further comprises a plurality of attenuator stages coupled to the inputs of the plurality of PA stages, wherein the configuration of the FEM includes at least one of switching of the plurality of PA stages or switching of the plurality of attenuator stages.

14. The apparatus according to any one of claims 11 to 13, wherein at least two of the plurality of power segments have different sizes, or the start or end of the gain step is different between the at least two of the plurality of power segments.

15. The apparatus according to any one of claims 11 to 14, wherein the plurality of power segments or corresponding gain steps are based on the MCS.

16. The apparatus according to any one of claims 11 to 15, wherein the plurality of power segments, corresponding gain steps, or the first dynamic range are based on operating temperature or ambient temperature.

17. The apparatus according to any one of claims 10 to 16, wherein the second dynamic range is based on the MCS and is different from another dynamic range of the FEM that can be used for another MCS.

18. The apparatus according to any one of claims 10 to 17, wherein the first dynamic range is based on the MCS and is different from another dynamic range of the processing circuit that can be used for another MCS.

19. A method implemented by a processing circuit, the method comprising: A signal for transmission is generated using one or more transmission parameters, the one or more transmission parameters including at least one of a first output power within a first dynamic range of the processing circuit, a second output power within a second dynamic range of a front-end module (FEM) coupled to the processing circuit, or a modulation and decoding scheme (MCS), wherein the second dynamic range is greater than the first dynamic range. A command is generated based on one or more transmission parameters to indicate the transmission mode of the FEM, the FEM including multiple power amplifier (PA) stages, each PA stage including a PA with a corresponding gain, and the multiple PA stages are capable of switching based on the transmission mode to provide the second dynamic range; The command is transmitted to the FEM; as well as The signal is output to the FEM at the first output power.

20. The method according to claim 19, further comprising: The attenuation of the FEM is determined based on one or more transmission parameters, wherein the FEM further includes multiple attenuator stages coupled to the inputs of the multiple PA stages, wherein each attenuator stage includes an attenuator with a corresponding gain attenuation, and wherein the multiple attenuation stages are switchable. as well as The attenuation is indicated in the command.

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