A signal receiving device, a crosstalk cancellation method, a data transmission device, and an electronic device

Abstract

The application provides a signal receiving device, a crosstalk elimination method, a data transmission device and an electronic equipment. A crosstalk elimination unit is arranged between a first signal receiving channel and a second signal receiving channel. The first signal receiving channel and the second signal receiving channel are any signal receiving channel in a plurality of signal receiving channels. The crosstalk elimination unit comprises a filter circuit, which is used for obtaining a first signal from the first signal receiving channel, and performing filter processing on the first signal to obtain a first filter signal; and a compensation circuit, which is used for compensating a second signal in the second signal receiving channel according to the first filter signal. The crosstalk elimination unit is arranged between channels at a receiving end. The original signal extracted from the first signal channel is processed by the filter circuit to generate a compensation signal matched with the crosstalk noise characteristics, and the compensation signal is dynamically superimposed into the adjacent second signal channel, so that the crosstalk noise elimination with low power consumption and high adaptability is realized.

Description

Technical Field

[0001] This application relates to the field of crosstalk cancellation, and more particularly to a signal receiving device, a crosstalk cancellation method, a data transmission device, and an electronic device. Background Technology

[0002] In the fields of high-performance computing, artificial intelligence, and big data processing, the demand for storage bandwidth is gradually increasing. With the development of high bandwidth memory (HBM) technology, high-density interconnection can be achieved by vertically stacking memory cells and logic controllers and using through silicon vias (TSV) technology, which can provide bandwidth and energy efficiency advantages over traditional storage architectures. However, as edge density continues to increase, the spacing between signal channels is compressed to the micrometer level, which leads to increasingly serious xtalk problems between adjacent channels. This xtalk not only causes signal waveform distortion and increased timing jitter, but also significantly increases the bit error rate (BER), seriously threatening the signal integrity (SI) of high-speed interfaces.

[0003] Currently, solutions to crosstalk problems focus on pre-compensation techniques at the transmitting end and physical layer shielding designs. For example, feed-forward equalization (FFE) or pre-emphasis techniques are used to preprocess the signal output from the transmitting end to cancel out crosstalk effects in the transmission path. Additionally, shielded silicon vias (TSVs) can be inserted into the TSV array to isolate adjacent signal channels using their grounded or fixed potential characteristics.

[0004] However, the above technologies have the following problems: using shielded through-silicon vias (TSVs) occupies additional chip area, reducing the overall effective utilization of TSVs, which contradicts the design goal of high-density integration in HBM. Furthermore, using active compensation circuits such as FFE requires integrating multiple levels of circuitry and complex logic, leading to a significant increase in power consumption. Pre-emphasis or de-emphasis techniques can only roughly offset crosstalk components in specific frequency bands and cannot dynamically adapt to changes in crosstalk characteristics caused by process variations, temperature changes, or differences in channel coupling, resulting in residual noise still reducing BER performance.

[0005] Therefore, there is an urgent need for a technical solution that can avoid crosstalk under high channel density, thereby effectively eliminating crosstalk noise and improving the area utilization and power consumption utilization of memory chips. Summary of the Invention

[0006] This application provides a signal receiving device, a crosstalk cancellation method, a data transmission device, and an electronic device. By arranging crosstalk cancellation units between channels at the receiving end, the original signal extracted from the first signal channel is processed by a filtering circuit to generate a compensation signal that matches the characteristics of crosstalk noise, and then dynamically superimposed onto the adjacent second signal channel, thereby achieving low-power, highly adaptable crosstalk noise cancellation.

[0007] In a first aspect, this application provides a signal receiving device, comprising: a plurality of parallel signal receiving channels and a crosstalk cancellation unit, wherein the crosstalk cancellation unit is provided between a first signal receiving channel and a second signal receiving channel, the first signal receiving channel and the second signal receiving channel being any one of the plurality of signal receiving channels, and the crosstalk cancellation unit comprising: a filtering circuit for acquiring a first signal from the first signal receiving channel and filtering the first signal to obtain a first filtered signal; and a compensation circuit for compensating for a second signal in the second signal receiving channel according to the first filtered signal.

[0008] The signal receiving device provided in this application achieves efficient crosstalk noise suppression by setting crosstalk cancellation units between any two adjacent signal receiving channels. Each crosstalk cancellation unit includes a filtering circuit and a compensation circuit. The filtering circuit extracts the signal from the interference source channel and processes it to obtain the interference characteristic components. The compensation circuit generates a matching compensation signal based on this and injects it into the target channel to cancel the crosstalk noise. This solution does not rely on transmitting end processing or physical shielding measures. While maintaining compatibility, this solution achieves low-power, high-precision crosstalk cancellation and improves the signal transmission quality of parallel signal channels.

[0009] As one possible implementation, the compensation circuit is specifically used to: reverse the first filtered signal to obtain a first inverted signal, the first inverted signal having opposite amplitudes and the same phase as the first filtered signal, and to compensate the second signal in the second signal receiving channel using the first inverted signal.

[0010] The crosstalk cancellation scheme provided in this application constructs an inverting amplifier circuit using an operational amplifier to convert the first filtered signal of the first signal receiving channel into a first inverse signal with opposite amplitude and the same phase, thereby achieving efficient cancellation of crosstalk noise.

[0011] As one possible implementation, the filtering circuit is specifically used to filter out signal components in the first signal that are below a set frequency. The set frequency is determined based on the frequency of crosstalk components in the second signal and the distance between the first signal receiving channel and the second signal receiving channel.

[0012] The filter circuit is used to remove low-frequency components that have little impact on crosstalk between adjacent channels, while retaining high-frequency components that may cause crosstalk. Selective filtering can effectively reduce unnecessary signal interference and process useful high-frequency components. The set frequency is determined based on the frequency components of crosstalk in the second signal and takes into account the impact of physical distance between channels on crosstalk. This allows for more targeted design of filter circuit parameters, thereby improving the signal transmission quality of parallel signal channels.

[0013] As one possible implementation, the channel spacing between the first signal receiving channel and the second signal receiving channel is less than a set spacing threshold, which is determined based on the signal frequency of the first signal and the signal frequency of the second signal.

[0014] Not every two adjacent signal receiving channels require a crosstalk cancellation unit. A crosstalk cancellation unit is only necessary when the distance between the first and second signal receiving channels is less than a set distance threshold. When the two signal receiving channels are close together, electromagnetic interference or capacitive coupling between them is strong, and crosstalk noise cannot be ignored. In this case, measures must be taken to reduce this interference to ensure signal integrity and transmission quality. Conversely, if the distance between the two signal receiving channels is not less than the set distance threshold, the crosstalk between them can be ignored due to the large physical distance. The minimum distance between adjacent signal receiving channels corresponding to the crosstalk cancellation unit can be flexibly adjusted for different frequency signals, thereby effectively eliminating and reducing potential crosstalk problems between transmission channels.

[0015] As one possible implementation, the spacing threshold is set to 20 μm.

[0016] In one possible implementation, the first signal receiving channel and the second signal receiving channel are provided with a first crosstalk cancellation unit and a second crosstalk cancellation unit. The first crosstalk cancellation unit is used to cancel the crosstalk between the first signal in the first signal receiving channel and the second signal in the second signal receiving channel, and the second crosstalk cancellation unit is used to cancel the crosstalk between the second signal in the second signal receiving channel and the first signal in the first signal receiving channel.

[0017] The first crosstalk cancellation unit and the second crosstalk cancellation unit respectively handle the mutual interference between the first signal receiving channel and the second signal receiving channel. Each unit obtains the signal from the channel that causes crosstalk, filters and extracts the interference component and generates a compensation signal, which is then applied in reverse to the corresponding channel affected by crosstalk to cancel the crosstalk noise, thereby ensuring the signal integrity and transmission quality of each channel.

[0018] As one possible implementation, the signal receiving device further includes a signal receiving circuit corresponding to one of the multiple parallel signal receiving channels. The signal output port of the signal receiving channel is connected to the signal receiving circuit. The crosstalk cancellation unit includes an input terminal and an output terminal. The input terminal is connected to the signal output port of the first signal receiving channel, and the output terminal is connected to the second signal receiving circuit corresponding to the second signal receiving channel.

[0019] The signal receiving circuit processes the electrical signals received from the signal receiving channel and converts them into a form suitable for processing. Specifically, the signal receiving circuit amplifies weak input signals to a processable level, removes unwanted frequency components, retains useful signal frequency bands, extracts clock information from the data stream to correctly decode the data, converts analog signals in the signal receiving channel into digital signals for subsequent use, performs equalization processing on the signals to compensate for channel loss, and detects and corrects transmission errors.

[0020] In one possible implementation, the filter circuit includes a first resistor and a first capacitor, and the compensation circuit includes a second resistor, a first adjustable resistor, a second adjustable resistor, a second capacitor, a third capacitor, and a first NMOS transistor, wherein: one end of the first capacitor is connected to the input terminal of the crosstalk cancellation unit, the other end of the first capacitor is connected to one end of the first resistor, the other end of the first resistor is grounded, the other end of the first capacitor is also connected to the control terminal of the first NMOS transistor, the first end of the first NMOS transistor is connected to a power supply, the second end of the first NMOS transistor is connected to one end of the first adjustable resistor, the other end of the first adjustable resistor is connected to one end of the second adjustable resistor, the other end of the second adjustable resistor is grounded, the other end of the first adjustable resistor is also connected to one end of the second capacitor, the other end of the second capacitor is grounded, the other end of the first capacitor is also connected to one end of the third capacitor, the other end of the third capacitor is connected to one end of the second resistor, the other end of the first adjustable resistor is connected to the other end of the second resistor, and the other end of the second resistor is connected to the output terminal of the crosstalk cancellation unit.

[0021] The control terminal of the first NMOS transistor receives the first filtered signal and generates an amplified signal with opposite phase at the second terminal of the first NMOS transistor. After the amplitude of this inverted signal is adjusted by the gain adjustment section, it is superimposed on the first filtered signal directly coupled through the third capacitor at the other end of the second resistor to form the compensation signal finally output by the crosstalk cancellation unit. In the gain adjustment section, the first adjustable resistor is used to adjust the gain of the inverted path, the second adjustable resistor sets the DC operating point, the second capacitor provides high-frequency compensation to improve the phase response, and the third capacitor can ensure that the high-frequency components in the first signal can be quickly transmitted to the output terminal of the crosstalk cancellation unit after the first signal passes through the first-order RC high-pass filter network.

[0022] In one possible implementation, the compensation circuit includes a third resistor and a fourth capacitor. The circuit comprises a fourth resistor, a fifth capacitor, a second NMOS transistor, a third NMOS transistor, and a first PMOS transistor. The input terminal of the crosstalk cancellation unit is connected to one end of the third resistor, and the other end of the third resistor is grounded. The input terminal of the crosstalk cancellation unit is also connected to one end of the fourth capacitor. The other end of the fourth capacitor is connected to the control terminal of the second NMOS transistor. The second end of the second NMOS transistor is connected to the first end of the third NMOS transistor, and the second end of the third NMOS transistor is grounded. The control terminal of the third NMOS transistor is used to input a first control signal, which is used to adjust the bias current of the third NMOS transistor. The first end of the second NMOS transistor is connected to the second end of the first PMOS transistor, and the first end of the first PMOS transistor is connected to a power supply. The second end of the second NMOS transistor is also connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the control terminal of the first PMOS transistor. The first end of the second NMOS transistor is also connected to the output terminal of the crosstalk cancellation unit.

[0023] When the high-frequency component of the first signal passes through the high-pass filter, the first filtered signal is obtained. The first filtered signal drives the second NMOS transistor to generate an inverted amplified signal. This signal is fed back to the gate of the first PMOS transistor through the fourth resistor to form a closed-loop control. The fifth capacitor provides a high-frequency bypass path to extend the bandwidth. The third NMOS transistor dynamically adjusts the transconductance of the amplifier through the first control signal to adapt to input signals of different amplitudes. The load characteristics of the first PMOS transistor and the amplification characteristics of the second NMOS transistor together determine the voltage gain and output impedance. Finally, the output compensation signal is in the same time domain as the original crosstalk signal but with opposite polarity, thus achieving effective crosstalk cancellation.

[0024] As one possible implementation, the signal receiving device further includes: a first controller for adjusting a first control signal to control the magnitude of the bias current of the third NMOS transistor.

[0025] The first controller dynamically adjusts the transconductance of the amplifier containing the third NMOS transistor using the first control signal, thereby adapting to the first signal of different amplitudes and ensuring that the generated compensation signal can accurately cancel the interference of the first signal in the second signal.

[0026] As one possible implementation, the signal receiving circuit includes: a signal receiving unit and a decision feedback equalizer. The signal receiving unit is used to receive the signal transmitted by the corresponding signal receiving channel and determine the readout data based on the signal transmitted by the corresponding signal receiving channel. The decision feedback equalizer is used to perform equalization processing on the readout data to compensate for the energy loss generated during the transmission of the readout data.

[0027] The input signal is received through the signal receiving channel. The weak signal in the signal receiving channel is amplified with low noise or the gain is adjusted to compensate for channel attenuation. The decision feedback equalizer is used to eliminate inter-symbol interference. The threshold of the current signal is dynamically corrected based on the decision result.

[0028] As one possible implementation, the signal receiving device further includes a gain adjustment circuit, which is used to adjust the signal strength of the compensation signal output by the crosstalk cancellation unit.

[0029] The gain adjustment circuit provided in this application can adapt to crosstalk scenarios of different intensities by adjusting the gain of the compensation signal. For example, when the crosstalk signal changes dynamically, the gain is adjusted in real time to ensure the matching degree between the compensation signal and the crosstalk signal, thereby improving the elimination accuracy.

[0030] In one possible implementation, the gain adjustment circuit specifically includes: a fourth NMOS transistor, a switching device group, a fifth resistor, a sixth capacitor, a first current source, and a second current source. The switching device group includes multiple switching devices. The output terminal of the crosstalk cancellation unit is connected to the control terminal of the fourth NMOS transistor. The first terminal of each switching device in the switching device group is connected to the signal receiving unit. The first terminal of the fourth NMOS transistor is connected to the decision feedback equalizer. The second terminal of the fourth NMOS transistor is connected to one end of the sixth capacitor. The second terminal of each switching device in the switching device group is connected to the other end of the sixth capacitor. The second terminal of the fourth NMOS transistor is connected to one end of the fifth resistor. The second terminal of each switching device in the switching device group is connected to the other end of the fifth resistor. One end of the fifth resistor is grounded through the first current source, and the other end of the fifth resistor is grounded through the second current source. One end of the sixth capacitor is grounded through the first current source, and the other end of the sixth capacitor is grounded through the second current source. The control terminal of each switching device in the switching device group is used to input a second control signal, which is used to control the number of switching devices in the switching device group that are turned on.

[0031] Since controlling signal gain with a single switching device has performance limitations, this application uses an adjustable array composed of multiple switching devices. The number of on switches is dynamically adjusted by a second control signal to generate a variable reference voltage. This design not only reduces the chip area occupied by the parallel combination of multiple small switching devices, but also enables dynamic adjustment of the reference voltage. This allows for adaptive optimization of signal quality according to different operating states, improving signal transmission performance while ensuring a compact circuit layout.

[0032] In one possible implementation, the signal receiving device further includes a second controller, configured to: adjust a second control signal based on the first signal and the second signal to control the gain adjustment circuit to adjust the signal strength of the compensation signal output by the crosstalk cancellation unit. The controller in this application dynamically adjusts the number of switches in the switching device group to adjust the signal strength of the compensation signal output by the crosstalk cancellation unit, thereby determining the optimal number of switches in the switching device group to be turned on, and thus entering a stable operating state.

[0033] Secondly, this application provides a crosstalk cancellation method applied to a signal receiving device, comprising: multiple parallel signal receiving channels and a crosstalk cancellation unit, wherein the crosstalk cancellation unit is disposed between a first signal receiving channel and a second signal receiving channel, and the first signal receiving channel and the second signal receiving channel are any of the multiple signal receiving channels. The method includes: acquiring a first signal from the first signal receiving channel, filtering the first signal to obtain a first filtered signal, and compensating for a second signal in the second signal receiving channel based on the first filtered signal. Since the signal receiving device in the embodiment of this application can effectively eliminate crosstalk noise, the crosstalk cancellation method applied to the signal receiving device can also achieve low-power, highly adaptable crosstalk noise cancellation.

[0034] Thirdly, this application provides a data transmission apparatus, which includes a signal transmitting device and a signal receiving device as described in the first aspect. Since the signal receiving device in the embodiments of this application can effectively eliminate crosstalk noise, the data transmission apparatus having the signal receiving device can also achieve low power consumption and highly adaptable crosstalk noise cancellation.

[0035] Fourthly, this application provides an electronic device, including a circuit board and electronic components, wherein the electronic components are connected to the circuit board, and the electronic components include a data transmission device as described in the third aspect. Since the data transmission device in the embodiments of this application can effectively eliminate crosstalk noise, having a data transmission device can also achieve low-power, highly adaptable crosstalk noise cancellation.

[0036] Furthermore, the technical effects of the corresponding solutions in the second to fourth aspects can be referenced from the technical effects that can be obtained by the corresponding solutions in the first aspect, and the repetitions will not be detailed. Attached Figure Description

[0037] Figure 1 This is a schematic diagram of a data transmission system provided in an embodiment of this application;

[0038] Figure 2A Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 1 ;

[0039] Figure 2B Schematic diagram 2 of the signal receiving device provided in the embodiments of this application;

[0040] Figure 3 A schematic diagram of interference in each signal receiving channel;

[0041] Figure 4 Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 3 ;

[0042] Figure 5 Schematic diagram of the crosstalk cancellation unit provided in the embodiments of this application Figure 1 ;

[0043] Figure 6A Schematic diagram 2 of the crosstalk cancellation unit provided in the embodiments of this application;

[0044] Figure 6B Schematic diagram of the crosstalk cancellation unit provided in the embodiments of this application Figure 3 ;

[0045] Figure 7 Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 4 ;

[0046] Figure 8 Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 5 . Detailed Implementation

[0047] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The specific operational methods in the method embodiments can also be applied to the device embodiments or system embodiments. It should be noted that in the description of this application, "at least one" refers to one or more, where "multiple" refers to two or more. Therefore, in the embodiments of this invention, "multiple" can also be understood as "at least two". "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / ", unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship. Furthermore, it should be understood that in the description of this application, terms such as "first" and "second" are only used for distinguishing the descriptive purpose and should not be construed as indicating or implying relative importance or order.

[0048] It should be noted that in the embodiments of this application, "connection" can be understood as electrical connection. The connection between two electrical components can be a direct or indirect connection between the two electrical components. For example, the connection between A and B can be a direct connection between A and B, or an indirect connection between A and B through one or more other electrical components, such as the connection between A and B. Alternatively, it can be a direct connection between A and C, a direct connection between C and B, with A and B connected through C.

[0049] It should be noted that the switching devices and switches in the embodiments of this application can be one or more of various types of switching devices, such as relays, metal oxide semiconductor field effect transistors (MOSFETs), bipolar junction transistors (BJTs), and insulated gate bipolar transistors (IGBTs). These will not be listed individually in the embodiments of this application. Each switching device can include a first terminal, a second terminal, and a control terminal, wherein the control terminal is used to control the switching device to be turned on or off. When the switching device is on, current can be transmitted between the first terminal and the second terminal; when the switching device is off, no current can be transmitted between the first terminal and the second terminal. Taking a MOSFET as an example, the control terminal of the switching device is the gate, the first terminal of the switching device can be the source of the switching device, and the second terminal can be the drain of the switching device; alternatively, the first terminal can be the drain of the switching device, and the second terminal can be the source of the switching device.

[0050] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0051] In the fields of high-performance computing, artificial intelligence, and big data processing, with the widespread application of high-bandwidth memory (HBM) technology, the demand for vertical interconnects (such as 3D DRAM structures) from system-on-chip (SoC) to dynamic random access memory (DRAM) is becoming increasingly strong. HBM achieves high-density stacking of memory cells and logic controllers through through-silicon vias (TSVs). Although this significantly improves bandwidth and energy efficiency, the micron-level signal channel spacing leads to increased crosstalk between adjacent TSVs, causing signal waveform distortion, timing jitter, and increased bit error rate, affecting the signal integrity of high-speed interfaces. Traditional solutions such as forward feedback equalization (FFE) or pre-emphasis technology at the transmitter can partially offset crosstalk, but the power consumption increases dramatically due to complex circuit design. While setting physical layer shielding of TSVs can isolate channels, it sacrifices chip area utilization, which contradicts the high-density integration goal of HBM.

[0052] Figure 1 This is a schematic diagram of a data transmission system provided in an embodiment of this application. (See attached diagram.) Figure 1 As shown, Figure 1 The complete transmission path of signals from the SoC to the DRAM memory cell is shown. At the SoC, data is generated and transmitted at high speed through an integrated transmit unit (TX). The signal is then transmitted to the receive unit (RX) at the DRAM via a vertically stacked through-silicon via (TSV) array. The RX section of the DRAM contains multiple parallel signal receiving channels, each of which is responsible for receiving the data stream from the SoC.

[0053] Figure 1 The structure of the transmission channel between the SoC and DRAM shown can be understood as a long transmission path formed by a densely parallel TSV array. Due to the contradiction between the physical layout characteristics and the signal transmission characteristics, the densely arranged TSVs in this structure form a long transmission path, and their electromagnetic fields exhibit strong coupling characteristics in both the vertical and horizontal directions, which exacerbates the crosstalk between adjacent channels.

[0054] To address this contradiction, this application proposes a signal receiving device that arranges crosstalk cancellation units between parallel signal channels at the receiving end. Specifically, the original signal extracted from the first signal channel is processed by a filtering circuit to generate a compensation signal that matches the characteristics of crosstalk noise, and then dynamically superimposed onto the adjacent second signal channel, thereby directly canceling the crosstalk effect. The device provided by this application does not require additional physical shielding or complex processing at the transmitting end. It can achieve low-power, highly adaptable noise cancellation through filtering and compensation circuits at the receiving end. Furthermore, it can adapt to process deviations, temperature changes, and channel coupling differences in real time, making it suitable for densely arranged TSV channels in HBM stacked structures, thereby effectively improving signal quality.

[0055] It should be noted that the signal receiving device proposed in this application is not only applicable to the receiving end of various 3D integrated architectures or high-speed interface products, but can also be widely used in scenarios including but not limited to HBM, chip interconnect, and package-level high-speed bus. Except for the embodiments described below, the signal receiving devices mentioned in the technical solutions of this application can be implemented and arranged at the receiving end of different interface standards such as high-speed serial computer extended bus standard (peripheral component interconnect express, PCIe) and serializer / deserializer interface (SerDes) through parameter adaptation and modular design, without relying on specific processes or physical structures, thereby meeting the requirements for crosstalk suppression in high-density, high-frequency and high-speed transmission systems.

[0056] Figure 2A Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 1 See Figure 2A As shown, the signal receiving device 200 includes: a plurality of parallel signal receiving channels 201 and a crosstalk cancellation unit 202, wherein the crosstalk cancellation unit 202 is provided between the first signal receiving channel 2011 and the second signal receiving channel 2012, and the first signal receiving channel 2011 and the second signal receiving channel 2012 are any of the plurality of signal receiving channels.

[0057] The crosstalk cancellation unit 202 includes: a filter circuit 203, used to acquire a first signal from the first signal receiving channel 2011, filter the first signal to obtain a first filtered signal, and a compensation circuit 204, used to compensate the second signal in the second signal receiving channel 2012 according to the first filtered signal.

[0058] Each signal receiving channel is responsible for receiving and processing independent data signals from the transmitting end. These signal receiving channels may include front-end amplifiers for impedance matching and amplification of the input signals; for example, differential amplifiers (such as operational amplifiers) may be used. Clock data recovery circuitry is used to extract the clock signal from the data stream and correct data timing. For example, phase-locked loops (PLLs) or delay-locked loops (LLLs) can be used for clock phase alignment.

[0059] This application arranges a crosstalk cancellation unit 202 between the first signal receiving channel 2011 and the second signal receiving channel 2012 (any two adjacent signal receiving channels) to eliminate crosstalk noise from the first channel to the second channel through dynamic compensation.

[0060] Since the interference between signal receiving channels is mutual, that is, the first signal receiving channel 2011 will generate crosstalk noise to the second signal receiving channel 2012, and vice versa, two independent crosstalk cancellation units 202 can be arranged between these two channels to compensate for crosstalk in two directions respectively.

[0061] Figure 2B The second schematic diagram of the signal receiving device provided in the embodiment of this application shows that, as a possible implementation, the first signal receiving channel and the second signal receiving channel are provided with a first crosstalk cancellation unit and a second crosstalk cancellation unit. The first crosstalk cancellation unit is used to eliminate crosstalk between the first signal in the first signal receiving channel and the second signal in the second signal receiving channel, and the second crosstalk cancellation unit is used to eliminate crosstalk between the second signal in the second signal receiving channel and the first signal in the first signal receiving channel.

[0062] The first crosstalk cancellation unit 2021 from the first signal receiving channel 2011 to the second signal receiving channel 2012, the first signal receiving channel 2011 as an interference source to the second signal receiving channel 2012, obtains the first signal from the first signal receiving channel 2011, performs filtering processing, extracts the components that may affect the second signal receiving channel 2012, generates a compensation signal based on the above filtered signal, and applies it to the second signal receiving channel 2012 to cancel the crosstalk noise from the first signal receiving channel 2011.

[0063] The second crosstalk cancellation unit 2022, which connects the second signal receiving channel 2012 to the first signal receiving channel 2011, receives a second signal from the second signal receiving channel 2012 as an interference source to the first signal receiving channel 2011. The unit performs filtering processing to extract components that may affect the first signal receiving channel 2011, generates a compensation signal based on the filtered signal, and applies it to the first signal receiving channel 2011 to cancel the crosstalk noise from the second signal receiving channel 2012.

[0064] As one possible implementation, the filter circuit 203 is specifically used to filter out signal components in the first signal that are below a set frequency. The filter circuit 203 is used to remove low-frequency components that have little impact on crosstalk between adjacent channels, while retaining those high-frequency components that may cause crosstalk. Selective filtering can effectively reduce unnecessary signal interference and process useful high-frequency components.

[0065] A high-pass filter (HPF) is used primarily to remove low-frequency components while retaining high-frequency components that are prone to crosstalk. The filter circuit 203 achieves this filtering function by setting a specific cutoff frequency. Signals below this frequency are eliminated, while signals above it can pass. For example, in an HBM system, considering channel characteristics and signal integrity requirements, the cutoff frequency can be set at a higher frequency. This setting ensures that only higher-frequency signals that may cause crosstalk are allowed to pass through the filter, thus providing accurate input for subsequent compensation operations. Furthermore, the specific parameters of the filter (such as order and cutoff frequency) can be adjusted according to the actual application scenario. The filter circuit 203 can be flexibly adjusted to optimize performance based on different application requirements (such as different interface standards or transmission rates). For example, in some cases, the cutoff frequency can be increased to better accommodate higher data transmission rates, while in other cases, the filter order may need to be increased to achieve better noise suppression.

[0066] The set frequency is determined based on the frequency of the crosstalk component in the second signal and the distance between the first signal receiving channel and the second signal receiving channel.

[0067] By analyzing and identifying the specific frequency components causing crosstalk, and considering the impact of physical distance between channels on crosstalk, filter circuit parameters can be designed more effectively. This allows filtering only the frequency ranges that actually cause interference. By appropriately setting the cutoff frequency (i.e., the setpoint) of the filter circuit, crosstalk can be effectively eliminated.

[0068] Adjusting the set frequency based on the frequency of crosstalk components in the second signal and the physical layout (the distance between the first and second signal receiving channels) can avoid problems of over- or under-filtering. Furthermore, if the distance between the two channels is large enough that low-frequency crosstalk is negligible, there is no need to set the set frequency very high, thereby reducing the cost of the filtering circuit.

[0069] The filtering circuit 203 acquires the original signal from the first signal receiving channel 2011, removes low-frequency components using a high-pass filter, and retains high-frequency components that may cause crosstalk, thereby generating a first filtered signal. Once the first filtered signal is obtained, it is processed by the compensation circuit 204. Specifically, the first filtered signal can be processed using inverse amplification to compensate the second signal in the second signal receiving channel 2012 based on the first filtered signal.

[0070] The compensation circuit 204 generates a compensation signal with the same amplitude but opposite phase as the crosstalk noise, thereby achieving noise cancellation when superimposed with the second signal. Specifically, the first filtered signal is input to the compensation circuit 204, causing the compensation circuit 204 to output an inverted signal, V. comp =-V filter ×G, where V comp To compensate for the signal, V filter The first filtered signal is G, which is an adjustable gain coefficient. The compensation circuit 204 generates a compensation signal with the same amplitude but opposite phase as the crosstalk noise, so as to ensure that the crosstalk from the first signal receiving channel 2011 in the second signal of the second signal receiving channel 2012 can be canceled when superimposed.

[0071] Furthermore, since the intensity of crosstalk noise may vary due to environmental conditions or signal characteristics, the amplitude of the compensation signal needs to be dynamically adjusted to match the actual requirements. Dynamically adjusting the gain of the compensation signal to match the amplitude of the crosstalk noise ensures better compensation results.

[0072] Different signal paths may have different physical lengths, resulting in different arrival times for the signal at the receiver. Differences in physical distance between TSVs can lead to different signal propagation times. Even if the path length is the same, different transmission media (such as copper wires, PCB traces, etc.) will have different transmission speeds, thus causing differences in signal arrival times.

[0073] If there is a time difference between the compensation signal and the actual interference signal, the interference cannot be effectively canceled, resulting in poor compensation. Incorrect timing alignment may introduce new interference, further degrading signal quality and increasing the bit error rate. Therefore, ensuring the time consistency between the interference signal and the compensation signal is crucial.

[0074] To overcome these problems, this application can adopt timing alignment measures to ensure that the compensation signal and the interference signal are synchronized in time. In this case, a delay phase-locked loop can be added to the compensation circuit 204. The delay phase-locked loop compares the phase difference between the input signal and the output signal and adjusts the number of delay units or the delay value accordingly to achieve precise timing of the signal.

[0075] A delay phase-locked loop is integrated in the compensation circuit 204. The delay phase-locked loop is used to adjust the delay of the compensation signal so that it is synchronized with the crosstalk noise in the second signal receiving channel 2012.

[0076] This application can monitor the eye diagram or bit error rate of the signal before and after compensation in real time to determine whether the compensation signal is completely synchronized with the crosstalk noise. If it is found that the compensation signal is not completely synchronized with the interference signal, the delay parameter is automatically adjusted through the feedback loop. When a decrease in signal quality is detected, the control algorithm or other optimization strategies are triggered to adjust the parameters of the delay phase-locked loop until a better signal compensation effect is achieved.

[0077] The above methods can effectively solve the problem of timing inconsistency between interference signals and compensation signals. By adopting timing alignment technology and real-time monitoring and feedback mechanisms, the compensation signal and crosstalk noise can be synchronized in time, thereby maximizing the compensation effect and improving the overall signal transmission quality and reliability.

[0078] In one possible implementation, the compensation circuit 204 is specifically used to: reverse the first filtered signal to obtain a first inverted signal, the first inverted signal having opposite amplitudes and the same phase as the first filtered signal, and to compensate for the second signal in the second signal receiving channel 2012 using the first inverted signal. Specifically, the compensation circuit 204 obtains the original signal from the first signal receiving channel 2011. The filtering circuit 203 processes this signal to extract high-frequency components that may affect the second signal receiving channel 2012, thus obtaining the first filtered signal.

[0079] By generating a compensation signal (i.e., a first inverted signal) with the opposite amplitude but the same phase as the first filtered signal, the effects of crosstalk noise can be canceled when superimposed. An inverting amplifier circuit is constructed using an operational amplifier. The first filtered signal is input to the inverting port, and the output is the inverted signal, which is then used for compensation.

[0080] To cancel crosstalk noise from the first signal receiving channel 2011, the generated first inverted signal needs to be combined with the original signal in the second signal receiving channel 2012. This combination can be achieved in two main ways: First, by directly superimposing the signal within the second signal receiving channel 2012, the first inverted signal is added to the second signal of the second signal receiving channel 2012, thus eliminating crosstalk. Second, by superimposing the compensation signal onto the receiving circuit connected to the second signal receiving channel 2012, thus eliminating crosstalk.

[0081] See Figure 3 As shown, Figure 3This is a schematic diagram illustrating interference between each signal receiving channel. As one possible implementation, the channel spacing between the first signal receiving channel 2011 and the second signal receiving channel 2012 is less than a set spacing threshold.

[0082] Not every two adjacent signal receiving channels need to have a crosstalk cancellation unit 202. Specifically, a crosstalk cancellation unit 202 is only needed between the first signal receiving channel 2011 and the second signal receiving channel 2012 when the distance between them is less than a set distance threshold.

[0083] When the distance between two signal receiving channels is close (i.e., less than the set spacing threshold), the electromagnetic interference or capacitive coupling between them is strong, resulting in non-negligible crosstalk noise. In this case, measures need to be taken to reduce this interference to ensure signal integrity and transmission quality.

[0084] Conversely, if the distance between the two signal receiving channels is not less than the set spacing threshold, the crosstalk between them can be ignored due to the large physical distance. Therefore, in these cases, there is no need to configure an additional crosstalk cancellation unit 202, which saves hardware resources and costs.

[0085] Setting a spacing threshold determines which channel pairs require crosstalk cancellation. This threshold can be determined based on various factors, including but not limited to: the electrical characteristics of the signal receiving channel (such as dielectric constant, conductor material, and other factors affecting signal transmission characteristics) and the frequency range of the signals in the receiving channel. High-frequency signals are more susceptible to interference from neighboring channels; therefore, for high-frequency applications, the spacing threshold may be smaller. Furthermore, different application scenarios have different requirements for signal integrity, as those skilled in the art should be aware.

[0086] The spacing threshold can be determined based on the signal frequencies of the first and second signals. For example, the spacing threshold decreases as the signal frequency increases. That is, if a higher frequency signal is to be transmitted in the channel, the spacing threshold should be smaller to ensure signal integrity and transmission quality, effectively controlling crosstalk even at high frequencies. Conversely, if the signal frequency is low, a larger spacing threshold can be set because the effects of electromagnetic interference and capacitive coupling are also smaller.

[0087] By setting a reasonable spacing threshold, the signal receiving device can effectively balance performance and cost, ensuring that the crosstalk cancellation unit 202 is placed only where needed, while maintaining the efficient operation of the signal receiving device. This not only improves signal integrity but also optimizes resource utilization efficiency and reduces hardware costs.

[0088] Figure 4 Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 3 See Figure 4 As shown, in one possible implementation, the signal receiving device further includes a signal receiving circuit 401 corresponding to one of a plurality of parallel signal receiving channels, and the signal output port of the signal receiving channel is connected to the signal receiving circuit 401; the first signal receiving channel 2011 is connected to the first signal receiving circuit 4011, and the second signal receiving channel 2012 is connected to the second signal receiving circuit 4012. The crosstalk cancellation unit 202 includes an input terminal and an output terminal, the input terminal is connected to the signal output port of the first signal receiving channel 2011, and the output terminal is connected to the second signal receiving circuit corresponding to the second signal receiving channel 2012.

[0089] The signal receiving circuit is used to process the electrical signals received from the signal receiving channel and convert them into a form suitable for processing. Specifically, the signal receiving circuit amplifies weak input signals to a processable level, removes unwanted frequency components, retains useful signal frequency bands, extracts clock information from the data stream to correctly decode the data, converts analog signals in the signal receiving channel into digital signals for storage, performs equalization processing on the signals to compensate for channel loss, and detects and corrects transmission errors.

[0090] To cancel crosstalk noise from the first signal receiving channel 2011, the generated first inverted signal needs to be combined with the original signal in the second signal receiving channel 2012. This combination can be achieved in two main ways: First, by directly superimposing the signal within the second signal receiving channel 2012, the first inverted signal is added to the second signal of the second signal receiving channel 2012, thus eliminating crosstalk. Second, by superimposing the compensation signal onto the receiving circuit connected to the second signal receiving channel 2012, thus eliminating crosstalk.

[0091] In this application, the signal receiving circuit may include, but is not limited to, the following structure: a clock synchronization module, a signal input and processing module, a differential output driving module, and a decision feedback equalizer (DFE). The clock synchronization module can receive an external clock signal and generate the necessary internal synchronization timing signals, thereby ensuring that data sampling, processing, and output of the received signal are performed at the correct times, avoiding signal timing chaos.

[0092] The signal input and processing module can receive signals from the signal receiving channel, compare the signals received from the signal receiving channel with a reference level, and determine their logic state (determine whether the level is high or low and store the result).

[0093] The differential output driver module can convert the processed signal into a differential output, improving anti-interference capability, enhancing signal driving capability, and ensuring that it can drive subsequent circuits. It includes level conversion to adapt to the interface requirements of different voltage standards.

[0094] A decision feedback equalizer is used to eliminate inter-symbol interference. It may include a decision unit, feedback taps, and a weighted summation circuit. It can be used to make a decision of "0" or "1" on the input signal. In the circuit structure, it is represented by a cross-coupled latch or a dynamic comparator.

[0095] Feedback taps, each tap representing a delay unit, are used to store the decision result and can be represented as a chain of shift registers or multiple levels of delay units.

[0096] The weighted summation circuit multiplies the output of each tap by a weight, sums them, and feeds them back to the input node. The coefficients can be programmed by adjusting the current source. In low-speed designs, the weights can be allocated using adjustable resistors.

[0097] Figure 5 Schematic diagram of the crosstalk cancellation unit provided in the embodiments of this application Figure 1 See Figure 5 As shown, in one possible implementation, the filter circuit 203 includes: a first resistor 501 and a first capacitor 502, and the compensation circuit 204 includes: a second resistor 503, a first adjustable resistor 504, a second adjustable resistor 505, a second capacitor 506, a third capacitor 507, and a first NMOS transistor 508, wherein:

[0098] One end of the first capacitor 502 is connected to the input terminal of the crosstalk cancellation unit 202. The other end of the first capacitor 502 is connected to one end of the first resistor 501, and the other end of the first resistor 501 is grounded. The other end of the first capacitor 502 is also connected to the control terminal of the first NMOS transistor 508. The first end of the first NMOS transistor 508 is connected to the power supply 509. The second end of the first NMOS transistor 508 is connected to one end of the first adjustable resistor 504. The other end of the first adjustable resistor 504 is connected to one end of the second adjustable resistor 505, and the other end of the second adjustable resistor 505 is grounded. The other end of the first adjustable resistor 504 is also connected to one end of the second capacitor 506, and the other end of the second capacitor 506 is grounded. The other end of the first capacitor 502 is also connected to one end of the third capacitor 507. The other end of the third capacitor 507 is connected to one end of the second resistor 503. The other end of the first adjustable resistor 504 is connected to the other end of the second resistor 503. The other end of the second resistor 503 is connected to the output terminal of the crosstalk cancellation unit 202.

[0099] The filter circuit 203 consists of a first resistor 501 and a first capacitor 502 forming a first-order RC high-pass filter network. When the first signal input from the input terminal of the crosstalk cancellation unit 202 passes through the first-order RC high-pass filter network, the first capacitor 502 exhibits high impedance characteristics for low-frequency components, effectively blocking DC and low-frequency interference signals. At the same time, the first resistor 501 provides a transmission path for the first signal in the first signal receiving channel 2011. The cutoff frequency of the first-order RC high-pass filter network is determined by the resistance value of the first resistor 501 and the capacitance value of the first capacitor 502. The high-frequency components in the first signal are coupled to the subsequent compensation circuit 204 through the first capacitor 502, while the low-frequency components are bypassed to the ground terminal by the first resistor 501.

[0100] The compensation circuit 204 includes an inverting amplification section composed of a first NMOS transistor 508, a gain adjustment section composed of a first adjustable resistor 504 and a second adjustable resistor 505, and a frequency compensation section composed of a second capacitor 506 and a third capacitor 507. In this design, the control terminal of the first NMOS transistor 508 receives the first filtered signal, and the second terminal of the first NMOS transistor 508 generates an amplified signal with opposite phase. After the amplitude of this inverted signal is adjusted by the gain adjustment section, it is superimposed on the other end of the second resistor 503 with the first filtered signal directly coupled through the third capacitor 507, forming the compensation signal finally output by the crosstalk cancellation unit 202. In the gain adjustment section, the first adjustable resistor 504 is used to adjust the gain of the inverted path, the second adjustable resistor 505 sets the DC operating point, the second capacitor 506 provides high-frequency compensation to improve the phase response, and the third capacitor 507 can ensure that after the first signal passes through the first-order RC high-pass filter network, the high-frequency components in the first signal can be quickly transmitted to the output terminal of the crosstalk cancellation unit 202. This application adopts this structure, and through active amplification and passive compensation, reverse compensation of the second signal is achieved. This design can effectively cancel the crosstalk noise caused by the first signal in the first signal receiving channel 2011 to the second signal in the second signal receiving channel 2012.

[0101] In the compensation circuit 204, the first NMOS transistor 508 forms a common-source amplifier structure. The control terminal of the first NMOS transistor 508 receives the first filter signal from the first-order RC high-pass filter network. When the gate voltage exceeds the threshold during the positive half-cycle of the first filter signal, the NMOS transistor turns on and generates an inverted amplified signal at the drain. During the negative half-cycle, the device is cut off, and the continuity of the output voltage is maintained by the second capacitor 506. The voltage divider network formed by the first adjustable resistor 504 and the second adjustable resistor 505 can provide gain control. The second capacitor 506 is connected in parallel across the first adjustable resistor 504 to compensate for high-frequency phase delay. The sizes of the components in the compensation circuit 204 can be adjusted by those skilled in the art according to actual conditions, and are not specifically limited here.

[0102] Figure 6A Schematic diagram 2 of the crosstalk cancellation unit provided in the embodiments of this application, see below. Figure 6A As shown, in one possible implementation, the filter circuit 203 includes a third resistor 601 and a fourth capacitor 602, and the compensation circuit 204 includes a fourth resistor 603, a fifth capacitor 604, a second NMOS transistor 605, a third NMOS transistor 606, and a first PMOS transistor 607. The input terminal of the crosstalk cancellation unit 202 is connected to one end of the third resistor 601, and the other end of the third resistor 601 is grounded. The input terminal of the crosstalk cancellation unit 202 is also connected to one end of the fourth capacitor 602. The other end of the fourth capacitor 602 is connected to the control terminal of the second NMOS transistor 605. The second end of the second NMOS transistor 605 is connected to the first end of the third NMOS transistor 606. The second end of the third NMOS transistor 606 is grounded. The control terminal of the third NMOS transistor 606 is used to input the first control signal. The first end of the second NMOS transistor 605 is connected to the second end of the first PMOS transistor 607. The second end of the first PMOS transistor 607 is connected to the power supply 608. The first end of the second NMOS transistor 605 is also connected to one end of the fourth resistor 603. The other end of the fourth resistor 603 is connected to the control terminal of the first PMOS transistor 607. The first end of the second NMOS transistor 605 is also connected to the output terminal of the crosstalk cancellation unit 202.

[0103] The filter circuit 203 consists of a third resistor 601 and a fourth capacitor 602 forming a first-order RC high-pass filter. The first signal at the input end is blocked by the fourth capacitor 602 to block the DC component and low-frequency interference signal, while allowing the high-frequency signal to be transmitted to the subsequent compensation circuit 204 through the third resistor 601. The cutoff frequency of the high-pass filter is determined by the resistance value of the third resistor 601 and the capacitance value of the fourth capacitor 602.

[0104] The compensation circuit 204 includes a common-source cascode amplification section composed of a second NMOS transistor 605 and a third NMOS transistor 606, a load circuit composed of a first PMOS transistor 607, and a frequency compensation section composed of a fourth resistor 603 and a fifth capacitor 604. The gate of the second NMOS transistor 605 receives a first filtered signal and generates an amplified signal with opposite phase at its drain. This signal is fed back to the gate of the first PMOS transistor 607 through the fourth resistor 603 to form a negative feedback loop. The fifth capacitor 604 provides a high-frequency compensation path to improve the phase response. The control terminal of the third NMOS transistor 606 receives a first control signal to adjust the bias current of the amplification section. The first PMOS transistor 607 acts as an active load to provide a high-impedance output node and together with the second NMOS transistor 605 forms an inverting amplifier. The compensated signal is output from the drain of the second NMOS transistor 605 to the output terminal of the crosstalk cancellation unit 202.

[0105] Specifically, after the high-frequency component of the first signal passes through a high-pass filter, a first filtered signal is obtained. This first filtered signal drives a second NMOS transistor 605 to generate an inverting amplified signal. This signal is fed back to the gate of a first PMOS transistor 607 through a fourth resistor 603, forming a closed-loop control. A fifth capacitor 604 provides a high-frequency bypass path. A third NMOS transistor 606 dynamically adjusts the transconductance of the amplifier through a first control signal to adapt to input signals of different amplitudes. The load characteristics of the first PMOS transistor 607 and the amplification characteristics of the second NMOS transistor 605 together determine the voltage gain and output impedance. The final output compensation signal is the same in the time domain and has the opposite polarity to the original crosstalk signal, achieving effective crosstalk cancellation. By adjusting the voltage value of the first control signal, the conduction state of the third NMOS transistor 606 can be changed, thereby adjusting the gain and phase response of the compensation circuit. This application, through the combined action of high-pass filtering and active compensation, achieves the extraction and enhancement of high-frequency components in the input signal, while also suppressing low-frequency noise and power supply interference, making it suitable for crosstalk cancellation applications in high-speed signal transmission channels.

[0106] Figure 6B Schematic diagram of the crosstalk cancellation unit provided in the embodiments of this application Figure 3 In one possible implementation, the signal receiving device further includes a first controller 610, which is used to adjust a first control signal to control the magnitude of the bias current of the third NMOS transistor 606.

[0107] The first controller 610 provided in this application dynamically adjusts the transconductance value of the amplifier containing the third NMOS transistor 606 using a first control signal, thereby adapting to first signals of different amplitudes and ensuring that the generated compensation signal can accurately cancel the interference of the first signal in the second signal.

[0108] Figure 7 Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 4 See Figure 7 As shown, in one possible implementation, the signal receiving circuit 401 includes a signal receiving unit 701 and a decision feedback equalizer 702. The signal receiving unit 701 is used to receive the signal transmitted by the corresponding signal receiving channel 201 and determine the readout data according to the signal transmitted by the corresponding signal receiving channel 201. The decision feedback equalizer 702 is used to perform equalization processing on the readout data to compensate for the energy loss generated during the transmission of the readout data.

[0109] The signal receiving unit 701 receives input signals (such as radio frequency, baseband, or high-speed serial signals) through a signal receiving channel, and performs low-noise amplification or gain adjustment on the weak signals in the signal receiving channel to compensate for channel attenuation. Furthermore, the signal receiving unit 701 may also include circuits such as comparators to quantize analog signals into digital logic levels and generate preliminary readout data.

[0110] If the signal receiving unit 701 is the front-end module of the DRAM receiving circuit, it is responsible for receiving high-speed serial data signals from the transmission channel and performing preliminary processing. Its workflow is as follows:

[0111] The received differential or single-ended signal is first amplitude-adjusted by a low-noise amplifier or a variable gain amplifier to compensate for high-frequency attenuation and noise interference in the channel; the clock data recovery module extracts the synchronization clock from the input signal to ensure that the sampling timing is aligned with the transmitting end; the dynamic comparator makes a decision on the conditioned signal and generates a preliminary digital logic level for storage.

[0112] The decision feedback equalizer 702 is used to eliminate inter-symbol interference and dynamically corrects the threshold of the current signal based on the decision result. In DRAM applications, the decision feedback equalizer 702 can adopt a half-rate or predictive architecture to reduce timing pressure.

[0113] Continue reading Figure 7 As shown, in one possible implementation, the signal receiving device further includes a gain adjustment circuit 703, which is used to adjust the signal strength of the compensation signal output by the crosstalk cancellation unit 202.

[0114] The gain adjustment circuit 703 provided in this application can adapt to crosstalk scenarios of different intensities by adjusting the gain of the compensation signal. For example, when the crosstalk signal changes, the gain is adjusted in real time to ensure the matching degree between the compensation signal and the crosstalk signal, thereby improving the elimination accuracy.

[0115] As one possible implementation, the gain adjustment circuit 703 specifically includes: a fourth NMOS transistor 704, a switching device group 705, a fifth resistor 706, a sixth capacitor 707, a first current source 708, and a second current source 709, wherein the switching device group 705 includes multiple switching devices.

[0116] The output terminal of the crosstalk cancellation unit 202 is connected to the control terminal of the fourth NMOS transistor 704. The first terminal of each switching device in the switching device group 705 is connected to the signal receiving unit 701. The first terminal of the fourth NMOS transistor 704 is connected to the decision feedback equalizer 702. The second terminal of the fourth NMOS transistor 704 is connected to one end of the sixth capacitor 707. The second terminal of each switching device in the switching device group 705 is connected to the other end of the sixth capacitor 707. The second terminal of the fourth NMOS transistor 704 is connected to one end of the fifth resistor 706. The second terminal of each switching device in the switching device group 705 is connected to the other end of the fifth resistor 706. One end of the fifth resistor 706 is grounded through the first current source 708. The other end of the fifth resistor 706 is grounded through the second current source 709. One end of the sixth capacitor 707 is grounded through the first current source 708. The other end of the sixth capacitor 707 is grounded through the second current source 709. The control terminal of each switching device in the switching device group 705 is used to input a second control signal. The second control signal is used to control the number of switching devices in the switching device group 705 that are turned on.

[0117] Specifically, when the second control signal is applied to each switching device in the switching device group 705, the equivalent impedance of the signal path is changed by controlling the number of conducting switching devices in the switching device group 705. When the second control signal increases the number of conducting switching devices, the parallel impedance decreases and the signal gain increases; conversely, when the second control signal decreases the number of conducting switching devices, the parallel impedance increases and the signal gain decreases. The fourth NMOS transistor 704 acts as a voltage-controlled variable resistor, and its conduction level is modulated by the output voltage of the crosstalk cancellation unit 202, further fine-tuning the gain value.

[0118] The sixth capacitor 707 and the fifth resistor 706 form a compensation network. High-frequency signals are mainly transmitted through the sixth capacitor 707 to compensate for high-frequency attenuation, while low-frequency signals are transmitted through the fifth resistor 706 to maintain low-frequency response. The first current source 708 and the second current source 709 provide stable DC bias for the circuit, ensuring that each device operates in the optimal linear region.

[0119] Since there are performance limitations in controlling signal gain using a single switching device, this application uses an adjustable array composed of multiple switching devices. The number of on switches is dynamically adjusted by a second control signal to generate a variable reference voltage. This design not only reduces the chip area occupied by the parallel combination of multiple small switching devices, but also enables dynamic adjustment of the reference voltage. This allows for adaptive optimization of signal quality according to different operating states, improving signal transmission performance while ensuring a compact circuit layout.

[0120] Figure 8 Schematic diagram of the signal receiving device provided in the embodiments of this application Figure 5 See Figure 8 As shown, in one possible implementation, the signal receiving device further includes: a second controller 801, configured to: adjust a second control signal according to the first signal and the second signal, so as to control the gain adjustment circuit 802 to adjust the signal strength of the compensation signal output by the crosstalk cancellation unit 202.

[0121] The control method described above may include the following steps (taking the crosstalk generated by the first signal in the first signal receiving channel 2011 on the second signal in the second signal receiving channel 2012 as an example):

[0122] Step 1: The second controller 801 turns on the switching devices in the switching device group with a set number of switches. The second controller 801 sends an initial configuration signal to the switching device group through a digital control interface, turns on the set number of switching devices according to a preset scheme, and changes the equivalent impedance characteristics of the overall path by controlling the number of switching devices turned on in the switching device group.

[0123] Step 2: Determine the signal quality of the second signal after crosstalk cancellation unit 202 cancels crosstalk by using the first signal of the first signal receiving channel 2011 to cancel the second signal of the second signal receiving channel 2012.

[0124] A test signal is injected into the first signal receiving channel 2011 and processed by the crosstalk cancellation unit 202. Then, the output signal of the second signal receiving channel 2012 is subjected to signal quality detection. For example, the signal quality detection process includes time domain and frequency domain analysis, specifically detecting the eye diagram characteristics, signal-to-noise ratio level and inter-symbol interference level of the second signal. The second controller 801 makes a decision based on the above parameters.

[0125] Step 3: Based on the signal quality of the second signal after crosstalk cancellation, the second controller 801 adjusts the number of switched devices in the switching device group to improve the signal quality of the second signal after crosstalk cancellation.

[0126] Based on the signal quality assessment results, the second controller 801 uses a closed-loop control algorithm to adjust the number of switching devices in the switching device group. By comparing the signal quality indicators under different configurations, it approaches the optimal operating point (the optimal number of switching devices in the switching device group), thereby improving the signal quality of the second signal. After optimization, the optimal number of switching devices in the switching device group is determined, thus entering a stable operating state.

[0127] Based on the same concept, this application provides a crosstalk cancellation method applied to a signal receiving device, comprising: multiple parallel signal receiving channels and a crosstalk cancellation unit, wherein a crosstalk cancellation unit is provided between a first signal receiving channel and a second signal receiving channel, and the first signal receiving channel and the second signal receiving channel are any of the multiple signal receiving channels, characterized in that the method comprises: acquiring a first signal from the first signal receiving channel, filtering the first signal to obtain a first filtered signal; and compensating for a second signal in the second signal receiving channel according to the first filtered signal.

[0128] Based on the same concept, this application provides a data transmission device, which includes a signal transmitting device and a signal receiving device described in the above embodiments.

[0129] Based on the same concept, this application provides an electronic device, including a circuit board and electronic components connected to the circuit board. The electronic components include the data transmission device described in the above embodiments. The data transmission device can be applied to electronic devices capable of internal data transmission (e.g., data transmission between the processor and memory of the electronic device). Such electronic devices include, but are not limited to, terminal devices and communication devices. Terminal devices include, but are not limited to, mobile phones, computers, televisions, set-top boxes, watches, personal computers (PCs), wearable devices, and in-vehicle devices. Communication devices include, but are not limited to, wireless networks, fixed networks, servers, and smart broadband. It is understood that the specific implementation of the data transmission device can be flexibly set according to the actual application scenario and is not limited herein.

[0130] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A signal receiving device, characterized in that, include: Multiple parallel signal receiving channels and crosstalk cancellation units are provided, wherein a crosstalk cancellation unit is provided between the first signal receiving channel and the second signal receiving channel, and the first signal receiving channel and the second signal receiving channel are any one of the multiple signal receiving channels; The crosstalk cancellation unit includes: A filtering circuit is used to acquire a first signal from the first signal receiving channel, filter the first signal, and obtain a first filtered signal. The compensation circuit is used to compensate the second signal in the second signal receiving channel according to the first filtered signal.

2. The signal receiving device according to claim 1, characterized in that, The compensation circuit is specifically used for: The first filtered signal is reversed to obtain a first reversed signal, which has the opposite amplitude and the same phase as the first filtered signal. The first reverse signal is used to compensate for the second signal in the second signal receiving channel.

3. The signal receiving device according to claim 1 or 2, characterized in that, The filtering circuit is specifically used to filter out signal components in the first signal that are below a set frequency. The set frequency is determined based on the frequency of crosstalk components in the second signal and the distance between the first signal receiving channel and the second signal receiving channel.

4. The signal receiving device according to any one of claims 1-3, characterized in that, The channel spacing between the first signal receiving channel and the second signal receiving channel is less than a set spacing threshold, which is determined based on the signal frequency of the first signal and the signal frequency of the second signal.

5. The signal receiving device according to claim 4, characterized in that, The set spacing threshold is 20μm.

6. The signal receiving device according to any one of claims 1-5, characterized in that, The first signal receiving channel and the second signal receiving channel are provided with a first crosstalk cancellation unit and a second crosstalk cancellation unit; The first crosstalk cancellation unit is used to eliminate crosstalk between the first signal in the first signal receiving channel and the second signal in the second signal receiving channel; The second crosstalk cancellation unit is used to eliminate crosstalk between the second signal in the second signal receiving channel and the first signal in the first signal receiving channel.

7. The signal receiving device according to any one of claims 1-6, characterized in that, The signal receiving device further includes a signal receiving circuit corresponding to one of the multiple parallel signal receiving channels, and the signal output port of the signal receiving channel is connected to the signal receiving circuit. The crosstalk cancellation unit includes an input terminal and an output terminal. The input terminal is connected to the signal output port of the first signal receiving channel, and the output terminal is connected to the second signal receiving circuit corresponding to the second signal receiving channel.

8. The signal receiving device according to claim 7, characterized in that, The filtering circuit includes a first resistor and a first capacitor, and the compensation circuit includes a second resistor, a first adjustable resistor, a second adjustable resistor, a second capacitor, a third capacitor, and a first NMOS transistor, wherein: One end of the first capacitor is connected to the input terminal of the crosstalk cancellation unit. The other end of the first capacitor is connected to one end of the first resistor, and the other end of the first resistor is grounded. The other end of the first capacitor is also connected to the control terminal of the first NMOS transistor. The first end of the first NMOS transistor is connected to the power supply. The second end of the first NMOS transistor is connected to one end of the first adjustable resistor. The other end of the first adjustable resistor is connected to one end of the second adjustable resistor, and the other end of the second adjustable resistor is grounded. The other end of the first adjustable resistor is also connected to one end of the second capacitor, and the other end of the second capacitor is grounded. The other end of the first capacitor is also connected to one end of the third capacitor, and the other end of the third capacitor is connected to one end of the second resistor. The other end of the first adjustable resistor is connected to the other end of the second resistor, and the other end of the second resistor is connected to the output terminal of the crosstalk cancellation unit.

9. The signal receiving device according to claim 7, characterized in that, The filter circuit includes a third resistor and a fourth capacitor, and the compensation circuit includes a fourth resistor, a fifth capacitor, a second NMOS transistor, a third NMOS transistor, and a first PMOS transistor. The input terminal of the crosstalk cancellation unit is connected to one end of the third resistor, and the other end of the third resistor is grounded. The input terminal of the crosstalk cancellation unit is also connected to one end of the fourth capacitor, and the other end of the fourth capacitor is connected to the control terminal of the second NMOS transistor. The second end of the second NMOS transistor is connected to the first end of the third NMOS transistor, and the second end of the third NMOS transistor is grounded. The control terminal of the third NMOS transistor is used to input a first control signal, which is used to adjust the bias current of the third NMOS transistor. The first end of the second NMOS transistor is connected to the second end of the first PMOS transistor, and the first end of the first PMOS transistor is connected to a power supply. The second end of the second NMOS transistor is also connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the control terminal of the first PMOS transistor. The first end of the second NMOS transistor is also connected to the output terminal of the crosstalk cancellation unit.

10. The signal receiving device according to claim 9, characterized in that, The signal receiving device further includes: a first controller; The first controller is configured to: adjust the first control signal to control the magnitude of the bias current of the third NMOS transistor.

11. The signal receiving device according to claim 7, characterized in that, The signal receiving circuit includes a signal receiving unit and a decision feedback equalizer. The signal receiving unit is used to receive the signal transmitted by the corresponding signal receiving channel and determine the readout data based on the signal transmitted by the corresponding signal receiving channel. The decision feedback equalizer is used to perform equalization processing on the readout data to compensate for the energy loss generated by the readout data during transmission.

12. The signal receiving device according to any one of claims 1-11, characterized in that, The signal receiving device further includes a gain adjustment circuit, which is used to adjust the signal strength of the compensation signal output by the crosstalk cancellation unit.

13. The signal receiving device according to claim 12, characterized in that, The gain adjustment circuit specifically includes: a fourth NMOS transistor, a switching device group, a fifth resistor, a sixth capacitor, a first current source, and a second current source. The switching device group includes multiple switching devices. The output terminal of the crosstalk cancellation unit is connected to the control terminal of the fourth NMOS transistor. The first terminal of each switch in the switching device group is connected to the signal receiving unit. The first terminal of the fourth NMOS transistor is connected to the decision feedback equalizer. The second terminal of the fourth NMOS transistor is connected to one end of the sixth capacitor. The second terminal of each switch in the switching device group is connected to the other end of the sixth capacitor. The second terminal of the fourth NMOS transistor is connected to one end of the fifth resistor. The second terminal of each switch in the switching device group is connected to the other end of the fifth resistor. One end of the fifth resistor is grounded through the first current source, and the other end of the fifth resistor is grounded through the second current source. One end of the sixth capacitor is grounded through the first current source, and the other end of the sixth capacitor is grounded through the second current source. The control terminal of each switch in the switching device group is used to input a second control signal, which is used to control the number of switches in the switching device group that are turned on.

14. The signal receiving device according to claim 13, characterized in that, The signal receiving device further includes: a second controller; The second controller is configured to: adjust the second control signal according to the first signal and the second signal, so as to control the gain adjustment circuit to adjust the signal strength of the compensation signal output by the crosstalk cancellation unit.

15. A crosstalk cancellation method, applied to a signal receiving device, characterized in that, include: The method comprises multiple parallel signal receiving channels and a crosstalk cancellation unit, wherein a crosstalk cancellation unit is provided between a first signal receiving channel and a second signal receiving channel, and the first signal receiving channel and the second signal receiving channel are any one of the multiple signal receiving channels. A first signal is obtained from a first signal receiving channel, and the first signal is filtered to obtain a first filtered signal. The second signal in the second signal receiving channel is compensated based on the first filtered signal.

16. A data transmission device, characterized in that, The data transmission device includes a signal transmitting device and a signal receiving device as described in any one of claims 1-14.

17. An electronic device, characterized in that, It includes a circuit board and electronic components, the electronic components being connected to the circuit board, the electronic components including: the data transmission device as described in claim 16.

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