Semiconductor device and method of operating the same

CN122993832APending Publication Date: 2026-10-27TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
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Patent Information

Application Number
CN202611120828.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-02-21
Filing Date
2025-09-25
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

然而,AI/ML算法具有超过了摩尔定律的计算要求

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Abstract

Embodiments of the invention provide an optical integrated circuit device. An electronic and optical integrated circuit device for convolutional neural networks performs various aspects of analog-to-digital conversion (ADC) or digital-to-analog conversion (DAC) in an optical integrated circuit. DAC can be performed using optical modulators. Each optical modulator receives a plurality of electrical input signals collectively representing input values or kernel weights. The electrical input signals are applied to different modulator segments. The modulator segments combine to encode digital data as a corresponding analog optical signal. ADC can include splitting an optical output signal and providing different degrees of attenuation for each signal tap. Signals with different attenuation levels are converted to electrical output signals, compared to reference voltages to determine digital encodings. Attenuation levels can be selected so that one reference voltage can be used for all comparisons. Embodiments of the invention also provide an electronic and photonic integrated circuit (EPIC) device and method of operating the same, a semiconductor device and method of operating the same.
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Description

[0001] This application is a divisional application of application number 202511379425.2, filed on September 25, 2025, entitled "Optical integrated circuit device, electronic and photonic integrated circuit (EPIC) device and method of operation thereof". Technical Field

[0002] The embodiments disclosed herein generally relate to the field of electronic circuits, and more specifically, to optical integrated circuit devices, electronic and optical integrated circuit (EPIC) devices and methods of operating thereof, and semiconductor devices and methods of operating thereof. Background Technology

[0003] Artificial intelligence / machine learning (AI / ML) algorithms have traditionally been implemented using electrical computing, which, according to Moore's Law, has seen rapid increases in both speed and capability. However, AI / ML algorithms have computational requirements that exceed Moore's Law. Furthermore, even if Moore's Law remained unchanged, the projected power consumption would be unsustainable because the rate of improvement in power efficiency does not match the rate of improvement in computational speed. Therefore, optical computing is gaining increasing attention due to its ability to achieve higher computational speeds with lower power consumption. Summary of the Invention

[0004] Embodiments of the present invention provide an optical integrated circuit (PIC) device, comprising: a plurality of optical modulators, each optical modulator configured to convert an electrical input signal to generate an optical input signal, wherein one of the plurality of optical modulators includes two or more modulator segments controlled by different electrical input signals such that a corresponding optical input signal is determined based on a combination of the different electrical input signals; an optical core configured to perform a kernel-based operation on the optical input signal to generate an optical output signal, wherein a first subset of the optical input signal corresponds to input data of the kernel-based operation, and a second subset of the optical input signal corresponds to kernel weights of the kernel-based operation; and a photoelectric output module including a photoelectric converter and configured to convert the optical output signal into an electrical output signal.

[0005] Another embodiment of the present invention provides an electronic and optical integrated circuit (EPIC) device, comprising: an electrical integrated circuit (EIC) configured to generate an electrical input signal and receive an electrical output signal; a light source configured to provide light; and an optical integrated circuit (PIC) comprising: a plurality of optical modulators, each optical modulator configured to modulate a portion of the light to generate a corresponding optical input signal, wherein one of the plurality of optical modulators includes two or more modulator segments controlled by different electrical input signals such that a corresponding optical output signal is determined based on a combination of different electrical output signals; an optical core configured to perform a kernel-based operation on the optical input signal to generate an optical output signal, wherein a first subset of the optical input signal corresponds to input data for the kernel-based operation, and a second subset of the optical input signal corresponds to kernel weights for the kernel-based operation; and a photoelectric output module including a photoelectric converter and configured to convert the optical output signal into the electrical output signal.

[0006] Another embodiment of the present invention provides a method for operating an electronic and optical integrated circuit, comprising: generating electrical signals representing digital input data and kernel weights, wherein each input data and each kernel weight is encoded in a plurality of the electrical signals; transmitting the electrical signals representing the digital input data and the kernel weights to an optical integrated circuit (PIC) via electrical interconnects; modulating light based on the electrical signals to generate an optical input signal; and performing a multiplication-accumulation (MAC) or other kernel-based operation on a first portion of the optical input signal representing the digital input data and a second portion of the optical input signal representing the kernel weights using an optical core within the optical integrated circuit (PIC) to generate an optical output signal. Attached Figure Description

[0007] The various aspects of this disclosure are best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industry practice, the various components are not drawn to scale. In fact, for clarity of discussion, the dimensions of the various components may be arbitrarily increased or decreased.

[0008] Figures 1 to 3 A schematic diagram of an electronic and optical integrated circuit (EPIC) device embodying several aspects of this disclosure is provided.

[0009] Figures 4 to 15 An electro-optic converter according to various embodiments is shown.

[0010] Figure 16 A schematic diagram of an EPIC device according to an embodiment of the present disclosure is provided.

[0011] Figure 17 A table illustrating analog-to-digital conversion (ADC) according to an embodiment is provided.

[0012] Figures 18 to 25 An optical attenuation system according to various embodiments is shown.

[0013] Figures 26 to 27 Schematic diagrams of EPIC devices configured for attenuation level feedback control according to various embodiments of the present disclosure are provided.

[0014] Figures 28 to 29 Flowcharts of convolutional neural networks employing various aspects of this disclosure are provided. Detailed Implementation

[0015] This disclosure provides numerous different embodiments or examples for implementing various features of this disclosure. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to limit this disclosure. For example, in the following description, forming a first component on or over a second component may include embodiments in which the first and second components are formed in direct contact, and may also include embodiments in which an additional component may be formed between the first and second components, such that the first and second components may not be in direct contact.

[0016] Spatial relative terms such as “below,” “under,” “lower,” “above,” and “upper” may be used herein to describe the relationship between one element or component and another (or other elements or components) as shown in the figures. In addition to the orientations shown in the figures, spatial relative terms are intended to include different orientations of the device in use or operation. The device or component may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatial relative descriptors used herein can be interpreted accordingly. The terms “first,” “second,” “third,” “fourth,” etc., are merely general identifiers and are therefore interchangeable in various embodiments. For example, while in some embodiments an element (e.g., an opening) may be referred to as a “first” element, in other embodiments the element may be referred to as a “second” element.

[0017] Deep learning using Convolutional Neural Networks (CNNs) can be efficiently performed using Electronic and Optical Integrated Circuits (EPICs). EPICs include Optical Integrated Circuits (PICs) and Electrical Integrated Circuits (EICs). The most computationally intensive part of a CNN is the Multiplication and Accumulation (MAC) operation that constitutes the convolution. A MAC operation multiplies a K-sized input data vector by a K×N matrix (kernel) to obtain an N-sized output data vector. Specifically, each of the K input data values ​​is multiplied by the N corresponding kernel weights in the matrix rows, resulting in a total of K×N multiplications. The products are then summed (accumulated) column-wise to generate the output data vector. PICs efficiently perform MAC operations by applying a cascaded photonic process to the analog optical signal that encodes the input data and kernel weights.

[0018] The EIC performs certain other operations of the CNN more efficiently. These operations may include, for example, kernel weight initialization and updates, memory management and storage, pooling operations, conditional logic, error correction, and non-linear activation functions. These operations are performed digitally on the EIC. Digital-to-analog conversion (DAC) is used when transferring data from the EIC to the PIC, and analog-to-digital conversion (ADC) is used when transferring data from the PIC to the EIC. Traditionally, DAC and ADC functions are handled by the EIC.

[0019] Field-programmable gate arrays (FPGAs) are commonly used in electrical integrated circuits (EICs) for CNN devices. FPGAs comprise configurable logic blocks, programmable interconnects, and memory elements, enabling parallel processing within a flexible structure that can be reprogrammed as needed, making them well-suited for CNN applications. However, a limitation of FPGAs is the number of ports available for input / output signals (called FPGA control signals). These control signals are used to provide kernel weights and input data to the MAC. Therefore, the number of available FPGA control signals limits the bandwidth of CNN computation. Furthermore, auxiliary functions performed by the EIC, which depend on these control signals, further reduce the amount of data available for kernel weights and input data, thus further limiting the bandwidth and overall computational power of the CNN.

[0020] One aspect of this disclosure is an EPIC device in which a DAC is executed within the PIC. Executing the DAC within the PIC frees up FPGA control signals, thereby improving the overall computing power of the system. The optical DAC can be applied to input data, kernel weights, or both. The DAC is executed by optical modulators. Each optical modulator receives multiple electrical input signals that collectively represent a digital code of the input data or kernel weights, and generates a single optical input signal as an analog representation of the same information.

[0021] In some embodiments, the electrical input signal is a binary signal with only two possible values. In other embodiments, the electrical input signal is encoded using four-level pulse amplitude modulation (PAM4), where each signal has four possible amplitudes and carries two bits of data. More generally, the electrical input signal can be a PAMx-coded signal, where x=2. n n is an integer greater than or equal to 2. Regardless of how many bits are encoded for each electrical input signal, the corresponding optical input signal is encoded with more bits.

[0022] In some embodiments, each optical modulator includes two or more modulator segments, each receiving a different electrical input signal. This allows the analog optical signal generated by the modulator to be determined by multiple electrical input signals. The optical signal can use amplitude encoding, phase encoding, or a combination of both. In some embodiments, both amplitude and phase encoding are used simultaneously. Combining amplitude and phase encoding increases the number of distinguishable signal states, provides higher fidelity, and enables the computing core to operate with higher precision.

[0023] Two or more modulator segments can be arranged in an attenuator, a Mach-Zehnder modulator (MZM), a micro-ring modulator (MRM), or a combination thereof. In some embodiments, two or more modulator segments are arranged in one arm of an MZM. In some embodiments, two or more modulator segments are arranged within a single MRM. These arrangements can provide a compact structure with phase and amplitude modulation. In some embodiments, each optical modulator includes modulator segments distributed in a combination of attenuators, MZMs, MRMs, or similar components, which can provide higher fidelity data encoding by utilizing complementary modulation mechanisms. In various embodiments, optical modulators (MZMs, MRMs, etc.) are arranged in series, parallel, or a hybrid of parallel and series configurations. Series, parallel, and hybrid configurations all have advantages in providing a specific mixture of amplitude modulation, phase modulation, or a combination of amplitude and phase modulation.

[0024] In some embodiments, each of two or more modulator segments in one of the optical modulators has a different modulation efficiency. The modulators can have different lengths proportional to their modulation efficiency. In some embodiments, the modulation efficiencies differ by a factor of two. For example, for three modulator segments, if the smallest has a modulation efficiency E1, then the other two can have modulation efficiencies of either 2 × E1 and 4 × E1. Therefore, if the smallest segment has a length L1, then the other two segments can have lengths of 2 × L1 and 4 × L1. In some embodiments, the electrical signal has PAM4 encoding, with modulation efficiencies differing by a factor of four. More generally, the electrical signal can have PAMx encoding, with the modulation efficiency scaled by a multiple of x (e.g., 8, 16, etc.). Following these relationships enables efficient data encoding where each input signal has an independent effect on the output signal.

[0025] In some embodiments, the optical modulator has an MZM structure with corresponding modulator elements on opposite arms. This arrangement helps maintain equal optical path lengths, ensuring stable modulation. In some embodiments, each pair of modulator elements is controlled by a single electrical signal. The two elements in a pair can be applied with electrical signals of opposite polarity to achieve a push-pull operation, thereby modulating the amplitude of the optical signal. Compared to single-arm operation, push-pull operation also reduces the required drive voltage, where an electrical signal is applied to one modulator element while the other is connected to ground or a reference voltage. In some embodiments, single-arm operation is used to simplify control. Single-arm operation produces a mixture of amplitude and phase modulation. In other embodiments, the two modulator elements in a pair are applied with electrical signals of the same polarity to achieve a push-push operation, which modulates the phase of the optical signal.

[0026] Another aspect of this disclosure is an EPIC device in which a portion of the ADC process is executed within the PIC. This in-PIC execution of the ADC process reduces the number of electrical reference signals required, freeing up FPGA control signals and thus increasing the system's computational power. In some embodiments, each optical output signal is split into three or more signal branches. These signal branches are attenuated to provide modified optical output signals. Each signal branch receives a different degree of attenuation, thereby generating at least three distinct modified optical output signals from each original optical output signal. The modified optical output signals are converted into electrical output signals by a photoelectric converter, the current of which is proportional to the intensity of the corresponding modified optical output signal. A transimpedance amplifier within the EIC converts the electrical output signals from current signals to voltage signals. The voltage is then compared to a reference voltage. The results of these comparisons determine the digital encoding of the original optical output signal.

[0027] An ADC divides the full range of optical power in an analog optical signal into discrete levels, corresponding to the number of different values ​​that can be represented by digital encoding. For n-bit digital encoding, the optical power is divided into 2... n A discrete level, and simultaneously 2 n -1 threshold voltage defines the boundary between adjacent levels. Determining the discrete levels to which an analog signal falls using a conventional ADC process involves using 2 n Each of the -1 threshold voltages is compared.

[0028] According to this disclosure, each optical output signal is divided into 2 n – One modified optical output signal, each attenuated to a different degree. The attenuation level can be selected so that all comparisons can be performed using a single reference voltage. This method eliminates the need for multiple reference voltages while maintaining accurate signal level determination.

[0029] The attenuation level can be selected so that each modified optical output signal is aligned with a reference voltage when the original optical signal reaches a corresponding threshold amplitude. For example, in a 2-bit conversion, the thresholds are typically set to 25%, 50%, and 75% of the maximum optical power. The attenuation is configured so that at each threshold level, one of the modified optical output signals is reduced to an intensity matching the reference voltage. The example implementation involves generating three modified optical output signals: one without attenuation, a second with a 50% reduction in signal strength, and a third with a two-thirds reduction. In this example, the reference voltage corresponds to the unattenuated signal when the original optical signal reaches 25% of the maximum optical power.

[0030] The attenuation should be monotonic, ensuring that the higher the input value after attenuation, the higher the output value. However, the attenuation does not need to be proportional to the original optical power. For example, in a 2-bit conversion, the attenuation levels of the three modified optical output signals might correspond to power reductions of 25%, 50%, and 75% of the maximum optical power. In this configuration, the reference voltage would correspond to zero optical power.

[0031] In some embodiments, attenuation is performed by a microring resonator (MRR), which may be configured as a two-port or four-port device. In some embodiments, attenuation is achieved by a Mach-Zehnder interferometer (MZI). In some embodiments, attenuation is achieved by a splitter. In some embodiments, attenuation is performed by a variable optical attenuator (VOA). The VOA may be an MRR, an MZI, a splitter, or a waveguide with an integrated modulator segment.

[0032] In some embodiments, the VOA is used to adjust the attenuation level using feedback from the EIC. A calibration signal can be sent to the optical core, and the resulting electrical output signal can be analyzed to assess whether the attenuation level is too high, too low, or within a specified range. The attenuation level can then be adjusted via a control signal sent from the EIC to the VOA. This comparison and adjustment process can occur periodically or dynamically, ensuring the accuracy of the ADC process.

[0033] In some embodiments, the PIC spatially splits the optical output signal, with each split following a different optical path. Each optical path is subjected to a different degree of attenuation and terminates at a separate photodetector. For each optical output signal, the ADC requires 2 signal splits. n -1. Using a Y-type splitter can achieve uniform distribution between two paths. Cascaded Y-type splitters can produce 2 n This creates an additional signal branch. In some embodiments, the additional signal branch is processed together with the other signal branches to provide a reference signal. In some embodiments, the reference signal is compared with the other signals, and the result is used to fine-tune the attenuation level.

[0034] Spatial segmentation of the optical output signal offers the highest processing speed, but requires at least N×(2^3) times. n –1) A photoelectric transducer and transimpedance amplifier are used to process N output signals. In some other embodiments, the PIC performs time division, where each optical output signal is divided into different time intervals. This approach reduces the number of photoelectric transducers, transimpedance amplifiers, and electrical output connections, although it may reduce computational speed. In some embodiments, the PIC employs a hybrid approach combining spatial and temporal division. For example, each optical output signal may be separated along four spatially distinct paths, with each path applying a different degree of attenuation in each of the four consecutive time intervals. This hybrid configuration balances the trade-off between the number of optical paths and computational speed, providing a scalable solution for a variety of applications.

[0035] In some embodiments, a set of electrical signals corresponding to one of the optical output signals is measured and compared with each other. The comparison result is used to adjust the attenuation level. In some embodiments, the current of the electrical output signals is measured and compared. In other embodiments, the voltage after transimpedance conversion is measured and compared. In some embodiments, one of the modified optical output signals is unattenuated, and the attenuation level of the other modified output signals is adjusted to align with the unattenuated signal. In some embodiments, the unattenuated signal is a reference signal that the ADC does not need.

[0036] Figure 1 A schematic diagram of an EPIC device 100 embodying several aspects of this disclosure is provided. The EPIC device 100 includes an EIC die 185, a PIC die 165, and a light source 101. The EIC die 185 and the PIC die 165 may be bonded together in a chip package. In some embodiments, the light source 101 is incorporated into the PIC die 165. In some embodiments, the light source 101 is part of the chip package. In other embodiments, the light source 101 is external and provides light via an optical fiber connection. The EIC die 185 includes a field-programmable gate array (FPGA) 189. The PIC die 165 includes an electro-optical converter block 109, an optical core 129, and a photoelectric output module 153.

[0037] EIC die 185 transmits electrical input signals 113 to PIC die 165 via electrical interconnects. In some embodiments, electrical input signals 113 are generated by FPGA 189. Electrical input signals 113 are a digital representation of input data and core weights, wherein multiple electrical input signals 112 jointly encode each input data and each core weight. In some embodiments, electrical input signals 113 are binary, carrying a non-zero or zero voltage. Alternatively, electrical input signals 113 may utilize non-return-to-zero (NRZ) encoding.

[0038] Light source 101 provides light 105, and electro-optic converter 109 modulates the light 105 to encode electrical input signal 113 into optical input signal 117. Optical input signal 117 is an analog signal. A first subset of optical input signal 117 is optical input data 121, and a second subset is optical kernel weights 125. Each optical input data 121 corresponds to a single input data, and each optical kernel weight 125 corresponds to a single kernel weight, resulting in optical input signal 117 being less than electrical input signal 113. In some embodiments, light source 101 is a coherent light source. Light source 101 may be a laser source, such as a laser diode, or any other suitable light source.

[0039] Optical core 129 transforms optical input data 121 using a transformation function, with optical core weights 125 used as parameters, to generate an optical output signal 133. In some embodiments, optical core 129 is configured as a convolution unit, performing multiplication and accumulation (MAC) operations using a photonic component. More generally, optical core 129 can support other linear transformations, such as matrix-vector or matrix-matrix multiplication, or other kernel-based operations, enabling efficient computation using components such as microring resonators (MRRs) and Mach-Zehnder interferometers (MZIs). Furthermore, optical core 129 can apply nonlinear transformations or utilize nonlinear optical effects (e.g., the Kerr effect). Optical switches or routers may be included to enable adaptive computation. Quantum optical elements may be included for operations involving quantum phenomena.

[0040] The photoelectric output module 153 uses a photoelectric converter 161 to convert the optical output signal 133 into an electrical output signal 169. In some embodiments, the photoelectric converter 161 is a photodiode, such as a standard photodiode or an avalanche photodiode. Standard photodiodes offer high fidelity, while avalanche photodiodes excel at detecting weak signals, making them particularly useful when the photoelectric output module 153 partially attenuates the optical output signal 133 as it operates. Alternatively, the photoelectric converter 161 can be a phototransistor, a graphene photodetector, a quantum dot photodetector, or any other suitable type of photoelectric converter.

[0041] In some embodiments, the photoelectric converter 161 operates directly on the optical output signal 133. In other embodiments, the photoelectric output module 153 includes an optical signal converter 145 that converts the optical output signal 133 into a modified optical output signal 157, which is then converted by the photoelectric converter 161.

[0042] The optical signal converter 145 includes a splitter 137 and an attenuator 149. The splitter 137 divides each optical output signal 133 into multiple signal paths 141. The attenuator 149 generates a modified optical output signal 157 by applying a different degree of attenuation to each signal path 141 corresponding to one of the original optical output signals 133. Therefore, the attenuators 149 are arranged in groups, with one set of attenuators 149 provided for each optical output signal 133. The attenuators 149 can be powered by an electrical control signal 143 generated by the EIC die 185 and transmitted to the PIC die 165 via electrical interconnects. In some embodiments, the electrical control signal 143 is used to dynamically adjust the attenuation level.

[0043] Electrical output signals 169 are transmitted via electrical interconnects to EIC die 185, where amplifier 173 amplifies them to produce amplified electrical output signals 177. In some embodiments, electrical output signals 169 are transmitted to EIC die 185 as current signals, and amplifier 173 is a transimpedance amplifier (TIA) that converts them into voltage signals. Alternatively, amplifier 173 may be a voltage amplifier, current amplifier, etc., or any other suitable type of amplifier.

[0044] Decoder 181 compares each amplified electrical output signal 177 with one or more reference voltages and uses the comparison results to generate a digital code for optical output signal 133. In some embodiments, photoelectric output module 153 generates a modified optical output signal 157 that allows each amplified electrical output signal 177 to be compared with a single reference voltage, requiring only one comparison per signal. This approach accelerates analog-to-digital conversion by offloading most of the processing to the PIC die 165.

[0045] Figure 2 A schematic diagram of an EPIC device 200 according to another embodiment is provided. The EPIC device 200 is similar to... Figure 1 The EPIC device 100, except that it includes an optical signal converter 145A. The optical signal converter 145A can omit the splitter 137 used to spatially divide the optical output signal 133 (see...). Figure 1 Instead, the optical signal converter 145A uses an electrical control signal 143 to achieve time-division multiplexing, applying varying degrees of attenuation to the modified optical output signal 157 over consecutive time intervals. While this approach may be slower than spatially dividing the optical output signal 133 for parallel processing, it reduces the number of attenuators 149, photoelectric converters 161, and amplifiers 173 required.

[0046] Figure 3 A schematic diagram of an EPIC device 300 according to another embodiment is provided. The EPIC device 300 is similar to... Figure 1The EPIC device 100 includes a PAMx encoder 301. The PAMx encoder 301 can be a PAM4 encoder, PAM8 encoder, PAM16 encoder, or other suitable PAMx decoder. The PAMx encoder 301 generates a PAMx-encoded electrical signal 113A based on a binary electrical input signal 113. The PAMx-encoded electrical signal 113A is a digital representation of the input data and kernel weights, where multiple PAMx-encoded electrical signals 113A collectively encode each input data and each kernel weight. The electro-optic converter 109 converts the PAMx-encoded electrical signal 113A into an analog optical input signal 117, resulting in an optical input signal 117 that is less than the PAMx-encoded electrical signal 113A. The PAMx encoding of the binary electrical input signal 113 can be considered the first step in the digital-to-analog conversion, which is performed by the electro-optic converter 109.

[0047] The electro-optic converter 109 can be of any type that includes voltage-controlled modulator segments. Examples include Mach-Zehnder modulators (MZM), micro-ring modulators (MRM), etc. Each electro-optic converter 109 includes at least as many modulator segments as the number of binary electrical input signals 113 or PAMx-coded electrical signals 113A used to co-encode each input data and each core weight.

[0048] Figure 4 A plan view of an electro-optic converter 109A according to a first embodiment is shown. The electro-optic converter 109A has a Mach-Zehnder modulator (MZM) structure, including a splitter 401, a first arm 405, a second arm 415, and a combiner 409. The first arm 405 and the second arm 415 are waveguides. A first modulator segment 403 and a second modulator segment 407 are spaced apart along the first arm 405. The first modulator segment 403 and the second modulator segment 407 are independently controlled by voltages V1 and V2, respectively. The first and second voltages V1 and V2 can be provided by a binary electrical input signal 113 or a PAMx-encoded electrical signal 113A.

[0049] The first modulator segment 403 and the second modulator segment 407 have different modulation efficiencies. In some embodiments, voltages V1 and V2 are binary coded signals, and the modulation efficiency of the second modulator segment 407 is twice that of the first modulator segment 403. In other embodiments, voltages V1 and V2 are PAMx coded signals, and the modulation efficiency of the second modulator segment 407 is x times that of the first modulator segment 403. These relationships are designed to efficiently encode transmitted digital information by modulating voltages V1 and V2 into optical signals. For many types of modulators, the lengths of the first modulator segment 403 and the second modulator segment 407 are proportional to their modulation efficiencies.

[0050] The first arm 405 and the second arm 415, as well as other waveguides described in this disclosure, may include ribbed waveguides, strip waveguides, or any other suitable waveguide geometry. Waveguides can have any suitable material composition to meet specific optical and system requirements. In some embodiments, the waveguide is semiconductor-based, such as a silicon waveguide, which is compatible with CMOS processes and capable of confining light at the submicron level. In other embodiments, the waveguide may be composed of indium phosphide (InP) or the like to support nonlinear optical effects and efficient interaction with active photonic elements. Furthermore, the waveguide may be silicon nitride (SiN) or the like, which provides low propagation loss and precise phase control over a wide wavelength range. Different waveguide types and compositions can be used throughout the system to optimize performance for various tasks, such as modulation, signal routing, and core-based switching.

[0051] The first modulator segment 403 and the second modulator segment 407 can be carrier depletion modulators, thermo-optic modulators, electro-absorption modulators, plasmon modulators, Kerr effect modulators, or any other type of modulator that can be applied to the waveguide segment to selectively change the transmission characteristics according to the voltage. In some embodiments, modulator segments 403 and 407 are phase modulation types, such as carrier depletion modulators, plasmon modulators, or Kerr effect modulators. In particular, modulator segments 403 and 407 can be carrier depletion modulators, etc. Carrier depletion modulators are high-speed, energy-efficient, and CMOS process compatible. Carrier depletion modulators are typically formed by doping portions of a semiconductor waveguide to form pn or pin junctions.

[0052] In some embodiments, the first mirror modulator segment 413 and the second mirror modulator segment 417 are spaced apart along the second arm 415. The first mirror modulator segment 413 may have the same structure as the first modulator segment 403, and the second mirror modulator segment 417 may have the same structure as the second modulator segment 407. Including these mirror modulator segments in the second arm 415 helps ensure that the optical path lengths in the first arm 405 and the second arm 415 are equal.

[0053] The first mirror modulator segment 413 is controlled by voltage V1', and the second mirror modulator segment 417 is controlled by voltage V2'. In some embodiments, V1' is associated with V1, and V2' is associated with V2. In some embodiments, voltages V1' and V2' are the same as V1 and V2, but with opposite polarities. Alternatively, V1' and V2' can be the same as V1 and V2, and with the same polarity. In other embodiments, V1' and V2' can be ground voltage or a reference voltage.

[0054] Figure 5 A plan view of the electro-optic converter 109B according to the second embodiment is shown. The electro-optic converter 109B is similar to... Figure 4The electro-optic converter 109A has third and fourth modulator segments 503 and 507 in the first arm 405 and second and fourth mirror modulator segments 513 and 517 in the second arm 415. The additional modulator segments allow the electro-optic converter 109B to encode a greater number of digital electronic data bits into analog optical signals.

[0055] The third and fourth modulator sections 503 and 507 are controlled by voltages V3 and V4, respectively. The third and fourth mirror modulator sections 513 and 517 are controlled by voltages V3' and V4', which can be associated with V3 and V4, respectively. The modulation efficiency ratios between the fourth modulator section 507 and the third modulator section 503, between the third modulator section 503 and the second modulator section 407, and between the second modulator section 407 and the first modulator section 403 can all be equal.

[0056] Figure 6 A plan view of an electro-optic converter 109C according to a third embodiment is shown. The electro-optic converter 109C has a... Figure 5 The electro-optic converter 109B uses the same modulator segments with the same voltage control, but the modulator segments are arranged in a hybrid series-parallel configuration. Specifically, the first arm 405 includes a splitter 601 that separates the optical paths between the first sub-arm 602 and the second sub-arm 603. The first sub-arm 602 contains a first modulator segment 403 and a fourth modulator segment 507, while the second sub-arm 603 contains a second modulator segment 407 and a third modulator segment 503. A combiner 609 then connects the first sub-arm 602 and the second arm 603, causing their optical signals to interfere with each other. The second arm 415 has a mirror arrangement of the first arm's configuration. Compared to purely series or purely parallel arrangements, the hybrid series-parallel configuration provides a more efficient combination of amplitude and phase encoding.

[0057] Figure 7 A plan view of an electro-optic converter 109D according to a fourth embodiment is shown. The electro-optic converter 109D is a micro-ring modulator (MRM) that integrates first and second modulator segments 403 and 407 within a ring waveguide 701. The ring waveguide 701 is optically coupled to a bus waveguide 703. Voltages V1 and V2 applied to the first modulator segment 403 and the second modulator segment 407 control the phase shift of light as it enters and exits the bus waveguide 703.

[0058] Figure 8 A plan view of the electro-optic converter 109E according to the fifth embodiment is shown. The electro-optic converter 109E is similar to... Figure 7 The electro-optic converter 109D, in addition to the first and second modulator segments 403 and 407, also includes third and fourth modulator segments 503 and 507 to increase the number of bits of information that can be encoded into the optical signal.

[0059] Figure 9 A plan view of an electro-optic converter 109F according to a sixth embodiment is shown. The electro-optic converter 109F includes a first microring resonator 901 optically coupled to a first arm 405 of a Mach-Zehnder interferometer (MZI) structure 903. The first microring resonator 901 incorporates a first modulator segment 403 and a second modulator segment 407. A second microring resonator 905 is coupled to a second arm 415 of the MZI in a mirror arrangement, which includes first and second mirror modulator segments 413 and 417. This configuration utilizes the combined characteristics of the microring resonator and the MZI structure to achieve optical modulation with precise phase and amplitude control. In an alternative embodiment, the second microring resonator 905 incorporates modulator segments of different lengths and independent control signals from the first and second modulator segments 403 and 407, thereby enabling the encoding of additional bits.

[0060] Figure 10 A plan view of the electro-optic converter 109G according to the seventh embodiment is shown. The electro-optic converter 109G is similar to... Figure 9 The electro-optic converter 109F shown includes a third microring resonator 1001 arranged in series with the first microring resonator 901 along the first arm 405. The third microring resonator 1001 incorporates third and fourth modulator segments 503 and 507. A fourth microring resonator 1005 incorporates third and fourth mirror modulator segments 513 and 517, positioned in a mirror arrangement along the second arm 415. The additional third microring resonator 1001 enables encoding of additional bits. The additional fourth microring resonator 1005 can maintain equal optical path lengths, enabling push-pull operation, or provide further encoding capabilities.

[0061] Figure 11 A plan view of the electro-optic converter 109H according to the eighth embodiment is shown. The electro-optic converter 109H has a... Figure 10 The electro-optic converter 109G shown uses the same components, but the first and third microring resonators 901 and 1001 are arranged in parallel on opposite arms of the secondary MZI structure 1101 within the first arm 405. Similarly, the second and fourth microring resonators 905 and 1005 are arranged in parallel on opposite arms of the secondary MZI structure 1111 within the second arm 415. This arrangement provides a more efficient distribution between amplitude and phase encoding compared to alternative configurations using the same components.

[0062] Figure 12A plan view of an electro-optic converter 109I according to a ninth embodiment is shown. The electro-optic converter 109I includes modulator segments 1203, 1205, 1207, and 1209 along waveguide 1201. Modulator segments 1203, 1205, 1207, and 1209 are voltage-controlled attenuators. In some embodiments, these voltage-controlled attenuators provide an amplitude drop independent of the amplitude of the input signal. Examples of such attenuators may include carrier depletion attenuators, electroabsorption attenuators, thermo-optical attenuators, plasma attenuators, etc. In some embodiments, the voltage-controlled attenuator is a carrier depletion attenuator. Carrier depletion attenuators are characterized by high speed, energy efficiency, and compatibility with CMOS processes.

[0063] A carrier depletion attenuator can be viewed as a carrier depletion modulator with specific design characteristics. A carrier depletion modulator can be designed such that carrier depletion caused by an applied voltage alters the refractive index of the waveguide, thereby producing a phase shift with minimal optical absorption. With increasing doping concentration, the carrier depletion modulator can be designed to introduce significant absorption, achieving a fixed attenuation level independent of the input signal strength, while minimizing phase impact. An intermediate design balancing phase modulation and absorption is also possible.

[0064] Modulator segments 1203, 1205, 1207, and 1209 provide different amounts of attenuation. In some embodiments, modulator segments 1203, 1205, 1207, and 1209 have different lengths. The length may be proportional to the amount of attenuation. In some embodiments, the attenuation differs by a factor of two. For example, if modulator segment 1209 reduces the maximum signal strength by 50%, modulator segments 1203, 1205, and 1207 may reduce it by 6.25%, 12.5%, and 25%, respectively. In some embodiments, the electrical signal is encoded using PAM4, with attenuation levels differing by a factor of four. More generally, the electrical signal can be encoded using PAMx, where the attenuation is scaled by a factor of x, where x is a positive integer power of 2 (e.g., 8, 16, etc.). Designing modulator segments according to these relationships enables efficient data encoding.

[0065] Figure 13 A plan view of the electro-optic converter 109J according to the tenth embodiment is shown. The electro-optic converter 109J is similar to... Figure 12 The electro-optic converter 109I shown includes an additional modulator segment 1301, for example, providing a total of eight modulator segments. The additional modulator segment 1301 increases the number of bits of information that can be encoded into an optical signal.

[0066] Figure 14 A plan view of the electro-optic converter 109K according to the eleventh embodiment is shown. The electro-optic converter 109K converts a voltage-controlled attenuator (such as...) Figure 12 (as shown) and MZM structure (as shown) Figure 4(As shown) Specifically, the electro-optic converter 109K includes modulator segments 1203 and 1205 as voltage-controlled attenuators, first and second modulator segments 403 and 407 in the first arm 405 of the MZI structure 1401, and first and second mirror modulator segments 413 and 417 in the second arm 415 of the MZI structure 1401. Applying attenuation alone limits the number of distinguishable bits in the optical signal. Combined structures such as the electro-optic converter 109K mix phase and amplitude encoding to increase the number of distinguishable bits of information in the optical signal.

[0067] Figure 15 A plan view of the electro-optic converter 109L according to the twelfth embodiment is shown. The electro-optic converter 109L converts a voltage-controlled attenuator (such as...) Figure 12 (as shown) and microring resonator structure (such as Figure 9 (As shown) Specifically, the electro-optic converter 109L includes modulator segments 1203 and 1205 as voltage-controlled attenuators, first and second modulator segments 403 and 407 located within a micro-ring resonator 901, and first and second mirror modulator segments 413 and 417 located within the micro-ring resonator 905. Micro-ring resonators 901 and 905 are coupled to the first arm 405 and the second arm 415 of the MZI structure 1401, respectively. The electro-optic converter 109L illustrates another method of combining phase and amplitude encoding to increase the number of bits of information that can be encoded into and distinguished within an optical signal.

[0068] Figure 16 A schematic diagram 1600 according to an embodiment of the present disclosure is provided, with a focus on Figure 1 The illustrated portion of the EPIC device 100 processes the optical output signal 133 from the optical core 129. This example demonstrates the processing of a single optical output signal 133. If there are N optical output signals 133, the illustrated structure is repeated N times to achieve parallel processing of all signals.

[0069] Splitter 137 splits the optical output signal 133 into two. n There are 141 signal branches 141, where n represents the number of digital bits converted from the optical output signal 33. Only 2ⁿ – 1 signal branches 141 are needed to provide the digital signal. The remaining signal branches 141 can be discarded or used as a reference for error checking, fine-tuning, or other purposes.

[0070] Attenuators 1601, 1603, and 1605 in attenuator 149 generate a modified optical output signal 157. The modified optical output signal 157 is converted into an electrical output signal 169, amplified, and then compared with a reference voltage Vref by comparators 1611, 1613, and 1615 in decoder 181. Decoder 181 uses... Figure 17The truth table 1700 shown is analyzed to determine the corresponding numerical values.

[0071] As shown in truth table 1700, comparator 1615 determines whether the optical output signal 133 exceeds 25% of the maximum signal power by comparing the amplified electrical signal converted from the modified optical output signal 157 generated by attenuator 1605 with Vref. Similarly, comparators 1613 and 1611 determine whether the optical output signal 133 exceeds 50% and 75% of the maximum power, respectively, based on comparisons of the signals derived from attenuators 1603 and 1601 with Vref. To ensure that all comparators 1611, 1613, and 1615 using the same reference level Vref operate correctly, attenuators 1605, 1603, and 1601 are designed to generate modified optical output signals 157 with the same amplitude when providing optical output signals 133 at 25%, 50%, and 75% of the maximum power, respectively.

[0072] In some embodiments, one of the attenuators, such as attenuator 1605 in this example, does not provide attenuation, allowing it to directly distinguish the optical output signal 133 within a minimum range (e.g., 0 to 25%) from the signal in the next range (e.g., less than 50%). This setting establishes a 25% reference voltage level for all modified optical output signals 157 at their respective thresholds. For attenuator 1603, with a threshold of 50%, applying 50% attenuation maps this threshold-level signal to a 25% reference voltage level. For attenuator 1601, with a threshold of 75%, applying a 1 / 3 power reduction similarly maps the higher threshold signal to a 25% reference voltage level. This layered attenuation method enables the use of a single reference voltage to distinguish multiple signal levels, ensuring accurate and simplified digital conversion.

[0073] In some embodiments, all attenuators 1605, 1603, and 1601 provide a non-zero attenuation level. For example, attenuator 1605 can apply a 10% power reduction while adjusting the reference voltage level down to 22.5%, such that the output of attenuator 1605 is higher or lower than the reference voltage level depending on whether the optical output signal 133 exceeds 25% of the maximum power. Similarly, attenuators 1603 and 1601 can be adjusted to provide 55% and 70% power reduction, respectively. This approach allows for flexible adjustment of the attenuation level, which can be used to compensate for variations in maximum power that may be caused by uncontrolled factors.

[0074] In the example above, the attenuator reduces the input signal power based on a percentage. However, fixed-level attenuators (those that apply a constant attenuation independent of the input strength) can also be used. In some embodiments, attenuators 1601, 1603, and 1605 provide such a fixed attenuation level, and the reference voltage level is zero. In this configuration, attenuators 1601, 1603, and 1605 apply a fixed power reduction to signal branch 141, which is designed to be 25%, 50%, and 75% of the maximum branched signal power, respectively. Making the reference voltage level zero allows for a simpler structure for decoder 181.

[0075] Alternatively, attenuators that provide power reduction that is neither a fixed absolute value nor a fixed percentage of the input signal power can be used. The only requirement for attenuators 1601, 1603, and 1605 is that they map input signals above their respective reference power levels to above the threshold, input signals at their reference power levels to the threshold, and input signals below their reference power levels to below the threshold. While the provided examples illustrate analog-to-digital conversion at 2-bit resolution, this approach can be easily extended to support 3-bit or higher digital conversion.

[0076] So far, the examples have assumed that the value represented by the optical output signal 133 is proportional to its amplitude. While this is generally the case, the system disclosed here adapts to any monotonic relationship between amplitude and value, including nonlinear relationships. This flexibility in amplitude-to-value mapping increases the design options for the optical core 129. By configuring attenuators 1601, 1603, and 1605, nonlinear signals can be interpreted and converted into corresponding digital values ​​to map amplitudes representing 0.75, 0.50, and 0.25 to reference levels, respectively.

[0077] Figure 18 and Figure 19 Planar views 1800 and 1900 are provided to illustrate two methods for implementing attenuator 149. In planar view 1800, attenuator 149 consists of attenuators 1801 that inherently provide different attenuation levels. These attenuators can be or include, for example, microring resonators (MRRs), Mach-Zehnder interferometers (MZIs), beam splitters, fixed optical attenuators containing absorbing or scattering materials, and combinations thereof. In planar view 1900, attenuator 149 includes attenuators 1901 powered by an electrical control signal 143. These voltage-controlled attenuators can be or include, for example, microring modulators (MRMs), Mach-Zehnder modulators (MZMs), carrier depletion attenuators, electro-absorption attenuators, thermo-optical attenuators, plasma attenuators, and combinations thereof.

[0078] Figure 20A plan view 2000 shows an embodiment of attenuator 1801A implemented as a microring resonator (MRR) 2001. Each MRR 2001 is coupled to a corresponding bus waveguide 2003 and is designed to... Figure 1 The light 105 produced by the light source 101 shown resonates at or near the frequency. In order to achieve different attenuation levels between attenuators 1801A, the resonant frequency of MRR 2001 or their distance from the bus waveguide 2003 (affecting the coupling coefficient) can be varied.

[0079] Figure 21 A plan view 2100 of another embodiment is shown, in which attenuator 1801B is implemented as MRR 2001. This configuration is similar to... Figure 20 Unlike the planar diagram 2000 shown, it provides the output signal in a four-port mode via the second bus waveguide 2103, instead of in a two-port mode via the bus waveguide 2003. The four-port mode provides more precise control over the attenuation level and introduces an additional parameter for changing the attenuation level: the coupling coefficient between the MRR 2001 and the second bus waveguide 2103.

[0080] Figure 22 and Figure 23 Plan views 2200 and 2300 are shown, illustrating other embodiments. These additional embodiments are the same as those in plan views 2000 and 2100 (…). Figure 20 and Figure 21 The embodiment shown in the diagram corresponds to the one described above, but with the addition of a modulator segment 2201. The modulator segment 2201 is powered by a voltage V. C1 To V C4 Control, such as Figure 19 As shown in the figures. These figures illustrate the structure for processing one of the optical output signals 133, but typically there are multiple optical output signals 133 and the corresponding structure for each optical output signal. Voltage V C1 To V C4 (See Figure 19 This can be uniformly applied to all these structures. In some embodiments, attenuators 1901A or 1901B have structural uniformity, such that variations between attenuation levels are determined solely by modulator segment 2201 and its control. In other embodiments, structural variations, such as differences in resonant frequency and coupling coefficient, alter the attenuation level, which modulator segment 2201 controls via a control voltage V. C1 To V C4 Fine-tuning is provided. In some embodiments, the change in attenuation level caused by modulator segment 2201 corresponds to the control voltage V. C1 To V C4 The variation in attenuation level is determined at least in part based on the difference in modulation efficiency between modulator segments 2201. In other embodiments, the variation in attenuation level is determined at least in part based on the difference in modulation efficiency between modulator segments 2201.

[0081] Figure 24 A plan view 2400 shows another embodiment of attenuator 149. In this embodiment, attenuator 1801C is implemented as a Mach-Zehnder interferometer (MZI), wherein the attenuation level of each attenuator is determined by the difference in optical path length between the arms. Variations in the optical path length difference achieve different attenuation levels, allowing each attenuator 1801C to apply a predetermined degree of amplitude reduction.

[0082] Figure 25 A plan view 2500 of one embodiment of attenuator 149 is shown. In this embodiment, attenuator 1901C is implemented as a Mach-Zehnder modulator (MZM). These attenuators are similar to... Figure 24 The attenuator 1801C includes a modulator segment 2501 that can be used to change, adjust, or fine-tune the attenuation level. The attenuator 1901C may also include a mirror modulator segment 2503, which helps maintain equal optical path lengths and enables push-pull operation, among other benefits. Differences in attenuation levels can be achieved through any suitable combination of arm length differences, control voltages, and modulation efficiency.

[0083] Figure 26 A schematic diagram 2600 is provided, which corresponds to Figure 1 In one embodiment, the EPIC device 100 measures an electrical output signal 169 corresponding to one of the optical output signals 133 and controls it via a control signal V. C1 To V C4 Used to adjust the attenuation level. Control signal V C1 To V C4 It can be applied to all optical output signals 133, but only one optical output signal needs to be measured.

[0084] Adjustments can be made to ensure that the attenuation levels are consistent. For example, attenuator 1607 may not require power reduction, while attenuators 1605, 1603, and 1601 may provide power reductions of 10%, 55%, and 70%, respectively. Adjust the control signal V. C2 This makes the electrical output signal 169B 90% of the electrical output signal 169. Similarly, adjusting the control signal V... C3 This makes the electrical output signal 169C 45% of the electrical output signal 16.9A, and adjusts the control signal V. C4 This makes the electrical input signal 169D 30% of the electrical output information 169A.

[0085] In another example, the relative intensities of the electrical output signals 169A to 169D were expected to be 100, 75, 50, and 25. However, the measured results showed relative intensities of 96, 76, 49, and 26. Adjusting the control signal V... C2 To VC4 This ensures that the relative intensity is consistent with values ​​of 96, 72, 48, and 24. Many attenuation strategies are feasible, as are many fine-tuning strategies. Adjustments can be made with or without a reference signal corresponding to the electrical output signal 169A. Adjustments can be made with or without calibration data provided to the optical core. Adjustments can be made by comparing the electrical output signals 169A to 169D with each other, or by comparing the electrical input signals 169A to 169D with one or more reference values.

[0086] Figure 27 Schematic diagram 2700 is provided, which is similar to Figure 26 The schematic diagram 2600 is used, but this is an embodiment for measuring the electrical output signal 169 after transimpedance conversion. Voltage signals may be easier to measure and compare than current signals.

[0087] Figure 28 Flowcharts of a method 2800 including an optical DAC according to some embodiments of this disclosure are provided. While method 2800 is shown and described below as a series of steps or events, it should be understood that the order in which these steps or events are shown should not be construed as limiting. For example, some steps may occur in a different order and / or concurrently with other steps or events shown and / or described herein. Furthermore, not all steps shown require implementation of one or more aspects or embodiments described herein. Additionally, one or more steps described herein may be performed in one or more separate steps and / or stages.

[0088] Method 2800 begins with step 2801, generating a digital electrical signal representing the input data and kernel weights. The digital electrical signal can use binary encoding, PAMx encoding, or any other suitable encoding scheme. For the purposes of this disclosure, the digital encoding can be any encoding scheme, where each value is encoded by multiple distinct signals that must be interpreted together to decode the value.

[0089] Step 2803 applies digital electrical signals to modulators within the PIC. This step includes transferring digital electrical signals from the EIC to the PIC. Each digital electrical signal is coupled to at least one different modulator, allowing the corresponding modulator to be controlled by the corresponding electrical signal. Each electrical signal may be applied to multiple modulators, but each digital electrical signal must have at least one different modulator.

[0090] Step 2805 uses a modulator to encode the digital electrical signals into analog optical signals. The modulator is configured and arranged such that all digital electrical signals corresponding to a single input data or kernel weight are co-encoded into a single analog optical signal, where each digital signal exerts an independent and distinct effect on the optical signal. This configuration ensures that the analog optical signal accurately represents the complete data for each input data or kernel weight. The optical signal can use amplitude encoding, phase encoding, a combination thereof, or any other suitable encoding scheme. The optical signal is analog because each signal represents a continuous range of values ​​and can be decoded independently of any other optical signal. Figure 4 to Figure 15 An illustrative example of a modulator arrangement that can achieve this digital-to-analog conversion is provided.

[0091] Step 2807 optically performs a kernel-based operation, where a first portion of the analog optical signal represents the input data and a second portion of the analog optical signal represents the kernel weights, to generate an optical output signal. The kernel-based operation can be a multiply-accumulate (MAC) operation or some other transformation that combines or processes the input data and kernel weights.

[0092] Step 2809 converts the analog optical output signal into a digital electrical signal. This ADC can be implemented using one or more stages or methods described in this disclosure or by any other suitable technique.

[0093] Figure 29 A flowchart of method 2900 according to some embodiments of the present disclosure is provided, the method comprising converting analog optical signals into digital electrical signals. While method 2900 is shown and described below as a series of steps or events, it should be understood that the order of these steps or events shown should not be construed as limiting. For example, some steps may occur in a different order and / or simultaneously with other actions or events other than those shown and / or described herein. Furthermore, not all steps shown require implementation of one or more aspects or embodiments described herein. Additionally, one or more steps described herein may be performed in one or more separate steps and / or stages.

[0094] Method 2900 begins with step 2801, generating a digital electrical signal representing the input data and kernel weights. This may be related to... Figure 28 The same method as in method 2800.

[0095] Step 2901 converts the digital electrical signal into an analog optical signal. This can be achieved through... Figure 28 The steps 2803 and 2805 in method 2800 or by any other suitable method may be used.

[0096] Step 2805 uses a modulator to encode the digital electrical signal into an analog optical signal. This may be related to... Figure 28The same method as in method 2800.

[0097] Step 2903 divides each analog optical signal into multiple signal paths, which can be achieved through spatial, temporal, or hybrid segmentation techniques. Figure 16 An illustrative example of spatial partitioning is provided.

[0098] Step 2905 applies different levels of attenuation to each signal branch. The same set of attenuation levels is applied to each group of signal branches corresponding to the optical output signal. One of the signal branches may not be attenuated. The attenuated signal branch is called the modified optical output signal. Figure 18 to Figure 25 Examples of optical circuits for implementing these attenuation levels are provided. In some examples, the attenuation levels are electronically controlled and can be fine-tuned using feedback control mechanisms. Furthermore, in some of these configurations, electronic control allows for the use of time-signal segmentation instead of spatial segmentation.

[0099] Step 2907 converts the optical output signal into an electrical output signal. This may include using a photoelectric converter to convert the modified optical output signal into a current signal, and using a transimpedance amplifier to convert these current signals into voltage signals.

[0100] Step 2909 compares the voltage signal with one or more reference voltages and uses the results of these comparisons to determine the digital code. In some embodiments, the attenuation level specified in step 2905 is configured so that all comparisons can be performed using only a single reference voltage.

[0101] Some aspects of this disclosure relate to a chip package including a package substrate, an optical engine, and an optical fiber mounting unit. The optical engine includes an optical integrated circuit die and an electrical integrated circuit die mounted to and electrically coupled to the package substrate. The optical integrated circuit die includes an edge coupler. The optical fiber mounting unit is a structure mounted side-by-side to the package substrate with the optical engine and has a first cavity for aligning the optical fiber with the edge coupler.

[0102] Some aspects of this disclosure relate to an optical integrated circuit (PIC) device comprising an optical modulator, an optical core, and an optoelectronic output module. Each optical modulator is configured to convert an electrical input signal to generate an optical input signal. At least one optical modulator includes two or more modulator segments controlled by different electrical input signals, such that a corresponding optical input signal is determined based on a combination of the electrical input signals. The optical core is configured to perform a kernel-based operation on the optical input signal to generate an optical output signal. The optoelectronic output module includes a photoelectric converter and is configured to convert the optical output signal into an electrical output signal. In some embodiments, the optoelectronic output module is configured to provide three or more electrical output signals from one of the optical output signals.

[0103] In some embodiments, the modulator segments have different modulation efficiencies. In some embodiments, one modulator segment has at least twice the modulation efficiency of the other. In some embodiments, one modulator segment has at least four times the modulation efficiency of the other. In some embodiments, there are at least three modulator segments, each with a different modulation efficiency. In some embodiments, the modulator segments have different lengths. In some embodiments, the length of one modulator segment is an integer power of twice the length of the second modulator segment. In some of these embodiments, the length of the third modulator segment is an integer power of twice the length of the second modulator segment.

[0104] In some embodiments, two modulator segments are positioned along one arm of a Mach-Zehnder modulator. In some embodiments, two additional modulator segments are positioned along the other arm. In some embodiments, two modulator segments are positioned along a ring waveguide. In some embodiments, the two modulator segments are attenuators. In some embodiments, the two modulator segments include a pn or pin junction in the waveguide.

[0105] Some aspects of this disclosure relate to an electro-optical integrated circuit (EPIC) device, comprising an electrical integrated circuit (EIC) die, an optical integrated circuit (PIC) die, and a light source. The EIC die is configured to generate an electrical input signal and receive an electrical output signal. The PIC chip includes an optical modulator, an optical core, and a photoelectric output module. Each optical modulator is configured to convert the electrical input signal by modulating light from the light source to generate an optical input signal. At least one optical modulator includes two or more modulator segments controlled by different electrical input signals, such that a corresponding optical input signal is determined based on a combination of the electrical input signals. The optical core is configured to perform a kernel-based operation on the optical input signal to generate an optical output signal. The photoelectric output module includes a photoelectric converter and is configured to convert the optical output signal into an electrical output signal. In some embodiments, the EIC die includes a PAMx encoder that provides one of the electrical input signals. In some embodiments, the EIC die includes a field-programmable gate array that provides the electrical input signal.

[0106] Some aspects of this disclosure relate to a method that includes generating electrical signals representing digital input data and kernel weights, and transmitting the electrical input signals to a PIC. Each input data and each kernel weight is encoded by a plurality of electrical signals. The method also includes modulating light based on the electrical signals to generate an optical input signal, and performing a kernel-based operation on a first portion of the optical input signal representing the input data using an optical core, and using a second portion of the optical input signal representing the kernel weights to generate an optical output signal. In some embodiments, modulating light based on electrical signals includes applying each electrical signal to a different modulator segment. In some embodiments, the electrical signals representing the digital input data or kernel weights have PAMx encoding.

[0107] Some aspects of this disclosure relate to an electronic and optical integrated circuit (EPIC) device, comprising an electrical integrated circuit (EIC) die, an optical integrated circuit (OIC) die, and a light source. The EIC die is configured to generate an electrical input signal and receive an electrical output signal. The PIC chip includes an optical modulator, an optical core, and a photoelectric output module. The optical modulator is configured to generate an optical input signal from an optical portion based on the electrical input signal. The optical core is configured to perform a kernel-based operation on the optical input signal to generate an optical output signal. The photoelectric output module includes a photoelectric converter and is configured to convert a single optical output signal into at least three different electrical output signals. In some embodiments, one of the optical modulators is configured to convert multiple electrical input signals into a single optical input signal.

[0108] In some embodiments, the photoelectric output module includes an attenuator configured to attenuate a portion of a single optical output signal to produce a modified optical output signal that is transmitted to one of the photoelectric converters. In some embodiments, the attenuator includes a microring resonator (MRR). In some embodiments, the attenuator includes a Mach-Zehnder interferometer (MZI).

[0109] In some embodiments, the electrical integrated circuit die further includes a plurality of comparators, each corresponding to one of three different electrical output signals and configured to use a common reference voltage. In some embodiments, the optoelectronic output module is configured to derive at least three modified optical output signals from a single optical output signal, each of the three modified optical output signals having a different attenuation level and corresponding to a corresponding one of the three different electrical output signals. In some embodiments, the optoelectronic output module is configured to route or distribute the single optical output signal among at least three different optical paths, each optical path terminating at a different optoelectronic converter, wherein each optoelectronic converter is configured to convert a received optical signal into one of a different electrical output signal.

[0110] Some aspects of this disclosure relate to an electro-optical integrated circuit (EPIC) device, comprising an electrical integrated circuit (EIC) die, an optical integrated circuit (OIC) die, and a light source. The EIC die is configured to generate an electrical input signal and receive an electrical output signal. The PIC chip includes an optical modulator, an optical chip, and a beam splitter. The optical modulator is configured to generate an optical input signal from an optical portion based on the electrical input signal. The beam splitter is configured to divide an optical output signal into at least three different optical paths, each optical path terminating at a different photoelectric converter, wherein each photoelectric converter is configured to convert the received optical signal into a different electrical output signal.

[0111] In some embodiments, the EIC die further includes a plurality of transimpedance amplifiers, each corresponding to an electrical output signal, and each configured to apply the same degree of amplification. In some embodiments, each different optical path is configured to apply a different degree of attenuation to a corresponding portion of the optical output signal, thereby generating a corresponding modified optical output signal, which is provided to a corresponding photoelectric converter. In some embodiments, the different degrees of attenuation are configured such that a second modified optical output signal has 50% of the amplitude of a first modified optical output signal, and a third modified optical fiber output signal has one-third of the amplitude of the first modified optical output signal.

[0112] In some embodiments, the variable optical attenuator is positioned along each different optical path, wherein the variable optical attenuator is electronically controlled to provide a variable degree of attenuation. In some embodiments, the control system is configured to adjust the electrical control voltage applied to the variable optical attenuator based on an electrical output signal.

[0113] Some aspects of this disclosure relate to a method comprising generating an electrical signal representing digital input data and kernel weights, and transmitting the electrical input signal to a PIC. The method further comprises modulating light based on the electrical signal to generate an optical input signal, and performing a kernel-based operation on a first portion of the optical input signal representing the input data using an optical core, and using a second portion of the optical input signal representing the kernel weights to generate an optical output signal. The optical output signal is split into multiple optical signal paths. Different degrees of attenuation are applied to each separate optical signal to generate a transformed optical signal. The transformed optical signal is processed to generate a corresponding electrical output signal. The electrical output signal is compared with one or more references to generate digital data.

[0114] In some embodiments, performing the comparison includes comparing each electrical output signal to a single reference voltage. In some embodiments, the method further includes using the comparison between the electrical output signals to adjust different levels of attenuation. In some embodiments, dividing an optical output signal into multiple optical signal paths includes generating the optical signal paths over consecutive time intervals. In some embodiments, dividing one of the optical output signals into multiple optical signal paths includes dividing the optical signal among multiple corresponding optical paths. In some embodiments, different levels of attenuation are achieved by applying different amounts of splitting.

[0115] The foregoing has outlined features of several embodiments to enable those skilled in the art to better understand aspects of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as the basis for designing or modifying other processes and structures to achieve the same purposes and / or advantages as the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that they can be modified, substituted, and altered in various ways without departing from the spirit and scope of this disclosure.

Claims

1. A semiconductor device, comprising: An electrical integrated circuit is configured to generate electrical input signals and receive electrical output signals. as well as Optical integrated circuit, including multiple modulators, optical cores and photoelectric output modules, The plurality of modulators are configured to process light from the light source to generate an optical input signal based on an electrical input signal; The optical kernel is configured to perform a kernel-based operation on the optical input signal to generate an optical output signal, wherein a first subset of the optical input signal corresponds to the input data of the kernel-based operation, and a second subset of the optical input signal corresponds to the kernel weights of the kernel-based operation; and The photoelectric output module includes a photoelectric transducer, wherein the photoelectric output module is configured to provide at least three different electrical output signals from a single optical output signal.

2. The semiconductor device according to claim 1, wherein, The photoelectric output module includes an attenuator configured to attenuate a portion of the single optical output signal to produce a modified optical output signal transmitted to the photoelectric transducer.

3. The semiconductor device according to claim 1, wherein, The electrical integrated circuit also includes a plurality of comparators, each corresponding to one of the three different electrical output signals, and configured to use a common reference voltage.

4. The semiconductor device according to claim 1, wherein, The photoelectric output module is configured to derive at least three modified optical output signals from the single optical output signal, each of the three modified optical output signals having a different attenuation level and corresponding to a specific one of the three different electrical output signals.

5. The semiconductor device according to claim 1, wherein, The photoelectric output module is configured to route or distribute the single optical output signal among at least three different optical paths, each optical path terminating at a different photoelectric transducer, wherein each photoelectric transducer is configured to convert the received optical signal into one of different electrical output signals.

6. A semiconductor device, comprising: An electrical integrated circuit is configured to generate electrical input signals and receive electrical output signals. as well as Optical integrated circuits include optical cores and splitters. The optical core is configured to generate an optical output signal by performing a core-based operation on an optical input signal, wherein the optical input signal is determined by the electrical input signal; and The splitter is configured to divide one of the optical output signals into at least three different optical paths, each optical path terminating at a different photoelectric transducer, wherein each photoelectric transducer is configured to generate a different electrical output signal.

7. The semiconductor device according to claim 6, wherein, Each of the different optical paths is configured to apply a different degree of attenuation to a corresponding portion of one of the optical output signals, thereby producing a corresponding modified optical output signal provided to the respective photoelectric transducer.

8. The semiconductor device according to claim 7, wherein, The different levels of attenuation are configured such that: The second modified optical output signal has 50% of the amplitude of the first modified optical output signal; as well as The third modified optical output signal has one-third the size of the first modified optical output signal.

9. The semiconductor device of claim 6, further comprising a variable optical attenuator positioned along each of the different optical paths, wherein, The variable optical attenuator is electronically controlled to provide a variable degree of attenuation.

10. A method of operating a semiconductor device, comprising: Generate electrical input signals representing the input data and kernel weights; The electrical input signal is transmitted to the optical integrated circuit via electrical interconnection; The light is modulated based on the electrical input signal, thereby generating an optical input signal; Using the optical core within the optical integrated circuit, a multiplication-accumulation or other kernel-based operation is performed on a first portion of the optical input signal representing the input data and a second portion of the optical input signal representing the kernel weight, thereby generating an optical output signal; One of the optical output signals is split into multiple optical signal paths; Different degrees of attenuation are applied to each separate optical signal to generate the converted optical signal; The converted optical signal is processed to generate a corresponding electrical output signal; as well as The comparison of the electrical output signals is performed to generate digital data.