Information processing method and apparatus

Abstract

The application provides an information processing method and device, which are suitable for the field of communication. The method comprises the following steps: an encoding device segments information bits to obtain C first segments, at least two of the C first segments having different lengths; C code blocks to be encoded are polar encoded to obtain C encoded code blocks, the C code blocks to be encoded being obtained based on the C first segments; the C encoded code blocks are concatenated to obtain and output a concatenated code word, the concatenated code word being obtained by exclusive-OR of the C encoded code blocks. After a decoding device receives a sequence to be decoded, the sequence to be decoded is decoded to obtain a decoded bit sequence. The information bits are non-uniformly segmented, and the concatenated code word is obtained by exclusive-OR of the C encoded code blocks, so that the sequence to be decoded can be decoded as a long code during decoding, long code gain is obtained, and the performance of the polar code is improved.

Description

Technical Field

[0001] This application relates to the field of communications, and particularly to information processing methods and apparatus in the field of communications. Background Technology

[0002] In polar code encoding, when the number of payload bits is large, the encoding device can divide the payload bits into even segments. For example, when the number of payload bits is greater than or equal to 10¹³, or when the number of payload bits is greater than or equal to 360 and the total number of encoded bits is greater than or equal to 10⁸⁸, the encoding device can divide the payload bits into even segments, such as dividing them into two equal segments.

[0003] After segmenting the payload bits, the encoding device can perform polar coding on each code block (CB) with added cyclic redundancy check (CRC) bits, and directly concatenate the encoded code blocks to output the concatenated codeword. However, under the above processing method, polar codes have poor performance. Summary of the Invention

[0004] This application provides an information processing method and apparatus in order to improve the performance of polar codes.

[0005] Firstly, this application provides an information processing method that can be executed by an encoding device. This encoding device can be, for example, a communication device such as a terminal or wireless access network device; or it can be a component configured in the communication device to implement the encoding function, such as a chip or chip system; or it can be a logic module or software capable of implementing all or part of the functions of the communication device. This application does not limit the scope of the application in this regard.

[0006] For example, the method includes: segmenting information bits to obtain C first segments, wherein at least two of the C first segments have different lengths, and C is an integer greater than or equal to 2; performing polar coding on the C code blocks to be encoded to obtain C coded code blocks, wherein the C code blocks to be encoded are obtained based on the aforementioned C first segments; and concatenating the aforementioned C coded code blocks to obtain and output the concatenated codeword, wherein the concatenated codeword is obtained based on the XOR of the aforementioned C coded code blocks.

[0007] The length / size of the C coded blocks can be the same, or the encoding device can divide the total coded bits into C segments, which makes it easier for the encoding device to perform an XOR operation on the C coded blocks.

[0008] The concatenated codewords are obtained by XORing the above C coded blocks. It can be understood that when performing the XOR operation, the operation of decoding these C coded blocks is taken into account. However, the result of the XOR operation does not necessarily include all coded blocks.

[0009] In the above scheme, the information bits are segmented non-uniformly, meaning that at least two of the C first segments have different lengths. This makes the number of information bits contained in each segment more consistent with the bit channel capacity after channel polarization. For example, through non-uniform segmentation, some segments contain fewer information bits and have lower corresponding bit channel capacities, while other segments contain more information bits and have higher corresponding bit channel capacities. In this way, the number of information bits contained in each segment is more consistent with the bit channel capacity after polarization.

[0010] Optionally, the aforementioned information bits include payload bits, or the aforementioned information bits include payload bits and CRC bits.

[0011] The aforementioned CRC bits could refer, for example, to the CRC bits of the transmission block (TB).

[0012] One possibility is that the aforementioned information bits include the payload bits, or in other words, the aforementioned information bits do not include CRC bits; another possibility is that the aforementioned information bits include both the payload bits and CRC bits. Adding TB CRC bits is beneficial for improving error detection capability and also for enhancing error correction performance.

[0013] Optionally, at least two of the above C first segments have different lengths, including:

[0014] When C=2, the two first segments have different lengths. That is, the encoding device can divide the information bits into two first segments of different lengths.

[0015] When C=3, the lengths of the three first segments are different, or, two of the three first segments are the same length, but the lengths of each of the two first segments are different from the length of the third first segment. In other words, the encoding device can divide the information bits into three first segments, such as A1, A2, and A3. One implementation is that the lengths of A1, A2, and A3 are all different; another implementation is that the lengths of A1 and A2 are the same, but the lengths of A1 / A2 and A3 are different.

[0016] When C=4, two of the four first segments have the same length, but the lengths of the other two first segments are different. That is, the encoding device can divide the information bits into four first segments, such as A1, A2, A3 and A4. One implementation is that A1 and A2 have the same length, A3 and A4 have the same length, but A1 and A3 have different lengths.

[0017] It should be noted that A1, A2, A3 or A4 above are only for distinguishing the different first segments, and do not restrict the order of the different first segments.

[0018] Optionally, the aforementioned C code blocks to be encoded are obtained by adding CRC bits to at least one of the aforementioned C first segments. One possible implementation is that the aforementioned C code blocks to be encoded are obtained by adding CRC bits to each of the aforementioned C first segments. The CRC added to the first segment can, for example, refer to CB CRC bits. Adding CRC bits to each of the aforementioned C first segments improves error detection capability and also enhances error correction performance.

[0019] The aforementioned C code blocks to be encoded are obtained by adding CRC bits to at least one of the aforementioned C first segments. Alternatively, the aforementioned C code blocks to be encoded are obtained by adding CRC bits to one of the aforementioned C first segments. The CRC added to the first segment could, for example, refer to CB CRC bits.

[0020] Adding a CRC bit to one of the C first segments helps reduce signaling overhead. Furthermore, for the decoding device, the C first segments correspond to the C second segments. In one possible implementation, the decoding device can perform CRC checks on the C second segments based on the CRC bit. That is, the C first segments share a single CRC bit segment. This reduces signaling overhead while also ensuring error detection and correction performance.

[0021] It should be noted that in this application, the above-mentioned C first segments share a CRC bit. This can be understood as follows: for the encoding device, a CRC bit is added to one of the C first segments; for the decoding device, the C first segments correspond to C second segments. The decoding device can perform CRC verification on each of the C second segments based on the above-mentioned CRC bit.

[0022] It should be understood that the above implementation is merely an example and should not constitute any limitation on this application. For example, if a CRC bit is added to one of the C first segments, the decoding device may only perform CRC verification on the second segment including the CRC bit, or in other words, the decoding device may not perform CRC verification on the second segment that does not include the CRC bit.

[0023] In conjunction with the first aspect, in some possible implementations of the first aspect, where the aforementioned C code blocks to be encoded are obtained by adding CRC bits to each of the aforementioned C first segments, the number of CRC bits added to each of the aforementioned C first segments is determined according to the length of the first segment.

[0024] For example, when the length of the first segment is less than or equal to 11, the number of CRC bits added to the first segment is 0; when the length of the first segment is greater than or equal to 12 and less than or equal to 19, the number of CRC bits added to the first segment is 6; when the length of the first segment is greater than or equal to 20 and less than or equal to 256, the number of CRC bits added to the first segment is 11; when the length of the first segment is greater than or equal to 256, the number of CRC bits added to the first segment is 24, and so on. The above examples are for illustration only and should not constitute any limitation on this application. That is to say, the longer the first segment, the more CRC bits can be added. It can be understood that the longer the length of the first segment, the more information bits it contains, and the greater the probability of errors. Adding more CRC bits is beneficial to improving the error detection capability, the decoding accuracy, and the error correction capability.

[0025] In conjunction with the first aspect, in some possible implementations of the first aspect, the aforementioned C code blocks to be encoded are obtained by adding CRC bits to one of the aforementioned C first segments, including: the aforementioned C code blocks to be encoded are obtained by adding CRC bits to the longest of the aforementioned C first segments.

[0026] It is understandable that the longer the first segment is, the more information bits it contains, and the greater the probability of errors. Adding CRC bits to the longest first segment can help improve error detection capabilities, decoding accuracy, and error correction capabilities.

[0027] Optionally, the concatenated codeword is obtained by XORing the above C encoded code blocks, including:

[0028] When C=2, the concatenated codeword is or, C1 and C2 are the coded code blocks. This indicates the XOR operation.

[0029] When C=3 and the rate matching method is punched, the concatenated codeword is Or, [C1, C2, When C=3 and the rate matching mode is shortened, the concatenated codeword is or, C1, C2, and C3 are coded code blocks. That is, when C=3, the concatenated codewords are related to the rate matching method.

[0030] When C=4, the concatenated codeword is or, C1, C2, C3, and C4 are coded code blocks.

[0031] Optionally, the concatenated codeword can be obtained based on the generator matrix, or it can be obtained by XORing each of the C coded code blocks bit by bit. For example, if the concatenated codeword is obtained based on the generator matrix, when C=2, the generator matrix is... At that time, the codeword after cascading is When the generating matrix is At that time, the codeword after cascading is The generator matrix described above is merely an example. The encoding device can also perform row and / or column transformations on the generator matrix to obtain the concatenated codewords based on the transformed matrix. This application does not limit this. In addition, when C=3 and C=4, the corresponding generator matrix can be obtained by performing a Kronecker product based on the generator matrix when C=2. The generator matrices when C=3 and C=4 will not be described in detail here.

[0032] In conjunction with the first aspect, in some possible implementations of the first aspect, the value of C is determined based on the number of information bits mentioned above, or the value of C is determined based on the number of information bits mentioned above and the total number of encoded bits. Determining how many segments to divide the information bits based on the number of information bits is beneficial for obtaining better error correction performance.

[0033] In one possible implementation, if the number of information bits is greater than or equal to m*k, then C = k+1, where m is predefined / configured; or, if the number of information bits is greater than or equal to a*k, and the total number of encoded bits is greater than or equal to b*k, then C = k+1, where a and b are predefined / configured.

[0034] For example, a = 360, b = 1088. By specifying the number of segments C, we can obtain performance curves for different information bit counts at different code rates (which correspond to different total encoded bits). By comparing the performance curves corresponding to different segment counts C, we can determine the optimal performance range for the information bit count and the total encoded bits, and how many segments are best. For example, when a is greater than or equal to 360 and b is greater than or equal to 1088, the error correction performance (e.g., block error rate (BLER)) is better with two segments. Therefore, we can set the information bit count threshold to 360 and the total encoded bit count threshold to 1088. For more segments, we can multiply the existing thresholds by the corresponding factors to obtain the thresholds for even more segments.

[0035] In conjunction with the first aspect, in some possible implementations of the first aspect, the proportion of the aforementioned C first segments is determined based on the bit rate.

[0036] Secondly, this application provides an information processing method, which can be executed by a decoding device. The decoding device can be, for example, a communication device, such as a terminal device, a wireless access network device, etc., or it can be a component configured in the communication device to implement the encoding function, such as a chip, a chip system, etc., or it can be a logic module or software that can implement all or part of the functions of the communication device. This application does not limit the scope of the application.

[0037] For example, the method includes: inputting a sequence to be decoded; decoding the sequence to be decoded to obtain a decoded bit sequence, the decoded bit sequence including C second segments, each of the C second segments including a first segment, the C first segments being obtained by segmenting information bits, and at least two of the C first segments having different lengths.

[0038] Each of the aforementioned C second segments includes a portion of information bits. It should be understood that these information bits can be correct information bits and / or erroneous information bits, and this application does not limit this.

[0039] In the above scheme, the decoding device can decode the sequence to be decoded as a long code when performing decoding, without having to divide it into short codes for decoding, which is beneficial to obtain long code gain and improve the performance of polar codes.

[0040] Optionally, the aforementioned information bits include payload bits, or the aforementioned information bits include payload bits and CRC bits.

[0041] In conjunction with the second aspect, in some possible implementations of the second aspect, when C=2, the lengths of the two first segments are different.

[0042] In conjunction with the second aspect, in some possible implementations of the second aspect, when C=3, the lengths of the first segments in the three first segments are different, or, two of the three first segments have the same length, but the lengths of each of the two first segments and the other first segment are different.

[0043] In conjunction with the second aspect, in some possible implementations of the second aspect, when C=4, two of the four first segments have the same length, but different lengths from the other two first segments.

[0044] In conjunction with the second aspect, in some possible implementations of the second aspect, at least one of the C second segments includes CRC bits; and the method further includes performing CRC verification on at least one of the C second segments.

[0045] In conjunction with the second aspect, in some possible implementations of the second aspect, at least one of the C second segments includes a CRC bit, including: each of the aforementioned C second segments includes a CRC bit; or, one of the aforementioned C second segments includes a CRC bit.

[0046] In conjunction with the second aspect, in some possible implementations of the second aspect, where each of the aforementioned C second segments includes CRC bits, the number of CRC bits included in each of the aforementioned C second segments is determined based on the length of the first segment corresponding to the second segment.

[0047] In conjunction with the second aspect, in some possible implementations of the second aspect, one of the aforementioned C second segments includes CRC bits, including: the second segment with the largest number of information bits among the aforementioned C second segments includes CRC bits.

[0048] In conjunction with the second aspect, in some possible implementations of the second aspect, the value of C is determined based on the number of information bits, or the value of C is determined based on the number of information bits and the total number of encoded bits.

[0049] In conjunction with the second aspect, in some possible implementations of the second aspect, if the number of information bits is greater than or equal to m*k, then C = k+1, where m is predefined / configured; or, if the number of information bits is greater than or equal to a*k, and the total number of encoded bits is greater than or equal to b*k, then C = k+1, where a and b are predefined / configured.

[0050] In conjunction with the second aspect, in some possible implementations of the second aspect, the proportion of the aforementioned C first segments is determined based on the bit rate.

[0051] It should be understood that the second aspect of this application corresponds to the technical solution of the first aspect of this application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, and will not be repeated here.

[0052] Thirdly, this application provides an information processing apparatus that enables the methods described in the first and second aspects and any possible implementations of the first and second aspects to be implemented. The apparatus includes corresponding units for performing the described methods. The units included in the apparatus can be implemented in software and / or hardware.

[0053] Fourthly, this application provides an information processing apparatus including a processor. The processor can be used to execute a computer program stored in memory, causing the methods described in the first to second aspects and any possible implementations of the first to second aspects to be implemented.

[0054] Optionally, the device further includes a communication interface, to which the processor is coupled. The communication interface is used to receive signals from other communication devices outside the device and transmit them to the processor, or to send signals from the processor to other communication devices outside the device. Exemplarily, the communication interface may be a transceiver, circuit, bus, module, or other type of communication interface.

[0055] Optionally, the device also includes a memory, to which the processor is coupled. The memory is used to store program instructions and data.

[0056] Fifthly, this application provides a computer-readable storage medium storing a computer program (also referred to as code or instructions) that, when executed by a computer, causes the methods described in the first to second aspects and any possible implementations of the first to second aspects to be executed.

[0057] Sixthly, this application provides a computer program product comprising: a computer program (also referred to as code or instructions) that, when executed, causes the methods described in the first to second aspects and any possible implementations of the first to second aspects to be performed.

[0058] In a seventh aspect, this application provides a chip system including at least one processor for supporting the implementation of the functions involved in the first to second aspects and any possible implementation of the first to second aspects, such as receiving or processing data involved in the above methods.

[0059] In one possible design, the chip system also includes a memory for storing program instructions and data, which may be located within or outside the processor.

[0060] The chip system can consist of chips or include chips and other discrete components.

[0061] It should be understood that the third to seventh aspects of this application correspond to the technical solutions of the first and second aspects of this application, and the beneficial effects achieved by each aspect and the corresponding feasible implementation are similar, and will not be repeated here. Attached Figure Description

[0062] Figure 1 This is a schematic diagram of the architecture of a communication system applicable to the methods provided in the embodiments of this application;

[0063] Figure 2 This is another schematic diagram of the communication system applicable to the methods provided in the embodiments of this application;

[0064] Figure 3 This is a schematic diagram of the fence diagram of the polarization coding process;

[0065] Figure 4 This is a schematic flowchart of the information processing method provided in the embodiments of this application;

[0066] Figure 5 and Figure 6 This is a schematic diagram comparing the performance of non-uniform segmentation and uniform segmentation at different bit rates, provided in the embodiments of this application.

[0067] Figure 7 This is a performance comparison diagram of coding based on the method provided in this application and coding based on existing methods, provided in an embodiment of this application.

[0068] Figure 8 This is a schematic block diagram of the information processing apparatus provided in the embodiments of this application;

[0069] Figure 9 This is another schematic block diagram of the information processing apparatus provided in the embodiments of this application. Detailed Implementation

[0070] To facilitate understanding of the technical solution provided in this application, the following points are made first:

[0071] First, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with essentially the same function and effect. For example, the first segment and the second segment are only used to distinguish between the segments on the encoding device side and the segments on the decoding device side, and do not limit their order. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0072] Second, in the embodiments of this application, "at least one" refers to one or more, and "more than one" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone, where A and B can be singular or plural. The character " / " generally indicates an "or" relationship between the preceding and following related objects, but it does not exclude the possibility of indicating an "and" relationship. The specific meaning can be understood in conjunction with the context. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c; a and b; a and c; b and c; or a and b and c. Here, a, b, and c can be single or multiple.

[0073] Third, in the embodiments of this application, "when," "if," and "if" all refer to the device making corresponding processing under certain objective circumstances, and are not limited to a time, nor do they require the device to make a judgment action when it is implemented, nor do they mean that there are other limitations.

[0074] Fourth, in the embodiments of this application, "B corresponding to A" means that B is associated with A. "B is determined according to A" or "B is determined according to A" does not mean that B is determined only according to A, but also according to A and / or other information.

[0075] Fifth, the term "storage" in this application can refer to storage in one or more memories. These memories can be separate installations or integrated into an encoder, decoder, processor, or communication device. Alternatively, some memories can be separately installed, while others are integrated into the decoder, processor, or communication device. The type of memory can be any form of storage medium, and this application does not limit this.

[0076] Sixth, in the embodiments of this application, the encoding device can also be understood as an information transmitting device, which encodes the information before transmitting it. The encoding device can be a wireless access network device or a terminal. Similarly, the decoding device can be understood as an information receiving device, which decodes the information after receiving it. The decoding device can be a wireless access network device or a terminal. This application does not limit this.

[0077] Seventh, the technical solutions provided in this application can be applied to various communication systems, such as: Long Term Evolution (LTE) systems, LTE Frequency Division Duplex (FDD) systems, LTE Time Division Duplex (TDD) systems, sidelink (SL) communication systems, Worldwide Interoperability for Microwave Access (WiMAX) communication systems, 5th Generation (5G) mobile communication systems or new radio access technology (NR), satellite communication systems, or future communication systems, etc.

[0078] The following will combine Figure 1 and Figure 2 The architecture of a communication system applicable to the information processing method provided in this application is described. It is understood that the system architecture described in the embodiments of this application is for the purpose of more clearly illustrating the technical solutions of the embodiments of this application and does not constitute a limitation on the technical solutions provided in the embodiments of this application.

[0079] Figure 1 This is a schematic diagram of the architecture of a communication system applicable to the methods provided in the embodiments of this application. For example... Figure 1 As shown, the communication system 10 includes a radio access network (RAN) 100 and a core network (CN) 200. Optionally, the communication system 10 may also include an Internet 300. The RAN 100 may include at least one access network device (such as...). Figure 1 110a and 110b, collectively referred to as 110, may also include at least one terminal (such as...). Figure 1Terminal 120 (120a-120j, collectively referred to as 120) connects to access network device 110 wirelessly. Access network device 110 connects to core network 200 wirelessly or via wired connection. The core network device in core network 200 and access network device 110 in RAN 100 can be different physical devices, or they can be the same physical device integrating core network logical functions and radio access network logical functions.

[0080] RAN 100 can be a cellular system related to the 3rd Generation Partnership Project (3GPP), such as 4G, 5G mobile communication systems, or future communication systems. RAN 100 can also be an open access network (open RAN, O-RAN, or ORAN). RAN 100 can also be a cloud radioaccess network (CRAN), etc. RAN 100 can also be a communication system that integrates two or more of the above systems.

[0081] In the aforementioned communication system, access network device 110 assists terminal devices in achieving wireless access. Multiple access network devices 110 in this communication system can be nodes of the same type or different types. In some scenarios, the roles of access network device 110 and terminal 120 are relative, for example... Figure 1 Network element 120i can be a helicopter or a drone, and it can be configured as a mobile base station. For terminals 120j that access RAN 100 through network element 120i, network element 120i is a base station; however, for base station 110a, network element 120i is a terminal. Access network device 110 and terminal 120 are sometimes referred to as communication devices (or communication equipment), for example... Figure 1 Network elements 110a and 110b can be understood as communication devices with base station functions, while network elements 120a-120j can be understood as communication devices with terminal functions.

[0082] In one possible scenario, access network equipment can be a base station, an evolved NodeB (eNodeB), a transmitting and receiving point (TRP), a transmitting point (TP), a next-generation NodeB (gNB), a base station in a future mobile communication system, a satellite, or an access point (AP) in a wireless fidelity (Wi-Fi) system, an integrated access and backhaul (IAB) node, or access network equipment in a mobile switching center non-terrestrial network (NTN) communication system; that is, it can be deployed on high-altitude platforms or satellites. Access network equipment can also be a macro base station (such as...). Figure 1 110a), micro base stations or indoor stations (such as Figure 1 Access network equipment can be 110b), relay nodes or donor nodes, or wireless controllers in CRAN scenarios. It can also function as a base station in device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, drone communication, or machine-to-machine (M2M) communication. Optionally, access network equipment can also be servers, wearable devices, vehicles, or in-vehicle equipment. For example, in vehicle-to-everything (V2X) technology, the access network equipment can be a roadside unit (RSU).

[0083] In another possible scenario, multiple access network devices collaborate to assist terminals in achieving wireless access, with each device performing a portion of the base station's functions. For example, access network devices can be central units (CUs), distributed units (DUs), CU-control plane (CPs), CU-user plane (UPs), or radio units (RUs). CUs and DUs can be separate entities or included in the same network element, such as a baseband unit (BBU). RUs can be included in radio equipment or radio units, such as remote radio units (RRUs), active antenna units (AAUs), or remote radio heads (RRHs). It is understood that access network devices can be CU nodes, DU nodes, or devices comprising both CU and DU nodes. Furthermore, CUs can be classified as access network devices within the RAN (RAN) or the CN (CN), without limitation.

[0084] In this embodiment, the form of the access network device is not limited. The device used to implement the function of the access network device can be the access network device itself; it can also be a device that supports the access network device in implementing the function, such as a chip system. The device can be installed in the access network device or used in conjunction with the access network device.

[0085] In this application, the terminal may also be referred to as terminal equipment, user equipment (UE), mobile station (MS), mobile terminal (MT), etc., or a device used to provide voice or data connectivity to users, or an Internet of Things (IoT) device. For example, terminal equipment includes handheld devices with wireless connectivity, vehicle-mounted devices, etc. Currently, terminal devices can include, for example: mobile phones, tablets, laptops, PDAs, mobile internet devices (MIDs), wearable devices (such as smartwatches, smart bracelets, pedometers, smart glasses, etc.), in-vehicle devices (such as cars, bicycles, electric vehicles, airplanes, ships, trains, high-speed trains, etc.), satellite terminals, virtual reality (VR) devices, augmented reality (AR) devices, smart point-of-sale (POS) machines, customer-premises equipment (CPE), light user equipment (UE), reduced capability user equipment (REDCAP UE), wireless terminals in industrial control, smart home devices (such as refrigerators, televisions, air conditioners, electricity meters, etc.), smart robots, robotic arms, workshop equipment, wireless terminals in autonomous driving, wireless terminals in smart healthcare, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, or wireless terminals in smart homes, and flying equipment (such as smart robots, hot air balloons, drones, airplanes), etc. The terminal can also be a vehicle device, such as a complete vehicle device, vehicle module, vehicle chip, on-board unit (OBU), or telematics box (T-BOX), etc. The terminal device can also be other devices with terminal functions; for example, it can be a device that performs terminal functions in D2D communication. In the embodiments of this application, the functions of the base station can also be executed by modules (such as chips) within the base station, or by a control subsystem containing base station functions. This control subsystem containing base station functions can be a control center in the aforementioned application scenarios such as smart grids, industrial control, intelligent transportation, and smart cities. Similarly, the functions of the terminal can also be executed by modules (such as chips or modems) within the terminal, or by a device containing terminal functions.

[0086] It should be understood that Figure 1 This is just an illustration; the communication system may also include other devices, such as wireless repeaters and wireless backhaul devices. Figure 1 It is not shown in the middle.

[0087] Figure 2 This is another schematic diagram of the architecture of a communication system applicable to the methods provided in the embodiments of this application. Figure 2 The communication system shown can be regarded as Figure 1 The simplification.

[0088] like Figure 2 As shown, the communication system may include at least one access network device, such as Figure 2 The base station 210 shown; the communication system may also include at least one terminal, for example Figure 2 Terminals 220 and 230 are shown. Base station 210 can communicate with terminals 220 and 230 via a wireless link. In one possible scenario, base station 210 can act as a transmitter, and terminals 220 and 230 can act as receivers, with base station 210 sending signals to terminals 220 and 230; in another possible scenario, base station 210 can act as a receiver, and terminals 220 and 230 can act as transmitters, with terminals 220 and 230 sending signals to base station 210.

[0089] Figure 2 An access network device and two terminals are illustrated exemplarily, but this should not be construed as limiting the scope of this application. Optionally, the communication system may include a greater number of access network devices and a greater or lesser number of terminals. Furthermore, the aforementioned communication system may also include other network entities such as a network controller and a mobility management entity; the embodiments of this application are not limited thereto.

[0090] During communication device interaction, information may undergo necessary processing, such as encoding and modulation, before being sent from the sender to the receiver. The destination end, upon receiving information from the source end, can also perform corresponding processing, such as decoding and demodulation, to interpret the valid information from the source end. The method provided in this application mainly involves channel coding and channel decoding. Furthermore, the channel coding in this application primarily involves polar coding.

[0091] To facilitate understanding of the embodiments provided in this application, some related terms of polar codes will be explained in detail below.

[0092] 1. Polar Codes: Polar codes are a type of forward error-correcting code used for signal transmission. The core of polar code construction is to make each sub-channel exhibit different reliability through channel polarization processing on the coding side. As the code length continues to increase, the capacity of some channels tends to 1, while the capacity of other channels tends to 0. Directly transmitting information on channels with a capacity tending to 1 to approximate the channel capacity is the only method that can be rigorously proven to reach the Shannon limit.

[0093] The encoding process of polar codes is as follows: in, It is a binary row vector with a length of N (i.e., the length of the mother code); G N It is the generator matrix (or encoding matrix, etc.), G N It is an N×N matrix, and For example, n = log2(N); Defined as the Kronecker product of n matrices F2.

[0094] During the polar code encoding process, A portion of the bits are used to carry information, called information bits. Information bits may include payload bits (or payload bits) and CRC bits. Payload bits can be understood as the bits that actually carry user information / data. Another portion of the bits are set to fixed values ​​agreed upon by the sending and receiving ends, called fixed bits (or frozen bits).

[0095] The following will combine Figure 3 The encoding process of polar codes is described in detail.

[0096] Figure 3 This is a schematic diagram of the fence diagram of the polarization coding process.

[0097] like Figure 3 As shown, the encoding device performs polar coding on (u1, u2, u3, u4) to obtain coded bits (x1, x2, x3, x4), where the generator matrix is... The fence graph corresponding to the generator matrix has 3 layers: the 0th layer is the physical channel layer, the 2nd layer is the polarization channel layer, and the remaining layers (such as the 1st layer) are intermediate polarization layers.

[0098] A more general rule is that when the length of the polar code mother code is N, the corresponding fence... Figure 1 There are a total of (log2N+1) layers, with layer 0 being the physical channel layer, layer log2N being the polarization channel layer, and the remaining layers being intermediate polarization layers. It should be understood that the above division of polarization layers is merely an example and should not constitute any limitation on the embodiments of this application.

[0099] The construction process of polar codes can be understood as the selection process of information bits. In this process, the encoding device needs to determine which positions are used to transmit information bits and which positions are used to transmit frozen bits based on a reliability sequence. This reliability sequence is obtained by sorting all sub-channels according to their reliability. For example, the encoding device can select positions with higher reliability from the reliability sequence as information bit positions, such as selecting the top K positions with the highest reliability, where K is the number of information bits. The remaining positions are used as frozen bit positions.

[0100] 2. Rate matching: When the mother code length and the carrying capacity of the physical channel do not match, rate matching is required.

[0101] For example, when the length of the master code exceeds the carrying capacity of the physical channel, the input sequence can be punctured or shortened; conversely, when the length of the master code does not meet the carrying capacity of the physical channel, the input sequence can be retransmitted. Rate matching refers to the puncturing, shortening, or retransmission of bits on the transmission channel to match the carrying capacity of the physical channel.

[0102] It is understandable that if the encoding device performs rate matching, the decoding device needs to de-rate match and restore the received decoded sequence to the mother code length. In this application, the mother code length of the polar code is an integer power of 2. When the target code length (which may refer to the carrying capacity of the physical channel) is not an integer power of 2, for example, it can be determined according to... Calculate the corresponding mother code length, where N is the mother code length of the polar code and E is the target code length. This indicates rounding up to the nearest integer.

[0103] Because of their excellent error correction performance and low complexity, polar codes have been chosen as the coding scheme for control channels in 5G. It is understood that the maximum codeword length that a channel encoder / decoder can support is limited. Therefore, when the length of a sequence exceeds the maximum codeword length supported by the encoder, it needs to be segmented and polar-coded separately, with the length of each segment not exceeding the maximum codeword length supported by the encoder.

[0104] For example, taking UCI as an example, when the segmentation conditions are met, the encoding device can uniformly segment the payload bits of UCI. For instance, when the number of payload bits of UCI is greater than or equal to 1013, or when the number of payload bits of UCI is greater than or equal to 360 and the total number of encoded bits is greater than or equal to 1088, the encoding device can uniformly segment the payload bits of UCI, such as dividing them into two equal segments.

[0105] For example, if the number of payload bits A = 1024 and the total number of encoded bits E = 2048, the encoding device can evenly divide the payload bits into two segments, each containing 512 payload bits. After adding CRC bits (11 CRC bits), it encodes two polar codes. Each polar code has 512 + 11 information bits (including CRC) and 1024 encoded bits. The encoding device directly concatenates these two codes (e.g., the concatenated codeword is [C1, C2], where C1 and C2 represent the two encoded code blocks) and outputs them. For the decoding device, it needs to decode two short codes of length 1024, resulting in poor performance of polar codes.

[0106] To improve the performance of polar codes, this application provides an information processing method in which an encoding device performs non-uniform segmentation on information bits to obtain C first segments, and then obtains C code blocks to be encoded based on these C first segments. The C code blocks to be encoded are then encoded to obtain C encoded code blocks. The concatenated codeword is obtained by XORing the C encoded code blocks. By XORing and concatenating the encoded code blocks together, the decoding device can decode the sequence to be decoded as a long code during decoding, thereby obtaining long code gain and improving the performance of polar codes.

[0107] The information processing method provided in the embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be understood that the embodiments shown below describe the method from the perspective of the interaction between the encoding and decoding devices, but should not constitute any limitation on the subject executing the method. The method provided in the embodiments of this application can be executed as long as a program containing the code of the method provided in the embodiments of this application is run. For example, the encoding device can also be replaced by a component (e.g., a chip, chip system, etc.) configured in the encoding device, or other functional modules capable of calling and executing programs; similarly, the decoding device can be replaced by a component (e.g., a chip, chip system, etc.) configured in the decoding device, or other functional modules capable of calling and executing programs. The embodiments of this application do not limit this.

[0108] Figure 4 This is a schematic flowchart of the information processing method 400 provided in an embodiment of this application. The various steps in method 400 are described in detail below.

[0109] In step 410, the information bits are segmented to obtain C first segments, at least two of the C first segments having different lengths.

[0110] Where C is an integer greater than or equal to 2.

[0111] The aforementioned information bits include payload bits, or, the aforementioned information bits include payload bits and CRC bits. The CRC bit may, for example, refer to TB CRC. That is, one possible implementation is that the aforementioned information bits include payload bits, or in other words, the aforementioned information bits do not contain CRC bits. Another possible implementation is that the aforementioned information bits include payload bits and CRC bits; that is, the encoding device can add TB CEC bits to the payload bits, which is beneficial for improving error detection and correction capabilities.

[0112] The fact that at least two of the above C first segments have different lengths can also be understood as meaning that not all of the above C first segments have the same length, or that the above C first segments are non-uniform segments.

[0113] For example, when C=2, the two first segments have different lengths. That is, the encoding device can divide the information bits into two first segments of different lengths. For example, the ratio of the two first segments can be any of the following: 1:15, 1:6, 1:4, 1:3, 2:5, 1:2, 2:3, or 4:5, etc., which will not be listed here.

[0114] For example, when C=3, the lengths of the three first segments are different, or two of the three first segments are the same length, but the lengths of each of the two first segments and the third first segment are different. That is, the encoding device can divide information bits into three first segments, such as A1, A2, and A3. One implementation is that the lengths of A1, A2, and A3 are all different; another implementation is that the lengths of A1 and A2 are the same, but the lengths of A1 / A2 and A3 are different. For example, the ratio of the three first segments could be any of the following: 5:9:82, 19:32:141, 38:65:185, 45:159:180, 74:196:210, 119:224:233, or 178:245:249.

[0115] For example, when C=4, two of the four first segments have the same length, but their lengths differ from the other two. That is, the encoding device can divide the information bits into four first segments, such as A1, A2, A3, and A4. One implementation is that A1 and A2 have the same length, A3 and A4 have the same length, but A1 and A3 have different lengths. For instance, the ratios of the four first segments could be 1:15:15:225, 1:6:6:36, 1:4:4:16, 1:3:3:9, or 1:2:2:4, etc., and will not be listed here.

[0116] It should be noted that A1, A2, A3 or A4 above are only for distinguishing the different first segments, and do not restrict the order of the different first segments.

[0117] Furthermore, the values ​​of C mentioned above are merely examples and should not constitute any limitation on this application. For example, the encoding device may also divide the information bits into a greater number of segments.

[0118] By non-uniformly segmenting information bits, the number of information bits contained in each segment can be made more consistent with the bit channel capacity after channel polarization. For example, through non-uniform segmentation, some segments contain fewer information bits and have lower corresponding bit channel capacities, while other segments contain more information bits and have higher corresponding bit channel capacities. In this way, the number of information bits contained in each segment is more consistent with the bit channel capacity after polarization.

[0119] In one possible implementation, the value of C is determined based on the number of information bits, or the value of C is determined based on the number of information bits and the total number of encoded bits.

[0120] The total number of coded bits can also be understood as the target code length, or the total coding length, or the total coding length after rate matching. This total number of coded bits can be determined based on the resources scheduled by the access network equipment (such as a base station). For example, if the base station schedules 7 resource blocks for the terminal, then the total number of coded bits can be 7.

[0121] The value of C is determined as follows:

[0122] Design 1: The value of C is determined based on the number of information bits. The implementation below uses an example where the information bits include payload bits but not CRC bits, but this should not constitute any limitation on this application. When the information bits include both payload bits and CRC bits, the threshold for the number of information bits can be the threshold described below plus the number of CRC bits, such as an information bit threshold of 1013 + 11 = 1024, etc., which will not be listed here. One implementation is that when the number of information bits is greater than or equal to 1013, C = 2; when the number of information bits is greater than or equal to 2026, C = 3; when the number of information bits is greater than or equal to 3039, C = 4, etc., which will not be listed here. Another implementation is that when the number of information bits is greater than or equal to m*k, C = k + 1, where m is predefined / configured. For example, when m = 1013, C = 1 + 1 = 2 when the number of information bits is greater than or equal to 1013 * 1 = 1013; C = 2 + 1 = 3 when the number of information bits is greater than or equal to 1013 * 2 = 2026; C = 3 + 1 = 4 when the number of information bits is greater than or equal to 1013 * 3 = 3039, and so on. These will not be listed here.

[0123] It should be understood that the above implementation is merely an example and should not constitute any limitation on this application. Simple modifications of the formulas in the above implementation should also fall within the protection scope of this application. For example, when the number of information bits is greater than or equal to m*(c-1), C = c, where m is predefined / configured. Another example is when the number of information bits is greater than or equal to h... th.c (N max When c), C = c, where h th.c It is the maximum mother code length N max The number of segments in the first segment, c, is used as a function of the input value, h th.c It changes as c changes. For example, N max =1024.

[0124] Design 2: The value of C is determined based on the number of information bits and the total number of encoded bits. The implementation below uses an example where the information bits include payload bits but not CRC bits, but this should not constitute any limitation on this application. When the information bits include both payload bits and CRC bits, the threshold for the number of information bits can be the threshold described below plus the number of CRC bits, such as an information bit threshold of 360 + 11 = 371, etc., which will not be listed here. One implementation is that when the number of information bits is greater than or equal to 360 and the total number of encoded bits is greater than or equal to 1088, C = 2; when the number of information bits is greater than or equal to 720 and the total number of encoded bits is greater than or equal to 2176, C = 3; when the number of information bits is greater than or equal to 1080 and the total number of encoded bits is greater than or equal to 3264, C = 4, etc., which will not be listed here. Another implementation is that when the number of information bits is greater than or equal to a*k and the total number of encoded bits is greater than or equal to b*k, C = k + 1, where a and b are predefined / configured. For example, when a = 360 and b = 1088, C = 1 + 1 = 2 when the number of information bits is greater than or equal to 360 * 1 = 360 and the total number of encoded bits is greater than or equal to 1088 * 1 = 1088; when the number of information bits is greater than or equal to 360 * 2 = 720 and the total number of encoded bits is greater than or equal to 1088 * 2 = 2176, C = 2 + 1 = 3; when the number of information bits is greater than or equal to 360 * 3 = 1080 and the total number of encoded bits is greater than or equal to 1088 * 3 = 3264, C = 3 + 1 = 4, and so on. These will not be listed one by one here.

[0125] By specifying the number of segments C, performance curves can be obtained for different information bit counts at different code rates (which correspond to different total coding bits). By comparing the performance curves corresponding to different number of segments C, we can determine the range of information bit counts and total coding bits, and how many segments offer better performance. For example, when a is greater than or equal to 360 and b is greater than or equal to 1088, the error correction performance (e.g., block error rate (BLER)) of two segments is better. Therefore, the threshold for the number of information bits can be set to 360, and the threshold for the total coding bits can be set to 1088. For more segments, the existing thresholds can be multiplied by the corresponding multiples to obtain the thresholds for more segments. It should be understood that the above implementation is merely an example and should not constitute any limitation on this application. Simple modifications of the formulas in the above implementation should also fall within the protection scope of this application. For example, when the number of information bits is greater than or equal to a*(c-1), and the total number of encoded bits is greater than or equal to b*(c-1), then C = c, where a and b are predefined / configured. Another example is when the number of information bits is greater than or equal to f... th.c (a,c), and the total number of encoded bits is greater than or equal to g. th.c When (b,c), C=c, where f th.c It is a function that takes 'a' and the number of the first segment 'c' as input values, where 'a' is a threshold related to the number of information bits. 'a' changes as 'c' changes. th.c It changes with the change of c. g th.c It is a function that takes b and c as input values, where b is a threshold related to the total number of encoded bits. b varies with c. th.c It changes as c changes. For example, a = 360, b = 1088.

[0126] After determining the value of C based on the number of information bits, or the number of information bits and the total number of encoded bits, the encoding device can further determine the proportion of these C first segments, thereby facilitating the segmentation of information bits.

[0127] One possible implementation of the ratio of these C first segments is that the ratio of these C first segments is determined based on the bitrate.

[0128] The ratio of the aforementioned C first segments is determined based on the code rate. Implementation method A: The ratio of the aforementioned C first segments is determined based on the code rate and a linear function. The code rate (denoted as R) can be determined based on the number of information bits and the total number of encoded bits. For example, code rate = number of information bits / total number of encoded bits.

[0129] The linear function described above can be a function that takes the bit rate as its input value. Several possible designs for the linear function are given below as examples.

[0130] Design A: The linear function mentioned above can be a first-order linear function, such as f(R) = p1*R + p2, where p1 and p2 are the coefficients of the function f(R). p1 and p2 can be predefined / configured, or determined based on the bit rate and reliability sequence (see the description below for specific implementation details). This application does not impose any limitations on this. The value range of p1 can be (0.8395, 1.063), and the value range of p2 can be (-0.1413, -0.01627), such as p1 = 0.9513, p2 = -0.07879.

[0131] Design B: The linear function mentioned above can also be a quadratic linear function, such as f(R) = p1*R 2 The expression is: +p2*R+p3, where p1, p2, and p3 are the coefficients of the function f(R). p1, p2, and p3 can be predefined / configured or determined based on the bit rate and reliability sequence; this application does not impose any limitations on this. Specifically, the value range of p1 can be (0.2667, 0.5995), the value range of p2 can be (0.348, 0.6885), and the value range of p3 can be (-0.03472, 0.03954), such as p1 = 0.4331, p2 = 0.5183, and p3 = 0.002413.

[0132] Design C: The linear function mentioned above can also be a cubic linear function, such as f(R) = p1*R 3 +p2*R 2 The expression f(R) is: f(R) = p1 + p3 * R + p4, where p1, p2, p3, and p4 are the coefficients of the function f(R). p1, p2, p3, and p4 can be predefined / configured or determined based on the bit rate and reliability sequence; this application does not impose any limitations on this. Specifically, p1 can range from (0.08693, 1.001), p2 from (-1.074, 0.3088), p3 from (0.5593, 1.174), and p4 from (-0.07389, 0.002251), such as p1 = 0.5438, p2 = -0.3826, p3 = 0.8666, and p4 = -0.03582.

[0133] Design D: The linear function mentioned above can also be a quartic linear function, such as f(R) = p1*R 4 +p2*R 3 +p3*R 2The expression is: +p4*R+p5, where p1, p2, p3, p4, and p5 are coefficients of the function f(R). p1, p2, p3, p4, and p5 can be predefined / configured or determined based on the code rate and reliability sequence; this application does not impose any limitations on this. Specifically, p1 can range from (-4.375, 3.806), p2 from (-7.102, 9.327), p3 from (-6.403, 4.87), p4 from (-0.5513, 2.484), and p5 from (-0.1724, 0.08506), such as p1 = -0.2842, p2 = 1.112, p3 = -0.7664, p4 = 0.9662, and p5 = -0.04367.

[0134] Design E: The linear function mentioned above can also be a quintic linear function, f(R) = p1*R 5 +p2*R 4 +p3*R 3 +p4*R 2 +p5*R+p6, where p1, p2, p3, p4, p5 and p6 are the coefficients of the function f(R). p1, p2, p3, p4, p5 and p6 can be predefined / configured or determined according to the code rate and reliability sequence. This application does not limit them in this regard. The values ​​of p1 can be in the range of (-93.31, 101.7), p2 can be in the range of (-254.9, 233.5), p3 can be in the range of (-217.2, 238.8), p4 can be in the range of (-102.3, 92.57), p5 can be in the range of (-16.86, 20.31), and p6 can be in the range of (-1.309, 1.126). For example, p1 = 4.181, p2 = -10.74, p3 = 10.8, p4 = -4.85, p5 = 1.727, and p6 = -0.0918.

[0135] The above designs A through E are merely several possible examples of linear functions and should not be construed as limiting this application. Other functions may also be used.

[0136] The following examples illustrate how to determine the proportions of the C first segments when C takes different values.

[0137] When C=2, the encoding device can divide the information bits into two segments, denoted as K1 and K2 respectively, where K1:K2 = p1*R + p2. Examples of the ratio of the two first segments under different code rates are given below. One example is: R=1 / 8, K1:K2=1:15; R=2 / 8, K1:K2=1:6; R=3 / 8, K1:K2=1:4; R=4 / 8, K1:K2=1:3 or 2:5; R=5 / 8, K1:K2=1:2; R=6 / 8, K1:K2=1:2 or 2:3; R=7 / 8, K1:K2=1:1 or 4:5.

[0138] The ratio of the two first segments is K1:K2 = r, K2 = K - K1. Then the number of information bits in the first segment is K1 = r / (1+r)*K, and the number of information bits in the second segment is K2 = K - K1.

[0139] When C=4, the lengths of the four first segments are denoted as K11, K12, K21, and K22, respectively. The encoding device can first calculate the ratio K1:K2 = p1*R + p2 when dividing into two segments, then divide the first segment into two segments according to the ratio K1:K2, and then divide the second segment into two segments according to the ratio K1:K2, thus obtaining four first segments. Taking R=4 / 8 and K1:K2=1:3 as an example, K11:K12:K21:K22=(1*1 / 4):(1*3 / 4):(3*1 / 4):(3*3 / 4)=1 / 4:3 / 4:3 / 4:9 / 4=1:3:3:9.

[0140] A more general rule is that when C = 2 n In this process, the encoding device can first calculate the ratio K1:K2 = p1*R + p2 when dividing into two segments (e.g., A1 and A2). Then, it divides A1 into two segments (e.g., A11 and A12) according to the K1:K2 ratio, and divides A2 into two segments (e.g., A21 and A22) according to the K1:K2 ratio. Further, it divides A11 into two segments according to the K1:K2 ratio, A12 into two segments according to the K1:K2 ratio, A21 into two segments according to the K1:K2 ratio, and A22 into two segments according to the K1:K2 ratio, and so on, until 2 is obtained. n The first segment.

[0141] When C≠2 nAt this time, the encoding device can determine the number of information bits in each first segment based on a linear function and the code rate. For example, the encoding device can fit a linear function of the ratio of the number of information bits in each segment to the total number of information bits and the code rate R. Thus, when the encoding device obtains the code rate, it can determine the number of information bits in each segment based on the corresponding linear function. For example, when C=3, the encoding device can fit a linear function corresponding to the first segment, such as the ratio of the number of information bits K1 to the total number of information bits (K1+K2+K3) Ratio1, Ratio1(R) = p1*R+p2, where p1 = 0.2503, and the range of p1 can be (0.1628, 0.3377), and p2 = 0.02142, and the range of p2 can be (-0.02746, 0.07029). The encoding device can also fit a linear function corresponding to the second segment, such as the ratio of the number of information bits K2 in the second segment to the total number of information bits Ratio2, Ratio2(R) = p... 1*R+p2, p1=0.4113, p1 range can be (0.1182, 0.7044), p2=0.08891, p2 range can be (-0.07492, 0.2528); the encoding device fits the linear function corresponding to the third segment, such as the ratio of the number of information bits in the third segment K3 to the total number of information bits Ratio3, Ratio3(R)=p1*R+p2, p1=-0.6616, p1 range can be (-0.8789, -0.4442), p2=0.8897, p2 range can be (0.7682, 1.011). After determining the code rate R1, the encoding device can determine the number of information bits in each of the three segments according to the above linear function.

[0142] Similarly, it can also be a quadratic linear function, for example, C = 3, Ratio1(R) = p1*R 2 +p2*R+p3, p1=0.1964, the range of p1 can be (-0.208, 0.6007), p2=0.05388, the range of p2 can be (-0.3598, 0.4676), p3=0.05824, the range of p3 can be (-0.032, 0.1485); Ratio2(R)=p1*R 2 +p2*R+p3, p1=-0.9651, the range of p1 can be (-1.902, -0.02845), p2=1.376, the range of p2 can be (0.4181, 2.335), p3=-0.09204, the range of p3 can be (-0.3011, 0.117); Ratio3(R)=p1*R 2+p2*R+p3, p1=0.7687, the range of p1 can be (0.1933, 1.344), p2=-1.43, the range of p2 can be (-2.019, -0.8416), p3=1.034, the range of p3 can be (0.9054, 1.162).

[0143] The linear and quadratic functions described above are merely examples and should not be construed as limiting this application. For instance, the encoding device can also fit cubic, quartic, and other linear functions, which will not be detailed here.

[0144] The ratio of the aforementioned C first segments is determined based on the code rate. Implementation method B: The ratio of the aforementioned C first segments is determined based on the code rate and the reliability sequence. The length of the reliability sequence can be, for example, 512, 1024, 2048, or 4096, etc. This application does not limit the length of the reliability sequence.

[0145] For example, the encoding device can determine the code rate based on the number of information bits and the total number of encoded bits, and then determine the set of information bit positions based on the code rate and the reliability sequence. It then determines the number of information bits K1 located in the first 1 / C of the reliability sequence, the number of information bits K2 located between 1 / C and 2 / C, ..., and the number of information bits KC located from (C-1) / C to the end of the reliability sequence, thus obtaining the ratio of the aforementioned C first segments as K1:K2:...:KC. The above method can be applied, for example, to C=2. n In the scenario, n is a positive integer.

[0146] For example, assuming the number of information bits is 1024, the total number of encoded bits is 2048, the code rate is 1024 / 2048 = 1 / 2, and C = 2. The encoding device can determine the set of information bit positions when the code rate is 1 / 2 based on a reliability sequence of length 1024. The first half of the reliability sequence contains 139 information bit positions, and the second half contains 373 information bit positions. Therefore, the ratio of the two first segments is 139:373 = 1:2.6835 ≈ 1:3.

[0147] For example, suppose the number of information bits is 1024, the total number of encoded bits is 4096, the code rate is 1024 / 4096 = 1 / 4, and C = 4. The encoding device can determine the set of information bit positions when the code rate is 1 / 4 based on the reliability sequence of length 1024. The number of information bits in the first 1 / 4 of the reliability sequence is K1, the number of information bits in the 1 / 4 to 2 / 4 segment is K2, the number of information bits in the 2 / 4 to 3 / 4 segment is K3, and the number of information bits in the 3 / 4 segment to the end is K4. The information bits are then divided into non-uniform segments according to the ratio of K1:K2:K3:K4.

[0148] When C is not an integer power of 2, the ratio of the number of information bits in each segment can be determined by the following steps.

[0149] 1. Determine the code rate R based on the number of information bits K and the total number of encoded bits E, such as R = K / E; or, determine the code rate R based on the signaling indication, such as R can also be determined based on the code rate indicated by the DCI.

[0150] 2. Determine whether the rate matching method is puncture or shortening based on the bitrate R. For example, when R is less than or equal to a threshold (e.g., 7 / 16), a rate matching method of puncture from front to back is used; when R is greater than the threshold (e.g., 7 / 16), a rate matching method of shortening from back to front is used.

[0151] 3. According to the rate matching method, the polar code with the mother code length of the maximum mother code length (such as 1024) is rate matched to a length E that can be divided by C.

[0152] 4. Determine the information bit positions based on the reliability sequence, code rate, and rate matching method, and then determine the number of information bits in different segments, thus obtaining the ratio of the lengths of the C segments. For example, if the rate matching method is puncturing, then the information bit position indication sequence (which indicates the position of information bits in a polar code with a length equal to the maximum mother code length) is the first (2...) of the sequence. n -C) / 2 n The segment does not contain information bits, and the encoding device can determine the position of the aforementioned information bits in the (2) sequence. n -C) / 2 n ~(2) n -C+1) / 2 n The number of information bits contained in the segment, (2 n -C+1) / 2 n ~(2) n -C+2) / 2 n The number of information bits contained in the segment, ..., (2 n -1) / 2 n The number of information bits contained in the last segment can be used to determine the ratio of information bits in the C segments mentioned above: ((2) n -C) / 2 n ~(2) n -C+1) / 2 n (Number of information bits contained in the segment): ((2) n -C+1) / 2 n ~(2) n -C+2) / 2 n (Number of information bits contained in the segment): ...: (2) n -1) / 2n ~ The number of information bits contained in the end segment. Where n above satisfies 2. n -C<2 n-1 For example, if the rate matching method is shortening, then C / 2 n Since the last segment does not contain information bits, the encoding device can determine the number of information bits in each of the other segments, thereby obtaining the ratio of the number of information bits in the C segments at the above code rate.

[0153] In one example, R = 1 / 4, the number of information bits = 192, C = 3, and the rate matching method is puncturing. The encoding device can puncture the polar code with a length equal to the maximum mother code length (e.g., 1024), so that the length of the punctured codeword sequence is divisible by C = 3. For example, after puncturing 256 bits, the codeword sequence length is 768, which is divisible by C = 3. Then, based on the reliability sequence, code rate, and puncturing mode, the 192 positions with the highest reliability are selected to obtain an information bit position indication sequence of length N = 1024. Since the rate matching method is puncturing, the first 1 / 4 of this information bit position indication sequence does not contain information bits, the 1 / 4 to 2 / 4 of the information bit position indication sequence contains 19 information bits, the 2 / 4 to 3 / 4 of the information bit position indication sequence contains 32 information bits, and the 3 / 4 to the end of the information bit position indication sequence contains 141 information bits. Therefore, when the code rate is R = 1 / 4, K = 192 is divided into 3 segments, and the ratio of the number of information bits in each segment is 19:32:141.

[0154] In another example, R = 1 / 2, the number of information bits = 192, C = 3, and the rate matching method is shortening. The encoding device can shorten the polar code with a length equal to the maximum mother code length (e.g., 1024) so ​​that the length of the shortened codeword sequence is divisible by C = 3. For example, after shortening by 256 bits, the codeword sequence length is 768, which is divisible by C = 3. Then, based on the reliability sequence, code rate, and shortening mode, the 192 positions with the highest reliability are selected to obtain an information bit position indication sequence with a length of N = 1024. Since the rate matching method is shortening, no information bits are contained in the 3 / 4 segment to the end. The first 1 / 4 segment contains 45 information bits, the 1 / 4 to 2 / 4 segments contain 159 information bits, and the 2 / 4 to 3 / 4 segments contain 180 information bits. Thus, when the code rate R = 1 / 2, the ratio of the number of information bits in the C = 3 segments is 45:159:180.

[0155] Similarly, when C=3 segments, the ratio of the number of information bits at different code rates can be obtained. For example, when the code rate is 1 / 8, the ratio can be 5:9:82; when the code rate is 1 / 4, the ratio can be 19:32:141; when the code rate is 3 / 8, the ratio can be 38:65:185; when the code rate is 1 / 2, the ratio can be 45:159:180; when the code rate is 5 / 8, the ratio can be 74:196:210; when the code rate is 3 / 4, the ratio can be 119:224:233; and when the code rate is 7 / 8, the ratio can be 178:245:249. These ratios will not be listed here.

[0156] It should be understood that the coefficients of the linear function in the above implementation method A can be obtained according to the above implementation method B. That is, the encoding device can determine the ratio of the two first segments under multiple code rates (these multiple code rates can be predefined / configured) according to implementation method B, and then fit the linear function according to the ratio of the two first segments under multiple code rates. Then, when the encoding device determines the code rate, it can determine the ratio of the first segment according to the code rate and the linear function.

[0157] It should also be understood that in the above scheme, the encoding device determines the proportion of the aforementioned C first segments, and then segments the information bits according to the proportion of the aforementioned C first segments. However, this should not constitute any limitation on this application. For example, the encoding device can also determine the proportion of each of the aforementioned C first segments in the information bits, and then segment the information bits according to the proportion of each of the first segments in the information bits. The method for determining the proportion of each of the first segments in the information bits is similar to the method for determining the proportion of the aforementioned C first segments (it can also be determined based on the code rate and a linear function, or based on the code rate and a reliability sequence), and will not be elaborated here.

[0158] Figure 5 and Figure 6 This is a schematic diagram comparing the performance of non-uniform and uniform segmentation at different bit rates, provided in an embodiment of this application. Figure 5 and Figure 6 In the diagram, the horizontal axis represents the signal-to-noise ratio (SNR) in decibels (dB), and the vertical axis represents the bit error rate (BER). Dashed lines represent performance under non-uniform segmentation, while solid lines represent performance under uniform segmentation. The number of information bits is represented by K, the total number of coded bits by E, and the code rate by R. Figure 5 and Figure 6 Taking the information bits divided into two segments as an example, the lengths of the two segments are denoted as K1 and K2.

[0159] Figure 5 Figure a) shows a comparison of the bit error rates under non-uniform segmentation and uniform segmentation when K=256, E=2048, and R=256 / 2048=1 / 8. Figure 5As shown in a), in the uniform segmentation method, K1 = K2 = 128. In the non-uniform segmentation method, the information bits are segmented according to a ratio of K1:K2 = 1 / 15, such as K1 = 16 and K2 = 240. It can be seen that when R = 1 / 8, the bit error rate in the non-uniform segmentation method is lower than that in the uniform segmentation method.

[0160] Figure 5 Figure b) shows a comparison of the bit error rates under non-uniform segmentation and uniform segmentation when K = 512, E = 2048, and R = 512 / 2048 = 2 / 8. Figure 5 As shown in b), in the uniform segmentation method, K1 = K2 = 256. In the non-uniform segmentation method, the information bits are segmented according to the ratio of K1:K2 = 1 / 6, such as K1 = 74 and K2 = 438. It can be seen that when R = 2 / 8, the bit error rate of the non-uniform segmentation method is lower than that of the uniform segmentation method.

[0161] Figure 5 c) shows a comparison of the bit error rates under non-uniform segmentation and uniform segmentation when K=768, E=2048, and R=768 / 2048=3 / 8. Figure 5 As shown in c), in the uniform segmentation method, K1 = K2 = 384. In the non-uniform segmentation method, the information bits are segmented according to a ratio of K1:K2 = 1 / 4, such as K1 = 159 and K2 = 609. It can be seen that when R = 3 / 8, the bit error rate under the non-uniform segmentation method is lower than that under the uniform segmentation method.

[0162] Figure 5 Figure d) shows a comparison of the bit error rates under non-uniform segmentation and uniform segmentation when K = 1024, E = 2048, and R = 1024 / 2048 = 4 / 8. Figure 5 As shown in d), in the uniform segmentation method, K1 = K2 = 512. In the non-uniform segmentation method, the information bits are segmented according to the ratio of K1:K2 = 1 / 3, such as K1 = 276 and K2 = 748. It can be seen that when R = 4 / 8, the bit error rate of the non-uniform segmentation method is lower than that of the uniform segmentation method.

[0163] Figure 6 Figure e) shows a comparison of the bit error rates under non-uniform segmentation and uniform segmentation when K = 1280, E = 2048, and R = 1280 / 2048 = 5 / 8. Figure 6As shown in e), in the uniform segmentation method, K1 = K2 = 640. In the non-uniform segmentation method, the information bits are segmented according to the ratio K1:K2 = 1 / 2, such as K1 = 421 and K2 = 859. It can be seen that when R = 5 / 8, the bit error rate of the non-uniform segmentation method is lower than that of the uniform segmentation method.

[0164] Figure 6 f) shows a comparison of the bit error rates under non-uniform segmentation and uniform segmentation when K = 1536, E = 2048, and R = 1536 / 2048 = 6 / 8. Figure 6 As shown in f), in the uniform segmentation method, K1 = K2 = 768. In the non-uniform segmentation method, the information bits are segmented according to the ratio of K1:K2 = 2 / 3, such as K1 = 591 and K2 = 945. It can be seen that when R = 6 / 8, the bit error rate of the non-uniform segmentation method is lower than that of the uniform segmentation method.

[0165] Figure 6 g) in the figure shows a comparison of the bit error rates under non-uniform segmentation and uniform segmentation when K=1792, E=2048, and R=1792 / 2048=7 / 8. Figure 6 As shown in g), in the uniform segmentation method, K1 = K2 = 896. In the non-uniform segmentation method, the information bits are segmented according to the ratio of K1:K2 = 4 / 5, such as K1 = 791 and K2 = 1001. It can be seen that when R = 7 / 8, the bit error rate of the non-uniform segmentation method is lower than that of the uniform segmentation method.

[0166] In step 420, the encoding device performs polar coding on the C code blocks to be encoded to obtain C coded code blocks, which are obtained based on the aforementioned C first segments.

[0167] One possible design for the aforementioned C code blocks to be encoded is that the C code blocks to be encoded are the aforementioned C first segments. That is, there is no need to add CRC bits (the CRC bits can be, for example, CB CRC bits) to the C first segments. The encoding device segments the information bits to obtain C first segments, and then directly performs polar coding on these C first segments to obtain C encoded code blocks.

[0168] Another possible design for the aforementioned C code blocks to be encoded is that the C code blocks to be encoded are obtained by adding CRC bits (such as CB CRC bits) to at least one of the C first segments. For example, the encoding device segments the information bits to obtain C first segments, then adds CRC bits (such as CB CRC bits) to at least one of the C first segments to obtain C code blocks to be encoded, and performs polar encoding on these C code blocks to obtain C encoded code blocks. For example, the process of adding CRC bits may include generating CRC bits based on a polynomial and attaching / adding the CRC bits to the first segment. The specific generation process of CRC bits can be found in existing technologies and will not be detailed here.

[0169] The aforementioned C code blocks to be encoded are obtained by adding CRC bits to at least one of the aforementioned C first segments. One possible implementation is that the aforementioned C code blocks to be encoded are obtained by adding CRC bits to each of the aforementioned C first segments. In other words, the encoding device can add CRC bits to each of the aforementioned C first segments to obtain the aforementioned C code blocks to be encoded.

[0170] For example, when the length of the first segment is less than or equal to 11, the number of CRC bits added to the first segment is 0. When the length of the first segment is greater than or equal to 12 and less than or equal to 19, the number of CRC bits added to the first segment is 6. When the length of the first segment is greater than or equal to 20 and less than or equal to 256, the number of CRC bits added to the first segment is 11. When the length of the first segment is greater than or equal to 256, the number of CRC bits added to the first segment is 24, and so on. The above examples are for illustrative purposes only and should not constitute any limitation on this application.

[0171] In one possible design, the number of CRC bits added to each of the C first segments can be determined based on the length of the first segment. For example, the longer the first segment, the more CRC bits are added. It can be understood that the longer the first segment, the more information bits it contains, and the greater the probability of errors. Adding more CRC bits helps improve error detection capabilities, decoding accuracy, and error correction capabilities.

[0172] The aforementioned C code blocks to be encoded are obtained by adding CRC bits to at least one of the aforementioned C first segments. Another possible implementation is that the aforementioned C code blocks to be encoded are obtained by adding CRC bits to one of the aforementioned C first segments.

[0173] Adding a CRC bit to one of the C first segments helps reduce signaling overhead. Furthermore, for the decoding device, the C first segments correspond to the C second segments. In one possible implementation, the decoding device can perform CRC checks on the C second segments based on the CRC bit. That is, the C first segments share a single CRC bit segment. This reduces signaling overhead while also ensuring error detection and correction performance.

[0174] It should be noted that in this application, the above-mentioned C first segments share a CRC bit. This can be understood as follows: for the encoding device, a CRC bit is added to one of the C first segments; for the decoding device, the C first segments correspond to C second segments. The decoding device can perform CRC verification on each of the C second segments based on the above-mentioned CRC bit.

[0175] It should be understood that the above implementation is merely an example and should not constitute any limitation on this application. For example, if a CRC bit is added to one of the C first segments, the decoding device may only perform CRC verification on the second segment including the CRC bit, or in other words, the decoding device may not perform CRC verification on the second segment that does not include the CRC bit.

[0176] The aforementioned C code blocks to be encoded are obtained by adding CRC bits to one of the aforementioned C first segments. For example, the aforementioned C code blocks to be encoded are obtained by adding CRC bits to the longest of the aforementioned C first segments. It can be understood that the longer the first segment, the more information bits it contains, and the greater the probability of errors. Adding CRC bits to the longest first segment helps improve error detection capabilities, decoding accuracy, and error correction capabilities.

[0177] Another example is that the above C code blocks to be encoded are obtained by adding CRC bits to the last / first first segment of the above C first segments.

[0178] When the aforementioned C code blocks to be encoded are obtained by adding CRC bits to one of the aforementioned C first segments, the number of CRC bits is L. For example, if the sum of the lengths of the aforementioned C first segments is greater than or equal to 11, L = 0. If the sum of the lengths of the aforementioned C first segments is greater than or equal to 12 and less than or equal to 19, L = 6. If the sum of the lengths of the aforementioned C first segments is greater than or equal to 20 and less than or equal to 256, L = 11. If the sum of the lengths of the aforementioned C first segments is greater than or equal to 256, L = 24. That is to say, the number of CRC bits can be determined based on the sum of the lengths of the aforementioned C first segments; the larger the sum of the lengths of the aforementioned C first segments, the more CRC bits are added.

[0179] Optionally, similar to the above-mentioned C first segments sharing a CRC bit, at least two of the above-mentioned C first segments may share CRC bits. For example, the above-mentioned C first segments include four first segments: A1, A2, A3, and A4. The encoding device can add CRC bits to two of these first segments, such as adding CRC bits to the two longest first segments (e.g., A1 and A3). A1 and A2 can share CRC bits, and A3 and A4 can share CRC bits. The number of CRC bits added to A1 can be determined based on the sum of the lengths of A1 and A2, and the number of CRC bits added to A3 can be determined based on the sum of the lengths of A3 and A4. For a specific implementation, please refer to the scenario of adding CRC bits to one of the C first segments, which will not be detailed here.

[0180] In step 430, the encoding device concatenates the above C encoding blocks to obtain a concatenated codeword, which is obtained by XORing the above C encoding blocks.

[0181] The length / size of the C coded blocks can be the same, which makes it easier for the encoding device to perform an XOR operation on the C coded blocks.

[0182] The concatenated codewords are obtained by XORing the above C coded code blocks. It can be understood that when performing the XOR operation, the operation of decoding these C code blocks is taken into account, but the result of the XOR operation does not necessarily include all the coded code blocks.

[0183] For example, when C=2, the concatenated codeword is or, C1 and C2 are the encoded code blocks. This indicates the XOR operation.

[0184] When C=3 and the rate matching method is punched, the concatenated codeword is or, When C=3 and the rate matching mode is shortened, the concatenated codeword is or, C1, C2, and C3 are coded code blocks. That is, when C=3, the concatenated codewords are related to the rate matching method.

[0185] When C=4, the concatenated codeword is or, C1, C2, C3, and C4 are coded code blocks.

[0186] Optionally, the concatenated codewords can be obtained based on the generator matrix or based on the bitwise XOR of the C coded code blocks; this application does not limit this.

[0187] For example, when the concatenated codewords are obtained based on the generator matrix, and C=2, the generator matrix is: At that time, the codeword after cascading is When the generating matrix is At that time, the codeword after cascading is The above-described generator matrix is ​​merely an example. The encoding device may also perform row and / or column transformations on the generator matrix to obtain concatenated codewords based on the transformed matrix. This application does not limit this.

[0188] When C is larger, the corresponding generating matrix can be obtained by performing the Kronecker product based on the generating matrix when C=2.

[0189] For example, when C=3, and the rate matching method is punching (taking front-to-back punching as an example), and the generation matrix is... At that time, the codeword after cascading is The rows of the generator matrix correspond to the input bits, and the columns correspond to the encoded codewords. The rate matching method is puncturing (puncturing the first column and the first row). Therefore, by removing the first row and the first column of the generator matrix, we obtain the matrix. When C=3, and the rate matching method is punching, and the generation matrix is... At that time, the codeword after cascading is The above-described generator matrix is ​​merely an example. The encoding device may also perform row and / or column transformations on the generator matrix to obtain concatenated codewords based on the transformed matrix. This application does not limit this.

[0190] When C=3, and the rate matching method is shortening (taking shortening from back to front as an example), and the generator matrix is... At that time, the codeword after cascading is The rows of the generator matrix correspond to the input bits, and the columns correspond to the encoded codewords. The rate matching method is shortening (removing the last column and the last row). Therefore, removing the last row and the last column of the generator matrix yields the matrix... When C=3, and the rate matching method is shortening, and the generation matrix is... At that time, the codeword after cascading is The above-described generator matrix is ​​merely an example. The encoding device may also perform row and / or column transformations on the generator matrix to obtain concatenated codewords based on the transformed matrix. This application does not limit this.

[0191] When C = 4, and the generating matrix is At that time, the codeword after cascading is When C = 4, and the generating matrix is At that time, the codeword after cascading is The above-described generator matrix is ​​merely an example. The encoding device may also perform row and / or column transformations on the generator matrix to obtain concatenated codewords based on the transformed matrix. This application does not limit this.

[0192] In step 440, the encoding device outputs the concatenated codewords.

[0193] Before sending the codewords, the encoding device can perform interleaving, modulation, and other processing on them, and then send them as a data block to the decoding device. Correspondingly, the decoding device receives the sequence to be decoded. The decoding device can be regarded as the receiving end of information, or the decoding end of information.

[0194] It is understood that the sequence sent by the encoding device and the sequence received by the decoding device are not necessarily completely identical. Therefore, in this application, the sequence received by the decoding device is denoted as the sequence to be decoded, but it is not limited to the sequence to be decoded being completely identical to the sequence sent by the encoding device.

[0195] In step 450, the decoding device decodes the sequence to be decoded to obtain a decoded bit sequence, which includes C second segments, each of the C second segments including a first segment.

[0196] The C first segments are obtained by segmenting information bits, and at least two of the C first segments have different lengths.

[0197] Optionally, at least one of the C second segments may also include CRC bits. For an explanation regarding the different lengths of at least two of the C first segments when C takes different values, please refer to the encoding device section; it will not be elaborated here.

[0198] Each of the aforementioned C second segments includes one first segment. This can be understood as each of the aforementioned C second segments containing a portion of information bits. It should be understood that this portion of information bits can be correct information bits and / or erroneous information bits, and this application does not limit this.

[0199] In the above scheme, the decoding device can decode the sequence to be decoded as a long code when performing decoding, without having to divide it into short codes for decoding, which is beneficial to obtain long code gain and improve the performance of polar codes.

[0200] Optionally, the aforementioned information bits include payload bits, or the aforementioned information bits include payload bits and CRC bits. A detailed explanation of information bits can be found above, and will not be repeated here.

[0201] Optionally, at least one of the C second segments includes a CRC bit, including: each of the C second segments includes a CRC bit; or, one of the C second segments includes a CRC bit. For an explanation of at least one of the C second segments including a CRC bit, please refer to the explanation of adding a CRC bit to at least one of the C first segments above; it will not be repeated here.

[0202] Similarly, the value of C and the method for determining the proportion of the above C first segments can be found on the encoding device side, and will not be repeated here.

[0203] Optionally, the above method further includes: the decoding device performing CRC verification on at least one of the C second segments.

[0204] With CRC verification, the decoding device can obtain the information bits.

[0205] One possible scenario is that the encoding device adds CRC bits to each of the C first segments, then the decoding device can perform CRC verification on each of the C second segments. By verifying the second segment through CRC, the decoding device can obtain the corresponding partial information bits.

[0206] Another possibility is that the encoding device adds a CRC bit to one of the C first segments. The decoding device can then perform CRC checks on the C second segments based on this CRC bit. For the second segment that passes the CRC check, the decoding device can obtain the corresponding partial information bits. Alternatively, the decoding device can perform CRC checks only on the second segment that includes the CRC bit, without performing CRC checks on the other second segments.

[0207] exist Figure 4 In the method shown, the encoding device performs non-uniform segmentation of the information bits, meaning that at least two of the C first segments have different lengths. This makes the number of information bits contained in each segment more consistent with the bit channel capacity after channel polarization. For example, some segments correspond to lower bit channel capacities, while others correspond to higher bit channel capacities. The ratio of the number of information bits in different segments is obtained based on the bit channel capacity. Furthermore, the concatenated codeword is obtained by XORing the C encoded code blocks. By XORing and concatenating the encoded code blocks, the decoding device can decode the sequence to be decoded as a long code during decoding, thereby obtaining long code gain and improving the performance of the polarized code.

[0208] Figure 7 This is a schematic diagram comparing the performance of coding based on the method provided in this application and coding based on existing methods, as provided in the embodiments of this application. Figure 7 In the graph, the solid line represents the bit error rate (BER) and the dashed line represents the false alarm rate (FOR). The horizontal axis represents the signal-to-noise ratio (SNR), and the vertical axis represents both the BER and FOR. Additionally, in... Figure 7 In this example, where information bits are divided into two segments, E1 represents the total number of coded bits corresponding to one segment, E2 represents the total number of coded bits corresponding to the other segment, K1 represents the length of one segment, K2 represents the length of the other segment, E represents the total number of coded bits, and K represents the number of information bits.

[0209] like Figure 7 As shown, the bit error rate (BER) under non-uniform segmentation is lower than that under uniform segmentation and is closer to the ideal BER. Similarly, the false alarm rate (False Alarm Rate) under non-uniform segmentation is lower than that under uniform segmentation and is closer to the ideal False Alarm Rate. It can be seen that encoding based on the method provided in this application is beneficial for improving the performance of polar codes.

[0210] The methods provided in the embodiments of this application have been described in detail above with reference to the accompanying drawings. The apparatus provided in the embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0211] Figure 8 This is a schematic block diagram of the information processing device 800 provided in the embodiments of this application.

[0212] like Figure 8 As shown, the information processing device 800 includes a processing module 810 and a transceiver module 820.

[0213] The transceiver module 820 can implement corresponding communication functions and can also be referred to as an input / output interface or communication unit. The processing module 810 can be used to perform processing operations. It should be understood that if the device 800 is a component configured in an access network device or terminal, such as a chip, the transceiver module 820 can be an input / output interface.

[0214] Optionally, the transceiver module 820 may include a sending module and a receiving module. The sending module is used to perform the above-described... Figure 4 The transmitting / output operations of the encoding device are performed by the receiving module. Figure 4 The receiving / input operation of the Chinese decoding device.

[0215] It should be understood that when the device 800 is a component configured in an access network device or terminal, such as a chip, the transmitting module can be an output interface, and the transmitting operation involved in the embodiments of this application can be performed by the output interface; the receiving module can be an input interface, and the receiving operation involved in the embodiments of this application can be performed by the input interface.

[0216] Optionally, the device 800 may further include a storage module for storing instructions and / or data, and the processing module 810 may read the instructions and / or data from the storage module to enable the device to perform the preceding operations. Figure 4 The method embodiment shown.

[0217] When device 800 is used to implement Figure 4 In the method embodiment shown, the encoding device functions as follows: the processing module 810 is used to segment the information bits to obtain C first segments, at least two of the C first segments having different lengths, where C is an integer greater than or equal to 2; the processing module 810 is also used to perform polar coding on the C code blocks to be encoded to obtain C encoded code blocks, which are obtained based on the aforementioned C first segments; the processing module 810 is also used to concatenate the aforementioned C encoded code blocks to obtain a concatenated codeword, which is obtained based on the XOR of the aforementioned C encoded code blocks; the transceiver module 820 is used to output the aforementioned concatenated codeword.

[0218] Optionally, the aforementioned information bits include payload bits, or the aforementioned information bits include payload bits and CRC bits.

[0219] Optionally, when C=2, the lengths of the two first segments are different.

[0220] Optionally, when C=3, the lengths of the three first segments are different, or, two of the three first segments have the same length, but the lengths of each of the two first segments are different from the length of the other first segment.

[0221] Optionally, when C=4, two of the four first segments have the same length, but different lengths from the other two first segments.

[0222] Optionally, the above C code blocks to be encoded are obtained by adding CRC bits to at least one of the above C first segments.

[0223] Optionally, the C code blocks to be encoded are obtained by adding CRC bits to at least one of the C first segments, including: the C code blocks to be encoded are obtained by adding CRC bits to each of the C first segments, or the C code blocks to be encoded are obtained by adding CRC bits to one of the C first segments.

[0224] Optionally, when the above C code blocks to be encoded are obtained by adding CRC bits to each of the above C first segments, the number of CRC bits added to each of the above C first segments is determined according to the length of the first segment.

[0225] Optionally, the above-mentioned C code blocks to be encoded are obtained by adding CRC bits to one of the above-mentioned C first segments, including: the above-mentioned C code blocks to be encoded are obtained by adding CRC bits to the longest of the above-mentioned C first segments.

[0226] Optionally, when C=2, the concatenated codeword is [C1⊕C2, C2] or [C1, C1⊕C2], where C1 and C2 are coded code blocks.

[0227] Optionally, when C=3 and the rate matching method is punched, the concatenated codeword is [C1⊕C3, C2⊕C3, C3] or [C1, C2, C1⊕C2⊕C3]; when C=3 and the rate matching method is shortened, the concatenated codeword is [C1⊕C2⊕C3, C2, C3] or [C1, C1⊕C2, C1⊕C3], where C1, C2, and C3 are coded code blocks.

[0228] Optionally, when C=4, the concatenated codeword is [C1⊕C2⊕C3⊕C4, C2⊕C4, C3⊕C4, C4], or [C1, C1⊕C2, C1⊕C3, C1⊕C2⊕C3⊕C4], where C1, C2, C3, and C4 are coded code blocks.

[0229] Optionally, the value of C is determined based on the number of information bits mentioned above, or the value of C is determined based on the number of information bits mentioned above and the total number of encoded bits.

[0230] Optionally, if the number of information bits is greater than or equal to m*k, then C = k+1, where m is predefined / configured; or, if the number of information bits is greater than or equal to a*k, and the total number of encoded bits is greater than or equal to b*k, then C = k+1, where a and b are predefined / configured.

[0231] Optionally, the proportions of the above C first segments are determined based on the bitrate.

[0232] When device 800 is used to implement Figure 4 In the method embodiment shown, the decoding device functions as follows: the transceiver module 820 is used to input the sequence to be decoded; the processing module 810 is used to decode the sequence to be decoded to obtain a decoded bit sequence. The decoded bit sequence includes C second segments, each of the C second segments includes a first segment, and the C first segments are obtained by segmenting information bits. At least two of the C first segments have different lengths.

[0233] Optionally, the aforementioned information bits include payload bits, or the aforementioned information bits include payload bits and CRC bits.

[0234] Optionally, when C=2, the lengths of the two first segments are different.

[0235] Optionally, when C=3, the lengths of the three first segments are different, or, two of the three first segments have the same length, but the lengths of each of the two first segments and the other first segment are different.

[0236] Optionally, when C=4, two of the four first segments have the same length, but different lengths from the other two first segments.

[0237] Optionally, at least one of the C second segments includes CRC bits; the processing module 810 is further configured to perform CRC verification on at least one of the C second segments.

[0238] Optionally, at least one of the C second segments includes CRC bits, including: each of the C second segments includes CRC bits; or, one of the C second segments includes CRC bits.

[0239] Optionally, if each of the C second segments includes CRC bits, the number of CRC bits included in each of the C second segments is determined based on the length of the first segment corresponding to the second segment.

[0240] Optionally, one of the C second segments mentioned above includes CRC bits, including: the second segment with the most information bits among the C second segments mentioned above includes CRC bits.

[0241] Optionally, the value of C is determined based on the number of information bits, or the value of C is determined based on the number of information bits and the total number of encoded bits.

[0242] Optionally, if the number of information bits is greater than or equal to m*k, then C = k+1, where m is predefined / configured; or, if the number of information bits is greater than or equal to a*k, and the total number of encoded bits is greater than or equal to b*k, then C = k+1, where a and b are predefined / configured.

[0243] Optionally, the proportions of the above C first segments are determined based on the bitrate.

[0244] For a more detailed description of the aforementioned processing module 810 and transceiver module 820, please refer to [link / reference needed]. Figure 4 The relevant descriptions in the method embodiments shown are directly obtained and will not be repeated here.

[0245] It should be noted that the transceiver module can also be called a transceiver unit, transceiver, transceiver machine, or transceiver device, etc. The processing module can also be called a processor, processing board, processing unit, or processing device, etc. Optionally, the transceiver module is used to perform the sending and receiving operations in the above method. The device in the communication module that implements the receiving function can be considered as the receiving module, and the device in the communication module that implements the sending function can be considered as the sending module; that is, the transceiver module includes both a receiving module and a sending module.

[0246] In another possible design, the aforementioned transceiver module and / or processing module can be implemented using virtual modules. For example, the processing module can be implemented using software functional modules or virtual devices, and the transceiver module can also be implemented using software functional modules or virtual devices. In another possible design, the processing module or transceiver module can also be implemented using physical devices. For example, if the device is implemented using a chip / chip circuit, the transceiver module can be an input / output circuit and / or a communication interface, performing input operations (corresponding to the aforementioned receiving operation) and output operations (corresponding to the aforementioned sending operation); the processing module is an integrated processor, microprocessor, or integrated circuit.

[0247] It should be understood that the module division in the embodiments of this application is illustrative and only represents a logical functional division. In actual implementation, there may be other division methods. Furthermore, the functional modules in the various embodiments of this application can be integrated into a single processor, exist as separate physical entities, or be integrated into a single module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0248] Figure 9 This is another schematic block diagram of the information processing apparatus 900 provided in this application embodiment. The apparatus 900 can be a chip system, or it can be an apparatus configured with a chip system to implement the above-described method embodiments. In this application embodiment, the chip system can be composed of chips, or it can include chips and other discrete devices.

[0249] like Figure 9 As shown, the device 900 may include a processor 910, which can be used to execute computer programs or instructions stored in memory to achieve... Figure 4 The steps performed by the encoding device or the steps performed by the decoding device in the method embodiment shown.

[0250] Optionally, the device 900 further includes a communication interface 920. The communication interface 920 can be used to communicate with other devices via a transmission medium, thereby enabling the device 900 to communicate with other devices. The communication interface 920 may be, for example, a transceiver, interface, bus, circuit, or a device capable of transmitting and receiving functions. The processor 910 can utilize the communication interface 920 to input and output data and to implement... Figure 4 The method described in the illustrated embodiment. Specifically, the device 900 can be used to implement the functions of the encoding or decoding device in the above method embodiments.

[0251] When device 900 is used to achieve Figure 4 In the method shown, the processor 910 is used to implement the functions of the processing module 810, and the communication interface 920 is used to implement the functions of the transceiver module 820.

[0252] Optionally, the device 900 further includes at least one memory 930 for storing program instructions and / or data. The memory 930 is coupled to the processor 910. The coupling in this embodiment is an indirect coupling or communication connection between devices, units, or modules, and can be electrical, mechanical, or other forms, used for information exchange between devices, units, or modules. The processor 910 may operate in conjunction with the memory 930. The processor 910 may execute program instructions stored in the memory 930. At least one of the at least one memories may be included in the processor.

[0253] It should be understood that the coupling in the embodiments of this application is an indirect coupling or communication connection between devices, units, or modules, which can be electrical, mechanical, or other forms, used for information interaction between devices, units, or modules. The processor 910 may operate in conjunction with the memory 930. The embodiments of this application do not limit the specific connection medium between the processor 910, the communication interface 920, and the memory 930. The embodiments of this application... Figure 9 The processor 910, communication interface 920, and memory 930 are connected via bus 940. Bus 940 is... Figure 9 The connections between other components are shown in bold lines only and are not intended to be limiting. The bus can be a peripheral component interconnect (PCI) bus or an extended industry standard architecture (EISA) bus, etc. The bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, Figure 9 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0254] It should be noted that when the information processing device 900 is an encoding or decoding device, the communication interface 920 can be a transceiver, specifically including a transmitter and a receiver. The transmitter is used to send signals, and the receiver is used to receive signals. When the information processing device 900 is a chip applied to the encoding or decoding device, the communication interface 920 can be an input / output circuit, a bus, a module, a pin, or other types of communication interface input / output circuit. The input circuit in the input / output circuit can be used for receiving, and the output interface can be used for sending.

[0255] This application also provides a computer program product, which includes: a computer program (also referred to as code or instructions), which, when run, can achieve... Figure 4 The method described in the illustrated embodiment.

[0256] This application also provides a computer-readable storage medium storing a computer program (also referred to as code or instructions). When the computer program is executed, it can achieve... Figure 4 The method described in the illustrated embodiment.

[0257] It should be understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. In implementation, each step of the above method embodiments can be completed by the integrated logic circuitry in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in memory, and the processor reads the information in the memory and, in conjunction with its hardware, completes the steps of the above method.

[0258] It should also be understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM). It should be noted that the memory used in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0259] The terms "unit," "module," etc., used in this specification can be used to refer to computer-related entities, hardware, firmware, combinations of hardware and software, software, or software in execution. In the embodiments of this application, "unit" and "module" have the same meaning and can be used interchangeably.

[0260] Those skilled in the art will recognize that the various illustrative logical blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application. In the several embodiments provided in this application, it should be understood that the disclosed apparatus, devices, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the shown or discussed mutual couplings or direct couplings or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0261] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0262] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0263] In the above embodiments, the functions of each functional unit can be implemented entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions (programs). When the computer program instructions (programs) are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media may be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., digital video discs, DVDs), or semiconductor media (e.g., solid-state disks, SSDs), etc.

[0264] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the technology, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a server, or an access network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. An information processing method, characterized in that, include: The information bits are segmented to obtain C first segments, wherein at least two of the C first segments have different lengths, and C is an integer greater than or equal to 2; Polar coding is performed on C code blocks to be encoded to obtain C encoded code blocks, wherein the C code blocks to be encoded are obtained based on the C first segments; The C coded code blocks are concatenated to obtain and output the concatenated codeword, which is obtained by XORing the C coded code blocks.

2. The method as described in claim 1, characterized in that, The information bits include payload bits, or the information bits include payload bits and CRC bits.

3. The method as described in claim 1 or 2, characterized in that, When C=2, the lengths of the two first segments are different.

4. The method as described in claim 1 or 2, characterized in that, When C=3, the lengths of the three first segments are different, or, two of the three first segments have the same length, but the lengths of each of the two first segments are different from the length of the other first segment.

5. The method as described in claim 1 or 2, characterized in that, When C=4, two of the four first segments have the same length, but their lengths are different from the other two first segments.

6. The method according to any one of claims 1 to 5, characterized in that, The C code blocks to be encoded are obtained by adding CRC bits to at least one of the C first segments.

7. The method as described in claim 6, characterized in that, The C code blocks to be encoded are obtained by adding CRC bits to at least one of the C first segments, including: The C code blocks to be encoded are obtained by adding CRC bits to each of the C first segments; or, The C code blocks to be encoded are obtained by adding CRC bits to one of the C first segments.

8. The method as described in claim 7, characterized in that, When the C code blocks to be encoded are obtained by adding CRC bits to each of the C first segments, the number of CRC bits added to each of the C first segments is determined according to the length of the first segment.

9. The method as described in claim 7 or 8, characterized in that, The C code blocks to be encoded are obtained by adding CRC bits to one of the C first segments, including: The C code blocks to be encoded are obtained by adding CRC bits to the longest of the C first segments.

10. The method according to any one of claims 1 to 9, characterized in that, When C=2, the concatenated codeword is [C1⊕C2, C2] or [C1, C1⊕C2], where C1 and C2 are coded code blocks.

11. The method according to any one of claims 1 to 9, characterized in that, When C=3 and the rate matching method is punched, the concatenated codeword is [C1⊕C3, C2⊕C3, C3], or [C1, C2, C1⊕C2⊕C3]; When C=3 and the rate matching mode is shortened, the concatenated codeword is [C1⊕C2⊕C3, C2, C3] or [C1, C1⊕C2, C1⊕C3], where C1, C2, and C3 are coded code blocks.

12. The method according to any one of claims 1 to 9, characterized in that, When C=4, the concatenated codeword is [C1⊕C2⊕C3⊕C4, C2⊕C4, C3⊕C4, C4], or [C1, C1⊕C2, C1⊕C3, C1⊕C2⊕C3⊕C4], where C1, C2, C3, and C4 are coded code blocks.

13. The method according to any one of claims 1 to 12, characterized in that, The value of C is determined based on the number of information bits, or the value of C is determined based on the number of information bits and the total number of encoded bits.

14. The method as described in claim 13, characterized in that, If the number of information bits is greater than or equal to m*k, then C = k + 1, where m is predefined / configured; or, If the number of information bits is greater than or equal to a*k, and the total number of encoded bits is greater than or equal to b*k, then C = k+1, where a and b are predefined / configured.

15. The method according to any one of claims 1 to 14, characterized in that, The ratio of the C first segments is determined based on the bit rate.

16. An information processing method, characterized in that, include: Input the sequence to be decoded; The sequence to be decoded is decoded to obtain a decoded bit sequence. The decoded bit sequence includes C second segments, each of the C second segments includes a first segment, and the C first segments are obtained by segmenting information bits. At least two of the C first segments have different lengths.

17. The method as described in claim 16, characterized in that, The information bits include payload bits, or the information bits include payload bits and CRC bits.

18. The method as described in claim 16 or 17, characterized in that, When C=2, the lengths of the two first segments are different.

19. The method as described in claim 16 or 17, characterized in that, When C=3, the lengths of the three first segments are different, or, two of the three first segments have the same length, but the lengths of each of the two first segments are different from the length of the other first segment.

20. The method as described in claim 16 or 17, characterized in that, When C=4, two of the four first segments have the same length, but their lengths are different from the other two first segments.

21. The method according to any one of claims 16 to 20, characterized in that, At least one of the C second segments includes CRC bits; the method further includes: Perform CRC check on at least one of the C second segments.

22. The method as described in claim 21, characterized in that, At least one of the C second segments includes CRC bits, including: Each of the C second segments includes CRC bits; or, One of the C second segments includes CRC bits.

23. The method as described in claim 22, characterized in that, When each of the C second segments includes CRC bits, the number of CRC bits included in each of the C second segments is determined based on the length of the first segment corresponding to the second segment.

24. The method as described in claim 22 or 23, characterized in that, One of the C second segments includes CRC bits, including: the second segment with the most information bits among the C second segments includes CRC bits.

25. The method according to any one of claims 16 to 24, characterized in that, The value of C is determined based on the number of information bits, or the value of C is determined based on the number of information bits and the total number of encoded bits.

26. The method as described in claim 25, characterized in that, If the number of information bits is greater than or equal to m*k, then C = k + 1, where m is predefined / configured; or, If the number of information bits is greater than or equal to a*k, and the total number of encoded bits is greater than or equal to b*k, then C = k+1, where a and b are predefined / configured.

27. The method according to any one of claims 16 to 26, characterized in that, The ratio of the C first segments is determined based on the bit rate.

28. An information processing device, characterized in that, include: A processor, when invoked a computer program in memory, causes the apparatus to perform the method as described in any one of claims 1 to 15, or the method as described in any one of claims 16 to 27.

29. A computer-readable storage medium, characterized in that, Used to store computer programs, which, when run on a computer, cause the computer to implement the method as described in any one of claims 1 to 15, or the method as described in any one of claims 16 to 27.

30. A computer program product, the computer program product comprising a computer program, characterized in that, When the computer program is run on a computer, it causes the computer to implement the method as described in any one of claims 1 to 15, or the method as described in any one of claims 16 to 27.

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