Microcontroller-oriented tinyml energy efficiency evaluation method and system

Abstract

The present application relates to the technical field of embedded artificial intelligence and Internet of Things, and in particular to a TinyML energy efficiency evaluation method and system for microcontrollers. The method comprises: parsing a user-uploaded ONNX model, generating a hierarchical configuration file, and further generating inference calling code; automatically compiling the inference calling code through a compiler and deploying firmware to a TinyML node to run neural network inference; in the process of neural network inference, an IO state sampling sequence is obtained by sampling IO flip-flop signals output by a microcontroller on the TinyML node, the IO state sampling sequence including stage boundaries and timestamp information at the operator level; voltage and current in the process of neural network inference are collected to obtain a power consumption sampling sequence; the IO state sampling sequence and the power consumption sampling sequence are time-aligned, time intervals of each operator execution stage are matched with corresponding energy consumption data, and an energy efficiency evaluation result is obtained.

Description

Technical Field

[0001] This invention relates to the fields of embedded artificial intelligence and Internet of Things technology, specifically to a TinyML energy efficiency evaluation method and system for microcontrollers. Background Technology

[0002] The statements in this section are merely background information related to the present invention and do not necessarily constitute prior art.

[0003] With the rapid development of the Internet of Things (IoT) and edge computing, deploying machine learning models on resource-constrained microcontrollers has become an important trend, giving rise to TinyML technology. TinyML reduces cloud dependency, improves response speed, and enhances data privacy by performing inference on the edge. Currently, mainstream microcontroller manufacturers offer customized model deployment tools, and the open-source community has launched lightweight inference engines such as TensorFlow Lite Micro, initially realizing model conversion, quantization, and inference execution. In terms of performance evaluation, benchmark systems such as TinyMLPerf provide unified evaluation from dimensions such as latency, power consumption, and accuracy.

[0004] However, the existing TinyML development and evaluation system is characterized by a fragmented toolchain and a lack of integrated support. Model analysis, compilation and deployment, serial port debugging, power consumption data acquisition, and result analysis typically rely on multiple independent tools working together, requiring significant manual intervention to establish a continuous and consistent evaluation process. This fragmented approach leads to insufficient accuracy in performance and power consumption data acquisition, making it difficult to achieve a precise correspondence between operator-level execution behavior and energy consumption changes, severely limiting the energy efficiency co-optimization capabilities of TinyML models on microcontrollers. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a TinyML energy efficiency evaluation method and system for microcontrollers. This invention can accurately establish a time-aligned mapping between the operator-level execution behavior of the ONNX model on TinyML nodes and the energy consumption changes of each power rail, thereby significantly improving the authenticity and credibility of the joint performance and power consumption evaluation.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: Firstly, a TinyML energy efficiency evaluation method for microcontrollers is provided, including: Parse user-uploaded ONNX models; Based on the parsing results and the preset development environment configuration, a hierarchical configuration file is automatically generated, and inference call code is generated according to the hierarchical configuration file. The inference call code is automatically compiled by the compiler and deployed to the TinyML node to run neural network inference. During the neural network inference process, the IO state sampling sequence is obtained by sampling the IO toggle signals output by the microcontroller on the TinyML node. The IO state sampling sequence includes the operator-level stage boundaries and timestamp information during the neural network inference process. The voltage and current during the neural network inference process are collected to obtain the power consumption sampling sequence. The IO state sampling sequence and the power consumption sampling sequence are time-aligned to obtain the energy consumption data. The time intervals of each operator execution stage are matched with the corresponding energy consumption data to obtain the energy efficiency assessment results; the time-aligned energy efficiency assessment results are then visualized.

[0007] Secondly, a TinyML energy efficiency evaluation system for microcontrollers is provided, including: a host computer and TinyML nodes; The host computer includes: a model analysis module, a configuration file generation module, a conversion and deployment module, and a performance analysis module; The model analysis module is used to parse the ONNX model uploaded by the user; The configuration file generation module is used to automatically generate hierarchical configuration files based on the parsing results and preset development environment configurations; The conversion and deployment module is used to generate inference call code according to the hierarchical configuration file, and automatically compile the inference call code through the compiler and deploy the firmware to the TinyML node; The performance analysis module is used to match the time interval of each operator execution stage with the corresponding energy consumption data to obtain the energy efficiency evaluation result; and output the time-aligned energy efficiency evaluation result for visualization. The TinyML node includes: a microcontroller and a monitoring module; The microcontroller is used to receive automatically compiled inference call code and run neural network inference; The monitoring module is used to: obtain an IO state sampling sequence by sampling the IO toggle signal output by the microcontroller on the TinyML node during the neural network inference process; the IO state sampling sequence includes the operator-level stage boundary and timestamp information during the neural network inference process; collect voltage and current during the neural network inference process to obtain a power consumption sampling sequence; and time-align the IO state sampling sequence and the power consumption sampling sequence to obtain energy consumption data.

[0008] The above technical solution has the following advantages or beneficial effects: This invention integrates ONNX model parsing, hierarchical configuration, automatic inference code generation, compilation and deployment, and multi-track power consumption timing acquisition. It accurately establishes a time-aligned mapping between the operator-level execution behavior of the ONNX model on the TinyML node and the energy consumption changes of each power rail, thereby significantly improving the realism and reliability of the joint performance and power consumption evaluation. Simultaneously, the evaluation board designed in this invention supports heterogeneous cores such as Cortex-M4 and Cortex-M7, as well as multi-level storage structures such as TCM, SRAM, SDRAM, and Flash. This allows for a more comprehensive reflection of the execution characteristics and resource overhead of neural network models on TinyML nodes within complex MCU platforms, making it suitable for research and applications in heterogeneous collaboration and energy-sensitive scenarios. This invention integrates TinyML development and evaluation, consolidating model analysis, compilation and deployment, runtime debugging, serial port visualization, power consumption acquisition, and result analysis into a unified platform. This effectively reduces the operational complexity caused by multiple tools and significantly improves the efficiency and convenience of TinyML application development. Furthermore, this invention automates the model compilation, download, acquisition, storage, and analysis processes, forming a closed-loop support system for TinyML model development, evaluation, and optimization. This enables developers to continuously optimize model structure, adjust deployment strategies, and optimize resource scheduling based on unified metrics. Attached Figure Description

[0009] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0010] Figure 1 This is a flowchart of the TinyML energy efficiency evaluation method for microcontrollers in a specific embodiment of the present invention; Figure 2 The current curve shown in the host computer of a specific embodiment of the present invention; Figure 3 The voltage curve shown in the host computer of a specific embodiment of the present invention; Figure 4 The power consumption line graph shown in the host computer of a specific embodiment of the present invention; In the diagram, CH1, or channel 1, represents the WIFI channel; CH2, or channel 2, represents the MCU channel; and CH3, or channel 3, represents the DRAM channel. Detailed Implementation

[0011] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.

[0012] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments of the invention. The terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0013] In this embodiment of the invention, "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Furthermore, in the description of this invention, "multiple" refers to two or more.

[0014] Furthermore, to facilitate a clear description of the technical solutions of the embodiments of the present invention, the terms "first" and "second" are used in the embodiments of the present invention to distinguish identical or similar items with essentially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and the terms "first" and "second" are not necessarily different.

[0015] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.

[0016] Terminology Explanation: TinyML refers to performing machine learning tasks on resource-constrained devices.

[0017] TinyML model: refers to a specific neural network model that performs machine learning tasks on resource-constrained devices.

[0018] Example 1 This embodiment provides a TinyML energy efficiency evaluation method for microcontrollers, including: S1: Parse the ONNX model uploaded by the user; S2: Based on the parsing results and the preset development environment configuration, automatically generate a hierarchical configuration file, and generate inference call code according to the hierarchical configuration file; S3: Automatically compile the inference call code using the compiler and deploy the firmware to the TinyML node to run neural network inference; S4: During the neural network inference process, the IO state sampling sequence is obtained by sampling the IO toggle signal output by the microcontroller on the TinyML node. The IO state sampling sequence includes the stage boundary and timestamp information of the operator level during the neural network inference process. The voltage and current during the neural network inference process are collected to obtain the power consumption sampling sequence. The IO state sampling sequence and the power consumption sampling sequence are time-aligned to obtain the energy consumption data. S5: Match the time interval of each operator execution stage with the corresponding energy consumption data to obtain the energy efficiency assessment results; output the time-aligned energy efficiency assessment results for visualization.

[0019] Step S1 is as follows: After the user uploads the ONNX model file to the host computer, the ONNX analysis tool is called to parse the ONNX model, analyze and statistically analyze the operator type, computational complexity, and parameter distribution, and construct a standardized analysis result data structure.

[0020] In this embodiment, the specific steps for analyzing and statistically analyzing operator type, computational complexity, and parameter distribution are as follows: Regarding operator types, the operator types are extracted by traversing all computation nodes, the number and proportion of each type of operator are counted, and the set of operator types and operator distribution statistics are output.

[0021] In terms of computational complexity analysis, the total computational cost and the distribution of computational cost by operator type are output by calculating the number of multiply-accumulate operations (MAC) and floating-point operations (FLOPs) for each operator and summing them up by operator type.

[0022] Regarding parameter distribution, the total number of parameters and hierarchical parameter distribution data are output by statistically analyzing the data volume of all weight tensors.

[0023] Finally, all the analysis data is summarized to generate JSON-formatted structured analysis data and HTML visualization reports, which are displayed in tables and charts on the host computer interface, and local export is also supported.

[0024] Step S2 is as follows: S2.1: Configure the development environment. After generating JSON-formatted structured analysis data, complete the embedded development environment configuration management on the configuration page. Users set parameters such as Keil toolchain path, project file path, compilation type, and debugging options. Configuration changes are automatically saved to the keil-build.ini file. The system automatically verifies the validity of the path and the integrity of the configuration, and outputs a standardized compilation configuration data structure containing toolchain path, project path, compilation options, and debugging parameters.

[0025] S2.2: Perform layer parsing, call the script to complete the layer parsing operation, traverse all C files in the Keil project directory, match custom operator function calls using regular expressions, extract information such as function name, parameter list, weight bias reference, etc., establish the operator call order and parameter mapping relationship, and finally output a layer configuration JSON file containing layer type, input-output relationship, and parameter reference relationship.

[0026] S2.3: Based on the hierarchical configuration JSON file, the create-invoke-layers.py script is called to automatically generate inference call code that conforms to the CMSIS-NN specification.

[0027] The system generates operator call logic in hierarchical order, constructs a unified entry function, declares header file references and implements the switching and use of memory buffers such as bufferA / buffer1 / buffer0, supports the insertion of debugging delay logic, and finally generates two inference call code files, invoke-layers.c and invoke-layers.h, which can directly replace the files with the same names in the Keil project for compilation.

[0028] Step S3 is as follows: Set the Keil compilation and flashing software path, construct the UV4.exe command-line parameters, and start the Keil project compilation process via subprocess. This automatically compiles and builds the project containing invoke_layers.c / h, hiding the host computer interface and pop-up interference. It captures the standard output stream in real time and displays the compilation information line by line in the host computer's log window. After compilation, it automatically parses the log to determine the result. If successful, it outputs an executable firmware file and deploys it to a TinyML node to run neural network inference; otherwise, it outputs detailed error information.

[0029] Step S4 is as follows: S4.1: After deployment, the energy consumption monitoring process begins, and TinyML nodes and host computers are initialized.

[0030] S4.2: Perform real-time data acquisition and analysis.

[0031] During neural network inference, the IO state sampling sequence is obtained by sampling the IO toggle signals output by the microcontroller on the TinyML node. The IO state sampling sequence includes the operator-level stage boundaries and timestamp information during neural network inference. The voltage and current data of the three channels of WIFI, MCU, and DRAM on the TinyML node are collected by the INA3221 module. The actual voltage and current values ​​of the three channels are calculated by the preset conversion coefficients and used as the power consumption sampling sequence. The IO state sampling sequence and the power consumption sampling sequence are time-aligned to obtain the energy consumption data. The energy consumption data is uploaded to the host computer in CSV format via UART, and the LED pin is flipped to indicate the operating status.

[0032] Step S5 is as follows: The time intervals of each operator execution phase are matched with the corresponding energy consumption data to obtain energy efficiency assessment results, which include voltage, current, and power consumption.

[0033] In this embodiment, data visualization is specifically achieved through MonitorPage, such as... Figure 2 and Figure 3 As shown, voltage and current are directly displayed as curves. Power consumption data is calculated based on the voltage and current data, and a power consumption line graph is plotted. In this embodiment, the power consumption line graph also includes model layer runtime and model layer number, such as... Figure 4 As shown, the duration information represents the running time of the model layer, and the sampling points represent the number of model layers.

[0034] In this embodiment, the host computer continuously monitors the data stream through an independent receiving thread, manages the data using a rolling window algorithm, retains 10,000 data points by default, and automatically removes the oldest data when the limit is exceeded. The relative time is calculated based on the first data point, and the structured real-time voltage and current data and buffer queue are output.

[0035] In this embodiment, the voltage energy consumption graph is set to display three-channel voltage curves with a fixed range of 0-5V, and the current energy consumption graph uses automatic ranging to display three-channel current curves. The graphs support anti-aliasing rendering, grid display, and legend annotation. The data update cycle is 200ms, and the display refresh cycle is 100ms. The interface supports operations such as starting / stopping data acquisition, refreshing the serial port list, clearing data, and exporting historical data.

[0036] Example 2 This embodiment provides a TinyML energy efficiency evaluation system for microcontrollers, including: a host computer and TinyML nodes; The host computer includes: a model analysis module, a configuration file generation module, a conversion and deployment module, and a performance analysis module; In the model analysis module of this embodiment, after the user uploads the ONNX model file to the host computer, the ONNX analysis tool is called to parse the ONNX model, analyze and statistically analyze the operator type, computational complexity, and parameter distribution, and construct a standardized analysis result data structure.

[0037] In the configuration file generation module of this embodiment, hierarchical configuration files are automatically generated based on the parsing results and the preset development environment configuration. The preset development environment configuration is set by the user interacting with the Keil file and selecting parameters such as Keil path configuration, project file path configuration, compilation type, and debug code on / off to complete the development environment configuration. After the configuration selection is complete, the shared configuration is read through ConfigParser to ensure data consistency.

[0038] In the conversion and deployment module of this embodiment, inference call code is generated according to the hierarchical configuration file, and the inference call code is automatically compiled and deployed to the TinyML node by the compiler. The specific steps of automatically compiling and deploying the firmware to the TinyML node by the compiler are as follows: calling X-CUBE-AI to automatically convert the ONNX model into a format that can be deployed by the target TinyML node, and automatically embedding the converted model into a preset TinyML project template to form a deployment project adapted to the target hardware platform.

[0039] The performance analysis module is used to match the time interval of each operator execution stage with the corresponding energy consumption data to obtain the energy efficiency assessment results; the time-aligned energy efficiency assessment results are then visualized.

[0040] In this embodiment, the TinyML node includes a microcontroller and a monitoring module. The microcontroller receives automatically compiled inference call code and runs neural network inference. The monitoring module, during neural network inference, samples the IO toggle signals output by the microcontroller on the TinyML node to obtain an IO state sampling sequence, which includes operator-level stage boundaries and timestamp information during neural network inference; it also collects voltage and current data during neural network inference to obtain a power consumption sampling sequence; and it performs unified time alignment between the power consumption sampling sequence and the IO state sampling sequence to obtain energy consumption data.

[0041] In this embodiment, the microcontroller in the TinyML node is specifically an STM32H7 heterogeneous microcontroller, including a Cortex-M7 core with a maximum clock frequency of 480MHz and a Cortex-M4 core with a maximum clock frequency of 240MHz. It can support heterogeneous dual-core collaborative processing for complex TinyML application scenarios and is used to evaluate the execution efficiency of dual-core combinations under different task partitioning methods.

[0042] In this embodiment, the TinyML node also includes a memory, which contains various storage resources with different capacities and access latency characteristics, such as on-chip TCM and SRAM.

[0043] In this embodiment, the TinyML node is further configured with off-chip SDRAM and Flash memory to meet the needs of neural network model storage, sensor data caching, and intermediate result reading and writing. Simultaneously, the TinyML node integrates image sensors, audio sensors, accelerometers, and ToF sensors, providing real-time multimodal data input for hardware-in-the-loop TinyML application development and hardware support for online learning methods.

[0044] In this embodiment, the TinyML node also integrates a WIFI communication unit for data transmission with the host computer, and can also communicate with other TinyML nodes in a network, thereby supporting policy evaluation in multi-node collaborative scenarios.

[0045] In this embodiment, the monitoring module includes a Raspberry Pi (Pico) and an INA3221 multi-channel power monitoring unit. The Raspberry Pi (Pico) includes a fine-grained execution status monitoring unit and a timing alignment unit.

[0046] In this embodiment, the Raspberry Pi and the STM32H7 heterogeneous microcontroller are interconnected through multiple I / O channels to complete the interaction of control information such as task execution start and stop signals.

[0047] In this embodiment, the Raspberry Pi (Pico) is connected to the INA3221 multi-channel power monitoring unit via an I2C bus. During neural network inference, the Raspberry Pi (Pico) controls the INA3221 to sample the voltage and current of multiple power rails, obtaining a power consumption sampling sequence. The power rails include the STM32H7 heterogeneous microcontroller power rail, the off-chip SDRAM memory power rail, and the WIFI communication unit power rail. With simultaneous sampling of all three channels, the sampling frequency can reach up to 500Hz. Based on the collected voltage and current data, the power consumption information and cumulative energy consumption information of each power rail at different operating stages are calculated.

[0048] In this embodiment, in the fine-grained execution state monitoring unit, the Raspberry Pi Pico obtains the operator-level stage boundaries and timestamp information in the neural network inference process by sampling the IO toggle signal output by the STM32H7 heterogeneous microcontroller. The sampling interval reaches the microsecond level to realize the execution delay measurement from the operator level to the network level.

[0049] To accurately correlate the power consumption of each operator with changes in energy consumption at the operator level, the specific implementation process is as follows: First, the `split_onnx_for_mcu_benchmark.py` model splitting script is automatically called to split the ONNX model into ONNX files for each operator. Then, for each operator's ONNX file, the X-CUBE-AI ModelProcessor toolchain generates corresponding files such as `network.c` and `network.h`, and automatically replaces the corresponding files in the X-CUBE-AI folder of the Keil project. I / O high / low level toggling signals are added to each operator's ONNX file. The Raspberry Pi Pico pin GP19 is directly connected to the STM32H7 heterogeneous microcontroller pin PB14. When entering the next operator's ONNX file, the PB14 pin is pulled high, and the Raspberry Pi Pico pin GP19 performs microsecond-level detection. When the calculation in the operator's ONNX file is completed, the PB14 pin is pulled low, and the Raspberry Pi Pico stops detection, obtaining the I / O state sampling sequence.

[0050] In this embodiment, the timing alignment unit is used to perform unified time alignment between the power consumption sampling sequence and the IO state sampling sequence to obtain energy consumption data.

[0051] In some embodiments, the mapping between model-level execution behavior and energy consumption changes can also be implemented. The specific process is as follows: The ONNX model is generated using the X-CUBE-AI Model Processor toolchain, producing files such as network.c / network.h, and these files are automatically replaced with the corresponding files in the X-CUBE-AI folder of the Keil project. I / O high / low level toggling signals are added to each ONNX model layer. The GP19 pin of the Raspberry Pi Pico is directly connected to the PB14 pin of the STM32H7 heterogeneous microcontroller. When entering the next ONNX model layer, the PB14 pin is pulled high, and the GP19 pin on the Raspberry Pi Pico instantly performs microsecond-level detection. When the calculation of the ONNX model layer is completed, the PB14 pin is pulled low, and the Raspberry Pi Pico stops detection, obtaining the I / O state sampling sequence.

[0052] In this embodiment, the TinyML node and the host computer are initialized before the monitoring module begins monitoring. After power-on, the monitoring module automatically performs initialization, writing configuration parameters to the INA3221 multi-channel power consumption monitoring chip via the I2C interface. This sets the continuous conversion mode and three-channel sampling parameters, and simultaneously initializes the UART communication link with a baud rate of 115200, 8 data bits, no parity, and 1 stop bit. The monitoring loop uses an independent power supply design to ensure non-intrusive data acquisition. The host computer automatically enumerates available serial ports through the monitoring configuration page. After the user selects the corresponding port and initiates a connection, a data transmission channel is established through PicoBridge, outputting a connection status indicator. If the connection is successful, a data receiving thread is started.

[0053] In some embodiments, the host computer also includes an automated multi-level performance data construction module. This module is designed for TinyML performance prediction tasks and is used to automatically generate candidate neural network structures around a pre-defined model exploration space. It then performs feature analysis, embedded deployment, and hardware performance testing on these candidate neural network structures, thereby constructing a multi-level performance dataset that establishes a one-to-one correspondence between model design parameters, resource features, and hardware performance testing.

[0054] The automated multi-level performance data construction module specifically includes a model structure generation unit, a feature analysis unit, an automatic deployment and execution unit, and a data mapping and sample generation unit.

[0055] The model structure generation unit is used to systematically construct candidate network structures based on a preset exploration space. The exploration space includes at least one or more of the following: model input size, network width, network depth, and operator type. By combining and configuring different structural parameters, diverse candidate models are generated in batches to provide a sample basis for subsequent performance prediction modeling.

[0056] The feature analysis unit drives the ONNX Runtime through automated scripts to extract features from each candidate ONNX model. The features include at least one or more of the following: computational complexity, parameter quantity, weight space, and activation scale, in order to obtain analysis results that reflect the model's logical complexity and resource requirements.

[0057] The automatic deployment execution unit is used in conjunction with Keil IDE to automatically complete the compilation, linking, downloading, and resetting operations of the deployment project, thereby achieving full automation from model structure generation to embedded execution and verification.

[0058] The data mapping and sample generation unit is used to establish the correspondence between model design parameters, resource characteristics and hardware measured performance, and form training samples that can be used for TinyML performance prediction, so as to provide a data foundation for model deployment feasibility assessment, structure search and hardware-software co-optimization.

[0059] The automated multi-level performance data construction module constructs a multi-level performance dataset that includes at least: model structure layer data, used to characterize the network topology and configuration parameters of candidate models; model analysis layer data, used to characterize logical parameter characteristics such as the number of model parameters, computational cost, weight scale, and activation scale; hardware deployment layer data, used to characterize model conversion, compilation, and target platform adaptation information; and hardware measured performance layer data, used to characterize the peak storage, execution latency, and power consumption of the actual hardware deployed.

[0060] The descriptions of each embodiment in the above embodiments have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0061] The proposed system can be implemented in other ways. For example, the system embodiments described above are merely illustrative, and the division of modules described above is only a logical functional division. In actual implementation, there may be other division methods. For example, multiple modules may be combined or integrated into another system, or some features may be ignored or not executed.

Claims

1. A TinyML energy efficiency evaluation method for microcontrollers, characterized in that, include: Parse user-uploaded ONNX models; Based on the parsing results and the preset development environment configuration, a hierarchical configuration file is automatically generated, and inference call code is generated according to the hierarchical configuration file. The inference call code is automatically compiled by the compiler and deployed to the TinyML node to run neural network inference; During the neural network inference process, the IO state sampling sequence is obtained by sampling the IO toggle signal output by the microcontroller on the TinyML node. The IO state sampling sequence includes the operator-level stage boundary and timestamp information during the neural network inference process. The voltage and current during the neural network inference process are collected to obtain the power consumption sampling sequence. The IO state sampling sequence and the power consumption sampling sequence are time-aligned to obtain the energy consumption data. The time intervals of each operator execution stage are matched with the corresponding energy consumption data to obtain the energy efficiency assessment results; the time-aligned energy efficiency assessment results are then visualized.

2. The TinyML energy efficiency evaluation method for microcontrollers as described in claim 1, characterized in that, The process of parsing the user-uploaded ONNX model involves calling the ONNX analysis tool to parse the ONNX model, analyzing and statistically analyzing the operator type, computational complexity, and parameter distribution to obtain the ONNX model analysis results.

3. The TinyML energy efficiency evaluation method for microcontrollers as described in claim 1, characterized in that, The analysis and statistics on operator type, computational complexity, and parameter distribution are as follows: The operator types are analyzed by traversing all computation nodes to extract operator types, counting the number and proportion of each type of operator, and outputting the set of operator types and operator distribution statistics. The computational complexity is analyzed by calculating the number of multiplication and addition operations and the amount of floating-point operations for each operator and summing them up by operator type. The total computational complexity and the distribution of computational complexity by operator category are then output. The parameter distribution is analyzed by statistically analyzing the data volume of all weight tensors, and the total parameter volume and hierarchical parameter distribution data are output.

4. The TinyML energy efficiency evaluation method for microcontrollers as described in claim 1, characterized in that, Based on the parsing results and the preset development environment configuration, a hierarchical configuration file is automatically generated. Specifically, the Keil toolchain path, project file path, compilation type, and debugging option parameters are set. Configuration changes are automatically saved to the keil-build.ini file, and the validity of the path and the integrity of the configuration are verified. The script iterates through all C files in the Keil project directory, matches custom operator function calls using regular expressions, extracts function names, parameter lists, and weight bias reference information, establishes the relationship between operator call order and parameter mapping, and outputs a layer configuration JSON file containing layer type, input-output relationship, and parameter reference relationship.

5. The TinyML energy efficiency evaluation method for microcontrollers as described in claim 1, characterized in that, The inference call code is generated based on the hierarchical configuration file, specifically as follows: Based on the hierarchical configuration JSON file, the create-invoke-layers.py script is called to automatically generate inference call code that conforms to the CMSIS-NN specification; The operator call logic is generated in hierarchical order, a unified entry function is constructed, header file references are declared and the switching and use of memory buffers such as bufferA / buffer1 / buffer0 are implemented, debugging delay logic is supported, and finally two inference call code files, invoke-layers.c and invoke-layers.h, are generated.

6. A TinyML energy efficiency evaluation system for microcontrollers, characterized in that, include: Host computer, TinyML node; The host computer includes: a model analysis module, a configuration file generation module, a conversion and deployment module, and a performance analysis module; The model analysis module is used to parse the ONNX model uploaded by the user; The configuration file generation module is used to automatically generate hierarchical configuration files based on the parsing results and preset development environment configurations; The conversion and deployment module is used to generate inference call code according to the hierarchical configuration file, and automatically compile the inference call code through the compiler and deploy the firmware to the TinyML node; The performance analysis module is used to match the time interval of each operator execution stage with the corresponding energy consumption data to obtain the energy efficiency evaluation result; and output the time-aligned energy efficiency evaluation result for visualization. The TinyML node includes: a microcontroller and a monitoring module; The microcontroller is used to receive automatically compiled inference call code and run neural network inference; The monitoring module is used to obtain an IO state sampling sequence by sampling the IO toggle signal output by the microcontroller on the TinyML node during the neural network inference process. The IO state sampling sequence includes the operator-level stage boundary and timestamp information during the neural network inference process. It also collects voltage and current during the neural network inference process to obtain a power consumption sampling sequence. Finally, it aligns the IO state sampling sequence and the power consumption sampling sequence in time to obtain energy consumption data.

7. The TinyML energy efficiency evaluation system for microcontrollers as described in claim 6, characterized in that, The monitoring module includes a Raspberry Pi and an INA3221 multi-channel power monitoring unit; the Raspberry Pi includes a fine-grained execution status monitoring unit and a timing alignment unit; the microcontroller is specifically an STM32H7 heterogeneous microcontroller.

8. The TinyML energy efficiency evaluation system for microcontrollers as described in claim 7, characterized in that, The method of obtaining the IO state sampling sequence by sampling the IO toggle signal output by the microcontroller on the TinyML node is as follows: IO high / low level toggle signals are added to the ONNX file of each operator; the GP19 pin of the Raspberry Pi Pico is directly connected to the PB14 pin of the STM32H7 heterogeneous microcontroller; when entering the next operator ONNX file, the PB14 pin is pulled high, and the GP19 pin of the Raspberry Pi Pico performs detection; when the calculation in the operator ONNX file is completed, the PB14 pin is pulled low, and the Raspberry Pi Pico stops detection, thus obtaining the IO state sampling sequence.

9. The TinyML energy efficiency evaluation system for microcontrollers as described in claim 8, characterized in that, The ONNX file of the operator is obtained as follows: the split_onnx_for_mcu_benchmark.py model splitting script is automatically called to split the ONNX model into ONNX files of each operator; then, for each operator's ONNX file, the X-CUBE-AI ModelProcessor toolchain is used to generate corresponding network.c / network.h files, etc., and automatically replaces the corresponding files in the X-CUBE-AI folder in the Keil project; IO high and low level toggling signals are added to each operator's ONNX file.

10. The TinyML energy efficiency evaluation system for microcontrollers as described in claim 7, characterized in that, It also includes mapping model-level execution behavior to energy consumption changes. The specific steps are as follows: the ONNX model is generated into network.c / network.h files through the X-CUBE-AI ModelProcessor toolchain, and the corresponding files in the X-CUBE-AI folder of the Keil project are automatically replaced; IO high and low level toggling signals are added to each ONNX model layer, and the GP19 pin of the Raspberry Pi Pico is directly connected to the PB14 pin of the STM32H7 heterogeneous microcontroller; when entering the next ONNX model layer, the PB14 pin is pulled high, and the GP19 pin is detected; when the calculation of the ONNX model layer is completed, the PB14 pin is pulled low, the Raspberry Pi Pico stops detecting, and the IO state sampling sequence is obtained.

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