Chaotic image encryption method based on nonlinear electronic adjustable memristor double memristor chua circuit
Patent Information
- Application Number
- CN202611160611.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-03
- Publication Date
- 2026-10-27
AI Technical Summary
(1)对忆阻器非线性特性的调控多局限于对忆导幅值的简单缩放,极大程度上限制了混沌系统动力学的灵活调控
本发明可通过外部控制电压直接调节忆阻器的非线性强度,弥补了现有忆阻模型中仅能调节忆导幅值而无法调控非线性特性曲线形状的不足。
Smart Images

Figure CN122994433A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of encryption engineering technology, and in particular relates to a chaotic image encryption method based on a dual memristor Chua's circuit with a nonlinear electronically adjustable memristor. Background Technology
[0002] With the rapid development of the internet and multimedia technologies, digital images have become an important carrier of information transmission and are applied in many fields. However, the security issues of digital images during transmission and storage are becoming increasingly prominent. Traditional encryption methods have certain limitations. For example, DES (Data Encryption Standard) and AES (Advanced Encryption Standard) are mainly designed for text data. When processing image information with large data volume, special structure, and strong correlation between adjacent pixels, they suffer from low encryption efficiency, difficulty in eliminating inherent statistical information in the image, and vulnerability to attacks. Therefore, the need for information encryption is extremely urgent, and the security of image data has become a critical issue that urgently needs to be addressed.
[0003] Chaotic systems, due to their excellent properties such as initial value sensitivity and pseudo-randomness, are widely used in the field of image encryption. Among existing technologies, Fridrich first proposed a chaos-based "scramble-diffusion" image encryption architecture, which has become the basic architecture for chaotic image encryption. Since then, researchers have designed a large number of encryption schemes based on various chaotic sources such as Logistic mapping, Lorenz system, and Chen system.
[0004] In recent years, with the discovery of memristors as the fourth fundamental circuit element, memristor-based chaotic circuits, due to their rich dynamic behavior and high complexity, have gradually become a research focus in the field of chaotic image encryption. However, existing memristor-based chaotic encryption schemes have the following shortcomings: (1) The control of the nonlinear characteristics of memristors is mostly limited to the simple scaling of the memconductance amplitude, which greatly restricts the flexible control of the dynamics of chaotic systems.
[0005] (2) The dynamic behavior of the single memristor model is relatively simple, and the complexity of the resulting chaotic sequence is limited.
[0006] (3) The diffusion key stream generated by the chaotic sequence directly quantized by the chaotic system often has the problem of uneven statistical distribution, which leads to the ciphertext brightness histogram being not flat enough and reduces the ability to resist statistical analysis.
[0007] As mentioned above, current memristor-based chaotic system design still has room for improvement in areas such as nonlinear intensity control, generating highly complex chaotic sequences, and ensuring uniform statistical distribution of ciphertext. Therefore, the chaotic keystreams constructed from chaotic sequences obtained by existing technologies are insufficient to fully guarantee the high security and flexibility requirements for image encryption in the field of information security. Summary of the Invention
[0008] To address the shortcomings of the existing technologies, this invention proposes a chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor. This method aims to solve the problem that existing technologies are insufficient in terms of flexible control of nonlinear intensity and generation of highly complex chaotic sequences, which cannot meet the requirements of high security and high flexibility for image encryption in the field of information security.
[0009] To achieve the above objectives, this invention provides a chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor, comprising: S1: Obtain the plaintext image to be encrypted, decompose the plaintext image, wherein if the plaintext image is a color image, decompose the color image into three independent channels R, G, and B; if the plaintext image is a grayscale image, copy the grayscale image into three identical channels; expand the two-dimensional pixel matrix of each channel into a one-dimensional vector, the length of each vector being the total number of pixels; S2: Construct a dual memristor Chua's circuit and solve the system differential equations to obtain a chaotic sequence; S3: For each channel, extract a sequence with the same length as a single channel from the corresponding chaotic sequence and generate a scrambling index using the sorting index method; take the remaining sequence and rearrange the pre-constructed 0-255 gray-level uniform sequences with equal frequencies using the sorting index method to generate a statistically uniform diffusion key. S4: Based on the scrambling index, perform position remapping on the one-dimensional vector of the corresponding channel to complete pixel position scrambling; S5: Based on the XOR mode with ciphertext feedback, the scrambled one-dimensional vector is encrypted point by point using the diffusion key to obtain the ciphertext vector. S6: Reshape the encrypted ciphertext vector into a two-dimensional matrix. Stack the two-dimensional matrices of the three channels into a three-dimensional array to obtain the final ciphertext image.
[0010] Optionally, step S2 specifically includes: Construct a dual-memristor Chua's circuit. Based on the classic Chua's circuit, replace the Chua's diode with two identical, anti-parallel, non-linear, electronically adjustable memristors. The two memristors are connected to a capacitor. C 1 Parallel connection, capacitor C 2 ,resistance R ,inductance L The remaining circuit is constructed; and a feedback factor is introduced into the flux state equation of the fourth-order circuit state equation to dynamically adjust the flux change rate. The system differential equation of the dual memristor Chua's circuit is numerically solved to obtain a chaotic sequence. The chaotic sequence is then subjected to transient removal and equal-interval sampling to obtain a discrete chaotic sequence of length 6N, which is divided into three segments corresponding to the three channels.
[0011] Optionally, the fourth-order circuit equation of the dual memristor Chua's circuit in step S2 is: in, G ( ) represents the memconductance value of the memristor. The magnetic flux is the integral of the voltage across the memristor over time. This is a DC bias flux. v 1 The voltage across the memristor. v 2 For capacitor C 2 Voltage at both ends, i L R is the inductor current, and R is the resistance value. The total memconductance of two memristors connected in reverse parallel has odd-symmetric N-type characteristics; ε It is a positive number. This is the memconductance value of the memristor at that moment; G max This represents the maximum memconductance of the memristor. G min t represents the minimum conductance of the memristor; t is the duration of the physical simulation.
[0012] Optionally, in step S2, the numerical solution of the system differential equation is performed using the fourth / fifth order Runge-Kutta method, and relative and absolute error tolerances are set to obtain an accurate chaotic time series.
[0013] Optionally, the process of generating the diffusion key in step S3 specifically includes: Construct a baseline uniform sequence U of length N. Sequence U is formed by repeating 0-255 cyclically until N elements are filled, such that the number of occurrences of each gray level in U is exactly equal or differs by at most one. Take the latter half of the chaotic sequence as S2, with a length of N. Use the sorting index method to sort the values in S2 in ascending order, and record the position of each element in the original sequence after sorting to obtain a random sequence Q with a length of N. Using the random sequence Q as an index, the baseline uniform sequence U is rearranged to obtain the diffusion key.
[0014] Optionally, the specific process of pixel position scrambling in step S4 includes: In the formula, M is a scrambled one-dimensional vector; M is a one-dimensional vector of length N; index is the scrambling index, which is a random sequence from 1 to N.
[0015] Optionally, in step S5, the scrambled one-dimensional vector is encrypted point-by-point using the diffusion key, specifically including: set up C For the ciphertext vector, P’ The scrambled one-dimensional vector, K It is a diffusion key sequence. N The length of the vector; The encryption process for the first key pixel C1 is as follows: In the formula, ⊕ represents the bitwise XOR operation; Remaining key pixels C i The encryption process is as follows: 。
[0016] Optionally, it also includes encryption and decryption ends, which are deployed separately; After generating the ciphertext image through steps S1-S6, the encryption end transmits all parameters, initial conditions, and solver tolerances of the dual memristor Chua's circuit as a key file to the decryption end. The decryption end uses the key file and combines it with the same system differential equation function as the encryption end to regenerate the chaotic sequence and complete the decryption.
[0017] The technical effects of this invention are as follows: This invention allows for direct adjustment of the nonlinear intensity of a memristor via an external control voltage, overcoming the limitation of existing memristor models that can only adjust the memconductance amplitude but cannot control the shape of the nonlinear characteristic curve.
[0018] This invention employs a structure of dual memristors connected in reverse parallel with bias magnetic flux, which effectively generates a nonlinear resistor with N-type negative conductance characteristics. Furthermore, it introduces a magnetic flux feedback factor, enabling the circuit to generate more complex chaotic dynamic behavior and greatly expanding the key space.
[0019] This invention generates a diffusion key by first constructing a baseline uniform sequence and then generating it using chaotic sorting. This ensures the statistical uniformity of the diffusion key, making the ciphertext brightness histogram flat and the information entropy close to the theoretical maximum value, while also preserving the unpredictability of the chaotic sequence.
[0020] This invention employs an XOR diffusion mode with ciphertext feedback, which makes the value of the current ciphertext pixel depend simultaneously on the current plaintext, the current key, and the previous ciphertext, forming a chain reaction. Any tiny change in any plaintext pixel will spread to all subsequent ciphertexts, enhancing the diffusion and plaintext sensitivity of the encryption algorithm, as well as the anti-statistical analysis capability of the encrypted image.
[0021] This invention supports unified encryption processing for both color and grayscale images, and has good compatibility and versatility. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0023] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a schematic diagram illustrating the separation of the encryption and decryption ends in an embodiment of the present invention; Figure 2 The diagram shows the schematic of the dual memristor Chua's circuit and the schematic of the nonlinear electronically adjustable memristor in the embodiments of the present invention. Figure 3 This is the phase diagram of the single-vortex chaotic attractor generated by the dual memristor Chua's circuit in this embodiment of the invention. Figure 4 This is a convergence image of the Lyapunov exponent of the chaotic system in an embodiment of the present invention; Figure 5 This is a comparison diagram of encryption and decryption results in an embodiment of the present invention; wherein, Figure 5 (a) is the input image. Figure 5 (b) is a ciphertext image. Figure 5 (c) is the image obtained after decryption; Figure 6 This is a encrypted brightness histogram of the RGB three-channel pixel values in an embodiment of the present invention; Figure 7 This is a graph showing the noise robustness test results in an embodiment of the present invention; Figure 8 This is a diagram showing the cutting robustness test results in an embodiment of the present invention; Figure 9 This is a flowchart illustrating the implementation of the chaotic image encryption method in this embodiment of the invention. Detailed Implementation
[0024] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as a limitation of the present invention, but rather as a more detailed description of certain aspects, features, and embodiments of the present invention.
[0025] Various modifications and variations can be made to the specific embodiments described in this specification without departing from the scope or spirit of the invention, as will be apparent to those skilled in the art. Other embodiments derived from this specification will also be obvious to those skilled in the art. This application specification and embodiments are merely exemplary.
[0026] The terms “include,” “including,” “have,” “contain,” etc., used in this article are all open-ended terms, meaning that they include but are not limited to.
[0027] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. This application will now be described in detail with reference to the accompanying drawings and embodiments.
[0028] Example 1 like Figure 1 - Figure 9 As shown, this embodiment provides a chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor. The method includes: acquiring an input plaintext image; converting the plaintext image into a chaotic sequence in the encryption system; generating two key streams from the chaotic source v1: a scrambling sequence and a diffusion sequence; completely scrambling the spatial positions of the plaintext image pixels to eliminate the correlation between adjacent pixels; modifying the grayscale values of the scrambled pixels so that any small change in the plaintext can diffuse to almost all ciphertext pixels; if the input is a color image, the scrambling-diffusion process is performed independently on the R, G, and B channels respectively; if the input is a grayscale image, it is copied into three identical channels or processed as a single channel, thereby achieving multi-image encryption; after the encryption end completes the generation of the ciphertext image, it saves all parameters and initial conditions of the chaotic system as a key file and transmits it to the decryption end through a secure channel. Decryption is the reverse process of encryption; the legitimate holder of the image must use the exact same chaotic sequence and parameters as during encryption to decrypt. By strictly executing the process in the reverse order of encryption, the ciphertext image is decrypted, and the original image can be recovered completely without loss. This embodiment combines a floating-ground nonlinear electronically adjustable memristor with a Chua's circuit, deeply integrating chaotic sequence generation and image encryption algorithms. It also achieves separate deployment of the encryption and decryption ends, and the key file contains no plaintext image information. The ciphertext pixel values are statistically uniformly distributed, with an information entropy close to the theoretical maximum of 8. The correlation coefficient between adjacent ciphertext pixels is reduced to below 0.002, significantly improving resistance to statistical analysis. This enhances the flexibility of encryption strength while greatly improving security.
[0029] The specific implementation process of this embodiment is as follows: Step 1: Read the input plaintext image and preprocess it. Determine whether the input image is a color image or a grayscale image. If it is a color image, decompose it into three independent channels: R, G, and B. If it is a grayscale image, copy it into three identical channels. Expand the two-dimensional pixel matrix of each channel into a one-dimensional vector, with the length of each vector being the total number of pixels N.
[0030] Step 2: Use the constructed dual memristor Chua's circuit to generate a chaotic sequence, in which two identical nonlinear electronically adjustable memristors are connected in reverse parallel to replace the Chua's diode in the classic Chua's circuit, and a feedback factor is introduced into the magnetic flux state equation of the fourth-order circuit state equation to dynamically adjust the rate of change of magnetic flux; numerically solve the circuit differential equation, perform transient removal and equal-interval sampling on the obtained chaotic sequence to obtain a discrete chaotic sequence of length 6N, which is divided into three segments corresponding to the three channels respectively.
[0031] Step 3: For each channel, extract a sequence of the same length as a single channel from the corresponding chaotic sequence and generate a scrambling index using the sorting index method; take the remaining sequence and rearrange the pre-constructed 0-255 gray-level uniform sequences with equal frequencies using the sorting index method to generate a statistically uniform diffusion key. Step 4: Using the scrambling index, perform position remapping on the plaintext one-dimensional vector of this channel to complete the pixel position scrambling.
[0032] Step 5: Using an XOR mode with ciphertext feedback, the scrambled plaintext vector is encrypted point by point using the aforementioned diffusion key to obtain the ciphertext vector. Step 6: Reshape the encrypted ciphertext vector into a two-dimensional matrix. Stack the two-dimensional matrices of the three channels into a three-dimensional array to obtain the final ciphertext image.
[0033] In a feasible dual-memristor Chua's circuit, a single memristor can be modeled using the following memconductivity model: Among them, G ( () represents the memconductance value of the memristor. The magnetic flux is the integral of the voltage across the memristor over time. C The control voltage provided by the external power supply, where α and β are coefficients.
[0034] The construction process of the dual-memristor Chua's circuit is as follows: Based on the classic Chua's circuit, the Chua's diode is replaced with two identical anti-parallel nonlinear electronically adjustable memristors. The two memristors are connected in parallel with capacitor C1, and capacitor C2, resistor R, and inductor L constitute the remaining circuit parts; wherein the voltage across capacitor C1 and the memristor is v1, the voltage across capacitor C2 is v2, and the inductor current is i. L The resistance value is R, and the total current flowing through the memristor is i. M Unbiased magnetic flux DC bias flux Control voltage v C .
[0035] The fourth-order circuit state equation of the chaotic system described above is: in, The total memconductance of two memristors connected in anti-parallel exhibits odd-symmetric N-type characteristics. The fourth-order circuit state equation introduces a feedback factor H(G,v1) to dynamically adjust the rate of change of magnetic flux. Where ε is a very small positive number.
[0036] It is feasible that, after the two memristors are connected in reverse parallel, their equivalent total conductance satisfies: ,in: The equivalent conductance is related to the magnetic flux. odd functions, in It exhibits negative conductivity near 0 and has N-type nonlinear current-voltage characteristics, which can be used to replace Chua's diode to generate chaos.
[0037] The magnetic flux state equation is feasible. In this context, the feedback factor H is used to dynamically adjust the rate of change of magnetic flux based on the sign of the memconductance value G and the voltage v1, in order to suppress magnetic flux divergence and enhance the complexity of the chaotic sequence.
[0038] In the step of constructing the chaotic system and generating the chaotic sequence, the numerical solution adopts the fourth / fifth order Runge-Kutta method, and sets relative error tolerance and absolute error tolerance to obtain accurate chaotic time series.
[0039] The fourth-order dual-memristor Chua's circuit state equations in this embodiment are feasible and possess a certain rigidity, while the chaos is extremely sensitive to minute changes in numerical values. In the Runge-Kutta method, RKF45 simultaneously calculates a less accurate solution using the fourth-order formula and a more accurate solution using the fifth-order formula; the difference between the two is the estimated value of the local error. The algorithm automatically adjusts the step size of the next step based on this estimate, i.e., the adaptive step size characteristic of ode45. If the error is less than the set tolerance, increase the step size to speed up the calculation; If the error exceeds the set tolerance, reduce the step size and recalculate the current step to ensure accuracy.
[0040] This feature enables the use of larger step sizes to improve efficiency when voltage changes are gradual; and the automatic use of smaller step sizes when voltage changes are drastic, precisely capturing the details of chaotic trajectories to prevent numerical divergence, thus obtaining a more accurate chaotic time series.
[0041] The feasible method for generating the diffusion key in step 3 is as follows: First, a baseline uniform sequence U of length N is constructed. This sequence is formed by cyclically repeating the values 0 to 255 until N elements are filled, ensuring that each gray level appears exactly once or at most once in U, resulting in an absolutely flat statistical distribution of pixel values. The latter half of the chaotic sequence segment S is taken as S2, also of length N. The values in S2 are sorted in ascending order using a sorting index method, and the position of each element in the original sequence is recorded, thus obtaining a random sequence Q of the same length N. Using the random sequence Q as an index, the baseline uniform sequence U is rearranged to obtain the diffusion key K = U(Q), i.e. Since this permutation pattern only changes the positions of the elements, the diffusion key K inherits the uniform distribution characteristic of U, while the permutation order is determined by the chaotic system, thus becoming unpredictable pseudo-randomness.
[0042] The scrambling operation in step 4 is feasible and specifically as follows: Let the plaintext one-dimensional vector be M, with length N; set the scrambling index to be an index, which is a random sequence from 1 to N; then the scrambled vector M satisfies: This operation only changes the pixel position, not the pixel value.
[0043] The feasible encryption process using XOR mode with ciphertext feedback in the diffusion operation is as follows: Let C be the ciphertext vector, P' be the scrambled plaintext vector, K be the diffusion key sequence, and N be the vector length. The first key pixel is generated by the following formula: Subsequent ciphertext pixels are generated by the following formula: , where the symbol ⊕ represents the bitwise XOR operation.
[0044] This encryption process forms a chain reaction: the current ciphertext C i The value of depends not only on the current plaintext pixel P i ’ and the current key byte K i It also depends on the previous ciphertext pixel C i-1 This overcomes the security flaw that the same plaintext pixels remain plaintext pixels after encryption in the no-feedback mode. It ensures that even a small change in any pixel in the plaintext will spread and affect all subsequent ciphertext pixels, greatly enhancing the diffusion and resistance to statistical analysis of the encryption algorithm.
[0045] In step 1, when the plaintext image is a color image, the three independent channels R, G, and B are directly extracted and processed separately; when the plaintext image is a grayscale image, the single channel of the grayscale image is copied into three identical channels and processed uniformly in the manner of a color image; after decryption, if the plaintext image is a grayscale image, any one of the three channels obtained from decryption is taken as the final decrypted image output.
[0046] In this embodiment, the decryption process is the strict inverse of the encryption process described above, and the decryption and encryption ends can be deployed separately. After generating the ciphertext image, the encryption end transmits all parameters, initial conditions, and solver tolerances of the chaotic system as a key file to the decryption end. The decryption end uses the key file and the same differential equation function as the encryption end to regenerate the chaotic sequence. The decryption end first uses the same diffusion key to perform an inverse diffusion operation to recover the scrambled plaintext pixel values, then uses the same scrambling index to perform an inverse scrambling operation to recover the initial pixel positions. Finally, the one-dimensional vector is reshaped into a two-dimensional image, and channels are merged or selected according to the original image type to complete the decryption.
[0047] As can be seen from the above deployment method of separating the encryption and decryption ends, the decryption end needs to obtain the decryption program, ciphertext image, key file, and system differential equation function file simultaneously in order to perform decryption. The key file includes the initial values v1(0), v2(0), i, and v3(0) of the four state variables of the dual memristor Chua's circuit. L (0) and (0); External control voltage v C Bias flux ; coefficients α and β.
[0048] Example 2 like Figures 1-9 As shown, this embodiment provides a chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor. The specific steps are as follows: Step 1: Input a plaintext image. In MATLAB, use the `imread` function to read the plaintext image into memory to obtain a matrix. If the input is a color image, a three-dimensional matrix will be obtained; if the input is a grayscale image, a two-dimensional matrix will be obtained. Each element in the matrix corresponds to the brightness value of a pixel, ranging from 0 to 255. When inputting a color image, the three independent channels (R, G, B) are directly retained; when inputting a grayscale image, three identical channels are copied and expanded into three identical channels for unified processing with color images. Each channel's two-dimensional pixel matrix, with dimensions height × width, is expanded into a one-dimensional vector by columns or rows, and the length of each vector is the total number of pixels N.
[0049] In this embodiment, a selected cat image (4096×3072 pixels) is used, N=12582912.
[0050] Step 2: Construct a dual memristor Chua's circuit with the following parameters: C1 = 10nF, C2 = 100nF, R = 1800Ω, L = 100mH, and memconductivity α = 1.25 × 10⁻⁶. -3 β=1, bias flux =0.6Wb, external control voltage v C =0.1V. The initial conditions of the system are [v1(0), v2(0), i L (0) [(0)] = [0.01, -0.01, 0, 0].
[0051] According to KCL and KVL, this chaotic system has a fourth-order circuit equation: Among them, equivalent conductance G eq ( )=G( - The feedback factor H(G,v1) is defined as: Where G=G( ), G max =α,G min =-α, ε=10 -6 .
[0052] To facilitate theoretical analysis and simulation calculations, the above fourth-order circuit equations are transformed into dimensionless equations. Therefore, a reference voltage v is selected. C Reference time RC2, reference magnetic flux βv C This yields the dimensionless variable: And dimensionless parameters: Substituting the numerical values, we get: Finally, we obtain the dimensionless equation: The fourth / fifth order Runge-Kutta method (i.e., the ode45 solver in MATLAB) was used to numerically integrate the above dimensionless equations, with a relative error tolerance of 10. -8 The absolute error tolerance is 10. -10 The maximum step size is limited to 1 (dimensionless time unit). The solution yields... After sequencing, it can be restored. The continuous trajectory is obtained, and the first 20% of the data of the continuous trajectory is discarded to eliminate the influence of transients on the whole, ensuring that the sequence is in a stable chaotic state.
[0053] Figure 3 The phase diagram of the single-vortex chaotic attractor generated by the dual memristor Chua's circuit in this embodiment can be used to determine whether the system has successfully entered a chaotic state.
[0054] Figure 4 This is a convergence image of the Lyapunov exponent of the chaotic system in this embodiment. The maximum Lyapunov exponent being greater than zero further indicates that the system has successfully entered a chaotic state.
[0055] Based on the total number of image pixels, the required number of chaotic sampling points is determined, and the remaining v1 sequence after removing transient data is sampled at equal intervals. Each channel requires 2N points to obtain a discrete chaotic sequence of length 6N. If the sequence length is insufficient, the simulation time is automatically extended and integration is repeated until the requirement is met. The total sequence is divided into three segments, each with a length of 2N, corresponding to the R, G, and B channels, respectively.
[0056] Step 3: The chaotic sequence segment S of each channel is further divided into two parts: generating an index, scrambling an index, and spreading a key. The generation of the scrambling index involves extracting a sequence S1 of the same length N as a single channel from the corresponding chaotic sequence as the scrambling sequence. The data in S1 is then sorted in ascending order using a sorting index method. The positions of the sorted elements in the original sequence are recorded, resulting in a random permutation P of the same length N. This permutation is unpredictable due to the pseudo-randomness of the chaotic sequence.
[0057] To generate the diffusion key, a baseline uniform sequence U of length N is constructed, where each byte value cyclically appears from 0 to 255, ensuring that the frequency of each byte value is strictly equal. Then, the remaining sequence S2 (also of length N) is taken, and a random permutation Q is obtained using the sorting index method. Using Q as the index, U is rearranged to obtain the diffusion key sequence K. The diffusion key obtained by this method naturally possesses a strictly uniform statistical distribution, while the permutation order is determined by the chaotic sequence, preserving the unpredictability of chaos.
[0058] Step 4: Perform the following scrambling operation on the plaintext one-dimensional vector P of the current channel, and remap the position of P using the scrambling index P: The above operations completely scramble the pixel positions, effectively eliminating spatial correlation in the image.
[0059] Step 5: Use the XOR mode with ciphertext feedback (CBC mode), let C be the ciphertext vector, K i This is the diffusion key bytes. First ciphertext: Subsequent encrypted text: , where the symbol ⊕ represents the bitwise XOR operation, thus obtaining the ciphertext vector C; This encryption process forms a chain reaction: the current ciphertext C i The value of depends not only on the current plaintext pixel P i ’ and the current key byte K i It also depends on the previous ciphertext pixel C i-1 This overcomes the security flaw that the same plaintext pixels remain plaintext pixels after encryption in the no-feedback mode. It ensures that even a small change in any pixel in the plaintext will spread and affect all subsequent ciphertext pixels, greatly enhancing the diffusion and resistance to differential attacks of the encryption algorithm.
[0060] Step 6: Reconstruct the encrypted one-dimensional vector C into a two-dimensional matrix with dimensions height × width, following the original scanning order. Stacking the two-dimensional arrays of the three channels into a three-dimensional array yields the final ciphertext image. The ciphertext image appears as completely random noise, from which the human eye cannot glean any information.
[0061] Figure 5 The following is a comparison of the encryption and decryption results in this embodiment: (a) is the input image, (b) is the ciphertext image, and (c) is the image obtained after decryption. It can be observed that the decrypted image is consistent with the input plaintext image.
[0062] Step 7: Decrypt the ciphertext image. Decryption is the strict inverse of encryption. It requires the legitimate holder of the plaintext image to use the exact same chaotic sequence and parameters as during encryption to decrypt the ciphertext image. First, perform inverse diffusion: recover the pixel values of each pixel of the scrambled plaintext from the ciphertext C and the diffusion key K. Then perform reverse scrambling: use the scrambling index P generated during encryption to reorder and obtain the reverse permutation P. -1 Restore P1' to its original pixel position: Finally, the image is restored by reshaping the one-dimensional vector into a two-dimensional image. If it is a color image, all three channels are merged for output; if it is a grayscale image, only one channel needs to be output to obtain the decrypted image.
[0063] Step 8: Separate implementation of encryption and decryption. In this embodiment, the decryption and encryption ends can be deployed on different computing devices. After generating the ciphertext image, the encryption end saves all parameters of the chaotic system, initial conditions, and solver tolerances as a key file (e.g., secret_key.mat) and transmits it to the decryption end through a secure channel. Upon receiving the key file and the ciphertext image, the decryption end, using the same dimensionless differential equation function (e.g., nondim_chua) as the encryption end, re-solves the chaotic system using the parameters and initial values recorded in the key file, generating the same v1 sequence as the encryption end. Subsequently, the decryption end strictly follows the inverse diffusion and inverse scrambling operations described in Step 7 to losslessly recover the original plaintext image.
[0064] Due to the extreme sensitivity of chaotic systems to initial conditions and parameters, if any parameter in the key file contains a value of 10... -10 Even a tiny deviation in magnitude will result in a chaotic sequence generated at the decryption end that is completely different from that at the encryption end, leading to a completely random, noisy image in the decryption result. Therefore, the security of this method relies not only on the unpredictability of the chaotic sequence but also on the secure transmission of the key file and the sensitivity of the chaotic system to the key. The key file contains only the parameters of the chaotic system and no plaintext image information. Even if intercepted, an attacker, without knowing the specific differential equation form and function implementation, cannot generate the correct chaotic sequence for decryption; similarly, an attacker, without knowing the decryption program, cannot decrypt the ciphertext image. Thus, in this embodiment, the decryption end needs to simultaneously possess the decryption program, the ciphertext image, the key file, and the dimensionless differential equation function file to decrypt the ciphertext image; all four are indispensable, greatly increasing the security of this method.
[0065] To further verify the reliability of this embodiment under the parameters, a series of security tests were conducted, such as noise robustness test, pruning robustness test, and key sensitivity test.
[0066] Under the parameters of this embodiment, the RGB three-channel histograms of the encrypted image all show an approximately horizontal distribution, verifying the statistical uniformity of the encrypted pixel values, such as... Figure 6As shown, the information entropy of the red channel reaches over 7.997, and the average information entropy of the three channels reaches over 7.996, which is close to the theoretical maximum value of 8. The correlation coefficient between adjacent pixels of the encrypted image drops to below 0.002, indicating that the encryption effectively eliminates redundant information in the image space.
[0067] Noise robustness test: Figure 7 The images shown are the noise robustness test results in this embodiment, with ciphertext images after adding 1%, 3%, and 5% salt-and-pepper noise, respectively. Below each image is the corresponding decryption result. Figure 7 It can be seen that the decrypted image content can still be clearly identified after adding different salt and pepper noise, indicating that the algorithm has a good tolerance to transmission noise.
[0068] Cutting robustness test: Figure 8 The images shown are the cropping robustness test results in this embodiment. They are the encrypted images after cropping 10% and 25% of the image area, respectively. The corresponding images are shown below the corresponding decryption results. It can be seen from the decrypted images that the pixels in the uncropped area are all restored, and there is no error propagation outside the cropped area. This verifies that local loss does not affect the global correct decryption under the scrambling-diffusion architecture.
[0069] Key sensitivity test: When the initial chaotic value used for decryption differs slightly from that used for encryption (e.g., 10), the test is conducted. -10 The decryption result (on a scale of [number] units) is completely random and noisy, making it impossible to extract any original image information, thus verifying the extreme sensitivity of this method to the key.
[0070] The above description is merely a preferred embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor, characterized in that, include: S1: Obtain the plaintext image to be encrypted, decompose the plaintext image, wherein if the plaintext image is a color image, decompose the color image into three independent channels R, G, and B; if the plaintext image is a grayscale image, copy the grayscale image into three identical channels; expand the two-dimensional pixel matrix of each channel into a one-dimensional vector, the length of each vector being the total number of pixels; S2: Construct a dual memristor Chua's circuit and solve the system differential equations to obtain a chaotic sequence; S3: For each channel, extract a sequence with the same length as a single channel from the corresponding chaotic sequence and generate a scrambling index using the sorting index method; take the remaining sequence and rearrange the pre-constructed 0-255 gray-level uniform sequences with equal frequencies using the sorting index method to generate a statistically uniform diffusion key. S4: Based on the scrambling index, perform position remapping on the one-dimensional vector of the corresponding channel to complete pixel position scrambling; S5: Based on the XOR mode with ciphertext feedback, the scrambled one-dimensional vector is encrypted point by point using the diffusion key to obtain the ciphertext vector. S6: Reshape the encrypted ciphertext vector into a two-dimensional matrix. Stack the two-dimensional matrices of the three channels into a three-dimensional array to obtain the final ciphertext image.
2. The chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor according to claim 1, characterized in that, Step S2 specifically includes: Construct a dual-memristor Chua's circuit. Based on the classic Chua's circuit, replace the Chua's diode with two identical, anti-parallel, non-linear, electronically adjustable memristors. The two memristors are connected to a capacitor. C 1 Parallel connection, capacitor C 2 ,resistance R ,inductance L The remaining circuit is constructed; and a feedback factor is introduced into the flux state equation of the fourth-order circuit state equation to dynamically adjust the flux change rate. The system differential equation of the dual memristor Chua's circuit is numerically solved to obtain a chaotic sequence. The chaotic sequence is then subjected to transient removal and equal-interval sampling to obtain a discrete chaotic sequence of length 6N, which is divided into three segments corresponding to the three channels.
3. The chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor according to claim 2, characterized in that, The fourth-order circuit equation of the dual memristor Chua's circuit in step S2 is: in, G ( ) represents the memconductance value of the memristor. The magnetic flux is the integral of the voltage across the memristor over time. This is a DC bias flux. v 1 The voltage across the memristor. v 2 For capacitor C 2 Voltage at both ends, i L R is the inductor current, and R is the resistance value. The total memconductance of two memristors connected in reverse parallel has odd-symmetric N-type characteristics; ε It is a positive number. This is the memconductance value of the memristor at that moment; G max This represents the maximum memconductance of the memristor. G min t represents the minimum conductance of the memristor; t is the duration of the physical simulation.
4. The chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor according to claim 3, characterized in that, In step S2, the numerical solution of the system differential equations is performed using the fourth / fifth order Runge-Kutta method, and relative and absolute error tolerances are set to obtain accurate chaotic time series.
5. The chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor according to claim 1, characterized in that, The process of generating the diffusion key in step S3 specifically includes: Construct a baseline uniform sequence U of length N. Sequence U is formed by repeating 0-255 cyclically until N elements are filled, such that the number of occurrences of each gray level in U is exactly equal or differs by at most one. Take the latter half of the chaotic sequence as S2, with a length of N. Use the sorting index method to sort the values in S2 in ascending order, and record the position of each element in the original sequence after sorting to obtain a random sequence Q with a length of N. Using the random sequence Q as an index, the baseline uniform sequence U is rearranged to obtain the diffusion key.
6. The chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor according to claim 1, characterized in that, The specific process of pixel position scrambling in step S4 includes: In the formula, M is a scrambled one-dimensional vector; M is a one-dimensional vector of length N; index is the scrambling index, which is a random sequence from 1 to N.
7. The chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor according to claim 1, characterized in that, Step S5 involves encrypting the scrambled one-dimensional vector point by point using the diffusion key, specifically including: set up C For the ciphertext vector, P’ The scrambled one-dimensional vector, K It is a diffusion key sequence. N The length of the vector; The encryption process for the first key pixel C1 is as follows: In the formula, ⊕ represents the bitwise XOR operation; Remaining key pixels C i The encryption process is as follows: 。 8. The chaotic image encryption method based on a dual-memristor Chua's circuit with a nonlinear electronically adjustable memristor according to claim 1, characterized in that, It also includes encryption and decryption ends, which are deployed separately. After generating the ciphertext image through steps S1-S6, the encryption end transmits all parameters, initial conditions, and solver tolerances of the dual memristor Chua's circuit as a key file to the decryption end. The decryption end uses the key file and combines it with the same system differential equation function as the encryption end to regenerate the chaotic sequence and complete the decryption.