Low-noise SiPM detector chip and system based on standard integrated circuit technology

Abstract

This invention provides a low-noise SiPM detector chip and its system based on standard integrated circuit technology. Its features include: a silicon photomultiplier tube (1) with dark pixels, a bright pixel processing channel (2), a dark pixel processing channel (3), an extremum detection circuit (4), a controllable voltage source (5), and a multi-channel bias control module (6). This invention can improve the working stability and reliability of silicon photomultiplier tubes and can be implemented with only minor modifications to existing manufacturing processes. It has good industrial applicability and application prospects, and can be widely used in fields such as medical imaging, lidar ranging, high-energy particle detection, and fluorescence detection.

Description

Technical Field

[0001] This invention relates to a low-noise SiPM detector chip and system based on standard integrated circuit technology, which can be used to improve the working stability and reliability of silicon photomultiplier tubes, and belongs to the field of photoelectric detection technology. Background Technology

[0002] A silicon photomultiplier tube (SiPM) is a photoelectric detection device composed of a large number of single-photon avalanche diode (SPAD) pixels connected in parallel, each with a quenching resistor. Each quenching resistor and SPAD forms several pixel units, which are independent of each other. The final output signal is the superposition of the output signals of multiple pixel units. SiPMs feature high gain, high sensitivity, low bias voltage, and immunity to magnetic field interference, and are widely used in medical imaging, lidar ranging, high-energy particle detection, and other fields.

[0003] The gain of a SiPM is proportional to its overbias voltage, which is the difference between its bias voltage and its breakdown voltage. Therefore, the bias voltage of a SiPM is crucial to its performance. Increasing the overbias voltage directly increases the signal amplitude, but at the same time, all major noise sources also increase, including the dark count rate of SPADs in the pixel, the afterpulse probability, and the optical crosstalk probability between pixels. Therefore, the selection of the optimal operating bias point for a SiPM requires a trade-off between photon detection efficiency and changes in associated noise, and signal-to-noise ratio or energy resolution is usually introduced as a comprehensive evaluation metric.

[0004] The breakdown voltage of SiPMs is temperature-sensitive, essentially due to its dependence on intrinsic temperature. Specifically, under a fixed bias, increased temperature leads to enhanced lattice scattering, increasing the critical field strength required for carrier collision ionization, thus increasing the breakdown voltage. This, in turn, reduces the overbias voltage and causes a decrease in gain. On the other hand, the power dissipation of the current generated during SiPM operation within the avalanche multiplication layer also contributes to temperature rise. In environments with strong radiation or high background light, the temperature rise caused by self-heating can also lead to breakdown voltage drift and a decrease in gain. Therefore, in practical applications, the gain of SiPMs is easily affected by a variety of factors.

[0005] To address the aforementioned issues, in 2013, Alexander V. Stolin et al. from the Center for Radiology and Advanced Imaging at West Virginia University proposed a SiPM-based cooling and temperature stabilization system. This system achieves gain stabilization by controlling the temperature of the SiPM through a cooling device (AV Stolin, S. Majewski and RR Raylman, "Novel Method of Temperature Stabilization for SiPM-Based Detectors," in IEEE Transactions on Nuclear Science, vol. 60, no. 5, pp. 3181-3187, Oct. 2013).

[0006] In addition, in 2013, Francesco Licciulli et al. from the Polytechnic University of Bari, Italy, proposed a temperature compensation scheme for SiPM gain. Based on a bias feedback system and photosensitive and non-photosensitive SiPMs, the output of the non-photosensitive SiPM is detected. The peak value of its output signal is used to form negative feedback through an operational amplifier to adjust the bias voltage of the two SiPMs, so that the detected peak value is stabilized near the target value, thereby achieving temperature compensation for the gain of the photosensitive SiPM (F. Licciulli, I. Indiveri and C. Marzocca, "A Novel Technique for the Stabilization of SiPM Gain Against Temperature Variations," in IEEE Transactions on Nuclear Science, vol. 60, no. 2, pp. 606-611, April 2013). In 2014, Li Zhengwei et al. from the Institute of High Energy Physics, Chinese Academy of Sciences, disclosed a gain control device for silicon photomultiplier tubes (SiPMs). Based on an analog feedforward linear high-voltage regulator structure, the device utilizes a controllable voltage source, a voltage divider resistor, and a Zener diode to obtain the bias voltage of the SiPM at the cathode of the Zener diode. This bias voltage is approximately the sum of the output voltage of the controllable voltage source and the breakdown voltage of the Zener diode. By utilizing the temperature characteristics of the Zener diode's breakdown voltage under breakdown conditions and selecting a Zener diode with the same temperature characteristics as the SiPM's breakdown voltage, the temperature characteristics of the over-bias voltage on the SiPM are canceled out, thereby achieving gain stability (Chinese Patent: Patent No. 201410797762.9). In 2019, G. Eigen et al. from the University of Bergen, Norway, used an adaptive voltage source to stabilize the gain of SiPMs. They obtained the temperature of the SiPMs using a temperature sensor and tested and calibrated the temperature characteristics of the SiPM breakdown voltage. They designed an adaptive voltage source that can automatically adjust the output voltage according to temperature changes, thereby achieving stable gain control of the SiPMs (G. Eigen, J. Cvach, J. Kvasnicka, et al., "Gain stabilization of SiPMs with an adaptive power supply," Journal of Instrumentation, vol. 14, pp.P05006, May 2019).In 2020, Brian P. McGarvey and Stephen J. Bellis of Onsemi Corporation in the United States disclosed a temperature and non-uniformity compensation circuit for SiPM. The core of the scheme is to set up staggered dark reference microcells on the same chip and drive them with a constant current source to make them act as a temperature-dependent voltage source that varies with temperature and process drift. By detecting this voltage, the reverse bias voltage is adjusted to achieve compensation for global temperature and process deviation of SiPM (US Patent No. 10834345). In 2022, Zhang Dali et al. from the Institute of High Energy Physics, Chinese Academy of Sciences, designed a dynamic bias compensation scheme for SiPM. By real-time detection of SiPM temperature, using a temperature detection chip and a high-precision digital-to-analog converter, and in conjunction with a calibrated temperature compensation coefficient lookup table, the bias voltage is dynamically adjusted to achieve adaptive regulation (Zhang Dali, et al., "Gainstabilization and consistency correction approach for multiple SiPM-based gamma-ray detectors on GECAM," Nuclear Instruments & Methods in Physics Research Section a-Accelerators Spectrometers Detectors and Associated Equipment, vol. 1027, March 2022).

[0007] However, taking the aforementioned temperature-sensing-based gain control system as an example, in existing bias control schemes, the temperature sensor cannot directly contact the SiPM, making it impossible to obtain the internal temperature of the SiPM device. It can only compensate for the ambient or system temperature, achieving gain stability to a certain extent. Furthermore, these schemes typically only focus on the average level of overall dark current or dark count, failing to fully consider the performance inconsistencies between different pixels within the SiPM array caused by process differences, temperature gradients, and other factors. For instance, the SiPM gain temperature compensation scheme designed by Zhang Dali et al. for the Gamma-Ray Detector (GRD) in a space science satellite involves each GRD containing 64 channels of SiPMs. These SiPMs share the same temperature sensing chip located on the back of the readout circuit board, which can only detect the temperature at its current location and cannot obtain the temperature of SiPMs located further away. Additionally, the gamma ray intensity received by each channel is not entirely consistent, and the difference in output current leads to temperature differences due to self-heating effects. Furthermore, temperature differences also exist between different pixels within a single channel of the SiPM, primarily due to uneven heating of the chip itself and the inherent differences in heat dissipation conditions between the center and edge regions. This local temperature difference directly causes the breakdown voltage of each pixel to shift. Therefore, changing the overall overbias voltage of the SiPM under a fixed bias voltage will cause inconsistencies in gain, ultimately affecting the overall performance of the detector.

[0008] This invention discloses a low-noise SiPM detector chip and its system based on standard integrated circuit technology. It can be used to improve the operational stability and reliability of silicon photomultiplier tubes (SiPMs) and can be widely applied in fields such as medical imaging, lidar ranging, high-energy particle detection, and fluorescence detection. Addressing the issue of pixel performance inconsistency within the SiPM array, it uses a metal layer to mask some pixels, forming dark pixels, based on existing manufacturing processes. These dark pixels are divided into multiple groups of equal number with independent output terminals. The output of each group of dark pixels is obtained through a transimpedance amplifier array, and the bias voltage is controlled based on the maximum and minimum values ​​of the dark pixel output. Compared to existing technologies, because the dark pixels are uniformly spatially distributed within the SiPM, the spatial distribution of dark current and gain can be monitored simultaneously. This allows for precise sensing of performance and temperature differences between pixels in different regions within the SiPM array, enabling precise bias voltage control and improving the gain stability of the SiPM. Furthermore, it eliminates the need for additional temperature sensors and can compensate for non-uniformity effects caused by temperature changes, device aging, process inconsistencies, and radiation damage based on the dark pixel output. The structure is simple to implement, compatible with SiPM chip technology, and suitable for high-reliability detection systems. Summary of the Invention

[0009] The purpose of this invention is to provide a low-noise SiPM detector chip and system based on standard integrated circuit technology that is simple in structure and compatible with existing processes.

[0010] The objective of this invention is achieved as follows:

[0011] The SiPM detector chip and its system consist of a silicon photomultiplier tube (1) with dark pixels, a bright pixel processing channel (2), a dark pixel processing channel (3), an extremum detection circuit (4), a controllable voltage source (5), and a multi-channel bias control module (6). The silicon photomultiplier tube (1) with dark pixels is divided into multiple blocks according to its position. Each block contains a set of dark pixels and surrounding bright pixels, and has independent bias input and dark pixel output. The independent bias of each block is provided by the multi-channel bias control module (6). The bright and dark pixel outputs are connected to the bright pixel processing channel (2) and the dark pixel processing channel (3), respectively. The dark pixel processing channel (3) processes multiple sets of dark pixel outputs, and the result is given to the bright pixel processing channel (2) as a dark current reference. Simultaneously, peak sampling is performed on multiple sets of dark pixel outputs, and the sampling result is given to the extremum detection circuit (4). The bright pixel processing channel (2) compensates according to the dark current reference to obtain a noise-reduced output. The maximum and minimum values ​​of the output peak values ​​of multiple dark pixels are obtained by the maximum and minimum values ​​of the controllable voltage source (5). The controllable voltage source (5) changes the output voltage according to the maximum and minimum values, so that the multi-channel bias voltage provided by the multi-channel bias control module (6) changes as a whole, and the bias voltage of the silicon photomultiplier tube is adjusted as a whole. The multi-channel bias control module (6) then adjusts the output bias voltage of each channel of the controllable voltage source (5) periodically based on the difference between the maximum and minimum values, thereby reducing the performance inconsistency of the pixels inside the SiPM.

[0012] To accurately sense the performance and temperature differences of pixels at different locations within a SiPM, this invention designs a silicon photomultiplier tube with dark pixels, the circuit structure of which is as follows: Figure 2 As shown. The silicon photomultiplier tube has multiple bias input terminals (17), bright pixel signal output terminals (16) and multiple sets of dark pixel signal output terminals (15). Some of the pixels are covered with a metal light-shielding layer to form dark pixels (13), and the rest are bright pixels (14). The dark pixels are evenly distributed throughout the SiPM.

[0013] The dark pixels are divided into multiple dark pixel groups, with the dark pixels in each group connected in parallel to an independent output node. The entire SiPM is divided into multiple blocks according to its layout position, with each block consisting of a group of dark pixels and its surrounding bright pixels. Since each dark pixel does not receive light signals but only outputs dark current, its output signal is only related to over-bias voltage and crosstalk noise from surrounding bright pixels. Furthermore, the pixels within the same block are very close together, and the performance differences caused by layout dependency effects and parasitic effects are negligible. Therefore, under the same bias voltage, the output of each group of dark pixels can reflect its gain, and thus reflect the performance of the bright pixels in its corresponding block.

[0014] In order to compensate for the dark current output of bright pixels, the bright pixel processing channel (2) and dark pixel processing channel (3) designed in this invention are as follows: Figure 3 As shown. Since pixels within the same block have almost the same dark count rate and gain, current compensation can be performed based on the dark pixel output. The bright pixel processing channel (2) generates a DC compensation current based on the output signal of the trans-impedance amplifier (TIA) array in the dark pixel processing channel (3), and performs dark current compensation on the output of the bright pixels through the current subtraction circuit to achieve noise reduction output.

[0015] When the number of dark pixels in each group is small, the dark pixel output is in pulse form, and the peak value of the dark pulse is obtained by passing the TIA output through the peak sampling circuit. On the other hand, the dark count rate (DCR) is obtained by pulse counting after shaping. A proportional amplifier is used, with the amplification factor controlled by a DCR (Digital Current Regulator). The amplified voltage is then used to generate a compensation current source. ,because It is proportional to the gain, while the dark current is related to the product of the gain and the DCR, therefore the result is... The temperature coefficient of the dark current of the bright pixel is basically the same as that of the dark current of the bright pixel, and it is then used as compensation current after current amplification; when there are many dark pixels, the output of the dark pixels is in DC form, and each group of dark pixels can be directly output. The image is magnified, and the summation is used as the compensation current. The magnification factor is equal to the ratio of the number of bright and dark pixels. For images with... Each block has a ratio of light to dark pixels of [number]. SiPM, compensation current for:

[0016] In order to compensate for the performance and temperature differences of pixels at different locations in the SiPM, each block in the SiPM designed in this invention has an independent bias input, which can adjust the bias voltage of pixels in different blocks and accurately adjust the bias voltage of a certain part of the pixels.

[0017] In order to detect the output of all dark pixel groups in real time and select the maximum and minimum values, the maximum and minimum value detection circuit (4) used in this invention has the following structure: Figure 4 As shown. Due to the unidirectional conduction characteristic of diodes, when multiple input signals are connected to multiple diodes and the other ends of the diodes are connected in parallel, only the input signal with the maximum or minimum value can conduct. Combining the virtual short-circuit characteristic of the operational amplifier's input terminal during negative feedback, the diodes are connected to the output terminal of the operational amplifier and configured as a unity-gain negative feedback structure to obtain the maximum or minimum value signal equal to the input, thus reducing the influence of diode voltage drop.

[0018] In order to compensate for the differences in pixel performance and temperature between different blocks in SiPM, the multi-channel bias control module (6) designed in this invention is as follows: Figure 5 As shown, the voltage divider network (61) operates according to the voltage provided by the controllable voltage source (5). The logic control circuit (62) generates N selectable bias voltage levels and controls the switch selection array (63) according to the maximum and minimum values ​​of the outputs of multiple dark pixel groups to adjust the level of each bias voltage output. In the initial state, the bias voltage of each output is connected to the default level of the voltage divider network (61). :

[0019] In the formula The voltage difference between two adjacent voltage levels is designed based on device performance. In a SiPM with M blocks, the peak output value of each group of dark pixels is as follows: , … The output voltage corresponding to the transimpedance amplifier array is , … The difference between the maximum and minimum values ​​obtained by the extreme value detection circuit (4) When a certain threshold is exceeded, meaning that the outputs of dark pixel groups in different blocks differ significantly, the state of the switch selection array (63) is changed by the logic control circuit (62) to form a successive approximation register architecture to change the multi-channel bias output: after the system is powered on, starting from the first bias, each bias output is periodically connected to a higher level in sequence, while the peak sampling circuit (32) is reset to reacquire the output peak value of each group of dark pixels, until the difference is reached. If the voltage changes, such as decreasing, the bias voltage of the corresponding channel is further increased; conversely, if it increases, a lower voltage level is applied. The adjusted bias output of the i-th channel satisfies the following relationship:

[0020] In the formula, n represents the number of times the corresponding bias voltage level is adjusted. This refers to the gain of the transimpedance amplifier. By adjusting the bias voltage of each block in the SiPM, the output of each group of dark pixels is made more consistent, thereby reducing the performance difference between pixels at different locations. Ideally, after bias voltage adjustment, the gain difference between pixels in different blocks should be minimized. It becomes:

[0021] In the formula Let be the sum of the capacitances of the pixels in the i-th block. This represents the inherent gain difference before adjustment. Due to the limited resolution of the bias voltage range, the absolute residual gain difference after compensation is... Limited by Its value range is: Attached Figure Description

[0022] Figure 1 This is a schematic diagram of a low-noise SiPM detector chip and its system based on standard integrated circuit technology. It consists of a silicon photomultiplier tube with dark pixels (1), a bright pixel processing channel (2), a dark pixel processing channel (3), an extreme value detection circuit (4), a controllable voltage source (5), and a multi-channel bias control module (6).

[0023] Figure 2 This is a schematic diagram of the topology of a silicon photomultiplier tube with dark pixels. The silicon photomultiplier tube is an array composed of several pixels, each of which contains a single-photon avalanche diode (11) and a quenching resistor (12) connected to it. The cathode or anode of the pixel is connected to a bias voltage, and the other end serves as the current output terminal. A portion of the pixels are selected in the entire pixel array according to a uniform spatial distribution, and they are masked by a metal layer in the process to become dark pixels (13). The other unprocessed pixels are called bright pixels (14). The dark pixels are divided into several groups according to their position blocks. The number of dark pixels in each group is the same and they output independently. The bright pixels share the output. Each group of dark pixels and the bright pixels in its block share a bias voltage. The ports of the entire silicon photomultiplier tube are multiple dark pixel output ports (15), bright pixel output ports (16), and multiple block bias voltage ports (17).

[0024] Figure 3This is a schematic diagram of the bright pixel processing channel and the dark pixel processing channel. The dark pixel processing channel consists of a transimpedance amplifier array (31) and a peak sampling circuit (32), while the bright pixel channel consists of a dark pixel output reference module (21), a controllable current source (22), and a current subtraction circuit (23).

[0025] Figure 4 This is a schematic diagram of the maximum and minimum value detection circuit, which includes a maximum value detection circuit and a minimum value detection circuit. In each maximum value detection circuit, the input signal is connected to the positive input terminal of the operational amplifier (42) through the resistor (41). The output terminal of the operational amplifier (42) is connected to the anode of the diode (43), and the cathode of the diode (43) is connected back to the negative input terminal of the operational amplifier (42) and simultaneously connected to the buffer (44). The minimum value detection circuit has the same structure, but the diode (45) is in the opposite direction.

[0026] Figure 5 This is a schematic diagram of the multi-channel bias control module. The module consists of a voltage divider network (61), a logic control circuit (62), and a switch selection array (63). The voltage divider network (61) can obtain multiple bias voltage levels through several resistors and buffers based on the input voltage. The logic control circuit (62) controls the on / off state of the switches inside the switch selection array (63) according to the obtained maximum and minimum values, thereby adjusting the bias output of each channel one by one.

[0027] Figure 6 This is a schematic diagram of a system embodiment of a low-noise SiPM detector chip and its system based on standard integrated circuit technology, in which a silicon photomultiplier tube with dark pixels is designed with a 27×27 pixel array and an 11% dark pixel ratio. Figure 7 This is a basic structural diagram of the bright pixel processing channel when the dark pixel output is in DC form, including operational amplifiers, PMOS transistors, and resistors. The dark pixel output reference is obtained by virtual shorting at the input of the operational amplifier. A controllable current source is formed through a negative feedback structure composed of PMOS. The current is then obtained through the PMOS current mirror, which is opposite to the output direction of the SiPM bright pixel, as a current subtraction circuit. Figure 8 This is a basic structural diagram of a bright pixel processing channel when the dark pixel output is in pulse form. It includes a shaping comparator, a timer / counter, a proportional amplifier circuit, a PMOS transistor, and resistors. The dark pixel output reference is obtained by a timer / counter, TIA output peak and proportional amplifier circuit, and a controllable current source is formed by PMOS and operational amplifier, and then a current subtraction circuit is obtained by PMOS current mirror. Figure 9 This is a schematic diagram of a 27×27 pixel array silicon photomultiplier tube with dark pixels. The entire SiPM has nine bias voltage pins, nine dark pixel group output pins, and one bright pixel output pin. Detailed Implementation

[0028] The present invention will be further illustrated below with reference to specific embodiments.

[0029] Figure 6 A low-noise SiPM detector chip and its system based on standard integrated circuit technology are presented. The system embodiment uses a 27×27 pixel array of silicon photomultiplier tubes with dark pixels and is designed with an 11% dark pixel ratio. The system consists of a silicon photomultiplier tube with dark pixels (1), a bright pixel processing channel (2), a dark pixel processing channel (3), an extreme value detection circuit (4), a controllable voltage source (5), and a multi-channel bias control module (6). The silicon photomultiplier tube (1) with dark pixels in the system is divided into multiple blocks according to its position. Each block contains a group of dark pixels and its surrounding bright pixels, and has independent bias input and dark pixel output. The independent bias of each block is provided by the multi-channel bias control module (6). The bright and dark pixel outputs are connected to the bright pixel processing channel (2) and the dark pixel processing channel (3), respectively. The dark pixel processing channel (3) processes multiple sets of dark pixel outputs, and the result is given to the bright pixel processing channel (2) as a dark current reference. At the same time, peak sampling is performed on multiple sets of dark pixel outputs, and the sampling result is given to the extreme value detection circuit (4). The bright pixel processing channel (2) compensates according to the dark current reference to obtain a noise-reduced output. The extreme value detection circuit (4) obtains the maximum and minimum values ​​among the peak values ​​of multiple sets of dark pixel outputs. The controllable voltage source (5) changes the output voltage according to the maximum and minimum values, so that the multi-channel bias voltage provided by the multi-channel bias control module (6) changes as a whole, and the bias voltage of the silicon photomultiplier tube is adjusted as a whole. The multi-channel bias control module (6) then periodically adjusts the output bias voltage of each channel based on the difference between the maximum and minimum values ​​and the output voltage of the controllable voltage source (5) to reduce the performance inconsistency of the pixels inside the SiPM.

[0030] During system operation, the TIA array converts the output current of the nine dark pixels in the SiPM into voltage, which is then sent to the bright pixel processing channel as a reference signal to participate in the dark current compensation of the bright pixels. Simultaneously, the peak sampling circuit and the extreme value detection circuit monitor the output of the TIA array in real time, obtaining the maximum and minimum values ​​of each output peak. These maximum and minimum values ​​serve two purposes: first, they are provided to the multi-channel bias control module, which determines the pixel performance differences between different blocks within the SiPM by detecting the difference between the maximum and minimum values. When the difference is significant, the bias voltage output to different blocks is adjusted, thereby compensating for the performance differences between pixels in different blocks. Second, they are provided to the controllable voltage source, which changes its output voltage according to the magnitude of the two values, adjusting the voltage output to the multi-channel bias control module, thus causing an overall change in the bias voltage of all blocks in the SiPM, achieving compensation for the operating environment.

[0031] In the system, (2) is the bright pixel processing channel. When the dark pixel output is in DC form, as shown below... Figure 7 As shown, it consists of an operational amplifier, a PMOS transistor, and resistors. A current source circuit is formed to generate compensation current for the bright pixel noise reduction output. Each group of dark pixel outputs is converted to voltage by a TIA and amplified before entering the bright pixel processing channel. The current to M1 is obtained through the operational amplifier and the PMOS current source circuit. The transimpedance gain is equal to that of TIA. The compensation current is then output through the current mirror formed by M2 and M1. ~ The width-to-length ratio of M2 to M1 is 9:1. The compensation current from the nine groups of dark pixels is obtained by adding them together in parallel through the drain terminals of PMOS transistors. It is connected to the bright pixel output terminal of SiPM to realize current subtraction, thereby compensating for the dark current in the bright pixel output.

[0032] When the dark pixel output is in pulse form, the structure of the bright pixel processing channel in the system is as follows: Figure 8 As shown, a comparator and a timer / counter count the dark pulses to obtain data inversely proportional to the DCR. This data is used to control the resistor network of the proportional amplifier circuit, thus making its amplification factor directly proportional to the DCR. The amplified voltage is then obtained. This voltage is then applied to the operational amplifier and the current source circuit of the PMOS transistor to obtain the current. The compensation current is then obtained by magnification through current mirrors M2 and M1. It is connected to the bright pixel output terminal of SiPM to realize current subtraction, thereby compensating for the dark current in the bright pixel output.

[0033] In the system, (1) is a silicon photomultiplier tube with dark pixels in a 27×27 pixel array, such as Figure 9 As shown, the SiPM is divided into 9 blocks, each consisting of a 9×9 pixel array, designed with an 11% dark pixel ratio. Each block contains 9 evenly distributed dark pixels, with a spacing of two bright pixels between every two adjacent dark pixels. The output of the dark pixels reflects the pixel performance of their respective blocks. Based on the maximum and minimum values ​​of the dark pixel group outputs, the performance differences of pixels in different areas on the chip are detected. Simultaneously, the overall operating temperature and gain are monitored, and the bias voltage of different blocks or the entire SiPM is adjusted to form a bias control system. This system compensates for performance variations caused by the operating environment while also addressing performance differences caused by pixel inconsistencies, improving the operational stability and reliability of large-size silicon photomultiplier tubes. It can be used in applications requiring large-scale SiPM arrays, such as high-energy particle detection.

Claims

1. A low-noise SiPM detector chip and its system based on standard integrated circuit technology. Its features are: It consists of a silicon photomultiplier tube (1) with dark pixels, a bright pixel processing channel (2), a dark pixel processing channel (3), an extremum detection circuit (4), a controllable voltage source (5), and a multi-channel bias control module (6). The silicon photomultiplier tube (1) with dark pixels is divided into multiple blocks according to its position. Each block contains a set of dark pixels and surrounding bright pixels, and has independent bias input and dark pixel output. The independent bias of each block is provided by the multi-channel bias control module (6). The bright and dark pixel outputs are connected to the bright pixel processing channel (2) and the dark pixel processing channel (3), respectively. The dark pixel processing channel (3) processes multiple sets of dark pixel outputs, and the result is given to the bright pixel processing channel (2) as a dark current reference. Simultaneously, peak sampling is performed on multiple sets of dark pixel outputs, and the sampling result is given to the extremum detection circuit (4). The bright pixel processing channel (2) compensates according to the dark current reference to obtain a noise-reduced output. The maximum and minimum values ​​of the output peak values ​​of multiple dark pixels are obtained by the maximum and minimum values ​​of the controllable voltage source (5). The controllable voltage source (5) changes the output voltage according to the maximum and minimum values, so that the multi-channel bias voltage provided by the multi-channel bias control module (6) changes as a whole, and the bias voltage of the silicon photomultiplier tube is adjusted as a whole. The multi-channel bias control module (6) then adjusts the output bias voltage of each channel of the controllable voltage source (5) periodically based on the difference between the maximum and minimum values, thereby reducing the performance inconsistency of the pixels inside the SiPM.

2. The SiPM detector chip and system according to claim 1, characterized in that: The silicon photomultiplier tube (1) with dark pixels, bright pixel processing channel (2), dark pixel processing channel (3), maximum / minimum detection circuit (4), controllable voltage source (5), and multi-channel bias control module (6) are all placed on the same semiconductor substrate. The pixel unit of the silicon photomultiplier tube (1) and its corresponding signal processing circuit and bias control circuit are all manufactured under standard integrated circuit technology, realizing monolithic integration of the entire circuit structure and the SiPM pixel unit on the same chip.

3. The silicon photomultiplier tube with dark pixels used in the SiPM detector chip and system according to claim 1, characterized in that: The silicon photomultiplier tube is an array of pixels, each containing a single-photon avalanche diode (11) and a quenching resistor (12) connected to it. The cathode or anode of the pixel is connected to a bias voltage, and the other end serves as the current output terminal. A portion of the pixels are selected in a uniform spatial distribution throughout the pixel array and masked by a metal layer in the process to become dark pixels (13). The remaining unprocessed pixels are called bright pixels (14). The dark pixels are divided into several groups according to their location blocks. Each group of dark pixels has the same number of pixels and outputs independently. The bright pixels share the output. Each group of dark pixels and the bright pixels in its block share the bias voltage. The ports of the entire silicon photomultiplier tube are multiple dark pixel output ports (15), bright pixel output ports (16), and multiple block bias voltage ports (17). The pixels in each block operate under the same bias voltage and environment. Therefore, the output of each group of dark pixels can reflect the working status of the bright pixels around its location.

4. The bright pixel processing channel used in the SiPM detector chip and its system according to claim 1, characterized in that: The bright pixel processing channel includes a dark pixel output reference module (21), a controllable current source (22), and a current subtraction circuit (23). The dark pixel output reference module (21) processes the output signal of the transimpedance amplifier array. The controllable current source (22), controlled by the dark pixel output reference module (21), generates a DC current in the opposite direction to the bright pixel output. The current subtraction circuit (23) uses this current to compensate for the dark current in the bright pixel output, resulting in a noise-reduced output. When the dark pixel output is in pulse form, the dark pixel output reference module (21) uses a timer / counter to obtain the dark count rate. The controllable current source (22) uses a digital-to-analog converter to convert the dark count rate into a corresponding current. When the dark pixel output is in DC form, the controllable current source (22) amplifies the DC signal proportionally and generates current. The current of the controllable current source (22) has the same temperature characteristics as the dark current of the bright pixel.

5. The dark pixel processing channel used in the SiPM detector chip and system according to claim 1, characterized in that: The dark pixel processing channel includes a transimpedance amplifier array (31) and a peak sampling circuit (32). Each transimpedance amplifier in the transimpedance amplifier array (31) has the same parameters. The output of each group of dark pixels is converted into voltage and amplified by the transimpedance amplifier to obtain the output signal of each group of dark pixels. All signals are sampled by the peak sampling circuit (32) to obtain the peak pulse amplitude or peak dark current of each group of dark pixels, which can be adapted to the output of different dark pixel specifications.

6. The maximum / minimum detection circuit used in the SiPM detector chip and its system according to claim 1, characterized in that: The aforementioned maximum and minimum value detection circuit includes a maximum value detection circuit and a minimum value detection circuit, both of which consist of multiple detection circuits and buffers. Each detection circuit includes a resistor, an operational amplifier, and a diode. The buffer is constructed using a unity-gain negative feedback structure of the operational amplifier. In each maximum value detection circuit, the input signal passes through a resistor (41) to the positive input terminal of the operational amplifier (42). The output terminal of the operational amplifier (42) is connected to the anode of the diode (43), and the cathode of the diode (43) is connected back to the negative input terminal of the operational amplifier (42) and simultaneously connected to the buffer (44). The minimum value detection circuit has the same structure, but the diode (45) is in the opposite direction. This maximum and minimum value detection circuit can select the maximum and minimum values ​​from the multiple input signals for output.

7. The multi-channel bias control module used in the SiPM detector chip and its system according to claim 1, characterized in that: The multi-channel bias control module consists of a voltage divider network (51), a logic control circuit (52), and a switch selection array (53). The input voltage of the module is provided by a controllable voltage source (5). The voltage divider network (51) can obtain multiple bias voltage levels through several resistors and buffers based on the input voltage. The logic control circuit (52) controls the on / off state of the switches inside the switch selection array (53) according to the obtained maximum and minimum values, thereby adjusting the bias output of each channel one by one, so that the difference between the maximum and minimum values ​​is reduced.

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