Infrared rain sensor LED low voltage driving circuit

Abstract

The application discloses an infrared rain sensor LED low-voltage driving circuit and belongs to the technical field of driving circuits. The circuit comprises a reference source module, a transistor driving module, an LED current driving module and a digital control module. The reference source module is used for generating high-precision current; the transistor driving module controls the conduction and turn-off of two off-chip power tubes by outputting a pulse signal with driving capacity, thereby realizing the control of the on-off state of two LED lamps; the LED current driving module is used for generating a current pulse signal flowing through the two LED lamps; and the digital control module is responsible for outputting a static control signal and a clock signal. The SHUNT resistor is integrated in the chip, thereby saving the board-level space and cost; meanwhile, the base current compensation mechanism is introduced when the off-chip BJT is used, thereby ensuring the accurate control of the infrared LED luminous intensity; in addition, the LED current pulse slope is adjustable, and the EMI function is reduced.

Description

Technical Field

[0001] This invention relates to the field of driving circuit technology, and in particular to a low-voltage driving circuit for an infrared rain sensor LED. Background Technology

[0002] Automotive rain sensors are primarily used to detect whether it is raining and the amount of rainfall. The Body Control System (BCM) intelligently adjusts the windshield wipers and sunroof based on sensor signals to improve driving safety. Infrared rain sensors are the most common type of automotive rain sensor. They work by emitting infrared light and detecting the reflected signals to sense the presence and intensity of raindrops, featuring high sensitivity and fast response. The LED driver circuit in an infrared rain sensor provides a stable operating current to the infrared LED, ensuring that the LED emits far-infrared light of a specific intensity. If the driver circuit is unstable, it may cause fluctuations in the emitted light, affecting the accuracy of rainfall calculation, and consequently leading to wiper malfunctions or delayed response.

[0003] In automotive rain sensor chips, a relatively simple infrared LED driving solution is as follows: Figure 1 , Figure 2 As shown. The LED driver circuit is integrated inside the chip and consists of an operational amplifier OPA and gating switches S1 and S2. It provides two LED channels, which can be used only one channel or alternately. The reference voltage VREF is provided by other modules inside the chip. The LED driver is powered by a low-voltage power supply, typically 3.3V or 5V. In this case, the infrared LED, MOSFET devices NM1 and NM2, and shunt resistor RSHUNT are external discrete components. Figure 1 The LED lights are powered by automotive power supplies, typically 40V or higher. For LED1 to emit infrared light, S1 must be turned on and S2 off. The OPA drives the MOSFET to conduct, generating a forward current to LED1, which is VREF / RSHUNT, illuminating LED1. For LED2 to emit infrared light, S2 must be turned on and S1 off; the lighting principle is the same as LED1. The luminous intensity of an LED has a logarithmic relationship with the forward current. The brightness can be adjusted by changing the LED current. VREF and RSHUNT determine the LED current. The external RSHUNT resistor value can be selected as needed, offering a wide adjustable current range. The external traces have strong overcurrent capability, allowing LED current to reach ampere levels and above. BJT devices can also be used as the external power transistor (BJT). Figure 2BJT devices NPN1 and NPN2 are current-driven, with the emitter current being the sum of the base and collector currents. The emitter current is the current flowing through the RSHUNT, and the collector current is the current flowing through the LED. Therefore, the current determined by VREF and RSHUNT will inevitably exceed the LED current, and the amount of excess is determined by the BJT current amplification factor β. MOSFETs, on the other hand, are voltage-driven devices with no gate current; the current flowing through RSHUNT is equal to the LED current. Therefore, the LED current accuracy using BJTs is not as high as that of MOSFETs, but MOSFETs are more expensive than BJTs. However, regardless of... Figure 1 The plan, or Figure 2 All solutions require external resistors, which increases board-level costs. Summary of the Invention

[0004] To address the shortcomings of existing technologies, the present invention proposes an infrared rain sensor LED low-voltage driving circuit that integrates the SHUNT resistor inside the chip, saving board space and cost; at the same time, when using a BJT off-chip, it has a base current compensation function.

[0005] To achieve the above objectives, the present invention provides an infrared rain sensor LED low-voltage driving circuit, comprising: a reference source module BANDGAP, a transistor driving module TR_DRV, an LED current driving module I_DRV, and a digital control module DIG_CTRL. The reference source module BANDGAP is used to generate high-precision current and provide bias current to TR_DRV and I_DRV; The transistor driver module TR_DRV generates a driving pulse signal. Two output signals are sent to the base or gate of two external power transistors to control their on / off states, thereby controlling the switching state of the two LEDs. The collectors or drains of the two external power transistors are connected to the negative terminals of the two LEDs. The emitters or sources of the two external power transistors are connected to TR_DRV to form a loop in the TR_DRV module. The LED current drive module I_DRV is used to generate current pulse signals. The emitter or source outputs of two off-chip power transistors serve as the inputs of I_DRV, and the outputs of I_DRV are grounded. The digital control module DIG_CTRL is used to output static control signals and clock signals to BANDGAP, TR_DRV, and I_DRV.

[0006] Furthermore, the transistor driving module TR_DRV includes a first switch S1 to an eighteenth switch S18, a first MOS transistor M1 to an eleventh MOS transistor M11, a first resistor R1 to a fourth resistor R4, and a first operational amplifier OPA1; The drain and gate of the sixth MOSFET M6, the gate of the seventh MOSFET M7, and the gate of the eighth MOSFET M8 are connected to the first bias current IBG1; the sources of the sixth MOSFET M6, the seventh MOSFET M7, the eighth MOSFET M8, the fifth MOSFET M5, the tenth MOSFET M10, and the eleventh MOSFET M11 are grounded; the sources of the fourth MOSFET M4, the first MOSFET M1, the second MOSFET M2, the third MOSFET M3, and the ninth MOSFET M9 are connected to the power supply; the gate and drain of the fourth MOSFET M4, the drain of the seventh MOSFET M7, the gate of the fifth MOSFET M5, and the gate of the ninth MOSFET M9 are connected together; the fifth MOSFET M6... The drain of MOSFET M5 is grounded via a third resistor R3 and a fourth resistor R4 connected in sequence; the connection point of the third resistor R3 and the fourth resistor R4 is connected to the inverting input of the first operational amplifier OPA1; the non-inverting input of the first operational amplifier OPA1 is grounded via a sixth switch and a thirteenth switch connected in sequence, and is also connected to the drain of the eleventh MOSFET M11 and the emitters or sources of the two off-chip power transistors; the output of the first operational amplifier OPA1 is grounded via a first capacitor C1, a seventh switch S7, and a fourteenth switch S14 connected in sequence; one end of the second switch S2 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the fifth switch S5, and is also connected to the gate of the first MOSFET M1; the tenth One end of switch S12 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the ninth switch S9, and simultaneously connected to the gate of the second MOSFET M2; one end of the seventeenth switch S17 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the fifteenth switch S15, and simultaneously connected to the gate of the third MOSFET M3; the connection between the first capacitor C1 and the seventh switch S7 is connected to the drain of the first MOSFET M1 via the first switch S1 and the first resistor R1, and simultaneously connected to the drain of the second MOSFET M2 via the eighth switch S8 and the second resistor R2; the drain of the first MOSFET M1 is connected to the drain of the eighth MOSFET M8 via the third switch S3, and simultaneously connected to the drain of the second MOSFET M2 via the fourth switch S15. 4. Grounding; The drain of the second MOSFET M2 is connected to the drain of the eighth MOSFET M8 through the tenth switch S10, and is also grounded through the eleventh switch S11; The drain of the third MOSFET M3 is connected to the drain and gate of the tenth MOSFET M10 and the gate of the eleventh MOSFET M11, and is also grounded through the eighteenth switch S18; The drain of the eleventh MOSFET is connected to the drain of the ninth MOSFET M9 through the sixteenth switch S16; The drain of the first MOSFET M1 is connected to the base or gate of the first external power transistor as the first drive signal output by the transistor drive module TR_DRV, and the drain of the second MOSFET M2 is connected to the base or gate of the second external power transistor as the second drive signal output by the transistor drive module TR_DRV.

[0007] Furthermore, the first MOS transistor M1 to the fifth MOS transistor M5 and the ninth MOS transistor M9 are PMOS transistors, the sixth MOS transistor M6 to the eighth MOS transistor M8 and the tenth MOS transistor M10 and the eleventh MOS transistor M11 are NMOS transistors; the fifth MOS transistor M5 is a PMOS transistor with an adjustable width-to-length ratio.

[0008] Furthermore, the first switch S1 to the third switch S3 are controlled to close and open by the first control signal SEL1; The fourth switch S4 to the seventh switch S7 are controlled to close and open by the second control signal SEL1N; The eighth switch S8 to the tenth switch S10 are controlled to close and open by the third control signal SEL2; The eleventh switch S11 to the fourteenth switch S14 are controlled to close and open by the fourth control signal SEL2N; The fifteenth switch S15 and the sixteenth switch S16 are controlled to close and open by the fifth control signal MODE; The seventeenth switch S17 and the eighteenth switch S18 are controlled to close and open by the sixth control signal MODEN.

[0009] Furthermore, the first bias current IBG1 is provided by the reference source module BANDGAP; The first control signal SEL1, the second control signal SEL1N, the third control signal SEL2, the fourth control signal SEL2N, the fifth control signal MODE, and the sixth control signal MODEN are all provided by the digital control module DIG_CTRL; The two external power transistors are either BJT devices or MOS devices. When both external power transistors are BJT devices, MODE is high and MODEN is low, S15~S16 are closed, and S17~S18 are open. When both external power transistors are MOS devices, MODE is low and MODEN is high, S15~S16 are open, and S17~S18 are closed. The control flow for other switches is as follows: When SEL1 is high, SEL1N is low, SEL2 is low, and SEL2N is high, S1~S3 are closed, and S4~S7 are open; S11~S14 are closed, and S8~S10 are open, driving only the first external power transistor, thus lighting the first LED, while the second LED does not light up. When SEL1 is low, SEL1N is high, SEL2 is high, and SEL2N is low, S1~S3 are open, and S4~S7 are closed; S11~S14 are open, and S8~S10 are closed, driving only the second external power transistor, thus lighting the second LED, while the first LED does not light up. When SEL1 and SEL2 are both low, and SEL1N and SEL2N are both high, S4~S7 and S11~S14 are closed, and S1~S3 and S8~S10 are open. Neither of the two external power transistors is driven, and neither of the two LEDs lights up.

[0010] Furthermore, the LED current drive module I_DRV includes several parallel RSHUNT circuits, a second operational amplifier OPA2, a SLOPE_CTRL circuit, a twentieth MOSFET M2, a twenty-first MOSFET M21, and a twenty-first resistor R21, wherein the twenty-first resistor R21 is a resistor series; the several parallel RSHUNT circuits are used to control the resistance value of the shunt resistor; the SLOPE_CTRL circuit is used to control the rise and fall slope of the voltage across the twenty-first resistor R21; The source of the twentieth MOSFET M20 is connected to the source of the twenty-first MOSFET M21, and is also connected to a power supply; the gate and drain of the twentieth MOSFET M20 and the gate of the twenty-first MOSFET M21 are connected to the second bias current IBG2; the drain of the twenty-first MOSFET M21 is grounded through the twenty-first resistor R21; the non-inverting input of the second operational amplifier OPA2 is connected to different positions of the twenty-first MOSFET M21 according to the range configuration, and its inverting input is connected to the feedback output of each RSHUNT circuit through the twenty-second switch S22, and its output is connected to the first input of each RSHUNT circuit; the emitters or sources of the two off-chip power transistors are connected to the second inputs of several parallel RSHUNT circuits. A single RSHUNT circuit includes a 21st switch S21, a 22nd switch S22, a 23rd switch S23, a 22nd MOSFET M22, and a 22nd resistor S22. The source of the 22nd MOSFET M22 is grounded through the 22nd resistor S22, and the connection between the source of the 22nd MOSFET M22 and the 22nd resistor S22 serves as the feedback output terminal of the RSHUNT circuit. The first input terminal of the RSHUNT circuit is connected to the gate of the 22nd MOSFET M22 through the 21st switch S21, and the gate of the 22nd MOSFET M22 is grounded through the 23rd switch S23. The drain of the 22nd MOSFET M22 is connected to the emitter or source of two off-chip power transistors. The SLOPE_CTRL circuit includes switches 41 to 44, MOSFETs 31 to 49, and capacitor C41. The sources of MOSFETs 31, 32, 35, 36, 37, and 40 are connected to a power supply. The drain and gate of MOSFET 31 and the gate of MOSFET 32 are connected to a third bias current IBG3. The drain of MOSFET 32 and the gate of MOSFET 32 are connected to a third bias current IBG3. The drain and gate of MOSFET M33, the gate of MOSFET M34, the gate of MOSFET M38, the gate of MOSFET M45, and the gate of MOSFET M48 are connected together; the source of MOSFET M33, the source of MOSFET M34, the source of MOSFET M38, the source of MOSFET M39, the source of MOSFET M45, the source of MOSFET M44, the source of MOSFET M46, the source of MOSFET M47, the source of MOSFET M48, and the source of MOSFET M49 are grounded; the drain of MOSFET M34 is connected to the ground. The gate and drain of the 35th MOSFET M35, the gate of the 36th MOSFET M36, and the gate of the 37th MOSFET M37 are connected together; the drain of the 36th MOSFET M36 is connected to the drain of the 38th MOSFET M38 and the gate and drain of the 39th MOSFET M39 via the 41st switch S41 and the 42nd switch S42 connected in sequence; the connection point of the 41st switch S41 and the 42nd switch S42 is connected to one end of the 41st capacitor C41 and the gate of the 49th MOSFET M49; the drain of the 37th MOSFET M37, the drain and gate of the 43rd MOSFET M43, and the gate of the 42nd MOSFET M42 are connected together; the gate of the 40th MOSFET M40... The source and drain of the 42nd MOSFET M42 are connected to the drain of the 36th MOSFET M36, and the drain of the 45th MOSFET M45 is connected through the 43rd switch S43; the source of the 43rd MOSFET M43 is connected to the drain and gate of the 44th MOSFET M44; the drain and gate of the 41st MOSFET M41, the drain and gate of the 46th MOSFET M46, and the gate of the 47th MOSFET M47 are connected; the drain of the 47th MOSFET M47 and the drain of the 48th MOSFET M48 are connected, and the drain of the 21st MOSFET M21 is connected through the 44th switch.The drain of the 21st MOSFET M21 is also connected to the drain of the 49th MOSFET M49 and the other end of the 41st capacitor C41.

[0011] Furthermore, the twentieth MOSFET M20, the twenty-first MOSFET M21, the thirty-first MOSFET M31, the thirty-second MOSFET M32, the thirty-fifth MOSFET M35, the thirty-sixth MOSFET M36, the thirty-seventh MOSFET M37, the fortieth MOSFET M40, and the forty-first MOSFET M41 are PMOS transistors; the twenty-second MOSFET M22, the thirty-third MOSFET M33, the thirty-fourth MOSFET M34, the thirty-eighth MOSFET M38, the thirty-ninth MOSFET M39, and the forty-second MOSFETs M42 to M49 are NMOS transistors, among which the thirty-second MOSFET M32 is a PMOS transistor with an adjustable width-to-length ratio.

[0012] Furthermore, when a certain RSHUNT circuit is selected, the twenty-first switch S21 and the twenty-second switch S22 are closed, and the twenty-third switch S23 is open. At this time, the twenty-second MOSFET M22 is turned on. When a certain RSHUNT circuit is not selected, the twenty-first switch S21 and the twenty-second switch S22 are open, and the twenty-third switch S23 is closed. Then the twenty-second MOSFET M22 is turned off.

[0013] Furthermore, the forty-first switch S41 and the forty-fourth switch S41 are controlled to close and open by the seventh control signal DRVN; The forty-second switch S42 and the forty-third switch S43 are controlled to close and open by the eighth control signal DRV. The second bias current IBG2 and the third bias current IBG3 are provided by the reference source module BANDGAP; The seventh control signal DRVN, the eighth control signal DRV, and the control signals for the twenty-first switch S21 and the twenty-second switch S22 in each RSHUNT circuit are all provided by the digital control module DIG_CTRL. When the voltage across the 21st resistor R21 rises from low to high, the 8th control signal DRV is set high, the 7th control signal DRVN is set low, S42 and S43 are closed, and S41 and S44 are opened. When the voltage across the 21st resistor R21 decreases from high to low, the 8th control signal DRV is set low, the 7th control signal DRVN is set high, S42 and S43 are disconnected, and S41 and S44 are closed.

[0014] Furthermore, the reference source module BANDGAP employs a bandgap reference circuit.

[0015] The beneficial effects of this invention are: This invention integrates the SHUNT resistor inside the chip, saving board space and cost; at the same time, when using an off-chip BJT, a base current compensation mechanism is introduced to ensure precise control of the infrared LED luminous intensity; in addition, it supports adjustable LED current pulse slope and has EMI reduction function. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a traditional infrared LED driving circuit (MOS device scenario).

[0017] Figure 2 This is a schematic diagram of a traditional infrared LED driving circuit (BJT device scenario).

[0018] Figure 3 This is a schematic diagram of the low-voltage LED driving circuit for an infrared rain sensor according to an embodiment of the present invention.

[0019] Figure 4 This is a schematic diagram of the TR_DRV circuit (BJT device scenario) according to an embodiment of the present invention.

[0020] Figure 5 This is a schematic diagram of the circuit driving NPN1 according to an embodiment of the present invention.

[0021] Figure 6 This is a schematic diagram of the circuit driving NPN2 according to an embodiment of the present invention.

[0022] Figure 7 This is a circuit diagram of an embodiment of the present invention that does not drive NPN1 or NPN2.

[0023] Figure 8 This is a schematic diagram of the TR_DRV circuit (MOS device scenario) according to an embodiment of the present invention.

[0024] Figure 9 This is a schematic diagram of the circuit driving NM1 according to an embodiment of the present invention.

[0025] Figure 10 This is a schematic diagram of the circuit driving NM2 according to an embodiment of the present invention.

[0026] Figure 11 This is a circuit diagram of an embodiment of the present invention that neither drives NM1 nor NM2.

[0027] Figure 12 This is a schematic diagram of the I_DRV circuit of the present invention.

[0028] Figure 13 This is a schematic diagram of the RSHUNT circuit according to an embodiment of the present invention.

[0029] Figure 14This is a schematic diagram of the SLOPE_CTRL circuit in an embodiment of the present invention.

[0030] Figure 15 This is a schematic diagram of the simulated control signal waveform in an embodiment of the present invention. Detailed Implementation

[0031] The present invention will be further explained and described below with reference to the accompanying drawings and embodiments.

[0032] like Figure 3 As shown, this embodiment of the invention provides a low-voltage LED driving circuit for an infrared rain sensor, integrated within a chip. CH1, CH2, SHUNT, and GND are chip pins. Infrared LEDs LED1 and LED2, and MOSFET devices NM1 and NM2 (right figure) or BJT devices NPN1 and NPN2 (left figure) are external discrete components. The left figure shows a BJT application of the LED driver.

[0033] The LED low-voltage driver circuit includes: a reference source module BANDGAP, a transistor driver module TR_DRV, an LED current driver module I_DRV, and a digital control module DIG_CTRL.

[0034] The BANDGAP reference source module generates high-precision current to provide bias current to TR_DRV and I_DRV. The BANDGAP can utilize common bandgap reference circuits.

[0035] The transistor driver module TR_DRV generates a driving pulse signal. Two output signals (corresponding to pins CH1 and CH2) are sent to the base or gate of two external power transistors, respectively, to control the conduction and turn-off of the two external power transistors, thereby controlling the switching state of the two LEDs. The collectors or drains of the two external power transistors are connected to the negative terminals of the two LEDs, respectively, to control the conduction and turn-off of the two external power transistors, thereby controlling the switching state of the two LEDs. The emitters or sources of the two external power transistors are connected back to TR_DRV (corresponding to the SHUNT pin) to form a loop in the TR_DRV module.

[0036] like Figure 4As shown, the transistor drive module TR_DRV includes the first switch S1 to the eighteenth switch S18, the first MOSFET M1 to the eleventh MOSFET M11, the first resistor R1 to the fourth resistor R4, and the first operational amplifier OPA1.The drain and gate of the sixth MOSFET M6, the gate of the seventh MOSFET M7, and the gate of the eighth MOSFET M8 are connected to the first bias current IBG1; the sources of the sixth MOSFET M6, the seventh MOSFET M7, the eighth MOSFET M8, the fifth MOSFET M5, the tenth MOSFET M10, and the eleventh MOSFET M11 are grounded; the sources of the fourth MOSFET M4, the first MOSFET M1, the second MOSFET M2, the third MOSFET M3, and the ninth MOSFET M9 are connected to the power supply; the gate and drain of the fourth MOSFET M4, the drain of the seventh MOSFET M7, the gate of the fifth MOSFET M5, and the gate of the ninth MOSFET M9 are connected together; the fifth MOSFET... The drain of S-channel MOSFET M5 is grounded via a third resistor R3 and a fourth resistor R4 connected in sequence. The connection between the third resistor R3 and the fourth resistor R4 is connected to the inverting input of the first operational amplifier OPA1. The non-inverting input of the first operational amplifier OPA1 is grounded via a sixth switch and a thirteenth switch connected in sequence, and is also connected to the drain of the eleventh MOSFET M11 and the emitters or sources of the two off-chip power transistors. The output of the first operational amplifier OPA1 is grounded via a first capacitor C1, a seventh switch S7, and a fourteenth switch S14 connected in sequence. One end of the second switch S2 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via a fifth switch S5, and is also connected to the gate of the first MOSFET M1. The twelfth switch... One end of switch S12 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the ninth switch S9, and also to the gate of the second MOSFET M2; one end of the seventeenth switch S17 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the fifteenth switch S15, and also to the gate of the third MOSFET M3; the connection between the first capacitor C1 and the seventh switch S7 is connected to the drain of the first MOSFET M1 via the first switch S1 and the first resistor R1, and simultaneously connected to the drain of the second MOSFET M2 via the eighth switch S8 and the second resistor R2; the drain of the first MOSFET M1 is connected to the drain of the eighth MOSFET M8 via the third switch S3, and simultaneously grounded via the fourth switch S4. The drain of the second MOSFET M2 is connected to the drain of the eighth MOSFET M8 through the tenth switch S10, and is grounded through the eleventh switch S11; the drain of the third MOSFET M3 is connected to the drain and gate of the tenth MOSFET M10 and the gate of the eleventh MOSFET M11, and is grounded through the eighteenth switch S18; the drain of the eleventh MOSFET is connected to the drain of the ninth MOSFET M9 through the sixteenth switch S16; the drain of the first MOSFET M1 is connected to the base or gate of the first external power transistor as the first drive signal output by the transistor drive module TR_DRV; the drain of the second MOSFET M2 is connected to the base or gate of the second external power transistor as the second drive signal output by the transistor drive module TR_DRV.

[0037] Among them, the first MOSFET M1 to the fifth MOSFET M5 and the ninth MOSFET M9 are PMOS transistors, and the sixth MOSFET M6 to the eighth MOSFET M8, the tenth MOSFET M10, and the eleventh MOSFET M11 are NMOS transistors; the fifth MOSFET M5 is a PMOS transistor with an adjustable width-to-length ratio. The first switch S1 to the third switch S3 are controlled to close and open by the first control signal SEL1; the fourth switch S4 to the seventh switch S7 are controlled to close and open by the second control signal SEL1N; the eighth switch S8 to the tenth switch S10 are controlled to close and open by the third control signal SEL2; the eleventh switch S11 to the fourteenth switch S14 are controlled to close and open by the fourth control signal SEL2N; the fifteenth switch S15 and the sixteenth switch S16 are controlled to close and open by the fifth control signal MODE; and the seventeenth switch S17 and the eighteenth switch S18 are controlled to close and open by the sixth control signal MODEN. The first bias current IBG1 is provided by the reference source module BANDGAP; the first control signal SEL1, the second control signal SEL1N, the third control signal SEL2, the fourth control signal SEL2N, the fifth control signal MODE, and the sixth control signal MODEN are all provided by the digital control module DIG_CTRL.

[0038] The two off-chip power transistors can be BJT devices or MOS devices. When measuring rainfall, only infrared LED1 or LED2 can be used, or LED1 and LED2 can be lit alternately (note that they cannot be lit at the same time).

[0039] When both external power transistors NPN1 are BJT devices, MODE is high and MODEN is low, S15~S16 are closed, and S17~S18 are open. The control flow for other switches is as follows: When SEL1 is high, SEL1N is low, SEL2 is low, and SEL2N is high, S1~S3 are closed, and S4~S7 are open; S11~S14 are closed, and S8~S10 are open. Figure 5The circuit only drives the first external power transistor NPN1, thus lighting the first LED LED1. The base of the second external power transistor NPN2 is grounded, and the base current I6 of NPN2 is 0, so NPN2 is cut off, and the second LED LED2 does not light up. M6, M7, and M8 form an NMOS current mirror, and M4, M5, and M9 form a PMOS current mirror. The drain currents I4 and I9 of M8 and M9 are the same. The drain current of M5 flows through R3 and R4, generating the reference voltage VREF1 for OPA1. The width-to-length ratio of M5 is adjustable to calibrate VREF1 (the voltage at the inverting input of OPA1). When OPA1 is operating normally, due to its virtual short characteristic, the voltage VSHUNT is approximately equal to VREF1. C1 and R1 are Miller compensation components, ensuring the stability of the op-amp. To save power, reduce parasitic capacitance, and reduce the transconductance gm3 of M3, the width-to-length ratio of M3 is 1 / n of M1. Therefore, the drain current I3 of M3 is 1 / n of the drain current I1 of M1. Since the width-to-length ratio of M11 is n times that of M10, the drain current I8 of M11 is n times the drain current I3 of M3. Therefore, I8 = I1. When the circuit is working, the base voltage of the first external power transistor NPN1 is VSHUNT plus the base-emitter voltage of NPN1. NPN1 is in amplification mode. The base current I5 of NPN1 is provided by I1. The collector current IC1 is the forward current of the infrared lamp LED1. The emitter current I7 has the following relationship: I7 = I5 + IC1 = I1 - I9 + IC1 I7 = I8 + ILED - I4 Where: ILED is the precise current generated by the I_DRV module to drive the LED, therefore: I1-I9+IC1=I8+ILED-I4 IC1 = ILED As can be seen, ILED is the forward current of the LED lamp, excluding the base current of the BJT. Since the base current of the BJT is determined by the transistor gain β, and β changes with temperature and aging, if the base current of the NPN transistor is not compensated, it will inevitably affect the current accuracy of the LED, thereby changing the brightness of the infrared light. The internal loop of TR_DRV eliminates the base drive current of the NPN transistor, ensuring the accuracy of infrared light emission.

[0040] The circuit has two feedback paths, one positive and one negative. The negative feedback path is SHUNT-M1 gate-NPN1 base-SHUNT, and the positive feedback path is SHUNT-M3 gate-M11 gate-SHUNT. Since the transconductance gm3 of M3 is less than the transconductance gm1 of M1, and M10 is a DIODE connection and SHUNT is the emitter of NPN1, the gate of M11 and SHUNT are both low-impedance nodes, while the base of NPN1 is a high-impedance node. Since the gain is the product of transconductance and impedance, the positive feedback gain is less than the negative feedback gain, and the system is stable.

[0041] When SEL1 is low, SEL1N is high, SEL2 is high, and SEL2N is low, S1~S3 are open, and S4~S7 are closed; S11~S14 are open, and S8~S10 are closed, as follows: Figure 6 The circuit drives the second external power transistor NPN2, thereby lighting the second LED LED2. The base of the first external power transistor NPN1 is grounded, I5 is 0, NPN1 is cut off, and the first LED LED1 does not light up.

[0042] The working principle of driving NPN2 is the same as that of driving NPN1, only the driving path is different.

[0043] When SEL1 and SEL2 are both low, and SEL1N and SEL2N are both high, S4~S7 and S11~S14 are closed, and S1~S3 and S8~S10 are open. Figure 7 The circuit does not drive either the first external power transistor NPN1 or the second external power transistor NPN2, so LED1 and LED2 do not emit light. In this state, the gates of M1~M3 are connected to the power supply and their drains are grounded, the drains of M8 and M9 are floating, and the other end of C1 is grounded. Except for the reference voltage VREF1, the entire circuit is in the off state. The bases and emitters of NPN1 and NPN2 are connected to ground, both BJTs are cut off, and no current flows through LED1 and LED2.

[0044] When both off-chip power transistors are MOS devices, MODE is low, MODEN is high, S15~S16 are open, S17~S18 are closed, and TR_DRV switches to MOS application mode. Figure 8 As shown, MOSFET devices NM1 and NM2 are voltage-driven, with no current flowing through their gates. The base currents I5 of NM1 and I6 of NM2 are both 0. The currents ID1 or ID2 flowing through LED1 or LED2 are equal to I7. Since the current compensation function in BJT application mode is not required, the connection between the output terminal of OPA1 and M3 is disconnected, the gate of M3 is connected to the power supply, the drain of M9 is left floating, and the gates of M10 and M11 are grounded. I3, I4, and I8 are all 0, thus turning off the current compensation function.

[0045] The circuit that drives NM1 only is as follows Figure 9 As shown. The circuit that drives only NM2 is as follows. Figure 10 As shown in the diagram, a circuit where neither NM1 nor NM2 is driven, and neither LED1 nor LED2 emits light, is shown below. Figure 11 As shown, in the MOS application mode of TR_DRV: (1) there is no base current compensation function; (2) there is only one feed loop, namely “SHUNT-M1 gate-NPN1 base-SHUNT” negative feed path; apart from this, the operating principle of the circuit in various working states is the same as that of BJT application.

[0046] like Figure 12 As shown, the LED current drive module I_DRV includes several parallel RSHUNT circuits, a second operational amplifier OPA2, a SLOPE_CTRL circuit, a twentieth MOSFET M2, a twenty-first MOSFET M21, and a twenty-first resistor R21. The twenty-first resistor R21 is a resistor string. The source of the twentieth MOSFET M20 is connected to the source of the twenty-first MOSFET M21 and is also connected to the power supply; the gate and drain of the twentieth MOSFET M20 and the gate of the twenty-first MOSFET M21 are connected to the second bias current IBG2; the drain of the twenty-first MOSFET M21 is grounded through the twenty-first resistor R21; the non-inverting input of the second operational amplifier OPA2 is connected to different positions of the twenty-first MOSFET M21 according to the range configuration, and its inverting input is connected to the feedback output of each RSHUNT circuit through the twenty-second switch S22. Its output is connected to the first input of each RSHUNT circuit, and the emitters or sources of the two off-chip power transistors are connected to the second inputs of the several parallel RSHUNT circuits.

[0047] The second reference bias current IBG2 is provided by the BG module. The current ISHUNT is generated by the current mirror MOSFET M21. ISHUNT flows through the resistor string R21, generating a voltage VSLOPE = ISHUNT * R21. The SLOPE_CTRL circuit can control the rise and fall slope of VSLOPE. The non-inverting input of OPA2 can be connected to different positions of R21 according to the range configuration. VREF2 is the voltage divider of VSLOPE. Different positions of the resistor string R21 represent different voltage division ratios. OPA2 and the RSHUNT module constitute a voltage-to-current converter, forming a negative feedback loop. According to the virtual short characteristic, VFB (the voltage at the inverting input of OPA2) is approximately equal to VREF2. Therefore, the LED current I7 is: I7=VREF2 / R22 The overall width-to-length ratio of M21 can be adjusted according to the configuration to eliminate the influence of factors such as process changes on the accuracy of ISHUNT and achieve the purpose of calibrating LED current.

[0048] The circuit principle and operating state of I_DRV are the same for both MOS and BJT applications of LED Driver.

[0049] Several parallel RSHUNT circuits are used to control the resistance value of the shunt resistor. For example... Figure 13 As shown, a single RSHUNT circuit includes a 21st switch S21, a 22nd switch S22, a 23rd switch S23, a 22nd MOSFET M22, and a 22nd resistor S22. The source of the 22nd MOSFET M22 is grounded through the 22nd resistor S22, and the connection between the source of the 22nd MOSFET M22 and the 22nd resistor S22 serves as the feedback output terminal of the RSHUNT circuit. The first input terminal of the RSHUNT circuit is connected to the gate of the 22nd MOSFET M22 through the 21st switch S21, and the gate of the 22nd MOSFET M22 is grounded through the 23rd switch S23. The drain of the 22nd MOSFET M22 is connected to the emitter or source of two off-chip power transistors. Multiple RSHUNT modules are connected in parallel in the I_DRV circuit. The number of RSHUNTs to be connected can be selected according to the gear configuration. When an RSHUNT circuit is activated, the 21st switch S21 and the 22nd switch S22 are closed, and the 23rd switch S23 is open. At this time, the 22nd MOSFET M22 is turned on. When an RSHUNT circuit is not activated, the 21st switch S21 and the 22nd switch S22 are open, and the 23rd switch S23 is closed, so the 22nd MOSFET M22 is turned off. There is no situation where S21 and S22 are closed and S23 is open. The more RSHUNTs activated and the more shunt resistors R22 connected in parallel, the smaller the total resistance of the shunt resistors, and the larger the LED current I7, and vice versa. The control signals for the 21st switch S21 and the 22nd switch S22 in each RSHUNT circuit are provided by the digital control module DIG_CTRL.

[0050] Different rainfall measurement scenarios require different infrared light intensities. The luminous intensity of an LED lamp exhibits a logarithmic relationship with its forward current. To achieve precise adjustment of the LED luminous intensity, the LED current settings can be designed using a combination of logarithmic and linear methods. The position of the resistor series R21 connected to the non-inverting input of OPA2 can change the value of VREF2, and the number of RSHUNTs can change the value of R22; both have the ability to adjust the LED current. Designing the setting for the R21 connection position as a linear step change allows for a linear change in LED current by adjusting the R21 connection position. Designing the setting for the number of RSHUNTs as a doubly ...

[0051] The SLOPE_CTRL circuit controls the rise and fall slopes of VSLOPE, which in turn changes the slope of VREF2, thereby controlling the rise and fall rates of the LED current and reducing EMI. Figure 14As shown, the circuit includes switches S41 to S44 (41st to 44th), MOSFETs M31 to M49 (31st to 49th), and capacitor C41 (41st). The sources of MOSFETs M31, M32, M35, M36, M37, M40, and M41 are connected to a power supply. The drain and gate of MOSFET M31 and the gate of MOSFET M32 are connected to a third bias current IBG3. The drain of MOSFET M32 and the gate of MOSFET M33 are connected to a third bias current IBG3. The drain and gate of the 34th MOSFET M34, the gate of the 38th MOSFET M38, the gate of the 45th MOSFET M45, and the gate of the 48th MOSFET M48 are connected; the source of the 33rd MOSFET M33, the source of the 34th MOSFET M34, the source of the 38th MOSFET M38, the source of the 39th MOSFET M39, the source of the 45th MOSFET M45, the source of the 44th MOSFET M44, the source of the 46th MOSFET M46, the source of the 47th MOSFET M47, the source of the 48th MOSFET M48, and the source of the 49th MOSFET M49 are grounded; the drain of the 34th MOSFET M34, the gate of the 35th MOSFET M48, and the gate of the 39th MOSFET M49 are connected. The gate and drain of MOSFET M35, the gate of MOSFET M36, and the gate of MOSFET M37 are connected together. The drain of MOSFET M36 is connected to the drain of MOSFET M38 and the gate and drain of MOSFET M39 via switches S41 and S42 connected in sequence. The connection point of switches S41 and S42 is connected to one end of capacitor C41 and the gate of MOSFET M49. The drain of MOSFET M37, the drain and gate of MOSFET M43, and the gate of MOSFET M42 are connected together. The gate and drain of MOSFET M40 are connected together. The source of MOSFET M42 is connected to the drain of MOSFET M42 and the gate of MOSFET M41. The source of MOSFET M42 is connected to the drain of MOSFET M36 and the drain of MOSFET M45 via switch S43. The source of MOSFET M43 is connected to the drain and gate of MOSFET M44. The drain of MOSFET M41, the drain and gate of MOSFET M46, and the gate of MOSFET M47 are connected. The drain of MOSFET M47 and the drain of MOSFET M48 are connected and the drain of MOSFET M21 via switch S44.The drain of the 21st MOSFET M21 is also connected to the drain of the 49th MOSFET M49 and the other end of the 41st capacitor C41.

[0052] Among them, the 20th MOSFET M20, 21st MOSFET M21, 31st MOSFET M31, 32nd MOSFET M32, 35th MOSFET M35, 36th MOSFET M36, 37th MOSFET M37, 40th MOSFET M40, and 41st MOSFET M41 are PMOS transistors; the 22nd MOSFET M22, 33rd MOSFET M33, 34th MOSFET M34, 38th MOSFET M38, 39th MOSFET M39, and 42nd MOSFET M42 to 49th MOSFET M49 are NMOS transistors. The 32nd MOSFET M32 is a PMOS transistor with an adjustable width-to-length ratio. Switches S41 (41) and S42 (44) are controlled to close and open by the seventh control signal DRVN; switches S42 (42) and S43 (43) are controlled to close and open by the eighth control signal DRV; the third bias current IBG3 is provided by the reference source module BANDGAP; and the seventh control signal DRVN and the eighth control signal DRV are provided by the digital control module DIG_CTRL.

[0053] When the voltage across resistor R21 rises from low to high, control signal DRV goes high, control signal DRVN goes low, switches S42 and S43 close, and switches S41 and S44 open. Before VSLOPE rises, V2 is the power supply voltage, V3 is low voltage, switch M49 is on, current I1 is discharged through switch M49, and VSLOPE is low voltage. After S42 and S43 are closed and S41 and S44 are opened, V3 rises rapidly and V2 falls rapidly and eventually equals it. The clamping function of M39 connected to DIODE is triggered. The gate charge of M49 and the plate charge of C41 are quickly released through M39. V2 drops rapidly to the threshold voltage VTH of M39. Then M39 is turned off. The gate charge of M49 and the plate charge of C41 can only be released through the current mirror MOSFET M38. The current I4 = I3, and the charge release capability is limited. At the same time, due to the effect of Miller capacitance, V2 decreases slowly, M49 is slowly turned off, the current I1 gradually decreases, and VSLOPE rises slowly until M49 is completely turned off. The current I1 is 0, and the VSLOPE voltage will eventually reach VSLOPE = ISHUNT * R21. The VSLOPE rise control is completed, and the LED current rise control is completed.

[0054] When the voltage across resistor R21 decreases from high to low, control signal DRV goes low, control signal DRVN goes high, switches S42 and S43 are disconnected, and switches S41 and S44 are closed. Before VSLOPE decreases, V1 is approximately equal to the on-state voltage VGS of M44, and V2 is low. After switches S42 and S43 are disconnected and switches S41 and S44 are closed, V1 decreases rapidly and V2 increases rapidly and eventually equals V2. Due to the coupling effect of the gate-drain parasitic capacitance of C41 and M49, the rapidly rising V2 causes VSLOPE to overshoot. The rapidly decreasing V1 increases the gate-source voltage of M42, increases the drain current of M42, increases I4, and thus increases the discharge current I3, thereby suppressing VSLOPE overshoot. As V2 continues to rise, M42 is cut off, I4 becomes 0, and the discharge of the fixed current I5 can continue to suppress VSLOPE overshoot. Because Miller capacitor C41 slows down the rise rate of V2, M49 slowly turns on, the current I2 gradually increases, VSLOPE slowly decreases, and V2 eventually reaches the power supply voltage. The current I1 is approximately equal to ISHUNT, VSLOPE is at a low level, and the VSLOPE decrease control is completed, thus achieving the purpose of controlling the rate of decrease of LED current.

[0055] The digital control module DIG_CTRL is used to output static control signals and clock signals to BANDGAP, TR_DRV, and I_DRV. It can be built using gate circuits or generated by code.

[0056] The simulation waveforms of control signals SEL1, SELN, SEL2, SEL2N, DRV, DRVN, and the forward currents ILED1 and ILED2 of the LEDs are shown below. Figure 15 As shown. To control the rise and fall rate of the LED infrared lamp current and reduce EMI, the rising edge of SEL1 or SEL2 (falling edge of SEL1N or SEL2N) and the rising edge of DRV can arrive simultaneously, but the falling edge of SEL1 or SEL2 (rising edge of SEL1N or SEL2N) should be later than the falling edge of DRV. That is, the TR_DRV and I_DRV modules should be driven simultaneously. After infrared emission is completed, the I_DRV driver should be turned off first, and then the TR_DRV driver should be turned off. The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.

Claims

1. A low-voltage LED driving circuit for an infrared rain gauge, characterized in that, include: The module consists of a reference source (BANDGAP), a transistor driver (TR_DRV), an LED current driver (I_DRV), and a digital control module (DIG_CTRL). The reference source module BANDGAP is used to generate high-precision current and provide bias current to TR_DRV and I_DRV; The transistor driver module TR_DRV generates a driving pulse signal. Two output signals are sent to the base or gate of two external power transistors to control their on / off states, thereby controlling the switching state of the two LEDs. The collectors or drains of the two external power transistors are connected to the negative terminals of the two LEDs. The emitters or sources of the two external power transistors are connected to TR_DRV to form a loop in the TR_DRV module. The LED current drive module I_DRV is used to generate current pulse signals. The emitter or source outputs of two off-chip power transistors serve as the inputs of I_DRV, and the outputs of I_DRV are grounded. The digital control module DIG_CTRL is used to output static control signals and clock signals to BANDGAP, TR_DRV, and I_DRV.

2. The LED low-voltage driving circuit of the infrared rain sensor according to claim 1, characterized in that: The transistor driving module TR_DRV includes a first switch S1 to an eighteenth switch S18, a first MOS transistor M1 to an eleventh MOS transistor M11, a first resistor R1 to a fourth resistor R4, and a first operational amplifier OPA1; The drain and gate of the sixth MOSFET M6, the gate of the seventh MOSFET M7, and the gate of the eighth MOSFET M8 are connected to the first bias current IBG1; the sources of the sixth MOSFET M6, the seventh MOSFET M7, the eighth MOSFET M8, the fifth MOSFET M5, the tenth MOSFET M10, and the eleventh MOSFET M11 are grounded; the sources of the fourth MOSFET M4, the first MOSFET M1, the second MOSFET M2, the third MOSFET M3, and the ninth MOSFET M9 are connected to the power supply; the gate and drain of the fourth MOSFET M4, the drain of the seventh MOSFET M7, the gate of the fifth MOSFET M5, and the gate of the ninth MOSFET M9 are connected together; the fifth MOSFET M6... The drain of MOSFET M5 is grounded via a third resistor R3 and a fourth resistor R4 connected in sequence; the connection point of the third resistor R3 and the fourth resistor R4 is connected to the inverting input of the first operational amplifier OPA1; the non-inverting input of the first operational amplifier OPA1 is grounded via a sixth switch and a thirteenth switch connected in sequence, and is also connected to the drain of the eleventh MOSFET M11 and the emitters or sources of the two off-chip power transistors; the output of the first operational amplifier OPA1 is grounded via a first capacitor C1, a seventh switch S7, and a fourteenth switch S14 connected in sequence; one end of the second switch S2 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the fifth switch S5, and is also connected to the gate of the first MOSFET M1; the tenth One end of switch S12 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the ninth switch S9, and simultaneously connected to the gate of the second MOSFET M2; one end of the seventeenth switch S17 is connected to the power supply, and the other end is connected to the output of the first operational amplifier OPA1 via the fifteenth switch S15, and simultaneously connected to the gate of the third MOSFET M3; the connection between the first capacitor C1 and the seventh switch S7 is connected to the drain of the first MOSFET M1 via the first switch S1 and the first resistor R1, and simultaneously connected to the drain of the second MOSFET M2 via the eighth switch S8 and the second resistor R2; the drain of the first MOSFET M1 is connected to the drain of the eighth MOSFET M8 via the third switch S3, and simultaneously connected to the drain of the second MOSFET M2 via the fourth switch S15.

4. Grounding; The drain of the second MOSFET M2 is connected to the drain of the eighth MOSFET M8 through the tenth switch S10, and is also grounded through the eleventh switch S11; The drain of the third MOSFET M3 is connected to the drain and gate of the tenth MOSFET M10 and the gate of the eleventh MOSFET M11, and is also grounded through the eighteenth switch S18; The drain of the eleventh MOSFET is connected to the drain of the ninth MOSFET M9 through the sixteenth switch S16; The drain of the first MOSFET M1 is connected to the base or gate of the first external power transistor as the first drive signal output by the transistor drive module TR_DRV, and the drain of the second MOSFET M2 is connected to the base or gate of the second external power transistor as the second drive signal output by the transistor drive module TR_DRV.

3. The LED low-voltage driving circuit of the infrared rain sensor according to claim 2, characterized in that: The first MOS transistor M1 to the fifth MOS transistor M5 and the ninth MOS transistor M9 are PMOS transistors, the sixth MOS transistor M6 to the eighth MOS transistor M8 and the tenth MOS transistor M10 and the eleventh MOS transistor M11 are NMOS transistors; the fifth MOS transistor M5 is a PMOS transistor with an adjustable width-to-length ratio.

4. The LED low-voltage driving circuit of the infrared rain sensor according to claim 2, characterized in that: The first switch S1 to the third switch S3 are controlled to close and open by the first control signal SEL1; The fourth switch S4 to the seventh switch S7 are controlled to close and open by the second control signal SEL1N; The eighth switch S8 to the tenth switch S10 are controlled to close and open by the third control signal SEL2; The eleventh switch S11 to the fourteenth switch S14 are controlled to close and open by the fourth control signal SEL2N; The fifteenth switch S15 and the sixteenth switch S16 are controlled to close and open by the fifth control signal MODE; The seventeenth switch S17 and the eighteenth switch S18 are controlled to close and open by the sixth control signal MODEN.

5. The LED low-voltage driving circuit of the infrared rain sensor according to claim 4, characterized in that: The first bias current IBG1 is provided by the reference source module BANDGAP; The first control signal SEL1, the second control signal SEL1N, the third control signal SEL2, the fourth control signal SEL2N, the fifth control signal MODE, and the sixth control signal MODEN are all provided by the digital control module DIG_CTRL; The two external power transistors are either BJT devices or MOS devices. When both external power transistors are BJT devices, MODE is high and MODEN is low, S15~S16 are closed, and S17~S18 are open. When both external power transistors are MOS devices, MODE is low and MODEN is high, S15~S16 are open, and S17~S18 are closed. The control flow for other switches is as follows: When SEL1 is high, SEL1N is low, SEL2 is low, and SEL2N is high, S1~S3 are closed, and S4~S7 are open; S11~S14 are closed, and S8~S10 are open, driving only the first external power transistor, thus lighting the first LED, while the second LED does not light up. When SEL1 is low, SEL1N is high, SEL2 is high, and SEL2N is low, S1~S3 are open, and S4~S7 are closed; S11~S14 are open, and S8~S10 are closed, driving only the second external power transistor, thus lighting the second LED, while the first LED does not light up. When SEL1 and SEL2 are both low, and SEL1N and SEL2N are both high, S4~S7 and S11~S14 are closed, and S1~S3 and S8~S10 are open. Neither of the two external power transistors is driven, and neither of the two LEDs lights up.

6. The LED low-voltage driving circuit of the infrared rain sensor according to claim 1, characterized in that: The LED current drive module I_DRV includes several parallel RSHUNT circuits, a second operational amplifier OPA2, a SLOPE_CTRL circuit, a twentieth MOSFET M2, a twenty-first MOSFET M21, and a twenty-first resistor R21, which is a resistor series. The parallel RSHUNT circuits are used to control the resistance value of the shunt resistors. The SLOPE_CTRL circuit is used to control the rise and fall slope of the voltage across the twenty-first resistor R21. The source of the twentieth MOSFET M20 is connected to the source of the twenty-first MOSFET M21, and is also connected to a power supply; the gate and drain of the twentieth MOSFET M20 and the gate of the twenty-first MOSFET M21 are connected to the second bias current IBG2; the drain of the twenty-first MOSFET M21 is grounded through the twenty-first resistor R21; the non-inverting input of the second operational amplifier OPA2 is connected to different positions of the twenty-first MOSFET M21 according to the range configuration, and its inverting input is connected to the feedback output of each RSHUNT circuit through the twenty-second switch S22, and its output is connected to the first input of each RSHUNT circuit; the emitters or sources of the two off-chip power transistors are connected to the second inputs of several parallel RSHUNT circuits. A single RSHUNT circuit includes a twenty-first switch S21, a twenty-second switch S22, a twenty-third switch S23, a twenty-second MOSFET M22, and a twenty-second resistor S22; The source of the 22nd MOSFET M22 is grounded through the 22nd resistor S22. The connection between the source of the 22nd MOSFET M22 and the 22nd resistor S22 serves as the feedback output of the RSHUNT circuit. The first input of the RSHUNT circuit is connected to the gate of the 22nd MOSFET M22 through the 21st switch S21. The gate of the 22nd MOSFET M22 is also grounded through the 23rd switch S23. The drain of the 22nd MOSFET M22 is connected to the emitter or source of two off-chip power transistors. The SLOPE_CTRL circuit includes switches 41 to 44, MOSFETs 31 to 49, and capacitor C41. The sources of MOSFETs 31, 32, 35, 36, 37, and 40 are connected to a power supply. The drain and gate of MOSFET 31 and the gate of MOSFET 32 are connected to a third bias current IBG3. The drain of MOSFET 32 and the gate of MOSFET 32 are connected to a third bias current IBG3. The drain and gate of MOSFET M33, the gate of MOSFET M34, the gate of MOSFET M38, the gate of MOSFET M45, and the gate of MOSFET M48 are connected together; the source of MOSFET M33, the source of MOSFET M34, the source of MOSFET M38, the source of MOSFET M39, the source of MOSFET M45, the source of MOSFET M44, the source of MOSFET M46, the source of MOSFET M47, the source of MOSFET M48, and the source of MOSFET M49 are grounded; the drain of MOSFET M34 is connected to the ground. The gate and drain of the 35th MOSFET M35, the gate of the 36th MOSFET M36, and the gate of the 37th MOSFET M37 are connected together; the drain of the 36th MOSFET M36 is connected to the drain of the 38th MOSFET M38 and the gate and drain of the 39th MOSFET M39 via the 41st switch S41 and the 42nd switch S42 connected in sequence; the connection point of the 41st switch S41 and the 42nd switch S42 is connected to one end of the 41st capacitor C41 and the gate of the 49th MOSFET M49; the drain of the 37th MOSFET M37, the drain and gate of the 43rd MOSFET M43, and the gate of the 42nd MOSFET M42 are connected together; the gate of the 40th MOSFET M40... The source and drain of the 42nd MOSFET M42 are connected to the drain of the 36th MOSFET M36, and the drain of the 45th MOSFET M45 is connected through the 43rd switch S43; the source of the 43rd MOSFET M43 is connected to the drain and gate of the 44th MOSFET M44; the drain and gate of the 41st MOSFET M41, the drain and gate of the 46th MOSFET M46, and the gate of the 47th MOSFET M47 are connected; the drain of the 47th MOSFET M47 and the drain of the 48th MOSFET M48 are connected, and the drain of the 21st MOSFET M21 is connected through the 44th switch.The drain of the 21st MOSFET M21 is also connected to the drain of the 49th MOSFET M49 and the other end of the 41st capacitor C41.

7. The LED low-voltage driving circuit of the infrared rain sensor according to claim 6, characterized in that: The 20th MOSFET M20, 21st MOSFET M21, 31st MOSFET M31, 32nd MOSFET M32, 35th MOSFET M35, 36th MOSFET M36, 37th MOSFET M37, 40th MOSFET M40, and 41st MOSFET M41 are PMOS transistors; the 22nd MOSFET M22, 33rd MOSFET M33, 34th MOSFET M34, 38th MOSFET M38, 39th MOSFET M39, and 42nd MOSFET M42 to 49th MOSFET M49 are NMOS transistors, among which the 32nd MOSFET M32 is a PMOS transistor with an adjustable width-to-length ratio.

8. The LED low-voltage driving circuit of the infrared rain sensor according to claim 6, characterized in that: When a certain RSHUNT circuit is selected, the twenty-first switch S21 and the twenty-second switch S22 are closed, and the twenty-third switch S23 is open. At this time, the twenty-second MOSFET M22 is turned on. When a certain RSHUNT circuit is not selected, the twenty-first switch S21 and the twenty-second switch S22 are open, and the twenty-third switch S23 is closed. Then the twenty-second MOSFET M22 is turned off.

9. The LED low-voltage driving circuit of the infrared rain sensor according to claim 8, characterized in that: The forty-first switch S41 and the forty-fourth switch S41 are controlled to close and open by the seventh control signal DRVN; The forty-second switch S42 and the forty-third switch S43 are controlled to close and open by the eighth control signal DRV. The second bias current IBG2 and the third bias current IBG3 are provided by the reference source module BANDGAP; The seventh control signal DRVN, the eighth control signal DRV, and the control signals for the twenty-first switch S21 and the twenty-second switch S22 in each RSHUNT circuit are all provided by the digital control module DIG_CTRL. When the voltage across the 21st resistor R21 rises from low to high, the 8th control signal DRV is set high, the 7th control signal DRVN is set low, S42 and S43 are closed, and S41 and S44 are opened. When the voltage across the 21st resistor R21 decreases from high to low, the 8th control signal DRV is set low, the 7th control signal DRVN is set high, S42 and S43 are disconnected, and S41 and S44 are closed.

10. The LED low-voltage driving circuit of the infrared rain sensor according to claim 1, characterized in that: The reference source module BANDGAP uses a bandgap reference circuit.

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