Circuit board, circuit board assembly, electronic device, and manufacturing method

Abstract

The embodiment of the application provides a circuit board, a circuit board assembly, an electronic device and a preparation method, and belongs to the technical field of circuit boards. The circuit board comprises a transmission line and a full shielding structure. The full shielding structure comprises four shielding walls connected in a head-to-tail mode, the shielding walls are arranged in an extending direction of the transmission line, the four shielding walls surround the transmission line and enclose a shielding space, and the transmission line is located in the inside of the shielding space and is arranged in a spaced mode with the inner wall of the shielding space. In this way, the loss of the transmission line can be reduced, and the difficulty of improving the signal transmission rate is reduced.

Description

Technical Field

[0001] This application relates to the field of circuit board technology, and in particular to a circuit board, circuit board assembly, electronic device, and method of manufacturing thereof. Background Technology

[0002] Printed circuit boards (PCBs) are crucial components in electronic devices, supporting and interconnecting electronic components. In related technologies, PCBs incorporate transmission lines, typically differential pairs, to enable signal transmission between different electronic components. However, the significant losses in these transmission lines complicate the process of increasing signal transmission speeds. Summary of the Invention

[0003] This application provides a circuit board, a circuit board assembly, an electronic device, and a manufacturing method, which can reduce transmission line losses and reduce the difficulty of increasing signal transmission rate.

[0004] In a first aspect, embodiments of this application provide a circuit board, which includes a transmission line and a fully shielded structure. The fully shielded structure includes four shielding walls connected end to end, which extend along the extension direction of the transmission line. The four shielding walls surround the transmission line and enclose a shielding space, with the transmission line located inside the shielding space and spaced apart from the inner walls of the shielding space.

[0005] In this embodiment, the transmission line is fully shielded by a fully shielded structure, which can prevent mutual interference between two adjacent transmission lines, reduce the loss of the transmission line, reduce the difficulty of increasing the signal transmission rate, and ensure that the signal integrity of the transmission line meets the requirements of high-speed signal transmission. This method is applicable to scenarios requiring high-speed signal transmission.

[0006] In some possible implementations, the circuit board includes a through-slot, a first metal layer, a first dielectric layer, and a second metal layer. The first metal layer includes a first shielding wall, and the second metal layer includes a second shielding wall. The first metal layer, the first dielectric layer, and the second metal layer are stacked along the thickness direction of the circuit board, and the through-slot penetrates the first metal layer, the first dielectric layer, and the second metal layer. A transmission line is embedded inside the first dielectric layer. Along a direction perpendicular to the thickness direction of the circuit board, through-slots are provided on opposite sides of the transmission line. A third shielding wall is provided on the wall of the through-slot near the transmission line. The opposite ends of the third shielding wall are connected to the first shielding wall and the second shielding wall, respectively. The first shielding wall, the second shielding wall, and the two third shielding walls enclose a shielding space.

[0007] In this way, during the circuit board manufacturing process, a third shielding wall can be formed on the sidewall of the through-slot using a slot metallization process (such as electroplating), reducing the difficulty of forming a fully shielded structure and improving the circuit board manufacturing efficiency. Additionally, the transmission lines can be embedded within the first dielectric layer using existing processes (such as MSAP), which can also improve the production efficiency of the transmission lines.

[0008] In some possible implementations, the circuit board also includes a third metal layer attached to the wall of the through slot, the orthographic projection of the third metal layer in a plane perpendicular to the thickness direction of the circuit board being annular, and the third metal layer including a third shielding wall.

[0009] In this way, by forming a third metal layer on the wall of the through slot through the slot metallization process, the manufacturing difficulty of the full shielding structure can be reduced and the production efficiency of the circuit board can be improved.

[0010] In some possible implementations, the circuit board includes a first layer structure and a second layer structure stacked together. The first layer structure includes transmission lines and a fully shielded structure. The second layer structure is the surface layer of the circuit board and has pads. The transmission lines are electrically connected to the pads of the second layer structure through metallized vias.

[0011] In this way, the metallized vias lead the transmission lines to the surface pads, and the transmission lines are electrically connected to electronic components through the metallized vias and pads.

[0012] In some possible implementations, the transmission line comprises two signal lines spaced apart.

[0013] Thus, the transmission line is a differential pair, which refers to a pair of coupled lines used to transmit differential signals. Differential signals consist of two signals with the same amplitude but opposite phase. Differential signal transmission has advantages such as strong anti-interference capability and effective suppression of electromagnetic interference, which is helpful for transmitting high-speed signals.

[0014] In some possible implementations, the cross-sectional shape of the signal line is rectangular or trapezoidal.

[0015] This can further reduce transmission line losses and make it easier to increase the signal transmission rate of the transmission line.

[0016] Secondly, embodiments of this application provide a circuit board assembly, which includes electronic components and a circuit board as described in any of the first aspects. The electronic components are disposed on the circuit board and electrically connected to the transmission lines of the circuit board.

[0017] Thirdly, embodiments of this application provide an electronic device including a housing and a circuit board assembly as described in the second aspect. The circuit board assembly is disposed inside the housing.

[0018] Fourthly, embodiments of this application provide a method for manufacturing a circuit board, the method comprising:

[0019] A substrate is fabricated, comprising a first metal layer, a second metal layer, a first dielectric layer, and a transmission line. The first metal layer, the first dielectric layer, and the second metal layer are stacked along the thickness direction of the substrate. The first metal layer includes a first shielding wall, the second metal layer includes a second shielding wall, and the transmission line is embedded inside the first dielectric layer.

[0020] Through slots are formed on opposite sides of the transmission line, and the through slots extend along the extension direction of the transmission line and penetrate the substrate along the thickness direction of the substrate.

[0021] A third shielding wall is formed on the side of the through-slot near the transmission line by an electroplating process. The two ends of the third shielding wall are electrically connected to the first shielding wall and the second shielding wall, respectively. The first shielding wall, the second shielding wall and the two third shielding walls enclose a shielding space. The transmission line is located inside the shielding space and is spaced apart from the inner wall of the shielding space.

[0022] In some possible implementations, the substrate is fabricated, including:

[0023] A first sub-board is fabricated. The first sub-board includes a first metal layer, a first sub-dielectric layer, and a transmission line. The transmission line and the first metal layer are respectively disposed on opposite sides of the first sub-dielectric layer.

[0024] A first sub-board and a second sub-board are pressed together to form a substrate; wherein the second sub-board includes a second sub-dielectric layer and a second metal layer stacked together, the first sub-dielectric layer and the second sub-dielectric layer are connected to form a first dielectric layer, and the transmission lines are in contact with the first sub-dielectric layer and the second sub-dielectric layer at opposite ends along the thickness direction of the substrate.

[0025] Among some possible implementations, the methods for fabricating the first daughterboard include:

[0026] A first metal layer, a first sub-dielectric layer, and a circuit metal layer are provided in a stacked configuration;

[0027] Transmission lines are formed on the circuit metal layer through an etching process to form the first sub-board.

[0028] In some possible implementations, a third shielding wall is formed on the side of the through-slot near the transmission line by an electroplating process, including:

[0029] A third metal layer is formed on the wall of the through-slot through an electroplating process. Part of the third metal layer is a third shielding wall. The orthographic projection of the third metal layer in a plane perpendicular to the thickness direction of the substrate is annular.

[0030] In some possible implementations, the transmission lines are differential pairs. Attached Figure Description

[0031] Figure 1 A top view schematic diagram of a circuit board assembly provided in an embodiment of this application;

[0032] Figure 2 for Figure 1 A top view of the first layer structure of the circuit board in the diagram;

[0033] Figure 3 for Figure 2 Cross-sectional view along the BB direction;

[0034] Figure 4 for Figure 3 A three-dimensional structural diagram of the fully shielded structure and its cooperation with the transmission line;

[0035] Figure 5 This is a cross-sectional schematic diagram of a second type of transmission line provided in an embodiment of this application;

[0036] Figure 6 This is a cross-sectional schematic diagram of a third type of transmission line provided in an embodiment of this application;

[0037] Figure 7 This is a cross-sectional schematic diagram of a fourth type of transmission line provided in an embodiment of this application;

[0038] Figure 8 This is a cross-sectional schematic diagram of the fifth type of transmission line provided in the embodiments of this application;

[0039] Figure 9 This is a cross-sectional schematic diagram of the sixth type of transmission line provided in the embodiments of this application;

[0040] Figure 10 for Figure 1 A cross-sectional view along the AA direction;

[0041] Figure 11 A top view schematic diagram of another first-layer structure provided in an embodiment of this application;

[0042] Figure 12 This is a schematic diagram of the first process of a method for manufacturing a circuit board according to an embodiment of this application;

[0043] Figure 13 This is a schematic diagram of the second process of a method for manufacturing a circuit board according to an embodiment of this application;

[0044] Figure 14 This is a schematic diagram of the third process of a circuit board fabrication method provided in an embodiment of this application;

[0045] Figure 15 This is a schematic diagram of the fourth process of a circuit board fabrication method provided in an embodiment of this application;

[0046] Figure 16 This is a schematic diagram of the fifth process of a circuit board fabrication method provided in an embodiment of this application;

[0047] Figure 17 for Figure 16 A cross-sectional view along the CC direction;

[0048] Figure 18 A schematic diagram of the sixth process of a circuit board fabrication method provided in this application embodiment;

[0049] Figure 19 for Figure 18 A cross-sectional view along the DD direction;

[0050] Figure 20 This is a schematic diagram of the seventh process of a circuit board fabrication method provided in an embodiment of this application;

[0051] Figure 21 This is a schematic diagram of the eighth process of a circuit board fabrication method provided in an embodiment of this application;

[0052] Figure 22 This is a schematic diagram of the ninth process of a method for manufacturing a circuit board according to an embodiment of this application;

[0053] Figure 23 This is a schematic diagram of the tenth process of a circuit board fabrication method provided in an embodiment of this application.

[0054] Explanation of reference numerals in the attached figures:

[0055] 110. First layer structure;

[0056] 111. First metal layer; 112. Second metal layer; 113. First dielectric layer; 114. Third metal layer;

[0057] 120. Second layer structure;

[0058] 130. Third-layer structure;

[0059] 10. Transmission line; 11. Signal line;

[0060] 20. Fully shielded structure;

[0061] 21. First shielding wall; 22. Second shielding wall; 23. Third shielding wall; 24. Shielding space;

[0062] 30. Through groove;

[0063] 40. Solder pads;

[0064] 50. Metallized vias;

[0065] 61. First sub-dielectric layer; 62. Circuit metal layer; 63. Second sub-dielectric layer;

[0066] 70. Window;

[0067] 100. Circuit board;

[0068] 200. Electronic components. Detailed Implementation

[0069] The terminology used in the implementation section of this application is for the purpose of explaining specific embodiments of this application only, and is not intended to limit this application.

[0070] The embodiments of this application provide an electronic device, which may be, for example, a mobile phone, a tablet computer, a personal digital assistant (PDA), a television, a smart wearable product (e.g., a smartwatch, a smart bracelet), a virtual reality (VR) terminal device, an augmented reality (AR) terminal device, a drone, radar, an in-vehicle device, a server, a switch, or other different types of user equipment or terminal devices. The embodiments of this application do not impose any special limitations on the specific form of the electronic device.

[0071] Electronic devices include a housing and a circuit board assembly. The circuit board assembly is located inside the housing, which supports and secures the circuit board assembly and protects it from moisture, impurities, dust, and other external environmental factors that could corrode it.

[0072] The circuit board assembly includes a circuit board 100 and electronic components 200. The electronic components 200 are disposed on the circuit board 100 and are electrically connected to the circuit board 100.

[0073] The number of electronic components 200 can be one or more, and the electronic components 200 can be resistors, capacitors, inductors, mobile phone main processor chips (or central processing unit (CPU) or application processor), dual data rate (DDR) synchronous dynamic random access memory (SDRAM) or random access memory (RAM) memory chips, storage flash (NAND flash) or read only memory (ROM) memory chips, audio / video control chips, neural processing unit (NPU), connectors, and other components.

[0074] To achieve interconnection of different electronic components, such as between chips, related technologies employ circuit boards with transmission lines. These transmission lines consist of two spaced-apart signal lines, forming differential pairs, thus enabling chip interconnection. However, the large number of transmission lines on the circuit board leads to significant crosstalk and disturbances between adjacent lines, resulting in substantial transmission line losses. This increases the difficulty of improving signal transmission rates and makes the circuit unsuitable for applications requiring high-speed signal transmission.

[0075] In view of this, this application provides a circuit board 100, which is provided with a fully shielded structure 20. The fully shielded structure 20 has a shielding space 24 for accommodating the transmission line 10. The transmission line 10 is fully shielded, which can prevent mutual interference between two adjacent transmission lines 10. The loss of the transmission line 10 is small, which can reduce the difficulty of increasing the signal transmission rate. The signal integrity of the transmission line 10 can meet the requirements of high-speed signal transmission.

[0076] Figure 1 This is a top view schematic diagram of a circuit board assembly provided in an embodiment of this application. Figure 2 for Figure 1 A top view of the first layer structure of the circuit board. Figure 3 for Figure 2 A cross-sectional view along the BB direction. Figure 4 for Figure 3 The diagram shows a three-dimensional representation of the fully shielded structure and its interaction with the transmission line. In each diagram, the X-axis is defined as the length direction of the circuit board 100, the Y-axis is defined as the length direction of the circuit board 100, and the Z-axis is defined as the thickness direction of the circuit board 100.

[0077] The circuit board 100 provided in this embodiment includes a transmission line 10 and a fully shielded structure 20. Wherein, as... Figure 3 , Figure 4 As shown, the fully shielded structure 20 includes four shielding walls connected end-to-end. These shielding walls extend along the extension direction of the transmission line 10, surrounding the transmission line 10 and forming a shielding space 24. The transmission line 10 is located inside the shielding space 24 and is spaced apart from the inner walls of the shielding space 24. At least one end of the transmission line 10 is electrically connected to an electronic component 200, such as... Figure 1 As shown, both ends of the transmission line 10 are electrically connected to electronic components 200.

[0078] like Figure 3 As shown, each shielding wall is a plate-like structure, and the fully shielded structure 20 is similar to a hollow tubular structure. The fully shielded structure 20 is fitted onto the transmission line 10, and the fully shielded structure 20 and the transmission line 10 can form a cable-like structure, fully shielding the transmission line 10. This prevents interference between adjacent transmission lines 10, reduces the loss of the transmission line 10, and simplifies the process of increasing signal transmission rate. The signal integrity of the transmission line 10 meets the requirements of high-speed signal transmission. Furthermore, the fully shielded structure 20 also reduces the energy consumed by the radiation of the transmission line 10, further reducing its loss and simplifying the process of increasing its signal transmission rate. Therefore, by using the fully shielded structure 20 to fully shield the transmission line 10, it becomes suitable for applications requiring high-speed signal transmission.

[0079] Furthermore, compared to the existing technology that uses low-loss cable solutions to connect electronic components 200 on the circuit board 100 for direct high-speed signal connection, in this embodiment, the cable-like structure formed by the fully shielded structure 20 and the transmission line 10 does not occupy the surface space of the circuit board 100, thus providing sufficient heat dissipation channel space, improving the heat dissipation efficiency and reliability of the circuit board assembly. In addition, the cable-like structure inside the circuit board 100 has low manufacturing cost, reducing the cost of the circuit board assembly. Moreover, a larger number of cable-like structures can be used to achieve high-density integration and meet high-density transmission requirements.

[0080] For example, such as Figure 3 As shown, the cross-section of the fully shielded structure 20 can be rectangular, and the cross-section of the fully shielded structure 20 is perpendicular to the extension direction of the transmission line 10 (e.g., Figure 1 (in the X direction).

[0081] It should be noted that, Figure 1 The extension direction of transmission line 10 is used to illustrate that transmission line 10 electrically connects to different electronic components 200, and does not constitute a limitation on the extension direction of transmission line 10. In addition, transmission line 10, besides... Figure 1In addition to the straight line design shown, the transmission line 10 can also be other designs, such as a wavy design, an L-shaped design, etc.

[0082] In some possible implementations, such as Figure 4 As shown, transmission line 10 includes two signal lines 11 spaced apart, making transmission line 10 a differential pair. A differential pair is a pair of coupled lines used to transmit differential signals. Differential signals consist of two signals with the same amplitude but opposite phase. Differential signal transmission has advantages such as strong anti-interference capability and effective suppression of electromagnetic interference, which is helpful for transmitting high-speed signals.

[0083] It should be noted that, in addition to being a differential line, transmission line 10 can also have other structures. For example, transmission line 10 can also include a signal line 11.

[0084] Figure 5 This is a cross-sectional schematic diagram of the second type of transmission line provided in the embodiments of this application. Figure 6 This is a cross-sectional schematic diagram of the third type of transmission line provided in the embodiments of this application. Figure 7 This is a cross-sectional schematic diagram of the fourth type of transmission line provided in the embodiments of this application. Figure 8 This is a cross-sectional schematic diagram of the fifth type of transmission line provided in the embodiments of this application. Figure 9 This is a cross-sectional schematic diagram of the sixth type of transmission line provided in the embodiments of this application.

[0085] In some possible implementations, the cross-sectional shape of signal line 11 can be rectangular (e.g., ...). Figure 3 (as shown) or trapezoidal (such as) Figure 5 As shown, this can further reduce the loss of transmission line 10 and reduce the difficulty of increasing the signal transmission rate of transmission line 10.

[0086] Of course, the cross-sectional shape of signal line 11 can also be other shapes; for example, the cross-sectional shape of signal line 11 can also be elliptical (e.g., Figure 8 or Figure 9 As shown), circular (as shown) Figure 7 As shown), runway shape (such as) Figure 6 (as shown). When the cross-sectional shape of signal line 11 is elliptical, the length direction of the cross-section of signal line 11 can be parallel to the thickness direction of circuit board 100 (e.g., Figure 8 As shown), or, the length direction of the cross-section of signal line 11 can be perpendicular to the length direction of circuit board 100 (e.g., Figure 9 (As shown).

[0087] Figure 10 for Figure 1 A cross-sectional view along the AA direction.

[0088] In some possible implementations, the circuit board 100 includes multiple layer structures, which are stacked along the thickness direction of the circuit board 100, for example... Figure 10 As shown, the circuit board 100 is constructed along the thickness direction of the circuit board 100 (e.g., Figure 10 The structure comprises a second layer 120, a first layer 110, and a third layer 130 stacked in the Z-direction. Each layer includes a metal layer and a metal layer supporting the metal layer. At least one layer includes a transmission line 10 and a full shielding structure 20, for example... Figure 10 As shown, the first layer structure 110 includes a transmission line 10 and a fully shielded structure 20. The transmission line 10 is a conductive line prefabricated on a metal layer. In this way, the circuit board 100 is a multilayer circuit board, and the transmission line 10 can be placed in an independent layer structure, which can further improve signal integrity.

[0089] In some embodiments, multiple layers of the circuit board 100 can be bonded together to form the circuit board 100.

[0090] When multiple layer structures are stacked, the metal layers between two adjacent layer structures are isolated. The metal layers of different layers can be connected by vias. The specific connection method of the vias can be designed according to the actual function of the circuit board 100, and is not specifically limited in this embodiment.

[0091] The dielectric layer is made of an insulating material, for example, a thermosetting resin.

[0092] The metal layer is made of a metallic material, for example, a copper layer made of copper foil.

[0093] In some embodiments, the layer structure may include a metal layer, in which case one surface of the dielectric layer is provided with the metal layer and the other surface is not provided with the metal layer.

[0094] In some embodiments, the layer structure may also include two metal layers, in which case a metal layer is disposed on each of the two opposite surfaces of the dielectric layer.

[0095] In some embodiments, at least one layer structure further includes an adhesive layer, and two adjacent layer structures are connected by the adhesive layer. For example, the adhesive layer is a prepreg (PP).

[0096] like Figure 10 As shown, the number of layer structures with the fully shielded structure 20 is one; however, in some embodiments, the number of layer structures with the fully shielded structure 20 may exceed two.

[0097] It should be noted that when multiple layer structures have transmission lines 10, at least one layer structure may have a full shielding structure 20. For example, when the circuit board 100 is composed of five layer structures, one of the three layer structures with transmission lines 10 has a full shielding structure 20, while the other two layer structures do not have a full shielding structure 20.

[0098] In some embodiments, at least one layer structure includes a plurality of transmission lines 10 and a plurality of fully shielded structures 20, each fully shielded structure 20 having a shielding space 24, the shielding space 24 corresponding one-to-one with a transmission line 10, and the transmission line 10 being located inside the corresponding shielding space 24. Furthermore, at least two adjacent shielding spaces 24 may share the same shielding wall.

[0099] In some possible implementations, such as Figure 10 As shown, the multiple layer structures may include a first layer structure 110 and a second layer structure 120 stacked together. The first layer structure 110 includes a transmission line 10 and a full shielding structure 20. The second layer structure 120 is the surface layer of the circuit board 100. The second layer structure 120 has pads 40. The transmission line 10 is electrically connected to the pads 40 of the second layer structure 120 through metallized vias 50.

[0100] In this way, the metallized via 50 leads the transmission line 10 to the surface pad 40, and the transmission line 10 is electrically connected to the electronic component 200 through the metallized via 50 and the pad 40.

[0101] It is understood that at least a portion of the first metal layer 111 serves as the first shielding wall 21, and at least a portion of the second metal layer 112 serves as the second shielding wall 22.

[0102] In some embodiments, such as Figure 10 As shown, the circuit board 100 also includes a third layer structure 130. The first layer structure 110 is located between the second layer structure 120 and the third layer structure 130. The second layer structure 120 and the third layer structure 130 are both surface layers of the circuit board 100, and the first layer structure 110 is an inner layer of the circuit board 100.

[0103] In some embodiments, the circuit board 100 includes two surface layers and at least one inner layer, with the inner layer located between the two surface layers, and the inner layer and the surface layers are stacked along the thickness direction of the circuit board 100. For example Figure 10 As shown, the circuit board 100 includes a first layer structure 110, a second layer structure 120 and a third layer structure 130, where the second layer structure 120 and the third layer structure 130 are both surfaces and the first layer structure 100 is an inner layer.

[0104] When the number of inner layers is greater than or equal to two, at least one inner layer may include a transmission line 10 and a full shielding structure 20, that is, the number of first layer structures 110 may be at least one.

[0105] In some possible implementations, such as Figure 2 , Figure 3 As shown, the first layer structure 110 includes a through-slot 30, a first metal layer 111, a first dielectric layer 113, and a second metal layer 112. The first metal layer 111 includes a first shielding wall 21, and the second metal layer 112 includes a second shielding wall 22, along the thickness direction of the circuit board 100 (e.g., ...). Figure 3 In the Z-direction, a first metal layer 111, a first dielectric layer 113, and a second metal layer 112 are stacked, and a through-slot 30 penetrates the first metal layer 111, the first dielectric layer 113, and the second metal layer 112. A transmission line 10 is embedded inside the first dielectric layer 113, along a direction perpendicular to the thickness direction of the circuit board 100 (e.g., in the Z-direction). Figure 2 In the Y direction, a through groove 30 is provided on both sides of the transmission line 10. A third shielding wall 23 is provided on the groove wall of the through groove 30 near the transmission line 10. The two ends of the third shielding wall 23 are connected to the first shielding wall 21 and the second shielding wall 22 respectively. The first shielding wall 21, the second shielding wall 22 and the two third shielding walls 23 enclose a shielding space 24.

[0106] In this way, during the fabrication of the circuit board 100, a third shielding wall 23 can be formed on the sidewall of the through slot 30 through a slot metallization process (e.g., electroplating), which reduces the difficulty of forming the fully shielded structure 20 and improves the fabrication efficiency of the circuit board 100. In addition, the production efficiency of the transmission line 10 can also be improved by embedding the transmission line 10 inside the first dielectric layer 113 through existing processes (e.g., MSAP (modified semi-additive process)).

[0107] In some possible implementations, such as Figure 2 As shown, the circuit board 100 also includes a third metal layer 114 attached to the wall of the through slot 30. The orthographic projection of the third metal layer 114 in a plane perpendicular to the thickness direction of the circuit board 100 is annular. The third metal layer 114 includes a third shielding wall 23. That is, the portion of the third metal layer 114 attached to the wall of the through slot 30 near the transmission line 10 serves as the third shielding wall 23.

[0108] In this way, by forming a third metal layer 114 on the wall of the through slot 30 through the plated through hole (PTH) process, the manufacturing difficulty of the fully shielded structure 20 can be reduced and the production efficiency of the circuit board 100 can be improved.

[0109] It should be noted that, in addition to the first shielding wall 21 and the second shielding wall 22 being electrically connected through the third shielding wall 23, in some embodiments, the first layer structure 110 may also include a metal body, which is filled inside the through groove 30 and electrically connected to the first shielding wall 21 and the second shielding wall 22. In this case, the metal body serves as the third shielding wall 23.

[0110] In some embodiments, when the first layer structure 110 has multiple transmission lines 10 and multiple fully shielded structures 20, the transmission lines 10 correspond one-to-one with the fully shielded structures 20, and the transmission lines 10 are disposed inside the shielding space 24 of the corresponding fully shielded structure 20. At least two adjacent fully shielded structures 20 share the same third shielding wall 23. In this way, the density of transmission lines 10 can be further increased, realizing a high-density design.

[0111] Of course, when the first layer structure 100 has multiple fully shielded structures 20, any two fully shielded structures 20 can be set at intervals.

[0112] Figure 11 This is a top view of another first-layer structure provided in an embodiment of this application.

[0113] In some possible implementations, at least one of the first metal layer 111 and the second metal layer 112 has a window 70 communicating with the shielding space 24. The window 70 is for a metallized via 50 to pass through, thereby enabling the metallized via 50 to be electrically connected to the transmission line 10. For example, as... Figure 11 As shown, the second metal layer 112 is provided with a window 70.

[0114] Window 70 can be a circular through hole or a rectangular through hole (e.g.) Figure 11 (As shown) Through holes, or windows 70 can also be windows 70 disposed on the first shielding wall 21 or the second shielding wall 22.

[0115] Figure 12 This is a schematic diagram of the first process of a circuit board fabrication method provided in an embodiment of this application. Figure 13 This is a schematic diagram of the second process of a circuit board fabrication method provided in an embodiment of this application. Figure 14 This is a schematic diagram of the third process of a circuit board fabrication method provided in an embodiment of this application. Figure 15 This is a schematic diagram of the fourth process of a circuit board fabrication method provided in an embodiment of this application.

[0116] This application embodiment also provides a method for manufacturing a circuit board 100, the method comprising the following steps:

[0117] S1. Prepare the substrate.

[0118] like Figure 15 As shown, the substrate includes a first metal layer 111, a second metal layer 112, a first dielectric layer 113, and a transmission line 10. The first metal layer 111, the first dielectric layer 113, and the second metal layer 112 are along the thickness direction of the substrate (e.g., along the thickness direction of the substrate). Figure 15 The layers are stacked in the Z direction, with the first metal layer 111 including a first shielding wall 21, the second metal layer 112 including a second shielding wall 22, and the transmission line 10 embedded inside the first dielectric layer 113.

[0119] In some possible implementations, the method for fabricating the substrate may include the following steps:

[0120] S11, Prepare the first sub-plate, such as Figure 13 As shown, the first sub-board includes a first metal layer 111, a first sub-dielectric layer 61, and a transmission line 10. The transmission line 10 and the first metal layer 111 are respectively disposed on opposite sides of the first sub-dielectric layer 61.

[0121] In some embodiments, the method for manufacturing the first daughter board may include the following steps:

[0122] S111, providing a first metal layer 111, a first sub-dielectric layer 61, and a circuit metal layer 62 (e.g., provided in a stacked configuration) Figure 12 (As shown).

[0123] For example, a rigid copper clad laminate (CCL) is used for subsequent processing. Copper layers are respectively provided on opposite sides of the rigid copper clad laminate. One of the two copper layers serves as the first metal layer 111 and the other serves as the circuit metal layer 62.

[0124] S112. A transmission line 10 is formed on the circuit metal layer 62 by an etching process to form the first sub-board.

[0125] Specifically, in combination Figure 12 and Figure 13 It is known that the transmission line 10 is obtained by etching the copper layer 62, which serves as the circuit metal layer, in the rigid copper-clad laminate. For example, two parallel and spaced signal lines 11 are etched in the circuit metal layer 62, so that the transmission line 10 is a differential pair.

[0126] S12, pressing the first sub-plate and the second sub-plate together to form a substrate. Wherein, as... Figure 14 As shown, the second sub-board includes a second sub-dielectric layer 63 and a second metal layer 112 stacked together. The first sub-dielectric layer 61 and the second sub-dielectric layer 63 are connected to form the first dielectric layer 113. The transmission line 10 contacts the first sub-dielectric layer 61 and the second sub-dielectric layer 63 on opposite sides along the thickness direction of the substrate.

[0127] Specifically, during the pressing of the first sub-board and the second sub-board, the first sub-dielectric layer 61 faces the second sub-dielectric layer 63, the first sub-dielectric layer 61 and the second sub-dielectric layer 63 are located between the first metal layer 111 and the second metal layer 112, and the transmission line 10 is located between the first sub-dielectric layer 61 and the second sub-dielectric layer 63.

[0128] In some embodiments, the second sub-dielectric layer 63 can be a prepreg, and the second sub-dielectric layer 63 can be connected to the first sub-dielectric layer 61, which can reduce the difficulty of connecting the first sub-dielectric layer 61 and the second sub-dielectric layer 63.

[0129] In other embodiments, the second sub-dielectric layer 63 may also include an adhesive layer and a dielectric plate, with the adhesive layer and the second metal layer 112 respectively disposed on opposite sides of the dielectric plate.

[0130] Figure 16 This is a schematic diagram of the fifth process of a circuit board fabrication method provided in an embodiment of this application. Figure 17 for Figure 16 A cross-sectional view along the CC direction.

[0131] S2. Through slots 30 are formed on opposite sides of the transmission line 10, such as... Figure 17 As shown, the through slot 30 extends along the extension direction of the transmission line 10 and along the thickness direction of the substrate (e.g., Figure 17 (Z-direction) penetrating the substrate.

[0132] Specifically, through-grooves 30 penetrating the substrate can be formed on both sides of the transmission line 10 by means of etching, machining, etc., to obtain... Figure 16 The structure shown.

[0133] Figure 18 This is a schematic diagram of the sixth process of a circuit board fabrication method provided in an embodiment of this application. Figure 19 for Figure 18 A cross-sectional view along the DD direction.

[0134] S3. A third shielding wall 23 is formed on the side of the through groove 30 near the transmission line 10 by electroplating. The two ends of the third shielding wall 23 are electrically connected to the first shielding wall 21 and the second shielding wall 22 respectively. The first shielding wall 21, the second shielding wall 22 and the two third shielding walls 23 constitute a full shielding structure 20 and enclose a shielding space 24. The transmission line 10 is located inside the shielding space 24 and is spaced apart from the inner wall of the shielding space 24.

[0135] Specifically, a substrate with a through-groove 30 is placed in an electroplating apparatus, and then, through an electroplating process, a third shielding wall 23 is grown on the side of the through-groove 30 near the transmission line 10, thereby obtaining a fully shielded structure 20, as shown below. Figure 19As shown.

[0136] In some embodiments, such as Figure 18 As shown, a third metal layer 114 can be formed on the wall of the through groove 30 by electroplating. Part of the third metal layer 114 is the third shielding wall 23. The orthographic projection of the third metal layer 114 in the plane perpendicular to the thickness direction of the substrate is annular.

[0137] In this way, by forming a third metal layer 114 on the wall of the through-hole 30 through the plated through-hole (PTH) process, the difficulty of forming the third shielding wall 23 can be reduced and the production efficiency can be improved.

[0138] Figure 20 This is a schematic diagram of the seventh process of a circuit board fabrication method provided in an embodiment of this application. Figure 21 This is a schematic diagram of the eighth process of a circuit board fabrication method provided in an embodiment of this application. Figure 22 This is a schematic diagram of the ninth process of a circuit board fabrication method provided in an embodiment of this application. Figure 23 This is a schematic diagram of the tenth process of a circuit board fabrication method provided in an embodiment of this application.

[0139] In some possible implementations, after forming the fully shielded structure 20, the fabrication method further includes:

[0140] S4. Pattern etching is performed on the first metal layer 111 and / or the second metal layer 112 through an etching process to form the first layer structure 110.

[0141] Specifically, by pattern etching the first metal layer 111 and the second metal layer 112, the structure of the first metal layer 111 and the second metal layer 112 is made to conform to the designed structure. During pattern etching, windows 70 can be formed in the first metal layer 111 and / or the second metal layer 112, for example... Figure 20 As shown, a window 70 is formed on the second metal layer 112.

[0142] It should be noted that when the circuit board 100 is a multilayer circuit board, in addition to the first layer structure 110, the circuit board 100 also includes other layer structures, such as... Figure 21 As shown, the circuit board 100 may also include a second layer structure 120 and a third layer structure 130, which are located on opposite sides of the first layer structure 110 and serve as the surface layer of the circuit board 100.

[0143] The second layer 120 and the third layer 130 can be connected to the first layer 110 by pressing, resulting in the following: Figure 21The structure shown. It can be understood that during the pressing process, the adhesive portion that bonds the first layer structure 110 and the second layer structure 120 will be embedded within the window 70.

[0144] After the multiple layers of the circuit board 100 are laminated, the transmission lines 10 need to be led out to the surface pads 40, for example, by combining... Figure 22 and Figure 23 It can be seen that the transmission line 10 is electrically connected to the pad 40 of the second layer structure 120 through the metallized via 50. The metallized via 50 can be formed by drilling and electroplating processes.

[0145] In the description of the embodiments of this application, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, an indirect connection through an intermediate medium, or the internal connection of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of this application according to the specific circumstances. The terms "first," "second," "third," "fourth," etc. (if present) are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0146] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of this application, and are not intended to limit them. Although the embodiments of this application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A circuit board (100), characterized in that, include: Transmission line (10); The fully shielded structure (20) includes four shielding walls connected end to end. The shielding walls extend along the extension direction of the transmission line (10). The four shielding walls surround the transmission line (10) and enclose a shielding space (24). The transmission line (10) is located inside the shielding space (24) and is spaced apart from the inner wall of the shielding space (24).

2. The circuit board (100) according to claim 1, characterized in that, The circuit board (100) includes a through slot (30), a first metal layer (111), a first dielectric layer (113), and a second metal layer (112); The first metal layer (111) includes a first shielding wall (21), and the second metal layer (112) includes a second shielding wall (22). Along the thickness direction of the circuit board (100), the first metal layer (111), the first dielectric layer (113), and the second metal layer (112) are stacked. The through slot (30) penetrates the first metal layer (111), the first dielectric layer (113), and the second metal layer (112). The transmission line (10) is embedded inside the first dielectric layer (113). Along the direction perpendicular to the thickness direction of the circuit board (100), the transmission line (10) has a through groove (30) on both sides. The through groove (30) has a third shielding wall (23) on the side of the through groove (30) close to the transmission line (10). The two ends of the third shielding wall (23) are connected to the first shielding wall (21) and the second shielding wall (22) respectively. The first shielding wall (21), the second shielding wall (22) and the two third shielding walls (23) enclose the shielding space (24).

3. The circuit board (100) according to claim 2, characterized in that, The circuit board (100) further includes a third metal layer (114) attached to the wall of the through slot (30), the third metal layer (114) having an orthographic projection in a plane perpendicular to the thickness direction of the circuit board (100) as an annular shape, and the third metal layer (114) including the third shielding wall (23).

4. The circuit board (100) according to any one of claims 1-3, characterized in that, The circuit board (100) includes a first layer structure (110) and a second layer structure (120) stacked together. The first layer structure (110) includes the transmission line (10) and the full shielding structure (20). The second layer structure (120) is the surface layer of the circuit board (100). The second layer structure (120) has pads (40). The transmission line (10) is electrically connected to the pads (40) of the second layer structure (120) through metallized vias (50).

5. The circuit board (100) according to any one of claims 1-4, characterized in that, The transmission line (10) includes two signal lines (11) spaced apart.

6. The circuit board (100) according to claim 5, characterized in that, The cross-sectional shape of the signal line (11) is rectangular or trapezoidal.

7. A circuit board assembly, characterized in that, Includes electronic components (200) and a circuit board (100) as described in any one of claims 1-6; The electronic components (200) are disposed on the circuit board (100) and electrically connected to the transmission line (10) of the circuit board (100).

8. An electronic device, characterized in that, Includes the housing and the circuit board assembly as described in claim 7; The circuit board assembly is disposed inside the housing.

9. A method for manufacturing a circuit board (100), characterized in that, include: A substrate is fabricated, the substrate comprising a first metal layer (111), a second metal layer (112), a first dielectric layer (113), and a transmission line (10). The first metal layer (111), the first dielectric layer (113), and the second metal layer (112) are stacked along the thickness direction of the substrate. The first metal layer (111) includes a first shielding wall (21), the second metal layer (112) includes a second shielding wall (22), and the transmission line (10) is embedded inside the first dielectric layer (113). Through slots (30) are formed on opposite sides of the transmission line (10). The through slots (30) extend along the extension direction of the transmission line (10) and penetrate the substrate along the thickness direction of the substrate. A third shielding wall (23) is formed on the side of the through groove (30) near the transmission line (10) by electroplating. The two ends of the third shielding wall (23) are electrically connected to the first shielding wall (21) and the second shielding wall (22) respectively. The first shielding wall (21), the second shielding wall (22) and the two third shielding walls (23) constitute a full shielding structure (20) and enclose a shielding space (24). The transmission line (10) is located inside the shielding space (24) and is spaced apart from the inner wall of the shielding space (24).

10. The preparation method according to claim 9, characterized in that, The preparation of the substrate includes: A first sub-board is prepared, the first sub-board including the first metal layer (111), the first sub-dielectric layer (61) and the transmission line (10), the transmission line (10) and the first metal layer (111) are respectively disposed on opposite sides of the first sub-dielectric layer (61); The first sub-board and the second sub-board are pressed together to form the substrate; wherein the second sub-board includes a second sub-dielectric layer (63) and a second metal layer (112) stacked together, the first sub-dielectric layer (61) and the second sub-dielectric layer (63) are connected to form the first dielectric layer (113), and the transmission line (10) contacts the first sub-dielectric layer (61) and the second sub-dielectric layer (63) at opposite ends along the thickness direction of the substrate.

11. The preparation method according to claim 10, characterized in that, The manufacturing method of the first sub-board includes: A first metal layer (111), a first sub-dielectric layer 61, and a line metal layer (62) are provided in a stacked configuration; The transmission line (10) is formed on the line metal layer (62) by an etching process to form the first sub-board.

12. The preparation method according to any one of claims 9-11, characterized in that, The formation of a third shielding wall (23) on the side of the through-slot (30) near the transmission line (10) by electroplating includes: A third metal layer (114) is formed on the wall of the through groove (30) by electroplating. Part of the third metal layer (114) is the third shielding wall (23). The orthographic projection of the third metal layer (114) in a plane perpendicular to the thickness direction of the substrate is annular.

13. The preparation method according to any one of claims 9-12, characterized in that, The transmission line (10) is a differential pair.

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