Electronic device

CN122995010APending Publication Date: 2026-10-27ADVANCED SEMICON ENG INC
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Patent Information

Application Number
CN202610535795.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-04-24
Filing Date
2026-04-22
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

然而,为了提供不同类型之电力控制且适应高速数据通信之需求,可能需要笨重的无源组件

✦ Generated by Eureka AI based on patent content.

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Abstract

An electronic device is provided. The electronic device includes a first carrier, a first transducer, a first capacitor, and a second carrier. The first transducer is supported by the first carrier. The first capacitor is supported by the first carrier and is configured to transceive a first voltage between the first carrier and the first transducer. The second carrier is stacked on the first carrier and is configured to receive a second voltage from the first transducer that is different from the first voltage.
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Description

Technical Field

[0001] This disclosure relates to an electronic device. Background Technology

[0002] Power management integrated circuits (PMICs) utilize system-in-package (SiP) technology, including double-sided molding and 2.5D / 3D ICs, to integrate multiple chips or components into a single package. However, to provide different types of power control and meet the demands of high-speed data communication, bulky passive components may be required. Therefore, package size can increase, and thus layout design flexibility can decrease. Summary of the Invention

[0003] In some configurations, an electronic device includes a first carrier, a first converter, a first capacitor, and a second carrier. The first converter is supported by the first carrier. The first capacitor is supported by the first carrier and configured to transmit and receive a first voltage between the first carrier and the first converter. The second carrier is stacked on the first carrier and configured to receive a second voltage different from the first voltage from the first converter.

[0004] In some configurations, an electronic device includes a power unit, a first capacitor, and a second capacitor. The first capacitor is configured to transmit a first voltage to the power unit. The second capacitor is adjacent to the first capacitor and configured to transmit a second voltage, different from the first voltage, to a computing unit. The first capacitor is closer to the power unit than to the computing unit, and the second capacitor is closer to the computing unit than to the power unit.

[0005] In some configurations, an electronic device includes a first carrier, a converter, and an input capacitor. The converter is disposed on the first carrier. The input capacitor is disposed below the first carrier and electrically connected to the converter. The input capacitor is configured to provide an electrical path that conducts power to the converter without crossing a second carrier. Attached Figure Description

[0006] Various aspects of some embodiments of this disclosure will become readily apparent from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that the various structures may not be drawn to scale, and the dimensions of the various structures may be arbitrarily increased or decreased for clarity of discussion.

[0007] Figure 1 A cross-sectional view of an electronic device configured according to some of the present disclosure is shown.

[0008] Figure 2 Illustrations of some configurations according to this disclosure Figure 1An enlarged view of the electronic device shown.

[0009] Figure 3 A cross-sectional view of an electronic device configured according to some of the present disclosure is shown.

[0010] Figure 4 A cross-sectional view of an electronic device configured according to some of the present disclosure is shown.

[0011] Figure 5 A cross-sectional view of an electronic device configured according to some of the present disclosure is shown.

[0012] Figure 6 A cross-sectional view of an electronic device configured according to some of the present disclosure is shown. Detailed Implementation

[0013] Common reference numerals are used throughout the drawings and detailed description to indicate the same or similar components. The arrangement of this disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

[0014] The following disclosure provides numerous different arrangements or examples of implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of this disclosure. Of course, these components and arrangements are merely examples and are not intended to be limiting. For example, in the following description, an arrangement may be formed on or above a second feature, including direct contact between the first and second features, and may also include arrangements where additional features may be formed or arranged between the first and second features such that the first and second features do not directly contact each other. Furthermore, reference numerals and / or letters may be repeated in various instances of this disclosure. This repetition is for simplicity and clarity and does not in itself indicate a relationship between the various arrangements and / or configurations discussed.

[0015] Figure 1 and Figure 2 The illustration depicts an electronic device 1a in some configurations according to the present disclosure. In some configurations, the electronic device 1a may include carriers 11, 12 and 13, electronic components 20, 32, 34 and 36, a circuit structure 40, and a heat dissipating structure 50.

[0016] like Figure 1 and Figure 2As shown, each of carriers 11, 12, and 13 can be formed as a printed circuit board (PCB), a flexible printed circuit board (FPCB), a lead frame, a combination thereof, or other suitable circuit structure. Carriers 11, 12, and 13 can be at different levels (or heights or elevations) along the Z-direction. Each of carriers 11, 12, and 13 may include multiple metal layers separated from each other by dielectric material layers and interconnected by conductive vias. In some embodiments, each of carriers 11, 12, and 13 may be formed of epoxy resin, glass fiber reinforced epoxy resin, epoxy resin with inorganic fillers, ceramic materials, or polymeric materials such as polyimide. Carrier 11 may have a surface 11s1 (or a lower surface) and a surface 11s2 (or an upper surface) opposite to surface 11s1. Carrier 12 may have a surface 12s1 (or a lower surface) and a surface 12s2 opposite to surface 12s1. (Or upper surface). Carrier 11 may be disposed above surface 12s2 of carrier 12. Carrier 12 may be disposed below carrier 11. In some configurations, the dimensions of carrier 11 (e.g., surface area along the XY plane) may be smaller than the dimensions of carrier 12. In some configurations, a portion of surface 12s2 of carrier 12 may be exposed by carrier 11. Carrier 13 may have surface 13s1 (or lower surface) and surface 13s2 (or upper surface) opposite surface 13s1. Surface 13s2 of carrier 13 may face carrier 12. In some configurations, carrier 12 may also be referred to as carrier A, and carrier 13 may also be referred to as carrier B.

[0017] Electronic component 20 may be disposed on or above surface 11s2 of carrier 11. In some configurations, electronic component 20 may act as or be a first-stage power module (or first power conversion stage, converter, electrical converter, or power unit). In some configurations, electronic component 20 may be configured to convert a higher voltage (e.g., 48 V) to a lower voltage (e.g., 12 V). For example, electronic component 20 may be configured to receive a higher voltage from circuit structure 40 and transmit a lower voltage to electronic component 32 (or electronic component 34). In some configurations, electronic component 20 may include at least one power module (or converter) comprising one or more transistors, one or more diodes, one or more capacitors, one or more inductors, and / or other suitable components. For example, electronic component 20 may include a circuit structure formed as a PCB, FPCB, or other suitable circuit structure. Active components (e.g., converters, controllers and / or drivers) and passive components (e.g., capacitors and / or inductors) may be placed on the circuit structure.

[0018] Electronic components 32 and 34 may be mounted on or above surface 12s2 of carrier 12. Each of electronic components 32 and 34 may function as a second-stage power module (or second-stage power module, or converter, or electrical converter, or power unit). In some configurations, each of electronic components 32 and 34 may be configured to convert a higher voltage (e.g., 12 V) to a lower voltage (e.g., 8 V, 6 V, 4 V, 2 V, or less). In some configurations, electronic components 32 and 34 may have different thicknesses along the Z-direction. Electronic components 32 and 34 may be electrically connected to carrier 11. Electronic components 32 and 34 may be electrically connected to carrier 12. Electronic components 32 and 34 may individually include a circuit structure (e.g., PCB) and multiple components located on the circuit structure. For example, electronic components 32 and 34 may include one or more transistors, one or more controllers, and one or more passive components. Electronic components 32 and 34 may include multiple components on a circuit structure (e.g., a PCB). In some configurations, each of electronic components 32 and 34 may also be referred to as a voltage regulator or a power block.

[0019] In some configurations, electronic component 32 may be partially disposed within an opening 11o defined by carrier 11. In some configurations, a portion of electronic component 32 may protrude from surface 11s2 of carrier 11. In some configurations, the thickness of electronic component 32 (e.g., its length along the Z direction) may be greater than the thickness of electronic component 20. Electronic component 34 may be disposed within the space defined by carriers 11 and 12. In some configurations, the thickness of electronic component 34 (e.g., its length along the Z direction) may be less than the thickness of electronic component 20. In some configurations, the thickness of electronic component 32 may be greater than or equal to 7 mm, such as 7 mm, 8 mm, 9 mm, 10 mm, or greater. In some configurations, the thickness of electronic component 20 may be in the range between 3 mm and 7 mm, such as 3 mm, 4 mm, 5 mm, 6 mm, or 7 mm. The thickness of electronic component 34 may be in the range between about 1 mm and 5 mm, such as 1 mm, 2 mm, 3 mm, 4 mm, or 5 mm.

[0020] In some configurations, electronic component 36 may be mounted on or above the surface 12s2 of carrier 12. In some configurations, electronic component 36 may act as a controller configured to turn electronic component 32 (or electronic component 34) on or off. In some configurations, electronic component 36 may be configured to control or regulate the output of electronic component 32 (or electronic component 34). In some configurations, the size (e.g., volume or thickness) of electronic component 36 may be smaller than the sizes of electronic components 32 and 34. It should be noted that electronic device 1a may include additional components between carriers 11 and 12. In some configurations, the surface 12s2 of carrier 12 may be designed to accommodate converters or controllers optimized for high-speed computing. Therefore, additional components, such as passive devices, are positioned below carrier 12 to meet the demands of high-speed processing.

[0021] In some configurations, the circuit structure 40 (or power delivery board) may be mounted on or above the surface 11s2 of the carrier 11. In some configurations, the circuit structure 40 may be configured to provide relatively large power (e.g., 48 V) to the electronic component 20. In some configurations, the circuit structure 40 may be configured to transmit signals (e.g., non-power signals or data signals) to the carrier 12. In some configurations, the circuit structure 40 may include a PCB, FPCB, or other suitable circuit structure. One or more electronic components (not shown) may be mounted on or above the circuit structure 40. For example, the electronic device 1a may include a power management integrated circuit (PMIC) die mounted on or within the circuit structure 40. In this disclosure, the circuit structure 40 may also be referred to as an external device.

[0022] In some configurations, the heat dissipation structure 50 may be disposed between the electronic component 20 and the circuit structure 40. In some configurations, the heat dissipation structure 50 may be thermally coupled to the electronic component 20. For example, the heat dissipation structure 50 may be configured to transfer heat from the electronic component 20. In some configurations, the heat dissipation structure 50 may be thermally coupled to the circuit structure 40. For example, the heat dissipation structure 50 may be configured to transfer heat from the circuit structure 40. In some configurations, the heat dissipation structure 50 may be in contact with the electronic component 20. In some configurations, the heat dissipation structure 50 may be spaced from the electronic component 20 by a thermal interface material (TIM) or adhesive. The heat dissipation structure 50 may include a cooling plate, which may include a vapor chamber, heat pipes, and / or other suitable components. The heat dissipation structure 50 may include a thermally conductive material, such as aluminum (Al), copper (Cu), chromium (Cr), tin (Sn), gold (Au), silver (Ag), nickel (Ni), or stainless steel, or mixtures, alloys, or other combinations thereof.

[0023] In some configurations, electronic device 1a may include connector 52 and conductive component 54. Connector 52 may be disposed on or above surface 12s2 of carrier 12. In some configurations, connector 52 may be configured to connect to, hold, or receive conductive component 54. For example, connector 52 may define a recess for receiving a portion of conductive component 54. For example, connector 52 may be a female connector and conductive component 54 may be a male connector.

[0024] A conductive component 54 may be connected between the carrier 12 and the circuit structure 40. The conductive component 54 may be disposed on or above the surface 12s2 of the carrier 12. In some configurations, the conductive component 54 may be configured to transmit signals between the carrier 12 and the circuit structure 40. In some configurations, the conductive component 54 may penetrate or pass through the heat dissipation structure 50. In some configurations, the conductive component 54 may include a single-pin spring connector, a conductive post, or other suitable conductive component. The conductive component 54 may be configured to provide an electrical path (or signal path) that conducts the signal S1 from the circuit structure 40 to the carrier 12.

[0025] Electronic device 1a may include connector 56 and conductive component 58. In some configurations, connector 56 may be disposed on or above surface 11s2 of carrier 11. In some configurations, connector 56 may be configured to connect, hold, or receive conductive component 58. For example, connector 56 may define a recess for receiving a portion of conductive component 58. In some configurations, conductive component 58 may be connected between carrier 11 and circuit structure 40. Conductive component 58 may be disposed on or above surface 11s2 of carrier 11. In some configurations, conductive component 58 may be configured to transmit power (or power signals) between electronic component 20 and circuit structure 40. For example, conductive component 58 may be configured to transmit a relatively large power (e.g., 48 V) from circuit structure 40 to electronic component 20. In some configurations, conductive component 58 may penetrate heat dissipation structure 50. In some configurations, conductive component 58 may include a single-pin spring connector, conductive post, or other suitable conductive component. The circuit structure 40 can be configured to provide an electrical path (or power path) that conducts power P1 (e.g., 48 V) to the electronic component 20 via the conductive component 58 and the carrier 11. In some configurations, the layer (or height) of connector 52 relative to the surface 12s2 of carrier 12 may be smaller than that of connector 56 relative to the surface 12s2 of carrier 12.

[0026] In some configurations, electronic device 1a may include electrical connector 70. In some configurations, electrical connector 70 may be disposed on or above surface 12s2 of carrier 12. Electrical connector 70 may be disposed in the peripheral area of ​​carrier 12. For example, electrical connector 70 may surround electronic components 32 and 34. Electrical connector 70 may be disposed between carriers 11 and 12. In some configurations, electrical connector 70 may be configured to support carrier 11. In some configurations, electrical connector 70 may electrically connect carriers 11 and 12. In some configurations, electrical connector 70 may be configured to transmit power and / or signals. In some configurations, electrical connector 70 may include a single-pin spring connector, conductive post, or other suitable conductive component. In other configurations, electrical connector 70 may be replaced by one or more interposers, which may include a substrate (e.g., a silicon substrate or other substrate) and conductive components in the substrate (e.g., through silicon vias, TSVs)). In other configurations, the electrical connector 70 may be replaced by other conductive components, such as solder material.

[0027] Electronic device 1a may include an electrical connector 75. The electrical connector 75 may be disposed between carriers 12 and 13. The electrical connector 75 may be or include electrical contacts, such as solder balls (e.g., controlled collapse chip connection (C4) bumps, ball grid arrays (BGAs), land grid arrays (LGAs)), conductive bumps, or the like. The electrical connector 75 may include an alloy of gold and solder or an alloy of silver and solder, or other suitable materials.

[0028] In some configurations, electronic device 1a may include a passive device 72. The passive device 72 may be disposed below or mounted on the surface 12s1 of carrier 12. In this disclosure, A mounted on B may mean that A and B are connected in the Z direction or connected via other components (e.g., conductive or adhesive materials). In this disclosure, A is not mounted on B if A is not directly connected to B and there are no components (e.g., conductive or adhesive materials) connecting the two in a direction such as the Z direction. In some configurations, the passive device 72 may be supported by or in direct contact with the surface 12s1 of carrier 12. In some configurations, the passive device 72 may be disposed between carriers 12 and 13. In some configurations, the passive device 72 may be spaced apart from carrier 13. The passive device 72 may include an input capacitor (Cin) through which power flows before being delivered to electronic component 32 (or electronic component 34). In some configurations, at least a portion of the passive device 72 may be vertically overlapped with the electronic component 32, which can shorten the transmission path.

[0029] In some configurations, electronic device 1a may include a passive device 74. The passive device 74 may be disposed below or mounted on the surface 13s2 of carrier 13. In some configurations, the passive device 74 may be supported by or in direct contact with the surface 13s2 of carrier 13. In some configurations, the passive device 74 may be disposed between carriers 12 and 13. In some configurations, the passive device 74 may be spaced apart from carrier 12. In some configurations, the passive device 74 may include an output capacitor (Cout) through which power flows after transmission from electronic component 32 (or electronic component 34).

[0030] In some configurations, passive device 74 may laterally overlap with passive device 72 or along the XY plane. In some configurations, passive device 72 may be closer to electronic component 32 (or electronic component 34) than passive device 74 in the Z direction. In some configurations, the layer (or height) of passive device 72 relative to the surface 12s1 of carrier 12 may be smaller than the layer (or height) of passive device 74. In some configurations, the capacitance (or capacitance value) of passive device 72 may be larger than the capacitance (or capacitance value) of passive device 74, which may be attributed to the need for passive device 72 to conduct or receive relatively high current. In some configurations, the dimensions (e.g., volume or thickness) of passive device 72 may be larger than the dimensions (e.g., volume or thickness) of passive device 74.

[0031] Please refer to Figure 2 The carrier 12 may include conductive components 12v1 and 12v2. Each of the conductive components 12v1 and 12v2 may be configured to transmit power (or power signals) from electronic component 36 (or electronic component 20) to electronic component 32. Each of the conductive components 12v1 and 12v2 may include a through-hole extending between surface 12s1 and surface 12s2 of the carrier 12. The conductive components 12v1 and 12v2 may be part of a redistribution structure including a plurality of traces and through-holes embedded in a dielectric material (e.g., polyimide). A passive device 72 may be electrically connected to the conductive components 12v1 and 12v2. The passive device 72 may be electrically connected between electronic components 32 and 36. In some configurations, at least a portion of the conductive components 12v1 and 12v2 may be vertically overlapped with electronic component 32.

[0032] like Figure 2 As shown, conductive components 12V1 and 12V2 can be configured to provide an electrical path that freely transmits power P2 (e.g., 12V). Figure 1 Electronic component 20, as shown, conducts power to electronic component 32. Electronic component 36 can be configured to provide an electrical path for conducting power P2 to electronic component 32. Passive device 72 can be configured to provide an electrical path for conducting power P2 to electronic component 32. In some configurations, passive device 74 can be configured to receive power P3 (e.g., 8 V, 6 V, 4 V, 2 V, or less) from electronic component 32 via carrier 12, electrical connector 75, and carrier 13.

[0033] Please return to view. Figure 1The electronic device 1a may include a carrier 14 (or substrate). In some configurations, the carrier 14 may be disposed on or below surface 13s1 of the carrier 13. In some configurations, the carrier 14 may include a semiconductor substrate, such as silicon, germanium, and other group III-V and group IV materials. The carrier 14 may include metal lines and through-holes, including but not limited to through-silicon vias (TSVs) for interconnection. In some configurations, the carrier 14 may include a wafer, a panel, or other suitable form. The carrier 14 may have a surface 14s1 (or a lower surface) and a surface 14s2 (or an upper surface) opposite to surface 14s1.

[0034] Carrier 14 can be electrically connected to carrier 13 via electrical connector 76. Carrier 14 can be configured to support operating module 80. In some configurations, electrical connector 76 may include resolderable material. Electrical connector 76 may be or include electrical contacts such as solder balls (e.g., crash control chip connection (C4) bumps, ball grid array (BGA), ground grid array (LGA)), conductive bumps, or the like. Electrical connector 76 may include an alloy of gold and solder or an alloy of silver and solder, or other suitable materials.

[0035] In some configurations, the operation module 80 (or computing unit) may be disposed on or below the surface 14s1 of the carrier 14. In some configurations, the operation module 80 may be configured to generate non-electrical signals, such as analog signals, digital signals, frequency signals, or other electrical signals. The operation module 80 may include electronic components 81 and 82. In some configurations, electronic components 81 and 82 may be disposed on or below the surface 14s1 of the carrier 14. In some configurations, electronic component 81 may include a processor or other suitable component. In some configurations, electronic component 81 may include an active device, such as a central processing unit (CPU), microprocessor unit (MPU), graphics processing unit (GPU), microcontroller unit (MCU), radio frequency integrated circuit (RFIC), application-specific IC (ASIC), field-programmable gate array (FPGA), or another type of IC. In some configurations, electronic component 82 may include a data storage unit or other suitable components. Electronic component 82 may be electrically connected to electronic component 81 via carrier 14. Electronic component 82 may be disposed on or below surface 14s1 of carrier 14. In some configurations, electronic component 82 may be configured to store signals from electronic component 81 and / or other devices. In some configurations, electronic component 82 may include high-bandwidth memory (HBM) chips, dynamic random access memory (DRAM) chips, static random access memory (SRAM) chips, or other suitable memory devices. In some configurations, operating module 80 may further include other components, such as input / output dies configured to receive regulated power from electronic component 32 (or electronic component 34) and / or transmit processed signals to other devices (not shown). Electronic components 81 and 82 may be electrically connected to carrier 14 via electrical connector 77. In some configurations, electrical connector 77 may include resolderable material. Electrical connector 77 may be or include electrical contacts, such as solder balls (e.g., control crash chip connection (C4) bumps, ball grid array (BGA), ground grid array (LGA)), conductive bumps or the like.Electrical connector 77 may comprise an alloy of gold and solder or an alloy of silver and solder, or other suitable materials. In other configurations, electronic components 81 and 82 may be electrically connected to carrier 14 via a hybrid bonding technique involving bonding between metallic materials (e.g., copper to copper) and bonding between dielectric materials (e.g., oxide to oxide).

[0036] The operating module 80 can be configured to receive (or regulate) power from electronic components 32 and 34. For example, the operating module 80 can be configured to receive power such as... Figure 2 The power P3 shown is illustrated. In some configurations, electronic components 32 and 34 can supply power to the operating module 80 at different levels (e.g., 8 V, 6 V, 4 V, 2 V or less).

[0037] In the comparative example, the input capacitor and the output capacitor are mounted on the same carrier (e.g., carrier B). In this case, additional electrical connectors (e.g., solder balls) are required between carrier A and carrier B to transfer power to the input capacitor, necessitating additional space to accommodate these connectors. Furthermore, the electrical path between the input capacitor and the second-stage power module is relatively long, resulting in increased power loss. In this configuration, passive device 72 can be mounted on carrier 12 (or carrier A), and passive device 72 can be configured to provide an electrical path that conducts power P2 without passing through (or flowing through or entering) carrier 13. This configuration reduces the number of electrical connectors 75, which in turn reduces the surface area of ​​electronic device 1a (e.g., the surface area along the XY plane). Additionally, the electrical path for power P2 can be shorter than the electrical path in the comparative example, further minimizing power loss.

[0038] Figure 3 A cross-sectional view of an electronic device 1b according to some configurations of this disclosure is shown. Electronic device 1b is similar to electronic device 1a, except as follows.

[0039] In some configurations, electronic device 1b may include a conductive component 91. In some configurations, the conductive component 91 may be disposed and electrically connected between carriers 12 and 13. In some configurations, the conductive component 91 may act as a spacer to control or adjust the distance between carriers 12 and 13. In some configurations, the conductive component 91 may include a conductive post or other suitable component.

[0040] Figure 4 A cross-sectional view of an electronic device 1c according to some configurations of this disclosure is shown. Electronic device 1c is similar to electronic device 1a, except as follows.

[0041] In some configurations, passive device 72 may not overlap laterally with passive device 74. In some configurations, passive device 72 may overlap vertically with passive device 74. In this configuration, electronic device 1c may have additional areas on the surface 12s1 of carrier 12 that can accommodate passive device 72. Similarly, the surface 13s2 of carrier 13 is provided with additional areas designated for placing passive device 74. Therefore, this configuration may enhance the performance of electronic device 1c.

[0042] Figure 5 A cross-sectional view of an electronic device 1d according to some configurations of this disclosure is shown. Electronic device 1d is similar to electronic device 1a, except as follows.

[0043] In some configurations, electronic device 1d may include an interposer 92. Interposer 92 may be electrically connected between carriers 12 and 13. In some configurations, interposer 92 may be electrically connected to carrier 12 via electrical connector 78. In some configurations, interposer 92 may be electrically connected to carrier 13 via electrical connector 79. Electrical connectors 78 and 79 may include resolderable materials, such as solder balls. In some configurations, interposer 92 may be configured to provide an electrical path for conducting signal S1. Interposer 92 may include conductive vias 92v (or through-holes) penetrating interposer 92.

[0044] In some configurations, electronic device 1d may include a passive device 93. In some configurations, passive device 93 may include an input capacitor. In some configurations, passive device 93 may include an output capacitor. In some configurations, passive device 93 may have a terminal 93t1 connected to carrier 12 and a terminal 93t2 connected to carrier 13. In some configurations, carrier 12 may be electrically connected to carrier 13 via passive device 93. In some configurations, passive device 93 may be configured to provide an electrical path that conducts power P3 from carrier 12 to carrier 13 without passing through (or flowing through or entering) the interlayer 92. In some configurations, a portion of passive devices 72 and 74 of electronic devices 1a to 1c may be replaced by passive device 93. Furthermore, electronic device 1d may include, for example, Figure 2 The conductive components 12v1 and 12v2 shown can be configured to electrically connect electronic component 36 and passive device 93, or connect electronic component 32 and passive device 93. In this configuration, the interposer 92 can have more terminals configured to transmit signals, thereby enhancing the performance of electronic device 1d. In this configuration, each of the electrical connectors 78 and 79 can have a relatively small size (e.g., volume or width), and the distance between conductive vias 92v can be reduced. Therefore, the size of the interposer 92 can be reduced to accommodate more components (e.g., passive device 93) between carriers 12 and 13.

[0045] Figure 6 A cross-sectional view of an electronic device 1e according to some configurations of this disclosure is shown. Electronic device 1e is similar to electronic device 1a, except as follows.

[0046] Electronic device 1e may include carriers 15 and 16. Each of carriers 15 and 16 may include a PCB, FPCB, or other suitable circuit structure. Carrier 15 may be mounted on or below carrier 13. Carrier 16 may be mounted on or below carrier 15. Carriers 15 and 16 may be mounted on, for example, Figure 1 Between carriers 13 and 14 shown.

[0047] Electronic device 1e may include a passive device 94 and a conductive component 95. The passive device 94 may be mounted on a carrier 15. The conductive component 95 may be electrically connected between carriers 13 and 15. The passive device 94 may include an output capacitor through which power flows after transmission from electronic component 32 (or electronic component 34). The passive device 94 may be vertically overlapped with passive device 74. The passive device 94 may be vertically overlapped with passive device 72. The conductive component 95 may include a conductive post or other suitable component (e.g., solder ball).

[0048] Electronic device 1e may include a passive device 96 and a conductive component 97. Passive device 96 may be mounted on carrier 16. Conductive component 97 may be electrically connected between carriers 15 and 16. Passive device 96 may include an output capacitor through which power flows after transmission from electronic component 32 (or electronic component 34). Passive device 96 may be vertically overlapped with passive device 74. Passive device 96 may be vertically overlapped with passive device 72. Conductive component 97 may include conductive posts or other suitable components (e.g., solder balls). Conductive component 97 may be configured to provide regulated power from electronic component 32 (or electronic component 34) to an operating module (e.g., operating module 80). In some configurations, a portion of passive devices 94 and 96 may be provided by, for example... Figure 5 The passive device 93 shown is replaced. In some cases, the number of output capacitors may exceed the number of input capacitors, so the electronic device 1e provides additional space to accommodate the output capacitors to enhance the performance of the electronic device 1e.

[0049] In this configuration, additional passive devices 94 and 96 can be provided to improve the performance of the electronic device 1e.

[0050] Unless otherwise specified, spatial descriptions such as “above,” “below,” “upper,” “left,” “right,” “lower,” “top,” “bottom,” “vertical,” “horizontal,” “side,” “higher,” “lower,” “upper,” “above,” and “below” are relative to the orientation indicated in the figures. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and actual embodiments of the structures described herein can be arranged in space in any orientation or manner, provided that the advantages of the arrangement of this disclosure are not deviated from by such arrangement.

[0051] As used herein, the terms “approximately,” “generally,” “substantially,” and “about” are used to describe and account for minor variations. When used in conjunction with an event or situation, the terms can refer to a situation in which the event or situation has clearly occurred or is very close to occurring. For example, when used in conjunction with numerical values, the terms can refer to a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For instance, if the difference between two numerical values ​​is less than or equal to ±10% of the average of the values, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the two numerical values ​​can be considered “generally” the same or equal.

[0052] If the displacement between two surfaces is no greater than 5 µm, no greater than 2 µm, no greater than 1 µm, or no greater than 0.5 µm, then the two surfaces can be considered to be coplanar or substantially coplanar.

[0053] As used herein, unless the context clearly indicates otherwise, the singular terms “a / an” and “the” may include multiple references.

[0054] As used herein, the terms "conductive" and "electrically conductive" refer to the ability to conduct electric current. Conductive materials typically indicate those that exhibit very little or no resistance to the flow of electric current. One measure of conductivity is Siemens per meter (S / m). Generally, conductive materials have a conductivity greater than approximately 10. 4 S / m (e.g., at least 10) 5 S / m or at least 10 6 A material is defined as having an electrical conductivity of S / m. The electrical conductivity of a material can sometimes vary with temperature. Unless otherwise specified, the electrical conductivity of a material is measured at room temperature.

[0055] Additionally, quantities, ratios, and other numerical values ​​are sometimes presented in range format in this document. It should be understood that such range format is for convenience and brevity and should be interpreted flexibly to include not only numerical values ​​explicitly specified as range limits, but also all individual numerical values ​​or subranges covered within the range, as if each numerical value and subrange were explicitly specified.

[0056] Although this disclosure has been described and illustrated with reference to specific arrangements, such descriptions and illustrations are not limiting. Those skilled in the art will understand that various changes and substitutions may be made without departing from the true spirit and scope of this disclosure as defined by the appended claims. The illustrations may not be drawn to scale. Artistic representations in this disclosure may differ from actual equipment due to manufacturing processes and tolerances. Other arrangements of this disclosure may exist that are not specifically described. This specification and drawings should be considered illustrative rather than limiting. Modifications may be made to adapt particular circumstances, materials, compositions, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are intended to be within the scope of the appended claims. While the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations are not limitations of this disclosure.

[0057] Symbol Explanation

[0058] 1a: Electronic devices

[0059] 1b: Electronic devices

[0060] 1c: Electronic devices

[0061] 1d: Electronic device

[0062] 1e: Electronic devices

[0063] 11: Carrier

[0064] 11o: Opening

[0065] 11s1: Surface

[0066] 11s2: Surface

[0067] 12: Carrier

[0068] 12s1: Surface

[0069] 12s2: Surface

[0070] 12v1: Conductive component

[0071] 12v2: Conductive component

[0072] 13: Carrier

[0073] 13s1: Surface

[0074] 13s2: Surface

[0075] 14: Carrier

[0076] 14s1: Surface

[0077] 14s2: Surface

[0078] 15: Carrier

[0079] 16: Carrier

[0080] 20: Electronic Components

[0081] 32: Electronic Components

[0082] 34: Electronic Components

[0083] 36: Electronic Components

[0084] 40: Circuit Structure

[0085] 50: Heat dissipation structure

[0086] 52: Connector

[0087] 54: Conductive components

[0088] 56: Connector

[0089] 58: Conductive components

[0090] 70: Electrical connectors

[0091] 72: Passive device

[0092] 74: Passive Device

[0093] 75: Electrical connectors

[0094] 76: Electrical connectors

[0095] 77: Electrical Connector

[0096] 78: Electrical connectors

[0097] 79: Electrical connectors

[0098] 80: Operation Module

[0099] 81: Electronic Components

[0100] 82: Electronic Components

[0101] 91: Conductive components

[0102] 92: Intermediary layer

[0103] 92V: Conductive via

[0104] 93: Passive device

[0105] 93t1: Terminal

[0106] 93t2: Terminal

[0107] 94: Passive Device

[0108] 95: Conductive components

[0109] 96: Passive device

[0110] 97: Conductive components

[0111] P1: Electricity

[0112] P2: Electricity

[0113] P3: Electricity

[0114] S1: Signal.

Claims

1. An electronic device comprising: First carrier; The first converter is supported by the first carrier; A first capacitor, supported by the first carrier and configured to transmit and receive a first voltage between the first carrier and the first converter; and A second carrier is disposed below the first carrier and configured to receive a second voltage different from the first voltage from the first converter.

2. The electronic device of claim 1, further comprising: The second capacitor, which is supported by the second carrier, The first capacitor is closer to the first converter than the second capacitor.

3. The electronic device of claim 2, wherein the first capacitor and the second capacitor are disposed between the first carrier and the second carrier, and the first capacitor does not vertically overlap with the second capacitor.

4. The electronic device of claim 2, wherein the second capacitor is spaced apart from the first carrier.

5. The electronic device of claim 2, wherein the first capacitor includes an input capacitor and the second capacitor includes an output capacitor.

6. The electronic device of claim 1, wherein the first capacitor is spaced apart from the second carrier.

7. The electronic device of claim 1, further comprising: A conductive component configured to transmit the first voltage. The conductive component is disposed outside the second carrier.

8. The electronic device of claim 1, wherein the first capacitor is vertically overlapped with the first converter.

9. The electronic device of claim 1, further comprising: A second converter, supported by the first carrier, is configured to receive the first voltage and generate a third voltage different from the second voltage.

10. An electronic device comprising: First power unit; A first capacitor, configured to transmit a first voltage to the first power unit; and A second capacitor, adjacent to the first capacitor and configured to transmit a second voltage, different from the first voltage, to the computing unit. The first capacitor is closer to the first power unit than to the computing unit, and the second capacitor is closer to the computing unit than to the first power unit.

11. The electronic device of claim 10, further comprising: The first carrier supports the first power unit. The first capacitor is mounted on the first carrier, and the second capacitor is spaced apart from the first carrier.

12. The electronic device of claim 11, further comprising: Second carrier, The second capacitor is mounted on the second carrier.

13. The electronic device of claim 12, wherein the first capacitor is configured to provide a first electrical path that conducts the first voltage without passing through the second carrier.

14. The electronic device of claim 13, wherein the second capacitor is configured to provide a second electrical path that conducts the second voltage across the first carrier and the second carrier.

15. The electronic device of claim 13, further comprising: An electrical connector that electrically connects the first carrier and the second carrier. The electrical connector is configured to adjust the distance between the first carrier and the second carrier.

16. The electronic device of claim 12, further comprising: An intermediary layer that electrically connects the first carrier and the second carrier.

17. An electronic device comprising: First carrier; A converter, which is positioned above the first carrier; The second carrier is disposed below the first carrier; and An input capacitor is disposed between the first carrier and the second carrier and is electrically connected to the converter. The input capacitor is configured to provide an electrical path that conducts power to the converter without passing through the second carrier.

18. The electronic device of claim 17, further comprising: A first output capacitor and a second output capacitor, wherein the first output capacitor and the second output capacitor are disposed on two opposite sides of the second carrier.

19. The electronic device of claim 17, further comprising: A first output capacitor, wherein the first output capacitor has a first terminal connected to the first carrier and a second terminal connected to the second carrier.

20. The electronic device of claim 19, wherein the converter is configured to provide voltage to the second carrier via the first terminal and the second terminal of the first output capacitor.