Segmented low stress baking plate method for inhibiting pcb pink ring

Abstract

The application discloses a segmented low-stress baking plate method for inhibiting PCB pink circle. The glass transition temperature Tg of a plate material used for a drilled PCB is taken as a temperature reference, and the plate material is sequentially heated to a first temperature T1 and a second temperature T2 and is respectively kept warm, and a second heating rate s2 is less than a first heating rate s1; then the plate material is segmentedly cooled to a final cooling temperature T4 through the first temperature T1 and is naturally cooled, wherein the final cooling temperature T4 is 55-65 DEG C and is lower than the first temperature T1. For the PCB with a storage time greater than 48 hours, the plate material is heated to a third temperature T3 and is kept warm after being kept warm at the second temperature T2, and then the plate material is cooled to the final cooling temperature T4 through the first temperature T1. The method reduces thermal stress in the baking plate process through segmented heating and keeping warm and continuous cooling paths relative to the Tg.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board manufacturing technology, and in particular to a segmented low-stress baking method for suppressing pink rings on PCBs. Background Technology

[0002] After drilling, microcracks may exist at the copper-resin interface near the hole wall of a multilayer PCB. During subsequent baking and wet processing, these microcracks may open, and the chemicals may seep along the cracks and affect the browning layer, thereby forming a pink discoloration area, i.e., a pink ring, around the inner copper ring of the through hole.

[0003] Traditional methods of baking boards involve raising the temperature to a high level and holding it there. However, when the baking temperature exceeds the board's thermal expansion capacity (Tg), the resin's thermal expansion behavior changes, and the microcracks formed at the interface after drilling may open. Therefore, simply canceling the baking process after drilling based on experience, or failing to match the temperature, holding time, and heating / cooling path according to the board's material characteristics, makes it difficult to simultaneously achieve dehumidification, stress release, and interface protection.

[0004] Therefore, there is an urgent need for a baking method that uses the plate's Tg as a temperature reference, allows for controlled heating and heat preservation in the region close to Tg, and employs continuous step cooling to overcome the aforementioned defects. Summary of the Invention

[0005] The purpose of this invention is to provide a segmented low-stress baking method for suppressing the pink ring on PCBs, so as to reduce the thermal stress during the baking process and take into account both board dehumidification and interface protection after drilling.

[0006] To achieve this objective, the present invention adopts the following technical solution: In a first aspect, the present invention provides a segmented low-stress baking method for suppressing pink rings on PCBs, using the glass transition temperature Tg of the board material used in the drilled PCB as a temperature reference. The segmented low-stress baking method for suppressing pink rings on PCBs includes the following steps: S101. The PCB is heated to a first temperature T1 at a first heating rate s1, and held at the first temperature T1 for 30 min-60 min, wherein the first temperature T1 is the glass transition temperature Tg. (30±5)℃; S102. The PCB is heated from the first temperature T1 to the second temperature T2 at a second heating rate s2, and held at the second temperature T2 for 80 min-120 min, wherein the second temperature T2 is the glass transition temperature Tg. (10±5)℃, and the second heating rate s2 < the first heating rate s1; S103, Cool the PCB from the second temperature T2 to the first temperature T1 at a first cooling rate s3; S104. The PCB is cooled from the first temperature T1 to the termination cooling temperature T4 at a second cooling rate s4, and then naturally cooled to room temperature from the termination cooling temperature T4. The termination cooling temperature T4 is 55-65℃ and is lower than the first temperature T1.

[0007] In some embodiments, the first heating rate s1 is 1.0-1.5 °C / min.

[0008] In some embodiments, the second heating rate s2 is 0.5-1.0 °C / min.

[0009] In some embodiments, the first cooling rate s3 from the second temperature T2 to the first temperature T1 is 0.5-1.0 °C / min.

[0010] In some embodiments, the second cooling rate s4 from the first temperature T1 to the final cooling temperature T4 is 1.0-2.5 °C / min.

[0011] Secondly, the present invention provides a segmented low-stress baking method for suppressing the pink ring on a PCB, using the glass transition temperature (Tg) of the board material used in the drilled PCB after storage for more than 48 hours as a temperature reference. The segmented low-stress baking method for suppressing the pink ring on a PCB includes the following steps: S201. The PCB is heated to a first temperature T1 at a first heating rate s1, and held at the first temperature T1 for 30 min-60 min, wherein the first temperature T1 is the glass transition temperature Tg. (30±5)℃; S202. The PCB is heated from the first temperature T1 to the second temperature T2 at a second heating rate s2, and held at the second temperature T2 for 80 min-120 min, wherein the second temperature T2 is the glass transition temperature Tg. (10±5)℃, and the second heating rate s2 < the first heating rate s1; S203. After the second temperature T2 is maintained, the PCB is heated to the third temperature T3 and maintained, wherein the third temperature T3 is the glass transition temperature Tg+(0-10)℃. S204. Cool the PCB from the third temperature T3 to the first temperature T1 at a first cooling rate s3; S205. The PCB is cooled from the first temperature T1 to the final cooling temperature T4 at a second cooling rate s4, and then naturally cooled to room temperature from the final cooling temperature T4. The final cooling temperature T4 is 55-65℃, and is lower than the first temperature T1.

[0012] In some embodiments, the heating rate from the second temperature T2 to the third temperature T3 is 0.3-0.5 °C / min.

[0013] In some embodiments, the holding time for the third temperature T3 is 60 minutes.

[0014] In some implementations, before baking the board, the material parameters of the board material used for the PCB are obtained. The material parameters are obtained through a material database and include at least the glass transition temperature Tg, CTE curve, peel strength, and moisture content.

[0015] In some implementations, the glass transition temperature Tg of the board material used in the PCB is determined based on the material properties and drilling quality results provided by the supplier, and a baking scheme corresponding to the glass transition temperature Tg is given.

[0016] In some embodiments, the first cooling rate s3 from the third temperature T3 to the first temperature T1 is 0.5-1.0 °C / min.

[0017] In some embodiments, the second cooling rate s4 from the first temperature T1 to the final cooling temperature T4 is 1.0-2.5 °C / min.

[0018] Compared with the prior art, the present invention has the following beneficial effects: Under the described process conditions, this invention provides process conditions for temperature balance and stress relief within the board material through two-stage heating and holding, a strict relationship between the second heating rate s2 and the first heating rate s1, and a continuous segmented cooling path. Furthermore, for PCBs with high moisture absorption, the third temperature T3 strengthening route performs enhanced dehumidification after completing the second temperature T2 holding, while maintaining a direct connection between the third temperature T3 and the first temperature T1. Finally, the comparative results under the described test conditions can be used to illustrate the relative differences between different processes, but do not constitute an absolute guarantee of results for all boards or operating conditions.

[0019] The present invention has other features and advantages, which will be apparent from or will be set forth in detail in the accompanying drawings and the following detailed description, which together serve to explain the particular principles of the invention. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic flowchart of the conventional segmented low-stress baking plate method of the present invention.

[0022] Figure 2 This is a flowchart illustrating the T3-strength baking method for PCBs stored for more than 48 hours according to the present invention.

[0023] Figure 3 This is a comparison chart of the PCB hole periphery conditions under different preheating and insulation conditions.

[0024] Figure 4 This is a comparison image of the PCB hole periphery area after segmented baking and traditional 190℃ baking.

[0025] Figure 5 This is a comparison image of the pink circle defect and the image after improvement using the method of this invention. Detailed Implementation

[0026] To illustrate the possible application scenarios, technical principles, implementable specific solutions, and achievable objectives and effects of this application in detail, the following description, in conjunction with the listed specific embodiments and accompanying drawings, provides a detailed explanation. The embodiments described herein are merely illustrative of the technical solutions of this application and are therefore intended to limit the scope of protection of this application.

[0027] To facilitate understanding of the present invention, the glass transition temperature Tg represents the glass transition temperature of the board material used in the drilled PCB; the first temperature T1, the second temperature T2, and the third temperature T3 are the corresponding temperature parameters; the first heating rate s1, the second heating rate s2, the first cooling rate s3, and the second cooling rate s4 are the heating and cooling rates of the corresponding stages.

[0028] Example 1 Please see Figure 1 The segmented low-stress baking method for suppressing the pink ring on PCBs in this embodiment is applicable to conventional baking of drilled PCBs. The method in this embodiment belongs to the conventional segmented low-stress baking route. The PCB sequentially undergoes preheating, transitional heating, first cooling step S103, second cooling step S104, and natural cooling.

[0029] Understandably, in the conventional approach, the glass transition temperature (Tg) of the PCB material is used as a common temperature reference for each temperature stage, and no separate independent temperature references are set for different stages.

[0030] The preheating, transition heating, first cooling step S103, and second cooling step S104 are connected in a predetermined sequence so that the temperature, holding time, and heating / cooling path can be determined accordingly in the same baking plate scheme.

[0031] The process plan is determined before baking the plate by taking into account the glass transition temperature (Tg) of the plate and the corresponding material information. Subsequent stages are implemented in sequence according to the temperature, holding time and heating / cooling path in the plan and the corresponding treatments are completed.

[0032] The steps of the segmented low-stress baking method for suppressing PCB pink rings in this embodiment will be described in detail below.

[0033] S101. The PCB is heated from room temperature to a first temperature T1 at a first heating rate s1, and then held at the first temperature T1.

[0034] Specifically, the first temperature T1 = Tg ΔT1, where ΔT1 is 25℃-35℃, i.e., the first temperature T1 is Tg. 35℃ to Tg 25℃; the holding time t1 at the first temperature T1 is 30min-60min. In one specific value of this embodiment, the first heating rate s1 is 1.0-1.5℃ / min.

[0035] S102. The PCB is heated from the first temperature T1 to the second temperature T2 at the second heating rate s2, and then held at the second temperature T2.

[0036] Specifically, the second temperature T2 = Tg ΔT2, where ΔT2 is 5℃-15℃, i.e., the second temperature T2 is Tg 15℃ to Tg The temperature is 5℃; the holding time t2 at the second temperature T2 is 80min-120min. The second heating rate s2 is less than the first heating rate s1. When the first heating rate s1 is 1.0-1.5℃ / min and the second heating rate s2 is 0.5-1.0℃ / min, the selected rate combination always satisfies the strict relationship that the second heating rate s2 < the first heating rate s1.

[0037] Understandably, in the temperature region close to the glass transition temperature Tg, using a lower second heating rate can prolong the temperature equalization and stress relief process.

[0038] It is worth noting that the relationship that the second heating rate s2 is less than the first heating rate s1 is used to define the relative rate relationship between the two heating stages, rather than choosing the two heating rates as equal endpoints.

[0039] Specifically, after holding at the first temperature T1, the temperature is then raised to the second temperature T2 and held thereafter. The relationship that the second heating rate s2 is less than the first heating rate s1 applies to the selection of rates for two-stage heating. Furthermore, this strict relationship should be maintained when using a corresponding rate range. By first holding near the first temperature T1 and then moving to the vicinity of the second temperature T2 at a lower second heating rate s2, process conditions can be provided for a continuous transition between adjacent temperature stages.

[0040] S103. Cool the PCB from the second temperature T2 to the first temperature T1 at the first cooling rate s3.

[0041] Specifically, the first cooling rate s3 can be 0.5-1.0℃ / min. It is understood that after reaching the first temperature T1, no additional heat preservation step is required, and the process proceeds directly to step S104.

[0042] S104. The PCB is cooled from the first temperature T1 to the final cooling temperature T4 at the second cooling rate s4, and then naturally cooled to room temperature from the final cooling temperature T4.

[0043] Specifically, the second cooling rate s4 can be 1.0-2.5℃ / min. The final cooling temperature T4 can be selected in the range of 55-65℃, preferably 60℃. The second temperature T2 to the first temperature T1, and then from the first temperature T1 to the final cooling temperature T4, constitute a continuous cooling path, which is used to form a stepped continuous cooling path.

[0044] It is understandable that in the cooling section, step S103 starts from the second temperature T2 and reaches the first temperature T1, and step S104 starts from the first temperature T1 and reaches the final cooling temperature T4. The two cooling intervals and their sequential relationship are both part of the conventional baking plate route; after reaching the final cooling temperature T4, it is naturally cooled to room temperature, thus forming a complete path that connects the second temperature T2 to the first temperature T1, the first temperature T1 to the final cooling temperature T4, and room temperature cooling in sequence.

[0045] Example 2 Please see Figure 2 The segmented low-stress baking method for suppressing the pink ring on PCBs in this embodiment is applicable to drilled PCBs that have been stored for more than 48 hours. This embodiment uses a third-temperature (T3) enhanced baking route. The difference from Embodiment 1 is that after the PCB has completed the second-temperature (T2) heat preservation, a third-temperature (T3) enhanced dehumidification stage is added.

[0046] Specifically, the third temperature T3 enhanced drying route is applicable to this embodiment with a storage time of more than 48 hours. Except for the added third temperature T3 enhanced dehumidification step S203, the PCB is still processed according to the two-stage heating and holding sequence of the first temperature T1 and the second temperature T2, and a strict relationship is maintained between the second heating rate s2 and the first heating rate s1: second heating rate s2 < first heating rate s1. Therefore, the third temperature T3 enhanced dehumidification step S203 is an enhanced dehumidification stage set on the basis of the existing two-stage heating and holding, rather than replacing the first temperature T1 or second temperature T2 stage.

[0047] The steps of the segmented low-stress baking method for suppressing PCB pink rings in this embodiment will be described in detail below.

[0048] S201. The PCB is heated to a first temperature T1 at a first heating rate s1, and held at the first temperature T1 for 30 min-60 min, wherein the first temperature T1 is the glass transition temperature Tg. (30±5)℃.

[0049] S202. The PCB is heated from the first temperature T1 to the second temperature T2 at a second heating rate s2, and held at the second temperature T2 for 80 min-120 min, wherein the second temperature T2 is the glass transition temperature Tg. (10±5)℃, and the second heating rate s2 < the first heating rate s1.

[0050] S203. After the second temperature T2 is maintained, the PCB is heated to the third temperature T3 at a heating rate of 0.3-0.5℃ / min, and then held at the third temperature T3 for 60 minutes.

[0051] Specifically, the third temperature T3 = Tg + ΔT3, where ΔT3 is 0℃-10℃, that is, the third temperature T3 is from Tg to Tg+10℃; the enhanced dehumidification step S203 at the third temperature T3 is located after the heat preservation at the second temperature T2 and before the step cooling.

[0052] After holding at the second temperature T2, the PCB is heated to the third temperature T3 at a rate of 0.3-0.5℃ / min, and held at the third temperature T3 for 60 minutes. The temperature window, heating rate, and holding time of the third temperature T3 correspond to the condition of storage time greater than 48 hours.

[0053] It is understandable that after completing the third temperature T3 heat preservation, the first cooling step S204 is entered, so that the enhanced dehumidification stage and the subsequent segmented cooling stage are clearly distinguished in terms of process sequence.

[0054] S204. The PCB is cooled directly from the third temperature T3 to the first temperature T1 at the first cooling rate s3.

[0055] Specifically, the first cooling rate s3 can be 0.5-1.0℃ / min. The first cooling step S204 starts from the third temperature T3 and does not return to the second temperature T2.

[0056] S205. The PCB is cooled from the first temperature T1 to the final cooling temperature T4 at the second cooling rate s4, and then naturally cooled to room temperature from the final cooling temperature T4.

[0057] Specifically, the second cooling rate s4 can be 1.0-2.5℃ / min. The final cooling temperature T4 can be selected in the range of 55-65℃, preferably 60℃. The complete cooling path of the third temperature T3 to the first temperature T1, and then from the first temperature T1 to the final cooling temperature T4 constitutes the third temperature T3 enhanced baking plate route.

[0058] Subsequently, the PCB is directly cooled from the third temperature T3 to the first temperature T1 via step S204, and then cooled from the first temperature T1 to the final cooling temperature T4 via step S205 and naturally cooled to room temperature; steps S204 and S205 constitute the cooling process of the third temperature T3 enhanced baking circuit.

[0059] Example 3 Based on Embodiments 1 and 2, the segmented low-stress baking method for suppressing the pink ring on the PCB in this embodiment can obtain the material parameters of the PCB material before baking, and obtain the material parameters through a material database. The material parameters include at least the glass transition temperature (Tg), CTE curve, peel strength, and moisture content.

[0060] Material parameters are used to establish a material information basis corresponding to the sheet material before baking. Among them, the glass transition temperature Tg is used to determine the first temperature T1, the second temperature T2, and the third temperature T3 when applicable.

[0061] CTE curves, peel strength, and moisture content, along with glass transition temperature (Tg) information, are used as other material parameters obtained from the material database and are used in the material parameter acquisition and scheme matching process.

[0062] For conventional board baking routes, the glass transition temperature (Tg) of the board material used in the PCB can be identified or matched based on the material properties and drilling quality results provided by the supplier, and a conventional board baking scheme corresponding to the glass transition temperature (Tg) can be given. Specifically, the conventional board baking scheme can adopt the steps of Example 1.

[0063] For PCBs stored for more than 48 hours, the glass transition temperature Tg can be identified or matched based on the same material parameters and drilling quality information, and a third temperature T3 strengthening baking scheme corresponding to the glass transition temperature Tg can be given. Specifically, the third temperature T3 strengthening baking scheme can adopt the steps of Example 2.

[0064] When matching solutions, the material properties and drilling quality results provided by the supplier serve as input information for determining or matching the corresponding glass transition temperature (Tg) and providing the baking solution. For both the conventional route and the third-temperature (T3) strengthening route, the glass transition temperature (Tg) of the PCB material is used as the temperature reference. However, depending on whether the PCB has been stored for more than 48 hours, a baking solution corresponding to either the conventional route or the third-temperature (T3) strengthening route is provided. Drilling quality results are used for solution matching and do not indicate that drilling quality changes the glass transition temperature (Tg) of the material itself.

[0065] Furthermore, as an optional verification method, FIB-SEM interface observation can be performed on the drilled samples to determine whether cracks exist, and the crack width can be recorded if cracks are present. The recorded information can be used as reference information for subsequent drilling process adjustments and verification of different baking plate parameter combinations, but does not constitute automatic control or automatic feedback closed loop.

[0066] Understandably, FIB-SEM interface observation can be used to observe interface cracks in samples after drilling, and the corresponding crack width can be recorded when cracks are observed. The recorded crack information can be verified in conjunction with different baking plate parameters, and can also serve as a reference for subsequent drilling process adjustments.

[0067] In addition, the above observations, records and verifications are used to provide manual reference information for subsequent process adjustments and parameter matching verification, and are not required to form an automatic detection, automatic parameter adjustment or automatic feedback control process.

[0068] In parameter matching verification, a horizontal slice can be taken after electroplating and the pink ring can be observed to form process verification information corresponding to the material manufacturing parameters and drilling quality results.

[0069] After completing trial runs with different parameter combinations, horizontal sections can be obtained after electroplating for further observation to understand the pink ring condition. This verification information can be correlated with material manufacturing parameters and drilling quality results to compare process performance under different parameter combinations; its purpose is to provide process verification reference, rather than directly using observation results as the basis for automatic output or automatic control.

[0070] Test case To illustrate the relative control under the recorded process conditions, M9 grade sheet material was selected, and PTH holes with a diameter of 0.2 mm and test areas with different PTH hole center distances were set on the test plate. Three samples were taken per batch for each sheet material and hole type, and storage conditions of 4 hours and 48 hours were set respectively. After electroplating, the samples were horizontally sliced ​​and ground, and the condition of the PTH hole periphery area was observed under a 50× microscope.

[0071] Understandably, the purpose of this experiment is to conduct relative observations under the recorded material, hole type, PTH hole center distance, sampling quantity, and storage conditions. Specifically, for each material and hole type, three samples were taken per batch, and comparisons were made under two storage conditions: 4h and 48h. After electroplating, the samples were horizontally sliced ​​and ground sequentially, and then the condition of the PTH hole periphery area was observed using a 50× microscope.

[0072] It should be noted that different PTH hole center distances are used to form different design positions or test areas in the test plate to compare the hole periphery state under different hole arrangement conditions; the results obtained in this test example are used to illustrate the relative changes under the recorded test conditions, and are not used to deduce absolute results under unrecorded plate materials, hole types, PTH hole center distances or other working conditions.

[0073] Figure 3 The diagram shows the PCB hole perimeter status when no stepped baking plate is used, the first temperature holding time is less than 30 min, and the first temperature holding time is 30 min-60 min. Figure 4 The image shows a comparison of the PCB periphery area after segmented baking and conventional 190°C baking. Figure 5 The image shows a comparison between a picture of the pink circle defect and a picture of the product improved by the method of the present invention.

[0074] in addition, Figures 3 to 5 The images are for illustrative purposes only and show the observations under the recorded experimental conditions. The original colors and the contrast around the holes remain unchanged in the subsequent figures.

[0075] Table 1 Table 1 shows the pink ring occurrence rate of four grades of materials under this method and conventional 190°C baking plate conditions.

[0076] It is worth noting that Table 1 and Figures 3 to 5 This is intended only to illustrate relative observations under the recorded test conditions and should not be taken as an absolute conclusion of complete inhibition, substantial elimination, or applicability to all materials and operating conditions.

[0077] in, Figure 3The comparison of the conditions under different preheating and heat preservation conditions is used to demonstrate the state of the holes around the holes under different preheating and heat preservation conditions. Figure 4 Used to demonstrate the comparison of the perforated area after segmented baking plate and traditional 190℃ baking plate; Figure 5 Used to display a comparison between images of pink circle defects and those improved by the method of this invention. Table 1 and Figures 3 to 5 All should be understood in conjunction with the corresponding test conditions, and are used to illustrate the relative differences under the recorded process conditions, and should not be extended to guarantee all material grades, all hole types or all production conditions.

[0078] Combination Figures 1-5 Under the described process conditions, this invention provides process conditions for temperature balance and stress relief within the board material through two-stage heating and holding, a strict relationship between the second heating rate s2 and the first heating rate s1, and a continuous segmented cooling path. Furthermore, for PCBs with severe moisture absorption, the third temperature T3 strengthening route performs enhanced dehumidification after completing the second temperature T2 holding, while maintaining a direct connection between the third temperature T3 and the first temperature T1. Finally, the comparative results under the described test conditions can be used to illustrate the relative differences between different processes, but do not constitute an absolute guarantee of results for all boards or operating conditions.

[0079] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A segmented low-stress baking method for suppressing pink rings on PCBs, characterized in that, Using the glass transition temperature (Tg) of the PCB material after drilling as a temperature reference, the segmented low-stress baking method for suppressing the pink ring on the PCB includes the following steps: The PCB is heated to a first temperature T1 at a first heating rate s1, and held at the first temperature T1 for 30 min-60 min, wherein the first temperature T1 is the glass transition temperature Tg. (30±5)℃, The PCB is heated from the first temperature T1 to the second temperature T2 at a second heating rate s2, and held at the second temperature T2 for 80 min-120 min, wherein the second temperature T2 is the glass transition temperature Tg. (10±5)℃, and the second heating rate s2 < the first heating rate s1; The PCB is cooled from the second temperature T2 to the first temperature T1 at a first cooling rate s3; The PCB is cooled from the first temperature T1 to the final cooling temperature T4 at a second cooling rate s4, and then naturally cooled to room temperature from the final cooling temperature T4. The final cooling temperature T4 is 55-65°C and is lower than the first temperature T1.

2. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 1, characterized in that, The first heating rate s1 is 1.0-1.5℃ / min, and the second heating rate s2 is 0.5-1.0℃ / min.

3. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 1, characterized in that, The first cooling rate s3 from the second temperature T2 to the first temperature T1 is 0.5-1.0℃ / min, the second cooling rate s4 from the first temperature T1 to the final cooling temperature T4 is 1.0-2.5℃ / min, and the final cooling temperature T4 is 60℃.

4. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 1, characterized in that, Before baking the board, the material parameters of the board material used for the PCB are obtained. The material parameters are obtained through a material database and include at least the glass transition temperature Tg, CTE curve, peel strength and moisture content.

5. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 1, characterized in that, Based on the material properties and drilling quality results provided by the supplier, the glass transition temperature Tg of the board material used in the PCB is determined, and a baking scheme corresponding to the glass transition temperature Tg is given.

6. A segmented low-stress baking method for suppressing pink rings on PCBs, characterized in that, Using the glass transition temperature (Tg) of the drilled PCB material stored for more than 48 hours as a temperature reference, the segmented low-stress baking method for suppressing the pink ring on the PCB includes the following steps: The PCB is heated to a first temperature T1 at a first heating rate s1, and held at the first temperature T1 for 30 min-60 min, wherein the first temperature T1 is the glass transition temperature Tg. (30±5)℃; The PCB is heated from the first temperature T1 to the second temperature T2 at a second heating rate s2, and held at the second temperature T2 for 80 min-120 min, wherein the second temperature T2 is the glass transition temperature Tg. (10±5)℃, and the second heating rate s2 < the first heating rate s1; After the second temperature T2 is maintained, the PCB is heated to the third temperature T3 and maintained, wherein the third temperature T3 is the glass transition temperature Tg+(0-10)℃; The PCB is cooled from the third temperature T3 to the first temperature T1 at a first cooling rate s3; The PCB is cooled from the first temperature T1 to the final cooling temperature T4 at a second cooling rate s4, and then naturally cooled to room temperature from the final cooling temperature T4. The final cooling temperature T4 is 55-65°C and is lower than the first temperature T1.

7. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 6, characterized in that, The heating rate from the second temperature T2 to the third temperature T3 is 0.3-0.5℃ / min.

8. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 6, characterized in that, The holding time for the third temperature T3 is 60 minutes.

9. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 6, characterized in that, The first cooling rate s3 from the third temperature T3 to the first temperature T1 is 0.5-1.0℃ / min.

10. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 9, characterized in that, The second cooling rate s4 from the first temperature T1 to the final cooling temperature T4 is 1.0-2.5℃ / min, and the final cooling temperature T4 is 60℃.

11. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 6, characterized in that, Before baking the board, the material parameters of the board material used for the PCB are obtained. The material parameters are obtained through a material database and include at least the glass transition temperature Tg, CTE curve, peel strength and moisture content.

12. The segmented low-stress baking method for suppressing PCB pink rings as described in claim 11, characterized in that, Based on the material properties and drilling quality results provided by the supplier, the glass transition temperature Tg of the board material used in the PCB is determined, and a baking scheme corresponding to the glass transition temperature Tg is given.

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