A method for filling and plating blind holes of a printed circuit board
Patent Information
- Application Number
- CN202611223974.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-12
- Publication Date
- 2026-10-27
AI Technical Summary
现有填孔工艺难以兼顾高可靠性与低成本,成为制约高端PCB良率提升及行业发展的核心瓶颈
[0019]与现有技术相比,本申请显著的技术进步在于,本申请通过孔壁保留导电层、孔底露出底层压合铜的结构,使填孔电镀铜与底层压合铜实现同材质无中间层的直接冶金键合,有效减小信号传输损耗与阻抗波动,提升高频高速信号传输质量。去除孔底中间层后露出的新鲜压合铜面,优化了盲孔内部的电流分布与铜离子沉积均匀性,有效降低盲孔内空洞、凹陷、针孔等缺陷的发生率,提升填孔平整度。采用紫外激光冷加工方式实现孔底铜层去除,热影响范围小,可控制底层压合铜层的损耗程度;激光光斑与盲孔孔径匹配设计,仅作用于孔底区域,不损伤孔壁导电层。
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Figure CN122995048A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of printed circuit board manufacturing technology, specifically to a method for electroplating blind vias in printed circuit boards. Background Technology
[0002] In modern electronics manufacturing, high-density interconnect (HDI) boards, high-frequency and high-speed boards, and thick copper boards, among other high-end printed circuit boards (PCBs), have become key foundational components in core areas such as artificial intelligence computing power, 5G communication, consumer electronics, automotive electronics, aerospace, and industrial control. These high-end PCBs place stringent requirements on circuit density, signal transmission speed, and mechanical stability. Blind vias, as the core structure for interlayer electrical interconnection in multilayer PCBs, directly determine the electrical conductivity, mechanical stability, and actual lifespan of the PCB through their filling quality. Blind vias are typically formed by laser drilling, with a diameter ranging from 0.1 to 0.50 mm and a depth of 0.10 to 0.30 mm. A filling electroplating process is required to completely fill the copper layer within the via. However, under complex operating conditions (such as high and low temperature cycling, vibration, and mechanical stress), the bottom of blind vias is prone to cracks and delamination due to interlayer stress differences or interface gaps, leading to decreased electrical conductivity and even product failure. For example, in automotive electronics, PCBs need to withstand the high temperatures and vibrations of engine compartments for extended periods; in aerospace, PCBs need to adapt to extreme temperature changes and high-frequency vibrations; and in AI servers, high-frequency, high-speed signal transmission places higher demands on the conductivity stability of blind vias. Existing via-filling processes struggle to balance high reliability and low cost, becoming a core bottleneck restricting the improvement of high-end PCB yields and the industry's development. Summary of the Invention
[0003] To address the technical problems mentioned above, this application provides a method for electroplating blind vias in a printed circuit board, comprising the following steps:
[0004] Blind hole forming: Cut several substrates of a certain size. The substrates are multi-layered board structures. Use a drilling machine to drill blind holes in several boards. The blind holes penetrate at least one layer of the board.
[0005] Blind via adhesive removal: The substrate after forming blind vias is placed into the adhesive removal equipment, which removes adhesive residue from the blind vias.
[0006] Copper plating treatment: Chemical copper plating treatment for blind holes, depositing a copper plating layer on the hole wall and bottom of the blind hole;
[0007] Flash plating: An acidic copper plating process is used to deposit a flash copper layer on the surface of the immersion copper layer.
[0008] Removal of copper residue: The multilayer board structure is fixed on the laser processing equipment. According to the coordinates of the blind hole position, the bottom of the blind hole is laser-treated with ultraviolet laser. The specific process parameters are: laser time is 1-2s / hole, laser energy is only enough to completely remove the copper plating layer + flash copper plating layer at the bottom of the blind hole (total thickness 1.5-3.0μm), without damaging or only slightly damaging the underlying copper plating layer (when slightly damaged, the loss of the underlying copper plating layer is ≤0.3μm), and the laser spot diameter is 110-130μm.
[0009] Copper removal cleaning: After the multilayer board has been cleaned by laser copper removal, it is sent into the cleaning equipment, and ultrasonic waves and deionized water are used to remove the dust in the blind holes.
[0010] Secondary electroplating: The cleaned multilayer board is placed into the hole-filling electroplating equipment and treated with an acidic copper plating process to completely fill the blind holes with electroplated copper. The electroplated copper combines with the exposed bottom copper layer at the bottom of the hole, so that the spacing between the hole-filling copper layer and the wall of the blind hole, as well as the spacing between the hole-filling copper layer and the bottom copper layer at the bottom of the hole, reach the preset values.
[0011] Post-processing: Polish and grind the multilayer board to remove excess electroplated copper layer from the surface; anneal the polished multilayer board.
[0012] According to one embodiment provided in this application, the diameter of the blind hole is 0.1-0.5 mm and the depth is 0.1-0.3 mm; in step 5, the laser spot diameter matches the diameter of the blind hole, and the laser only acts on the bottom area of the blind hole.
[0013] According to one embodiment provided in this application, the thickness of the copper plating layer is controlled at 0.5-1.0 μm; in step 4, the current density of the flash plating process is controlled at 1-3 A / dm², the flash plating time is 3-5 min, and the thickness of the flash-plated copper layer is controlled at 1.0-2.0 μm; the total thickness of the copper plating layer and the flash-plated copper layer is 1.5-3.0 μm.
[0014] According to one embodiment provided in this application, the current density of the via-filling electroplating is 2-5 A / dm², and the electroplating time is 20-40 min. After the via-filling electroplating is completed, a structure is formed in which the hole wall retains a copper plating layer and a flash copper plating layer, and the bottom of the hole only has a bottom layer of laminated copper.
[0015] According to one embodiment of this application, a plasma degumming or alkaline degumming process is used, and the degumming time is controlled within 5-10 minutes; after the degumming is completed, there is no glue residue or oxide layer on the wall of the blind hole.
[0016] According to one embodiment of this application, in step 6, the substrate is cleaned using a combination of deionized water and ultrasonic cleaning, with the cleaning time controlled at 3-5 minutes, in order to remove copper powder and dust impurities generated by laser lithography in the blind holes.
[0017] According to one embodiment of this application, the flattening process includes grinding and polishing to remove excess electroplated copper layer from the board surface; the annealing temperature of the annealing process is controlled at 180-220℃, and the annealing time is controlled at 30-60min.
[0018] According to one embodiment of this application, the substrate is any one of HDI board, high frequency and high speed board, thick copper board, AI computing board or automotive electronic board.
[0019] Compared with existing technologies, the significant technological advancement of this application lies in its structure, which retains a conductive layer on the hole wall and exposes the underlying laminated copper at the bottom of the hole. This allows for direct metallurgical bonding of the through-hole electroplated copper and the underlying laminated copper with the same material and no intermediate layer, effectively reducing signal transmission loss and impedance fluctuations, and improving the quality of high-frequency and high-speed signal transmission. The fresh laminated copper surface exposed after removing the intermediate layer at the bottom of the hole optimizes the current distribution and copper ion deposition uniformity within the blind hole, effectively reducing the incidence of defects such as voids, depressions, and pinholes within the blind hole, and improving the flatness of the through-hole filling. The use of ultraviolet laser cold processing to remove the copper layer at the bottom of the hole results in a small heat-affected zone, allowing control over the degree of loss of the underlying laminated copper layer. The laser spot is designed to match the diameter of the blind hole, acting only on the bottom area of the hole without damaging the conductive layer on the hole wall. Attached Figure Description
[0020] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0021] Figure 1 This is a schematic diagram of the blind via structure after copper plating and flash plating in a blind via filling process provided in this application embodiment;
[0022] Figure 2 This is a schematic diagram of the blind via structure after laser removal of the bottom copper, provided in an embodiment of this application.
[0023] Figure 3 This is a schematic diagram of the blind hole structure after electroplating for filling blind holes, as provided in the embodiments of this application.
[0024] Figure labeling: 100 - blind hole.
[0025] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation
[0026] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0027] First, those skilled in the art should understand that these embodiments are merely for explaining the technical principles of this application and are not intended to limit the scope of protection of this application. Those skilled in the art can make adjustments as needed to adapt to specific application scenarios.
[0028] Secondly, it should be noted that in the description of this application, the terms "front", "rear", "left", "right", "up", "down", "inner", "outer", etc., which indicate the direction or positional relationship, are based on the direction or positional relationship shown in the accompanying drawings. This is only for the convenience of description and does not indicate or imply that the device or component must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application.
[0029] Furthermore, it should be noted that, in the description of this application, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.
[0030] In the description of this application, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this application, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0031] refer to Figure 1 ,and Figure 2 and Figure 3 As shown, this application provides a method for electroplating to fill blind holes 100 on a printed circuit board, including the following steps: Step 1: Blind hole 100 forming: Cut several substrates of a certain size. The substrates are multi-layer board structures. Drill blind holes 100 on several boards using a drilling machine. The blind holes 100 penetrate at least one layer of the board. The diameter of the blind holes 100 is 0.1-0.5mm, and the depth of the blind holes 100 is 0.1-0.3mm. The substrate used in this application is a PCB board. The blind holes 100 are processed on the PCB board using a laser drilling machine. In practical applications, other drilling equipment or other types of boards can also be used.
[0032] Step 2: Resin Removal from Blind Vias 100: Place the substrate with the formed blind vias 100 into a resin removal device. The device will remove resin residue from the blind vias 100. Alternatively, place the PCB into a plasma resin removal device or use an alkaline resin removal process to remove residual resin residue from the walls and bottom of the blind vias 100. The resin removal time should be controlled at 5-10 minutes. Removing resin from the blind vias 100 ensures that there is no resin residue or oxide layer inside the via walls, which facilitates subsequent copper plating operations. After the resin removal is completed, clean the PCB substrate with deionized water and dry it for later use.
[0033] Step 3: Copper plating treatment: Chemical copper plating treatment is performed on blind via 100 to deposit a copper plating layer on the wall and bottom of blind via 100; Through activation, acceleration and chemical copper plating steps, a uniform copper plating layer is deposited on the wall and bottom of blind via 100, and the thickness of the copper plating layer is controlled between 0.5-1.0μm.
[0034] Step 4: Flash plating treatment: An acidic copper plating process is used to deposit a flash copper layer on the surface of the immersion copper layer. The flash plating current density is controlled at 1-3 A / dm², the flash plating time is controlled at 3-5 min, and the thickness of the flash copper layer is controlled at 1.0-2.0 μm. This is to improve the conductivity of the blind via 100, enhance the orientation of the immersion copper layer, and avoid the problem of the immersion copper layer peeling off during subsequent laser processing.
[0035] Step 5: Remove copper residue: Fix the multilayer board structure on the laser processing equipment. According to the position coordinates of blind hole 100, use ultraviolet laser to laser process the bottom of blind hole 100. The specific process parameters are: laser time is 1-2s / hole, laser energy is only enough to completely remove the copper plating layer + flash copper plating layer (total thickness 1.5-3.0μm) at the bottom of blind hole 100, and without damaging or only slightly damaging the underlying copper plating layer (when slightly damaged, the loss of the underlying copper plating layer is ≤0.3μm), and the laser spot diameter is 110-130μm.
[0036] Step 6: Under-copper removal cleaning: After laser copper removal, the multilayer board is sent into a cleaning device to remove dust from the blind holes 100 using ultrasonic waves and deionized water. In this application, deionized water and ultrasonic cleaning are used to remove residual copper, dust and other impurities from the blind holes 100. The ultrasonic power is 40kHz, the concentration of deionized water is 18MΩ*cm, and the cleaning time is controlled at 3-5 minutes to ensure that there are no impurities on the bottom and walls of the blind holes 100, so as to avoid affecting the quality of subsequent hole filling electroplating.
[0037] Step 7: Secondary electroplating: Place the cleaned multilayer board into the via-filling electroplating equipment and use an acidic copper plating process to completely fill the blind vias 100 with electroplated copper. The electroplated copper bonds with the exposed bottom copper layer at the bottom of the via, so that the spacing between the via-filling copper layer and the wall of the blind via 100, as well as the spacing between the via-filling copper layer and the bottom copper layer at the bottom of the via, reaches the preset value. In this application, an acidic copper plating solution containing accelerators, inhibitors, and leveling agents is used for via-filling electroplating, wherein the current density is 2-5A / dm², and the electroplating time can be adjusted according to the size of the blind vias 100. In this application, the diameter of the blind vias 100 is 0.1-0.3mm, and the electroplating time is 20-40min.
[0038] Step 8: Post-processing: Polishing and grinding the multilayer board to remove excess electroplated copper layer from the surface; annealing the polished multilayer board. In this application, a grinding machine is used to polish the multilayer board, and then the PCB substrate is annealed. The annealing temperature is 180-220℃, and the annealing time is controlled at 30-60 minutes. Annealing the substrate releases the attraction between the through-hole copper layer and the substrate, further improving the through-hole bonding force. Finally, the substrate needs to undergo solder masking, silkscreen printing, and curing processes to complete the PCB manufacturing.
[0039] According to one embodiment of this application, the diameter of the blind hole 100 is 0.1-0.5 mm, and the depth is 0.1-0.3 mm; in step 5, the laser spot diameter matches the diameter of the blind hole 100, and the laser only acts on the bottom region of the blind hole 100. Based on the aforementioned limited aperture, this embodiment further defines the size of the blind hole 100 and the laser spot parameters:
[0040] In this application, the aperture of the blind hole 100 can be set to 0.1 mm, 0.3 mm, and 0.5 mm, respectively, corresponding to depths of 0.1 mm, 0.2 mm, and 0.3 mm. The laser spot diameter is matched one-to-one with the aperture of the blind hole 100: when the aperture is 0.1 mm, the spot diameter is 110 μm; when the aperture is 0.3 mm, the spot diameter is 120 μm; and when the aperture is 0.5 mm, the spot diameter is 130 μm.
[0041] During laser processing, a vision positioning system is used to align the laser beam with the center of the blind via 100, ensuring that the laser only acts on the bottom area of the blind via 100 and does not damage the copper plating layer or flash-plated copper layer on the via wall. The laser spot diameter needs to be slightly larger than the via diameter, which can be 10-30 μm larger, to ensure that the copper layer at the bottom edge of the blind via 100 can also be completely removed. If the spot diameter is smaller than the via diameter, copper layer will remain at the bottom edge, making complete direct bonding impossible; if the spot diameter is too large, the laser will irradiate the via wall, damaging the copper plating layer and flash-plated copper layer on the via wall, resulting in decreased conductivity of the via wall and affecting the current distribution of subsequent via-filling electroplating.
[0042] According to one embodiment of this application, the thickness of the copper plating layer is controlled at 0.5-1.0 μm; in step 4, the current density of the flash plating process is controlled at 1-3 A / dm², the flash plating time is 3-5 min, and the thickness of the flash-plated copper layer is controlled at 1.0-2.0 μm; the total thickness of the copper plating layer and the flash-plated copper layer is 1.5-3.0 μm. In step 3 of this application, the chemical copper plating time can be controlled at 15 min, and the copper plating layer thickness is controlled at 0.7 μm; in step 4, the current density of the flash plating process is controlled at 2 A / dm², the flash plating time is 4 min, and the flash-plated copper layer thickness is controlled at 1.5 μm. The total thickness of the copper plating layer and the flash-plated copper layer is 2.2 μm, ensuring that the subsequent laser copper removal process can completely remove the bottom copper layer in one go, while avoiding excessive laser energy damage to the underlying copper due to excessive total thickness.
[0043] According to one embodiment of this application, the current density for via-filling electroplating is 2-5 A / dm², and the plating time is 20-40 min. After the via-filling electroplating is completed, a structure is formed in which the hole walls retain a deposited copper layer and a flash-plated copper layer, and the bottom of the hole only has a bottom-layer bonded copper layer. In step 7 of this application, the via-filling electroplating can adopt an acidic via-filling copper plating process, with a current density of 3 A / dm² and a plating time of 30 min. After the via-filling electroplating is completed, the wall of the blind via 100 retains the deposited copper layer and the flash-plated copper layer completely, ensuring the conductivity of the hole wall; the bottom of the blind via 100 only has a bottom-layer bonded copper layer, and the electroplated copper and the bottom-layer bonded copper layer can be directly bonded without an intermediate layer. The retention of the copper plating layer and flash copper plating layer on the hole wall ensures that the current can be evenly distributed throughout the hole wall during electroplating, resulting in uniform filling from bottom to top. Furthermore, the removal of the intermediate layer at the bottom of the hole allows the electroplated copper to directly contact the underlying laminated copper, which promotes the deposition of copper ions at the bottom of the hole and inhibits the excessive growth of copper at the hole opening, thereby improving the smoothness of the hole filling.
[0044] According to one embodiment of this application, plasma or alkaline desmearing processes are used, with the desmearing time controlled within 5-10 minutes. After desmearing, no adhesive residue or oxide layer remains on the walls of blind via 100. This embodiment provides two optional desmearing process schemes: Scheme 1 (Plasma Desmearing): Using radio frequency plasma equipment, the process parameters are: power 800W, oxygen flow rate 300sccm, argon flow rate 100sccm, processing time 7 minutes, and processing temperature 60℃. Scheme 2 (Alkaline Desmearing): Using potassium permanganate alkaline desmearing solution, the process parameters are: potassium permanganate concentration 65g / L, sodium hydroxide concentration 40g / L, processing temperature 80℃, and processing time 8 minutes. After treatment by both schemes, cross-section observation shows that no adhesive residue or oxide layer remains on the walls of blind via 100, and the etching depth is controlled within the range of 5-10μm, meeting the requirements for subsequent copper plating. It should be noted that laser drilling generates high temperatures, causing the resin on the hole wall to melt and form adhesive residue. This residue hinders the bonding between the copper plating layer and the substrate, leading to plating peeling. Plasma adhesive removal uses high-energy plasma to bombard the adhesive residue, decomposing it into gas and venting it out. This method causes minimal damage to the hole wall and is suitable for blind holes with smaller diameters (100mm). Alkaline adhesive removal uses the strong oxidizing effect of potassium permanganate to decompose the adhesive residue.
[0045] According to one embodiment of this application, in step 6, the substrate is cleaned using a combination of deionized water and ultrasonic cleaning, with the cleaning time controlled at 3-5 minutes, to remove copper powder and dust impurities generated by laser lithography within the blind vias 100. This embodiment further optimizes the ultrasonic cleaning process based on Embodiment 1:
[0046] In step 6, a multi-stage ultrasonic cleaning process is adopted: the first stage is a 40kHz coarse wash for 2 minutes; the second stage is an 80kHz fine wash for 2 minutes; and finally, a high-pressure deionized water spray rinse is used for 30 seconds.
[0047] After cleaning, dry with dust-free hot air at 60℃ for 5 minutes.
[0048] Laser copper removal generates a large amount of nano- and micro-sized copper powder and dust impurities. If these impurities remain within the blind via 100, they will be encapsulated by the subsequent electroplated copper layer, forming defects such as pinholes and pits, and in severe cases, leading to a decrease in the adhesion of the plating layer. Ultrasonic waves generate a strong cavitation effect, which can remove larger-diameter impurities and also penetrate deep into the bottom of the blind via 100 to remove fine nano-sized copper powder; high-pressure spraying can thoroughly wash out loose impurities inside the via.
[0049] According to one embodiment of this application, the flattening process includes grinding and polishing to remove excess electroplated copper layer from the board surface; the annealing temperature of the annealing process is controlled at 180-220℃, and the annealing time is controlled at 30-60min.
[0050] According to one embodiment of this application, the substrate is any one of HDI board, high frequency and high speed board, thick copper board, AI computing board or automotive electronic board.
[0051] Two hole-filling methods are provided below to better understand the technical solution of this application.
[0052] Example 1: Conventional HDI Board Blind Hole Filling Electroplating Process
[0053] This embodiment focuses on the via-filling electroplating process for conventional blind vias on high-density interconnect (HDI) printed circuit boards, specifically including the following steps:
[0054] Blind via forming: A multilayer HDI printed circuit board substrate with a thickness of 1.0mm is selected, and blind via structures are formed on the substrate using laser drilling equipment; the diameter of the blind via is set to 0.20mm, and the depth is set to 0.1mm. After drilling, the wall of the blind via is smooth and burr-free, and the bottom of the via is tightly bonded to the bottom copper layer of the substrate, without gaps or delamination.
[0055] Blind via adhesive removal: A plasma adhesive removal process is used to remove adhesive residue from the molded blind vias for 7 minutes. High-energy plasma bombardment removes residual resin residue and laser drilling contaminants from the via walls and bottom. After treatment, the substrate is thoroughly rinsed with deionized water and then dried with dust-free hot air to ensure that there is no adhesive residue or oxide layer on the via walls, meeting the substrate requirements for subsequent copper plating processes.
[0056] Copper plating process: The substrate is sequentially activated, accelerated, and electroless copper plating to complete the electroless copper plating process for blind vias. Finally, a uniform and continuous copper plating layer is deposited on the walls and bottom surfaces of the blind vias, with the thickness of the copper plating layer controlled at 0.8 μm. The copper plating layer completely covers the entire inner wall of the blind via, with no missed plating or pinhole defects, providing a conductive substrate for subsequent electroplating.
[0057] Flash plating: An acidic copper plating process is used to flash plating the substrate. The flash plating current density is controlled at 2A / dm², and the flash plating time is controlled at 4min. A densely bonded flash-plated copper layer is deposited on the surface of the immersion copper layer, with a thickness controlled at 1.5μm. The total thickness of the immersion copper layer and the flash-plated copper layer is 2.3μm. The flash-plated copper layer effectively improves the conductivity uniformity of the blind via inner wall, strengthens the bonding stability of the immersion copper layer, and prevents the immersion copper layer from peeling off during subsequent laser processing.
[0058] Precise laser removal of bottom copper: The substrate is fixed on the processing platform of the ultraviolet laser processing equipment. The center position of each blind hole is aligned with the visual positioning system, the preset blind hole position coordinates are called, and ultraviolet laser is used to perform laser processing on the bottom of the blind holes. In this embodiment, the laser energy is adjusted to 80-100mJ, the laser spot diameter is set to 0.20mm, and the laser processing time for a single hole is 1.5s.
[0059] Metallographic sectioning verification showed that this step can completely remove the plating copper layer and flash copper layer at the bottom of the blind hole. The loss of the bottom layer of laminated copper is only 0.2μm, which is only slight loss. There is no obvious damage or scratches to the bottom layer of laminated copper. At the same time, the plating copper layer and flash copper layer on the wall of the blind hole remain intact, with no accidental damage from the laser, and the conductive structure of the hole wall is not affected.
[0060] Post-copper removal cleaning: The laser-processed substrate is placed in a cleaning device and cleaned using a combination of ultrasonic waves and deionized water for a total cleaning time of 4 minutes. The ultrasonic cavitation effect, combined with deionized water rinsing, thoroughly removes copper powder and dust impurities generated by the laser from the blind vias. After cleaning, the substrate is dried for later use, ensuring that there are no impurities remaining on the bottom and walls of the blind vias to avoid defects in subsequent plating layers.
[0061] Through-hole plating: The cleaned substrate is placed into the through-hole plating equipment, and an acidic copper plating solution containing accelerators, inhibitors, and leveling agents is used for through-hole plating. In this embodiment, the plating current density is controlled at 3A / dm², and the plating time is set to 30 minutes. After plating, the through-hole copper layer completely fills the interior of the blind via, with no bubbles or depressions inside the via. The through-hole copper layer is tightly bonded to the copper layer on the wall of the blind via, and direct bonding without an intermediate layer is achieved at the bottom of the via with the exposed underlying copper layer, effectively reducing interlayer contact resistance.
[0062] Subsequent processing: The substrate surface is polished using grinding equipment to remove excess electroplated copper layer and ensure flatness. The substrate is then annealed at 200℃ for 45 minutes to release internal stress between the via-filling copper layer and the substrate, further improving the adhesion of the via structure. After annealing, the substrate undergoes solder masking, silkscreen printing, and curing processes to complete the overall processing of the HDI printed circuit board.
[0063] Example 2: Electroplating process for filling blind holes in high-frequency and high-speed boards
[0064] This embodiment focuses on the via-filling electroplating process for blind vias on high-frequency, high-speed printed circuit boards to meet the performance requirements of high-frequency signal transmission. The specific steps include the following:
[0065] Blind via forming: A high-frequency, high-speed printed circuit board substrate with a thickness of 0.8mm is selected, and a blind via structure is formed using laser drilling equipment; the diameter of the blind via is set to 0.1mm, and the depth is set to 0.10mm. After drilling, the wall of the blind via is smooth and burr-free, and there is no gap between the bottom of the via and the underlying copper layer, meeting the high-precision processing requirements of high-frequency boards.
[0066] Blind via adhesive removal: An alkaline adhesive removal process is used to remove adhesive residue from the blind vias for 5 minutes. The strong oxidizing effect of potassium permanganate decomposes the resin residue on the walls and bottom of the blind vias, preventing residue from causing additional loss to high-frequency signal transmission. After adhesive removal, the substrate is rinsed with deionized water and dried to ensure the inner walls of the blind vias are clean and free of residue.
[0067] Copper plating: A chemical copper plating process is performed on the substrate to deposit a uniform copper layer on the walls and bottom of the blind vias. The thickness of the copper layer is controlled to be 0.5 μm. The thin copper layer can reduce parasitic losses during signal transmission, while ensuring complete coverage of the via walls without pinholes or plating defects.
[0068] Flash plating: An acidic copper plating process is used for flash plating, with the flash plating current density controlled at 1 A / dm² and the flash plating time controlled at 3 min. A 1.0 μm thick flash-plated copper layer is formed on the surface of the deposited copper layer, and the total thickness of the deposited copper layer and the flash-plated copper layer is 1.5 μm. The thickness of the flash-plated copper layer is strictly controlled to avoid signal interference and impedance abnormalities caused by excessive plating, while ensuring that the conductivity of the hole wall meets the current distribution requirements of subsequent via-filling electroplating.
[0069] Precise laser removal of bottom copper: The substrate is fixed on the ultraviolet laser processing equipment, and the center of the blind hole is precisely aligned using a vision positioning system. Ultraviolet laser is then used to remove copper from the bottom of the blind hole. In this embodiment, the laser energy is adjusted to 60-80 mJ, the laser spot diameter is set to 0.1 mm, and the laser removal time per hole is 1 second.
[0070] Testing and verification have shown that this step can completely remove the copper plating layer and flash copper plating layer at the bottom of the blind hole, with a loss of only 0.1μm in the bottom laminated copper layer and no structural damage; moreover, the copper layer on the hole wall remains intact and is not affected by laser processing, and the conductivity uniformity of the hole wall is not damaged.
[0071] Cleaning after removing bottom copper: The laser-processed substrate is ultrasonically cleaned for 3 minutes to thoroughly remove residual copper powder and dust impurities in the blind holes, ensuring that the bottom of the blind holes is flat and free of impurities, and avoiding impurities from affecting the density of subsequent hole filling and the stability of high-frequency signal transmission.
[0072] Through-hole plating: An acidic through-hole copper plating process is used, with the plating current density controlled at 2A / dm² and the plating time set at 20 minutes. After plating, the through-hole copper layer completely fills the interior of the blind vias, without bubbles or depressions. The through-hole structure is dense and uniform, and the direct bonding structure at the bottom of the vias effectively reduces interlayer interconnection losses, ensuring the stability and integrity of high-frequency signal transmission.
[0073] Subsequent processing: The substrate is lightly sanded and polished to remove excess copper layer and precisely control surface roughness. Then, annealing is performed at 180℃ for 30 minutes to release internal stress and prevent high temperatures from affecting the performance of the high-frequency board. After annealing, a high-frequency solder resist is applied to complete the solder resist process, followed by screen printing and curing, ultimately completing the processing of the high-frequency, high-speed printed circuit board.
[0074] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the application disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.
[0075] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.
Claims
1. A method for electroplating blind via filling in printed circuit boards, characterized in that, Includes the following steps: Step 1: Blind hole forming: Cut several substrates of a certain size. The substrates are multi-layered board structures. Use a drilling machine to drill blind holes in several boards. The blind holes penetrate at least one layer of the board. Step 2: Blind via removal: The substrate with formed blind vias is placed into a removal device, which removes adhesive residue from the blind vias. Step 3: First copper plating treatment: Chemical copper plating treatment is performed on the blind vias to deposit a copper plating layer on the walls and bottom of the blind vias; Step 4: Flash plating treatment: An acidic copper plating process is used to deposit a flash copper layer on the surface of the copper plating layer. Step 5: Remove copper residue: Fix the multilayer board structure on the laser processing equipment. According to the coordinates of the blind hole position, use ultraviolet laser to laser process the bottom of the blind hole. The specific process parameters are: laser time is 1-2s / hole, laser energy is only enough to completely remove the copper plating layer + flash copper plating layer at the bottom of the blind hole (total thickness 1.5-3.0μm), and does not damage or only slightly damages the underlying copper plating layer (when slightly damaged, the loss of the underlying copper plating layer is ≤0.3μm), and the laser spot diameter is 110-130μm. Step 6: Under-copper cleaning: After laser copper removal, the multilayer board is sent into the cleaning equipment, where ultrasonic waves and deionized water are used to remove dust from the blind holes. Step 7: Secondary electroplating: Place the cleaned multilayer board into the hole-filling electroplating equipment and use an acidic copper plating process to completely fill the blind holes with electroplated copper. The electroplated copper combines with the exposed bottom layer of laminated copper at the bottom of the hole, so that the distance between the hole-filling copper layer and the wall of the blind hole, as well as the distance between the hole-filling copper layer and the bottom layer of laminated copper at the bottom of the hole, reach the preset value. Step 8: Post-processing: Polish and grind the multilayer board to remove excess electroplated copper layer from the surface; anneal and flatten the polished multilayer board.
2. The electroplating process for filling blind holes in a printed circuit board according to claim 1, characterized in that, In step 1 above, the diameter of the blind hole is 0.1-0.5 mm and the depth is 0.1-0.3 mm; in step 5, the laser spot diameter matches the diameter of the blind hole, and the laser only acts on the bottom area of the blind hole.
3. The electroplating process for filling blind holes in a printed circuit board according to claim 1, characterized in that, In step 3, the thickness of the copper plating layer is controlled at 0.5-1.0 μm; in step 4, the current density of the flash plating process is controlled at 1-3 A / dm², the flash plating time is 3-5 min, and the thickness of the flash-plated copper layer is controlled at 1.0-2.0 μm; the total thickness of the copper plating layer and the flash-plated copper layer is 1.5-3.0 μm.
4. The electroplating process for filling blind holes in a printed circuit board according to claim 1, characterized in that, In step 7, the current density of the via-filling electroplating is 2-5 A / dm², and the electroplating time is 20-40 min. After the via-filling electroplating is completed, a structure is formed in which the plated copper layer and flash-plated copper layer are retained on the hole wall, and only the bottom layer of the laminated copper layer remains at the bottom of the hole.
5. The electroplating process for filling blind holes in a printed circuit board according to claim 1, characterized in that, In step 2, plasma or alkaline desmearing processes are used, and the desmearing time is controlled within 5-10 minutes; after the desmearing is completed, there is no glue residue or oxide layer on the wall of the blind hole.
6. The electroplating process for filling blind holes in a printed circuit board according to claim 1, characterized in that, In step 6, the substrate is cleaned using a combination of deionized water and ultrasonic cleaning. The cleaning time is controlled at 3-5 minutes to remove copper powder and dust impurities generated by laser lithography in the blind holes.
7. The electroplating process for filling blind holes in a printed circuit board according to claim 1, characterized in that, In step 8, the flattening process includes grinding and polishing to remove excess electroplated copper layer from the board surface; the annealing temperature of the annealing process is controlled at 180-220℃, and the annealing time is controlled at 30-60min.
8. A method for electroplating blind via filling in printed circuit boards according to any one of claims 1 to 7, characterized in that, The substrate is any one of HDI board, high frequency and high speed board, thick copper board, AI computing board or automotive electronic board.