An alpha-In2Se3 / HfO2 thin film-based negative capacitance field effect transistor and depletion-mode load inverter thereof

Abstract

The application discloses a kind of based on alpha-In2Se3 / HfO2 film negative capacitance field effect transistor and its depletion type load inverter, comprising: substrate, two not connected source-drain electrode, channel material, HfO2 dielectric passivation layer, alpha-In2Se3 ferroelectric material and top gate electrode;Source-drain electrode is deposited above substrate, two-dimensional semiconductor channel material is set above source-drain electrode and substrate, source-drain electrode and channel material form good electrical contact, HfO2 dielectric passivation layer and alpha-In2Se3 ferroelectric material are laminated and covered on channel material, top gate electrode is in contact with alpha-In2Se3 ferroelectric layer.The application forms series connection gate laminated by introducing HfO2 dielectric passivation layer and alpha-In2Se3 ferroelectric layer, realizes internal voltage amplification using the negative capacitance effect of ferroelectric material, so that the subthreshold swing of device breaks through 60 mV / dec Boltzmann limit.Based on the transistor constructed depletion type load inverter realizes logic inversion at ultra-low voltage.The application has the advantages of high stability, super steep subthreshold swing.

Description

Technical Field

[0001] This invention belongs to the field of microelectronic device technology, specifically a negative capacitance field-effect transistor based on α-In2Se3 / HfO2 thin film and its fabrication method, as well as a depletion-type load inverter based on the transistor. Background Technology

[0002] Negative capacitance field-effect transistors (FETs) are microelectronic devices that utilize the negative capacitance effect of ferroelectric materials introduced into the gate layer to amplify the internal voltage, thereby breaking the theoretical limit of subthreshold swing (60 mV / dec) and significantly reducing operating voltage and power consumption. Traditional silicon-based FETs typically employ single ferroelectric thin films such as HfO2, but their ferroelectric orthorhombic phase is metastable and generally polycrystalline, affecting transistor durability. Novel ferroelectric materials such as CuInP2S6 and glide ferroelectric materials exhibit steep switching characteristics, but large-area fabrication is difficult, and capacitance mismatch exists in integrated FETs. Two-dimensional layered ferroelectric semiconductors, such as α-In2Se3, have attracted considerable attention due to their unique advantages. The room-temperature stable ferroelectric polarization and ferroelectricity of α-In2Se3, maintained up to several atomic layers thick, provide the possibility for integrated construction of FETs. However, charge trapping and shielding effects at the ferroelectric-dielectric interface weaken the polarization intensity of the ferroelectric material, thus reducing the efficiency of the negative capacitance effect. The existing reports on α-In2Se3 negative capacitance field-effect transistors lack systematic evaluation of their stability and bias voltage tolerance under long-term operation, making it difficult to guarantee the reliability of the devices. Summary of the Invention

[0003] Purpose of the invention: To address the problems of poor stability of ferroelectric materials, poor process compatibility, and difficulty in capacitance matching in existing negative capacitance field-effect transistors, this invention proposes a negative capacitance field-effect transistor based on α-In2Se3 / HfO2 thin film and its depletion-type inverter.

[0004] Technical Solution: In a first aspect, the present invention proposes a negative capacitance field-effect transistor based on an α-In2Se3 / HfO2 thin film, comprising: a substrate, two non-connected source and drain electrodes, a channel material, a gate dielectric stack, and a top gate electrode; the source and drain electrodes are deposited on the substrate, the channel material is disposed on the source and drain electrodes and the substrate, the gate dielectric stack is obtained by stacking an HfO2 dielectric passivation layer and an α-In2Se3 ferroelectric layer, the HfO2 dielectric passivation layer is directly bonded to the channel material and covers the upper surface of the channel material, and the α-In2Se3 ferroelectric layer is in contact with the top gate electrode.

[0005] Furthermore, the substrate surface has a dielectric oxide layer.

[0006] Furthermore, the channel material is a two-dimensional semiconductor material.

[0007] Secondly, the present invention proposes a depletion-type load inverter, which is composed of two negative capacitance field-effect transistors connected in series. One negative capacitance field-effect transistor is used as a driving transistor, and the other is used as a load transistor. The gate of the load transistor is connected to its source.

[0008] The negative capacitance field-effect transistor is a negative capacitance field-effect transistor based on the α-In2Se3 / HfO2 thin film disclosed above.

[0009] Beneficial Effects: This invention uses α-In₂Se₃ two-dimensional ferroelectric material as the ferroelectric layer of a negative capacitance field-effect transistor. By introducing an HfO₂ dielectric passivation layer to form a series gate stack with the α-In₂Se₃ ferroelectric layer, a stable negative capacitance effect is achieved. The negative capacitance effect of the ferroelectric material is utilized to achieve internal voltage amplification, enabling the device's subthreshold swing to break through the Boltzmann limit of 60 mV / dec, thus solving the problems of poor performance and instability in existing devices. Based on this transistor, the depletion-mode load inverter constructed in this invention achieves logic inversion at ultra-low voltage. In summary, this invention has the advantages of high stability and ultra-steep subthreshold swing, providing a feasible device solution for ultra-low power integrated circuits. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the structure of a negative capacitance field-effect transistor based on an α-In2Se3 / HfO2 thin film proposed in this invention;

[0011] Figure 2 The transfer characteristic curves of the negative capacitance field-effect transistor in Example 1 at a source-drain voltage of 0.1V are given;

[0012] Figure 3 The subthreshold swing and threshold voltage of the negative capacitance field-effect transistor in Example 1 are given as curves of the scan rate.

[0013] Figure 4 This is the relationship between the subthreshold swing of the device and the holding time under different bias voltages and scanning directions in the reliability testing method of the negative capacitance field-effect transistor based on α-In2Se3 / HfO2 thin film proposed in Example 1.

[0014] Figure 5 This is a schematic diagram of the structure of the negative capacitor based on α-In2Se3 / HfO2 thin film proposed in Example 2;

[0015] Figure 6 The polarization-electric field characteristic curves of the negative capacitor device based on α-In2Se3 / HfO2 thin film proposed in Example 2 are shown in the figure with a pulse width of 140 ns.

[0016] Figure 7 The depletion-type load inverter based on an α-In₂Se₃ / HfO₂ thin film negative capacitance field-effect transistor, as proposed in Example 3, has an input voltage V within a supply voltage range of 0.1V to 5V. IN With output voltage V OUT The inverse phase characteristic curve is shown in the figure. The illustration is a schematic diagram of a depletion-type load inverter structure based on an α-In2Se3 / HfO2 thin film negative capacitance field-effect transistor proposed in Example 4. Detailed Implementation

[0017] The technical solution of the present invention will now be further described in conjunction with the accompanying drawings and embodiments.

[0018] Example 1:

[0019] like Figure 1 As shown, this invention discloses a negative capacitance field-effect transistor based on an α-In2Se3 / HfO2 thin film, which mainly includes: a substrate 1, two unconnected source / drain electrodes 2, a two-dimensional semiconductor channel material 3, an HfO2 dielectric passivation layer 4, an α-In2Se3 ferroelectric material 5, and a top gate electrode 6. The source / drain electrodes 2 are deposited on top of the substrate 1, the two-dimensional semiconductor channel material 3 is disposed on top of the source / drain electrodes 2 and the substrate 1, the HfO2 dielectric passivation layer 4 and the α-In2Se3 ferroelectric material 5 are stacked, the HfO2 dielectric passivation layer 4 is directly bonded to the two-dimensional semiconductor channel material 3, and the top gate electrode 6 is in contact with the α-In2Se3 ferroelectric material. This invention uses an HfO2 dielectric passivation layer to cover the two-dimensional semiconductor channel material, effectively suppressing defect states and interface scattering at the interface, and significantly suppressing hysteresis of the transfer curve; by utilizing the synergistic effect of the HfO2 dielectric passivation layer and the α-In2Se3 ferroelectric layer, an ultra-steep subthreshold swing is achieved.

[0020] In this embodiment of the invention, substrate 1 is a smooth, hard substrate, including but not limited to silicon, germanium, etc., with a dielectric oxide layer on its surface. For example, substrate 1 is heavily doped p-type silicon with a SiO2 oxide layer on its surface. The unconnected source / drain electrodes 2 are made of highly conductive materials such as gold, titanium, nickel, or platinum. The two-dimensional semiconductor channel material 3 is MoS2, which is dry-transferred above the source / drain electrodes 2. An HfO2 dielectric passivation layer 4 is deposited on the channel material. An α-In2Se3 ferroelectric material 5 is dry-transferred to the surface of the HfO2 dielectric passivation layer 4. A channel is formed between the source / drain electrodes 2, with a channel width and length ranging from several micrometers to tens of micrometers.

[0021] The working principle of the negative capacitance field-effect transistor based on α-In2Se3 / HfO2 thin film proposed in this embodiment of the invention is as follows:

[0022] Generally speaking, for field-effect transistors, the subthreshold swing SS and the semiconductor layer capacitance C can be given using the following formula. s and insulating layer capacitance C ins Relationship:

[0023]

[0024] In the formula, Represents the Boltzmann constant. Represents the elementary charge. Represents absolute temperature. This refers to the capacitance of the semiconductor layer (including depletion, channel-to-source, and drain stray capacitance). This indicates the capacitance of the insulating layer.

[0025] Ferroelectric materials exhibit double-well free energy curve characteristics. According to Landau theory, a negative slope region exists in the polarization-electric field (PE) relationship, corresponding to a complex differential capacitance. A negative capacitance field-effect transistor can be considered as consisting of a ferroelectric capacitor connected in series with the capacitance of the underlying field-effect transistor. The negative capacitance of the ferroelectric layer can partially offset the capacitance contribution of the channel depletion layer and interface states, increasing the total gate stack capacitance and thus generating an internal ferroelectric voltage amplification effect, resulting in an internal gate voltage amplification gain. With the effective capacitance of the ferroelectric layer With the effective capacitance of the field-effect transistor below Relationship:

[0026]

[0027] To ensure the internal gate voltage amplification gain It is effective but limited, and needs to satisfy the following relationship:

[0028]

[0029] Therefore, the subthreshold swing of the negative capacitance field-effect transistor The relationship can be described as follows:

[0030]

[0031] In the formula, Indicates the depletion layer capacitance. This represents the capacitance of the HfO2 layer. In this embodiment, the effective capacitance of the α-In2Se3 ferroelectric layer is approximately 0.43 μF / cm². 2 The effective capacitance of the channel layer is approximately 0.37 μF / cm. 2 The effective capacitance of the HfO2 dielectric passivation layer is approximately 0.97 μF / cm. 2 .

[0032] Figure 2The transfer characteristic curves of the negative capacitance effect transistor proposed in this embodiment of the invention are presented. At a source-drain voltage of 0.1V and a step size of 0.02V, the transfer curve shows almost no hysteresis.

[0033] Figure 3 The subthreshold swing and threshold voltage of the negative capacitance effect transistor proposed in this invention are shown as curves of change with scan rate. At different scan rates, the subthreshold swing of the forward scan is less than the Boltzmann theoretical limit of 60 mV / dec. -1 This achieves ultra-steep switching characteristics.

[0034] This invention, through the design of a stacked gate structure consisting of an α-In2Se3 ferroelectric layer and a HfO2 dielectric passivation layer, establishes a matching relationship between the capacitance of the ferroelectric layer, the channel layer, and the dielectric passivation layer. This yields a functional relationship between the internal gate voltage amplification gain and the subthreshold swing, thereby achieving an ultra-steep switching characteristic with a subthreshold swing below the physical limit of 60 mV / dec. The negative capacitance field-effect transistor based on the α-In2Se3 / HfO2 thin film proposed in this invention exhibits advantages such as high stability, high on / off ratio, and ultra-low power consumption, making it suitable for ultra-low power logic and memory applications. Furthermore, by selecting different two-dimensional semiconductor channel materials, device performance can be tuned to meet various application requirements.

[0035] For practical applications, the long-term bias stress stability of a device is a key indicator determining its viability. Under continuous gate bias stress, defect states at the gate insulating layer and interface of a field-effect transistor (FET) can trap channel carriers, leading to reliability issues such as threshold voltage drift, subthreshold swing degradation, and reduced transconductance. In traditional ferroelectric devices, defect states and surface shielding charges at the ferroelectric-semiconductor interface weaken the polarization intensity of the ferroelectric layer, accelerating device performance degradation. This embodiment introduces HfO2 as a dielectric passivation layer, effectively suppressing the defect state density and surface shielding effect at the interface between the ferroelectric layer α-In2Se3 and the channel. Furthermore, the high κ dielectric properties of the HfO2 layer optimize the capacitance matching relationship of the gate stack, thereby significantly improving the long-term operating stability and bias stress tolerance of the device. Therefore, the α-In2Se3 negative capacitance FET optimized based on the HfO2 passivation layer can meet the stringent reliability requirements of ultra-low power logic circuits and memory applications.

[0036] The reliability of the negative capacitance field-effect transistor based on α-In2Se3 / HfO2 thin film proposed in this embodiment is now tested according to the following steps:

[0037] Step 1: Place the negative capacitance field-effect transistor of the prepared α-In2Se3 / HfO2 thin film into a high-precision semiconductor parameter analysis and testing system;

[0038] Step 2: Measure the transfer characteristic curves of the negative capacitance field-effect transistor of the α-In2Se3 / HfO2 thin film prepared in the initial state;

[0039] Step 3: Apply a forward bias voltage V to the device. GS =0.5V, maintained for different times, while simultaneously detecting the source-leakage current I. GS Extract the transfer characteristic curve;

[0040] Step 4: Take another batch of devices and apply a negative bias voltage V. GS =-2V, maintain for different times, and simultaneously detect source-leakage current I. GS Extract the transfer characteristic curve.

[0041] Figure 4 The relationship between the subthreshold swing of the device and the hold time is presented under different bias voltages and scan directions. The images show that under different scan directions and bias voltages, the subthreshold swing of the device in this embodiment does not show significant degradation and remains below 60 mV / dec, demonstrating excellent stability and highlighting the significant reliability advantages of the device in this embodiment.

[0042] Example 2:

[0043] This invention discloses a negative capacitor based on an α-In₂Se₃ / HfO₂ thin film. For example... Figure 5 As shown, the capacitor includes a substrate, a pure gold bottom electrode, a dielectric layer composed of α-In₂Se₃ and HfO₂ thin films, and a pure gold top electrode, forming a metal-ferroelectric-insulator-metal (MFIM) capacitor structure. The capacitor is connected to an external resistor, and pulsed current measurements are used to extract the polarization-electric field (PE) characteristic curve. In this embodiment, the α-In₂Se₃ thickness is approximately 40 nm, and the HfO₂ dielectric layer thickness is approximately 20 nm.

[0044] α-In₂Se₃, as a two-dimensional layered ferroelectric semiconductor material, possesses unique advantages in negative capacitance field-effect transistors (FETs). Firstly, α-In₂Se₃ exhibits stable out-of-plane ferroelectric polarization at room temperature, and its ferroelectricity can be maintained up to several atomic layers thick, enabling extreme miniaturization of devices. Secondly, α-In₂Se₃ has a suitable bandgap, allowing it to form high-quality van der Waals heterojunctions with various two-dimensional semiconductors, which is beneficial for the integrated construction of negative capacitance FETs. Furthermore, α-In₂Se₃ exhibits a fast ferroelectric polarization reversal speed, which is advantageous for high-frequency device applications. The dielectric layer, HfO₂, as a high-κ dielectric material (relative permittivity of approximately 23), not only provides excellent interface passivation but also forms a good lattice match with α-In₂Se₃. Therefore, negative capacitance devices based on α-In₂Se₃ / HfO₂ can meet the application requirements of ultra-low power and high-stability electronic devices.

[0045] The fabrication and characterization steps of a negative capacitor based on α-In2Se3 / HfO2 thin film proposed in this invention include:

[0046] Step 1: Deposit a pure gold bottom electrode on a heavily doped p-type silicon substrate with a SiO2 oxide layer on its surface using electron beam evaporation or thermal evaporation.

[0047] Step 2: Deposit an HfO2 dielectric layer with a thickness of approximately 20 nm above the bottom electrode using atomic layer deposition (ALD).

[0048] Step 3: Prepare α-In2Se3 ferroelectric material sheets using mechanical exfoliation. Transfer the α-In2Se3 sheets to the surface of the HfO2 dielectric layer using a dry transfer method. The thickness is approximately 40 nm.

[0049] Step 4: Deposit a pure gold top electrode on top of the α-In2Se3 ferroelectric layer by electron beam evaporation or thermal evaporation to form a metal-ferroelectric-insulator-metal (MFIM) capacitor structure;

[0050] Step 5: Anneal the fabricated device in an inert atmosphere;

[0051] Step 6: Connect the fabricated device to an external resistor and an arbitrary standard function generator, and apply a pulse electrical signal.

[0052] Figure 6The polarization versus electric field relationship is presented with a pulse width of 140 ns. The PE curve exhibits a distinct "S"-shaped kink in the polarization reversal region, consistent with the typical characteristics of a ferroelectric layer operating in a negative capacitance region. This "S"-shaped curve characteristic closely matches the results of Landau theory fitting, indicating that the α-In₂Se₃ ferroelectric layer indeed operates in a negative capacitance region within this metal-ferroelectric-insulator-metal (MFIM) structure. This confirms the existence of the negative capacitance effect in the α-In₂Se₃ / HfO₂ gate stack and its modulating effect on the device's electrical properties.

[0053] Example 3:

[0054] This embodiment discloses a depletion-type load inverter based on a negative capacitance field-effect transistor using an α-In₂Se₃ / HfO₂ thin film, such as... Figure 7 As shown in the illustration, it mainly consists of two series-connected negative capacitance field-effect transistors, one as the driver and the other as the load. The gate of the load transistor is connected to its source to achieve a pull-up function. For depletion-type load inverters, the voltage transfer characteristics of the inverter need to be optimized by adjusting the channel width-to-length ratio of the driver and load transistors.

[0055] The fabrication and testing steps of the depletion-type load inverter based on the negative capacitance field-effect transistor of α-In2Se3 / HfO2 thin film proposed in this embodiment include:

[0056] Step 1: Fabricate the driving transistor and the load transistor respectively according to the fabrication process of the negative capacitance field-effect transistor of α-In2Se3 / HfO2 thin film described in Example 1;

[0057] Step 2: Dilute the hydrofluoric acid solution (HF:H2O = 1:10) to prepare a diluted solution. Etch test pads and interconnect vias onto the dielectric passivation layer HfO2 using the diluted hydrofluoric acid solution;

[0058] Step 3: Deposit metal and connect the gate of the load transistor to its source;

[0059] Step 4: Place the fabricated inverter circuit into a high-precision semiconductor parameter analyzer testing system and set the supply voltage V. DD The inputs are 0.5 V, 1 V, and 1.5 V, respectively. IN Apply a DC scanning voltage and measure the output V. OUT The voltage response is used to obtain the voltage transfer characteristic (VTC) curve.

[0060] Figure 7 The input voltage V is given for a supply voltage range of 0.1V to 5V. IN With output voltage V OUTThe inverse phase characteristic curve is shown in the figure. As can be seen from the image, the inverter described in this embodiment can achieve clear signal inversion under different supply voltages, exhibiting a clear and steep voltage transfer characteristic. Its maximum gain reaches 59, far exceeding the gain of traditional field-effect transistor inverters at the same voltage. This is mainly attributed to the fast switching characteristics brought about by the ultra-steep subthreshold swing of the α-In2Se3 / HfO2 negative capacitance field-effect transistor.

Claims

1. A negative capacitance field-effect transistor based on α-In₂Se₃ / HfO₂ thin film, characterized in that, include: Substrate, two unconnected source / drain electrodes, channel material, gate dielectric stack, and top gate electrode; The source and drain electrodes are deposited on the substrate, and the channel material is disposed on the source and drain electrodes and the substrate. The gate dielectric stack is obtained by stacking an HfO2 dielectric passivation layer and an α-In2Se3 ferroelectric layer. The HfO2 dielectric passivation layer is directly bonded to the channel material and covers the upper surface of the channel material. The α-In2Se3 ferroelectric layer is in contact with the top gate electrode.

2. The negative capacitance field-effect transistor based on α-In₂Se₃ / HfO₂ thin film according to claim 1, characterized in that: The substrate surface has a dielectric oxide layer.

3. The negative capacitance field-effect transistor based on α-In₂Se₃ / HfO₂ thin film according to claim 1, characterized in that: The channel material is a two-dimensional semiconductor material.

4. A depletion-type load inverter, characterized in that: It consists of two negative capacitance field-effect transistors connected in series. One negative capacitance field-effect transistor is used as the driving transistor, and the other is used as the load transistor. The gate of the load transistor is connected to its source. The negative capacitance field-effect transistor is a negative capacitance field-effect transistor based on an α-In2Se3 / HfO2 thin film as described in any one of claims 1 to 3.

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