Array substrate, display panel and display device

Abstract

The application provides an array substrate, a display panel and a display device. The array substrate provided by the application has a display area and a non-display area. The non-display area at least partially surrounds the display area. The non-display area includes a wire changing area and a bending area. The wire changing area is located between the display area and the bending area. The second metal layer includes a first part and a second part. The first part is located in the display area. The array substrate further includes a protective layer. The protective layer is located on the side of the interlayer insulating layer away from the substrate. The protective layer covers the second part. The second metal layer is protected by the protective layer. The interlayer insulating layer is prevented from being etched through to cause water vapor to invade the second metal layer. The second metal layer is prevented from being corroded and broken. The performance of the array substrate is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to an array substrate, a display panel, and a display device. Background Technology

[0002] OLED (Organic Light-Emitting Diode) is an active-matrix light-emitting device with a sandwich structure consisting of multiple organic layers and electrodes on both sides. Currently, AMOLED (Active-Matrix Organic Light-Emitting Diode) based displays have been commercialized in fields such as smartphones, watches, and laptops.

[0003] However, the performance of existing displays needs to be improved. Summary of the Invention

[0004] In view of this, the purpose of this application is to provide an array substrate that can prevent corrosion of the metal layer and ensure the performance of the array substrate.

[0005] To achieve the above objectives, this application provides an array substrate having a display area and a non-display area, wherein the non-display area at least partially surrounds the display area, and the non-display area includes a line-changing area and a bending area, wherein the line-changing area is located between the display area and the bending area, and the array substrate includes:

[0006] Substrate;

[0007] A second metal layer is located on one side of the substrate. The second metal layer includes a first portion and a second portion, wherein the first portion is located in the display area and the second portion is located in the switching area.

[0008] An interlayer insulating layer is located on the side of the second metal layer away from the substrate and partially located in the switching region;

[0009] A third metal layer is located on the side of the interlayer insulating layer away from the substrate. In the line-changing area, the third metal layer is connected to the second part through a line-changing hole.

[0010] A protective layer is located on the side of the interlayer insulating layer away from the substrate, and the protective layer covers the second portion.

[0011] In one embodiment, the array substrate further includes a passivation layer located on the side of the third metal layer away from the substrate;

[0012] Preferably, the passivation layer includes the protective layer.

[0013] In one embodiment, the array substrate further includes a fourth metal layer located on the side of the passivation layer away from the substrate.

[0014] In one embodiment, the array substrate further includes a planarization layer located between the passivation layer and the fourth metal layer.

[0015] In one embodiment, the third metal layer includes the protective layer.

[0016] In one embodiment, the non-display area further includes a transition area located between the switching area and the display area, and the second metal layer further includes a third portion located in the switching area, wherein the first portion and the second portion are connected through the third portion;

[0017] The third metal layer includes a fourth part and a fifth part, the fourth part being connected to the fifth part, the fourth part being located in the switching area and covering the second part, and the fifth part being located in the transition area and partially covering the third part.

[0018] In one embodiment, the array substrate further includes a first metal layer located between the substrate and the second metal layer.

[0019] In one embodiment, a first insulating layer is further disposed between the first metal layer and the second metal layer.

[0020] Based on the same inventive concept, this application also discloses a display panel comprising the array substrate described in any of the above claims.

[0021] Based on the same inventive concept, this application also discloses a display device, which includes the display panel described in any of the above claims.

[0022] Compared with the prior art, the array substrate provided in this application has a display area and a non-display area. The non-display area at least partially surrounds the display area and includes a line-changing area and a bending area. The line-changing area is located between the display area and the bending area. Its second metal layer includes a first part and a second part. The first part is located in the display area. It also includes a protective layer. The protective layer is located on the side of the interlayer insulating layer away from the substrate. The protective layer covers the second part. The protective layer protects the second metal layer, preventing moisture from entering the second metal layer due to the interlayer insulating layer being etched through, preventing the second metal layer from corroding and cracking, and improving the performance of the array substrate. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of a partial structure of a related array substrate;

[0025] Figure 2 for Figure 1 Schematic diagram of the membrane structure at point A;

[0026] Figure 3 This is a schematic diagram of the structure of an array substrate provided in an embodiment of this application;

[0027] Figure 4 This is a partial structural schematic diagram of an array substrate provided in an embodiment of this application;

[0028] Figure 5 for Figure 4 Schematic diagram of the membrane structure at point B;

[0029] Figure 6 A partial structural schematic diagram of an array substrate provided in another embodiment of this application;

[0030] Figure 7 for Figure 6 Schematic diagram of the membrane structure at point C;

[0031] Figure 8 This is a partial structural schematic diagram of an array substrate provided in another embodiment of this application.

[0032] Marker explanation:

[0033] 100, Array substrate; 110, Display area; 120, Non-display area; 121, Line switching area; 122, Bending area; 123, Transition area; 130, Bonding area; M1, First metal layer; M2, Second metal layer; M3, Third metal layer; M4, Fourth metal layer;

[0034] 10. Substrate;

[0035] 21. Part One; 22. Part Two; 23. Part Three;

[0036] 30. Interlayer insulation layer;

[0037] 41. Cable replacement hole; 42. Part Four; 43. Part Five;

[0038] 50. Protective layer;

[0039] 60. Passivation layer;

[0040] 70. Planarization layer. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with specific embodiments and the accompanying drawings.

[0042] It should be noted that, unless otherwise defined, the technical or scientific terms used in the embodiments of this application should have the ordinary meaning understood by one of ordinary skill in the art to which this application pertains. The terms "first," "second," and similar terms used in the embodiments of this application do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are only used to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0043] With the development of display technology, ultra-narrow bezels are the current main development trend for OLED display panels, which also places increasingly higher demands on the wiring design of display panels. Especially on the bottom bezel of the display panel, due to the very dense wiring, reliability issues can easily occur at the overlapping positions of the film layers.

[0044] Specifically, please refer to Figure 1-2 As shown, a related array substrate includes a display area 110 and a non-display area 120. The array substrate also includes a first metal layer M1, a second metal layer M2, a third metal layer M3, and a fourth metal layer M4 stacked on the substrate. The first metal layer M1 is typically used to form the gate of a transistor in a pixel driving circuit. The first metal layer M1 and the second metal layer M2 are typically used to form the first and second plates of a storage capacitor in the pixel driving circuit. The third metal layer M3 is typically used to form the source / drain of the transistor, bridging lines, and metal power lines. The fourth metal layer M4 is typically used to form metal power lines, and the metal power lines in the third metal layer M3 are connected into a mesh through vias.

[0045] The non-display area 120 includes a line-changing area 121, a bending area 122, and a bonding area 130. To reduce the bezel of the array substrate (typically the bottom bezel), the bonding area 130 is bent to the back side of the array substrate. After bending, the bonding portion 130 needs to be connected to the PCB (printed circuit board) on the back side of the array substrate via an FPC (flexible printed circuit board). An interlayer insulating layer 30 is provided between the second metal layer M2 and the third metal layer M3, and a passivation layer 60 is provided between the third metal layer M3 and the fourth metal layer M4.

[0046] Through long-term research, the inventors discovered that in current array substrates, to ensure the bending performance of the bending region 122, the passivation layer 60 in the bending region 122 needs to be removed. Typically, at point A, the second metal layer M2 is not covered by the passivation layer 60 and the third metal layer M3, causing the passivation layer 60 to be over-etched, affecting the thickness of the interlayer insulating layer 30. The interlayer insulating layer 30 is then etched through, allowing moisture to enter the second metal layer M2, leading to corrosion and breakage of the second metal layer M2.

[0047] Based on this, this application provides an array substrate solution to solve the above problems.

[0048] Please refer to Figure 3-5 As shown, an array substrate 100 provided in an embodiment of this application has a display area 110 and a non-display area 120. The non-display area 120 at least partially surrounds the display area 110. The non-display area 120 includes a line-changing area 121 and a bending area 122. The line-changing area 121 is located between the display area 110 and the bending area 122.

[0049] The array substrate 100 includes a substrate 10, a second metal layer M2, an interlayer insulating layer 30, a third metal layer M3, and a protective layer 50. The second metal layer M2 is located on one side of the substrate 10 and includes a first portion 21 and a second portion 22. The first portion 21 is located in the display area 110, and the second portion 22 is located in the line switching area 121. The interlayer insulating layer 30 is located on the side of the second metal layer M2 away from the substrate 10 and is partially located in the line switching area 121. The third metal layer M3 is located on the side of the interlayer insulating layer 30 away from the substrate 10. In the line switching area 121, the third metal layer M3 is connected to the second portion 22 through a line switching hole 41. The protective layer 50 is located on the side of the interlayer insulating layer 30 away from the substrate 10 and covers the second portion 22.

[0050] The array substrate 100 provided in this embodiment has a display area 110 and a non-display area 120. The non-display area 120 at least partially surrounds the display area 110. The non-display area 120 includes a line-changing area 121 and a bending area 122. The line-changing area 121 is located between the display area 110 and the bending area 122. Its second metal layer M2 includes a first portion 21 and a second portion 22. The first portion 21 is located in the display area 110. The array substrate 100 also includes a protective layer 50. The protective layer 50 is located on the side of the interlayer insulating layer 30 away from the substrate 10. The protective layer 50 covers the second portion 22. The protective layer 50 protects the second metal layer M2, preventing the interlayer insulating layer 30 from being etched through, which would cause moisture to enter the second metal layer M2, and preventing the second metal layer M2 from corroding and breaking, thereby improving the performance of the array substrate 100.

[0051] Wherein, substrate 10 is a flexible substrate, preferably PI (polyimide), and PI has the following characteristics:

[0052] Excellent mechanical properties: It has high tensile strength and good flexibility, and can withstand multiple bends and folds without breaking or degrading in performance. This enables OLED display panels to achieve flexible bending and folding functions, meeting the needs of new display products such as wearable devices and foldable phones.

[0053] High heat resistance: PI has excellent thermal stability and can maintain stable physical and chemical properties in high-temperature environments. Its glass transition temperature is usually above 200℃, which can withstand the high-temperature processes in OLED manufacturing, such as thin film deposition and photolithography. At the same time, it can also resist the impact of environmental temperature changes on display performance during long-term use.

[0054] Good chemical stability: It has strong resistance to common chemical reagents, is not easily corroded by chemicals such as acids and alkalis, and can maintain the integrity and performance stability of materials in complex manufacturing processes and usage environments.

[0055] Low dielectric constant: It has a low dielectric constant, which can reduce capacitive coupling effect during signal transmission, reduce signal delay and energy consumption, and help improve the display performance and response speed of OLED display panels.

[0056] PI has the following functions:

[0057] Providing flexible support: As a flexible substrate, PI provides a flexible support structure for various functional layers in OLED display panels, such as thin-film transistor (TFT) layers and light-emitting layers, enabling the entire display panel to achieve flexible deformation such as bending and rolling, expanding the application scenarios and design space of display products.

[0058] Insulation and isolation: PI has excellent insulation properties, which can effectively isolate different functional layers, prevent short circuits and leakage, ensure that all circuits and devices in the OLED display panel can work normally, and improve the stability and reliability of the display panel.

[0059] Optionally, the interlayer insulating layer 30 is SiOx / SiNx (silicon oxide / silicon nitride). The SiOx / SiNx structure of the interlayer insulating layer 30 is typically formed by depositing one layer of SiNx followed by one layer of SiOx, or by alternating layers. SiNx exhibits high density and good barrier properties, while SiOx provides good planarization and optical properties. Using SiOx / SiNx for the interlayer insulating layer 30 offers the following advantages:

[0060] Excellent insulation properties: Both SiOx and SiNx possess excellent insulation characteristics, effectively preventing current leakage between different metal layers and avoiding short circuits. This is crucial for ensuring the stable operation of complex circuit systems in display panels, ensuring that each pixel unit can accurately receive and process electrical signals, and achieving high-quality image display.

[0061] Strong moisture and impurity barrier capabilities: SiNx exhibits excellent barrier properties against moisture and oxygen, preventing them from penetrating into the metal and organic functional layers. This avoids metal oxidation and degradation of organic materials, thereby extending the lifespan of the display panel. SiOx can serve as an auxiliary barrier layer, further enhancing the overall barrier performance while improving the surface smoothness of the film.

[0062] Excellent stress buffering effect: During the manufacturing and use of display panels, stress is generated due to the difference in thermal expansion coefficients of different materials. The SiOx / SiNx interlayer insulating layer can act as a stress buffer, reducing problems such as film cracking and delamination caused by stress, and improving the mechanical stability and reliability of the display panel.

[0063] Excellent optical performance: SiOx has good optical transparency, which can reduce light absorption and scattering, improve the light transmittance and contrast of the display panel, and help improve the display effect. At the same time, this structure can also regulate light of different wavelengths, optimizing the color performance of the display panel.

[0064] Excellent process compatibility: Both SiOx and SiNx can be fabricated using common processes such as chemical vapor deposition (CVD), exhibiting good compatibility with other manufacturing processes for display panels. This allows for easy integration into existing processes during mass production, improving production efficiency and product yield.

[0065] In one embodiment, the array substrate 100 further includes a passivation layer 60, which is located on the side of the third metal layer M3 away from the substrate 10. The passivation layer 60 serves the following functions:

[0066] Insulation and isolation: Prevents short circuits between metal layers, ensures current conduction between layers according to the designed path, and maintains normal circuit operation. Different metal layers may have different potentials during operation. Without passivation layers for isolation, conductive paths can easily form between them, leading to current leakage or circuit failure.

[0067] Barrier against impurities: External impurities such as moisture, oxygen, and dust can adversely affect the metal layer, such as causing oxidation or reducing its conductivity. The passivation layer acts as a barrier, preventing these impurities from contacting the metal layer, thus improving its stability and lifespan, and ultimately ensuring the stable performance of the OLED display panel.

[0068] Planarization: During the fabrication process, the metal layer may have uneven surfaces, which can affect the uniformity of subsequent thin film deposition and the overall performance of the display panel. A passivation layer can fill these uneven surfaces, providing a smooth surface that facilitates the uniform deposition of other thin film layers in subsequent processes, improving the display quality of the display panel and reducing display defects caused by surface unevenness.

[0069] Stress buffering: In OLED display panels, the differences in physical properties such as the coefficient of thermal expansion between different material layers can generate stress during the heating and cooling processes of manufacturing, as well as during use. Passivation layers can act as stress buffers, reducing material deformation and cracking caused by stress, and improving the structural stability and reliability of the display panel.

[0070] The second metal layer M2 in the non-display area 120 forms data lines and has the following functions:

[0071] Signal transmission: Electrical signals from the display panel driver circuit are transmitted to each pixel unit. These electrical signals contain image data information and are used to control the light emission state of each pixel, such as brightness and color, to ensure that the pixels can accurately display the corresponding image content according to the input signals.

[0072] Connecting to the pixel unit: This connects to the thin-film transistor (TFT) within the pixel unit, specifically to the source or drain of the TFT. Through this connection, the data line provides control voltage and current to the TFT, thereby controlling the TFT's conduction and cutoff, which in turn enables the charging and discharging of the pixel electrodes, ultimately controlling the light emission of the OLED light-emitting device.

[0073] The second metal layer M2 has good conductivity: it is usually made of metals such as molybdenum, titanium, aluminum, copper, and nickel or their stacked combinations. These materials have low resistivity, which can effectively transmit electrical signals, reduce signal loss during transmission, and ensure signal integrity and accuracy.

[0074] Preferably, the passivation layer 60 includes a protective layer 50, that is, when preparing the passivation layer 60, the passivation layer 60 is prepared on top of the second part 22, and the passivation layer 60 covers the second part 22 to prevent the interlayer insulating layer 30 from being etched through, which would cause moisture to invade the second metal layer M2.

[0075] In one embodiment, the array substrate 100 further includes a fourth metal layer M4, which is located on the side of the passivation layer 60 away from the substrate 10.

[0076] Optionally, the third metal layer M3 is used to form the source / drain, bridge wire and metal power line of the transistor, and the fourth metal layer M4 is used to form the metal power line, and the metal power line in the third metal layer M3 is connected into a mesh through vias.

[0077] The fourth metal layer M4 connects the metal power lines in the third metal layer M3 into a mesh through vias, and has the following functions:

[0078] Reducing power line impedance: When the metal power lines form a mesh structure, the current transmission path increases, which is equivalent to multiple power lines connected in parallel. According to the principle of parallel resistance, the total impedance will be significantly reduced. This helps to reduce the power consumption of the power signal during transmission, thereby reducing the overall power consumption of the display panel.

[0079] A more uniform voltage distribution: Reducing the impedance of the power lines minimizes the voltage differences in the power signal across different areas of the display. In OLED display panels, each pixel unit receives a more stable and uniform power supply, resulting in more uniform brightness and improved display quality.

[0080] Improved wiring flexibility: In display panel design, different circuit modules and pixel units have different requirements for the connection method and location of power lines. Through the mesh connection of the power lines in the fourth metal layer and the third metal layer M3, power lines can be flexibly connected in different areas as needed, better meeting the requirements of complex circuit layouts and improving wiring flexibility and design freedom.

[0081] Enhanced circuit reliability: When a power line experiences a fault such as an open circuit, the mesh structure provides multiple current transmission paths, allowing the current to continue to be transmitted through other paths. This improves the reliability and stability of the entire power circuit and reduces the risk of display panel failure due to a single line fault.

[0082] Reference Figure 5 As shown, in one embodiment, the array substrate 100 further includes a planarization layer 70, which is located between the passivation layer 60 and the fourth metal layer.

[0083] The planarization layer 70 mainly serves the following functions:

[0084] Providing a smooth surface: During the manufacturing process of the display panel, the surface of the passivation layer 60 may have some unevenness or microstructural differences. The planarization layer 70 can fill these tiny depressions and protrusions, providing a smooth surface for the deposition of the fourth metal layer. This helps ensure the uniformity and continuity of the thickness of the fourth metal layer, avoiding problems such as thickness variations, breakage, or short circuits in the fourth metal layer due to unevenness of the underlying layer, thereby improving the performance and reliability of the metal power lines.

[0085] Improved Thin Film Growth: A flat surface facilitates the formation of a uniform and dense thin film structure during the deposition of the fourth metal layer. Metal atoms are more easily and uniformly distributed and crystallized on a flat surface, reducing defects and porosity in the film and improving the conductivity and mechanical strength of the metal layer. Simultaneously, it also facilitates subsequent thin film deposition processes that may be performed on the fourth metal layer, such as the growth of insulating or protective layers, ensuring the stability and performance of the entire structure.

[0086] Reducing signal transmission interference: If the surface of the passivation layer 60 is uneven, the contact area and contact resistance between the fourth metal layer and the passivation layer 60 will be uneven. This may cause local electric and magnetic field changes when current is transmitted in the metal power lines, thereby causing signal transmission distortion or interference. The presence of the planarization layer 70 can make the contact between the fourth metal layer and the passivation layer 60 more uniform, reduce the difference in contact resistance, reduce electromagnetic interference during signal transmission, improve the transmission quality of power signals, and ensure that each pixel unit of the display panel can receive a stable and consistent power supply.

[0087] Enhancing structural stability: The planarization layer 70 acts as a buffer and support between the passivation layer 60 and the fourth metal layer. It can withstand a certain amount of mechanical stress, reducing the risk of interlayer delamination or cracking caused by differences in the thermal expansion coefficients of different materials or external mechanical forces. Especially in flexible OLED display panels, the planarization layer 70 is of great significance for improving the flexibility and bending resistance of the entire structure, helping to extend the lifespan of the display panel.

[0088] Reference Figure 6 and 7As shown, in one embodiment, the third metal layer M3 includes a protective layer 50. That is, when preparing the third metal layer M3, the third metal layer M3 is prepared above the second portion 22, and the third metal layer M3 covers the second portion 22 to prevent the interlayer insulating layer 30 from being etched through, which would cause moisture to invade the second metal layer M2.

[0089] In one embodiment, the non-display area 120 further includes a transition area 123 located between the switching area 121 and the display area 110. The second metal layer M2 further includes a third portion 23 located in the switching area 121, and the first portion 21 and the second portion 22 are connected through the third portion 23. The third metal layer M3 includes a fourth portion 42 and a fifth portion 43 connected to each other. The fourth portion 42 is located in the switching area 121 and covers the second portion 22, and the fifth portion 43 is located in the transition area 123 and partially covers the third portion 23.

[0090] Specifically, the third metal layer M3 not only covers the second part 22, but also extends a portion towards the display area 110 to form the fifth part 43. The fifth part 43 partially covers the third part 23, which can prevent the interlayer insulation layer 30 at the junction of the transition area 123 and the switching area 121 from being etched through.

[0091] Furthermore, the passivation layer 60 is partially located in the transition region 123 and covers the second metal layer M2 in the transition region 123.

[0092] Reference Figure 8 As shown, in one embodiment, the array substrate 100 further includes a first metal layer M1, which is located between the substrate 10 and the second metal layer M2. Optionally, the first metal layer M1 is used to form the gate of a transistor in a pixel driving circuit, and the first metal layer M1 is also used to form the electrode of a storage capacitor in the pixel driving circuit.

[0093] In the non-display area 120, the first metal layer M1 forms the data lines. In the non-display area 120, signals from external circuits such as the driver chip need to be transmitted to the various pixel units of the display area 110. Distributing the data lines across the first metal layer M1 and the second metal layer M2 increases the flexibility and density of the wiring. For example, some data lines can be arranged along one direction on the first metal layer M1, while other related data lines or their branches can be arranged along different directions on the first metal layer M1. Electrical connections between the two layers are achieved through structures such as vias, thereby optimizing the signal transmission path, avoiding mutual interference between different signal lines, and improving the stability and reliability of signal transmission.

[0094] Meanwhile, the space in the non-display area 120 is limited, especially in high-resolution, narrow-bezel OLED display panels. Using two metal layers, the first metal layer M1 and the second metal layer M2, to form the data lines allows for more lines to be arranged within the same space. For example, for some high-density drive circuit connections, data lines that would otherwise require a large space in a single metal layer can be arranged in layers, the first metal layer M1 and the second metal layer M2, reducing the horizontal wiring width and saving space in the non-display area 120. This facilitates a narrower bezel design and increases the screen-to-body ratio of the display panel.

[0095] Secondly, different metal layers can have different properties. For example, the first metal layer M1 might be made of a highly conductive metal such as copper, used for primary data signal transmission to reduce resistance and minimize signal loss during transmission. The second metal layer M2, on the other hand, could be made of metals like molybdenum or titanium, which offer better corrosion resistance and stability, used for auxiliary data lines or connections to other circuit components. This approach fully leverages the advantages of different metal materials, improving the overall performance and reliability of the data line circuit. Furthermore, the two-layer metal structure of the data line can increase its resistance to electromagnetic interference, reducing the impact of external electromagnetic fields on data signals and minimizing electromagnetic radiation interference to other circuits.

[0096] Optionally, both the first metal layer M1 and the second metal layer M2 are made of molybdenum. The main reasons are as follows:

[0097] Excellent conductivity: Molybdenum has excellent electrical conductivity and relatively low resistivity. This helps to efficiently transmit electrical signals when the first and second metal layers are used as transmission lines such as data lines, reducing signal loss during transmission and ensuring that each pixel unit of the display panel can receive the drive signal quickly and accurately, thereby achieving high-quality image display.

[0098] Strong adhesion to the substrate: Molybdenum can bond tightly to substrate materials such as glass. During the manufacturing process of display panels, this strong adhesion ensures the stability of the metal layer on the substrate, preventing the metal layer from peeling off in subsequent processing steps or during use, thus improving the reliability and durability of the display panel.

[0099] Excellent high temperature resistance: Molybdenum has an extremely high melting point (2623℃). During high-temperature processes in the manufacturing of display panels, such as coating and annealing, it can maintain stable physical and chemical properties and will not deform, melt, or react chemically with other materials due to high temperatures. This helps to ensure the structural integrity and performance stability of the metal layer.

[0100] Strong corrosion resistance: Molybdenum exhibits excellent corrosion resistance to certain chemicals. During the production of display panels, various chemical reagents are encountered. The molybdenum metal layer can resist the erosion of these chemicals, thus ensuring that the performance of the metal layer is not affected. It also avoids interference with the performance of the display panel caused by impurities resulting from corrosion.

[0101] Excellent etchability: Molybdenum can be precisely formed into various patterns and lines through processes such as photolithography and etching, meeting the complex circuit structures and wiring requirements in display panels. It can be precisely etched into metal lines of different widths and shapes, which helps improve the integration and resolution of display panels, while also ensuring the accuracy and stability of the circuitry.

[0102] In one embodiment, a first insulating layer is further disposed between the first metal layer M1 and the second metal layer M2. The first insulating layer has the following function:

[0103] Electrical isolation: The insulating layer prevents current from being directly conducted between the first and second metal layers, ensuring that current flows along its designed path within each metal layer and its connected circuits. This prevents short circuits between the two metal layers, ensuring the proper functioning of different circuits. For example, it prevents incorrect current paths between data lines (formed by the first and second metal layers) and circuits connected to other metal layers, thereby improving the stability and reliability of the display panel.

[0104] Preventing signal interference: The insulating layer reduces the electromagnetic coupling effect between two metal layers. When current flows through the metal layers, an electromagnetic field is generated. Without the isolation of the insulating layer, the electromagnetic fields between the first and second metal layers may interfere with each other, leading to signal distortion or crosstalk. The presence of the insulating layer effectively weakens this electromagnetic interference, ensuring the accurate transmission of data signals and other control signals, and improving the display quality of the display panel.

[0105] Support and Protection: The insulating layer provides mechanical support to the upper and lower metal layers, making them structurally more stable. Simultaneously, it protects the metal layers from external environmental factors, such as moisture and oxygen, preventing oxidation and extending the lifespan of the metal layers. This, in turn, improves the overall reliability and stability of the display panel.

[0106] Planarization: During the manufacturing process of display panels, the deposition of various material layers may result in uneven surfaces. Insulating layers can fill in the tiny bumps and depressions on the surface of metal layers, thus planarizing them. This provides a smooth surface for subsequent metal layer deposition, improving the uniformity and density of the metal layers and further enhancing the performance of the display panel.

[0107] Typically, the insulating material used between the first and second metal layers needs to possess good insulation properties, high dielectric strength, and good thermal and chemical stability. Common materials include silicon nitride and silicon oxide. These materials can be used to form a uniform and dense insulating film between the metal layers through processes such as chemical vapor deposition and physical vapor deposition.

[0108] The insulating layer prevents short circuits caused by direct contact between different metal layers, ensuring that the electrical characteristics of each metal layer are not disturbed and maintaining normal circuit function. At the same time, it reduces signal interference between adjacent metal layers, improving display quality.

[0109] Optionally, both the third metal layer M3 and the fourth metal layer are made of Ti / Al / Ti (titanium / aluminum / titanium). The main reasons are as follows:

[0110] High conductivity: Aluminum has good conductivity and low resistivity, which can effectively transmit current, meet the high current transmission requirements of metal power lines in display panels, reduce resistance loss on the lines, improve power transmission efficiency, and provide a stable power supply for each pixel unit of the display panel.

[0111] Excellent mechanical properties: Titanium possesses high strength, high hardness, and good toughness. When combined with aluminum to form a Ti / Al / Ti structure, it can improve the mechanical strength and stability of the entire metal layer while ensuring its conductivity. This helps prevent the metal layer from deforming, cracking, or detaching due to external forces during the manufacturing or use of the display panel, thus improving the reliability and durability of the display panel.

[0112] High corrosion resistance: Titanium possesses excellent corrosion resistance, resisting the erosion of oxygen, moisture, and various chemicals that may be encountered during the manufacturing process of the display panel. In the Ti / Al / Ti structure, the titanium layer acts as a protective layer for the aluminum layer, preventing the aluminum from being oxidized or corroded, thereby extending the service life of the metal layer and ensuring the long-term stability of the display panel's performance.

[0113] Excellent adhesion to substrates and insulating layers: Titanium exhibits good adhesion to substrate materials such as glass and commonly used insulating layer materials (such as silicon nitride and silicon oxide). During the manufacturing process of display panels, the Ti / Al / Ti structured third metal layer can tightly bond with the substrate and insulating layer, forming a stable structure. This avoids problems such as delamination and blistering caused by weak interlayer bonding, thus improving the overall quality and reliability of the display panel.

[0114] Excellent compatibility with other metal layers: The Ti / Al / Ti structure exhibits good chemical and process compatibility with other metal layers in the display panel (such as the first, second, and fourth metal layers). It can be precisely patterned and connected with other metal layers through appropriate processes (such as photolithography and etching) to form complex circuit structures and realize various functions of the display panel. For example, when connecting the metal power lines in the third metal layer to the fourth metal layer in a mesh structure via vias, the Ti / Al / Ti structure can bond well with the fourth metal layer, ensuring smooth and stable current transmission.

[0115] Excellent machinability: The Ti / Al / Ti structure offers excellent machinability, facilitating patterning through processes such as photolithography and etching. This allows for the precise formation of metal lines of various shapes and sizes to meet the complex circuit layouts and design requirements of display panels. Aluminum's relatively soft texture makes it easy to etch intricate patterns, while the titanium layer provides protection and support during etching, ensuring the precision and quality of the pattern. This contributes to improved integration and resolution of display panels while simultaneously reducing manufacturing complexity and costs.

[0116] Based on the same inventive concept, another embodiment of this application discloses a display panel, which includes the array substrate 100 as described in the above embodiment.

[0117] The display panel provided in this embodiment has an array substrate 100 with a display area 110 and a non-display area 120. The non-display area 120 at least partially surrounds the display area 110 and includes a line-changing area 121 and a bending area 122. The line-changing area 121 is located between the display area 110 and the bending area 122. The second metal layer M2 includes a first portion 21 and a second portion 22. The first portion 21 is located in the display area 110. The array substrate 100 also includes a protective layer 50. The protective layer 50 is located on the side of the interlayer insulating layer 30 away from the substrate 10. The protective layer 50 covers the second portion 22. The protective layer 50 protects the second metal layer M2, preventing the interlayer insulating layer 30 from being etched through, which would cause moisture to enter the second metal layer M2, and preventing the second metal layer M2 from corroding and breaking, thereby improving the performance of the display panel.

[0118] In one embodiment, the display panel further includes an encapsulation layer located on the side of the fourth metal layer away from the substrate 10. The encapsulation layer comprises a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer stacked together, sequentially positioned away from the substrate 10. Preferably, the first and third encapsulation layers comprise inorganic materials, and the second encapsulation layer comprises organic materials, achieving an inorganic-organic-inorganic three-layer encapsulation to ensure effective encapsulation. The inorganic encapsulation can be prepared using chemical vapor deposition, which improves the density and encapsulation effect of the encapsulation layer, while the organic encapsulation can be prepared using inkjet printing.

[0119] Based on the same inventive concept, another embodiment of this application discloses a display device, which includes the display panel in the above embodiment. Furthermore, the display device includes mobile phones, VR devices, computers, televisions, in-vehicle display devices, etc.

[0120] The display device provided in this embodiment has an array substrate 100 in its display panel, which has a display area 110 and a non-display area 120. The non-display area 120 at least partially surrounds the display area 110 and includes a line-changing area 121 and a bending area 122. The line-changing area 121 is located between the display area 110 and the bending area 122. Its second metal layer M2 includes a first portion 21 and a second portion 22. The first portion 21 is located in the display area 110. The array substrate 100 also includes a protective layer 50. The protective layer 50 is located on the side of the interlayer insulating layer 30 away from the substrate 10. The protective layer 50 covers the second portion 22. The protective layer 50 protects the second metal layer M2, preventing the interlayer insulating layer 30 from being etched through, which would cause moisture to enter the second metal layer M2, and preventing the second metal layer M2 from corroding and breaking, thereby improving the performance of the display device.

[0121] Although this application has been described in conjunction with specific embodiments thereof, many substitutions, modifications and variations of these embodiments will be apparent to those skilled in the art from the foregoing description.

[0122] It should be noted that the above description describes some embodiments of this application. Other embodiments are within the scope of the appended claims. In some cases, the actions or steps recorded in the claims can be performed in a different order than that shown in the above embodiments and still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require a specific or sequential order to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0123] The embodiments of this application are intended to cover all such substitutions, modifications, and variations that fall within the broad scope of the appended claims. Therefore, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the embodiments of this application should be included within the protection scope of this application.

Claims

1. An array substrate, characterized in that, The array substrate comprises a display area and a non-display area, wherein the non-display area at least partially surrounds the display area, and the non-display area includes a line-changing area and a bending area, the line-changing area being located between the display area and the bending area. Substrate; A second metal layer is located on one side of the substrate. The second metal layer includes a first portion and a second portion, wherein the first portion is located in the display area and the second portion is located in the switching area. An interlayer insulating layer is located on the side of the second metal layer away from the substrate and partially located in the switching region; A third metal layer is located on the side of the interlayer insulating layer away from the substrate. In the line-changing area, the third metal layer is connected to the second part through a line-changing hole. A protective layer is located on the side of the interlayer insulating layer away from the substrate, and the protective layer covers the second portion.

2. The array substrate according to claim 1, characterized in that, The array substrate further includes a passivation layer located on the side of the third metal layer away from the substrate; Preferably, the passivation layer includes the protective layer.

3. The array substrate according to claim 2, characterized in that, The array substrate further includes a fourth metal layer located on the side of the passivation layer away from the substrate.

4. The array substrate according to claim 3, characterized in that, The array substrate further includes a planarization layer located between the passivation layer and the fourth metal layer.

5. The array substrate according to claim 1, characterized in that, The third metal layer includes the protective layer.

6. The array substrate according to claim 5, characterized in that, The non-display area also includes a transition area, which is located between the switching area and the display area. The second metal layer also includes a third part, which is located in the switching area. The first part and the second part are connected through the third part. The third metal layer includes a fourth part and a fifth part, the fourth part being connected to the fifth part, the fourth part being located in the switching area and covering the second part, and the fifth part being located in the transition area and partially covering the third part.

7. The array substrate according to claim 1, characterized in that, The array substrate further includes a first metal layer, which is located between the substrate and the second metal layer.

8. The array substrate according to claim 7, characterized in that, A first insulating layer is also provided between the first metal layer and the second metal layer.

9. A display panel, characterized in that, Includes the array substrate as described in any one of claims 1-8.

10. A display device, characterized in that, Includes the display panel as described in claim 9.

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