Photovoltaic cell and method of manufacture, photovoltaic module and photovoltaic system

Abstract

The embodiment of the application discloses a kind of photovoltaic cell, photovoltaic module and photovoltaic system, belong to photovoltaic cell technical field.Photovoltaic cell at least one side in first direction includes first area and second area that are alternately distributed in turn, the width of first area is greater than the width of second area;First area has PN junction, and second area does not have PN junction;In thickness direction, the height of first area is higher than the height of second area, and height difference is 0.5 μm to 20 μm;The area covered by first area by first texture structure is not less than 70%;The area covered by second area by second texture structure is not more than 10%;First area and second area are covered at least with passivation layer.By not setting PN junction in cutting area, emission junction is not damaged when cutting, eliminate cell edge leakage current and carrier recombination, improve open-circuit voltage and conversion efficiency;While cutting area uses less texture structure, avoid the stress concentration caused by it, reduce the defect in laser scribing, fragmentation process.

Description

Technical Field

[0001] This application relates to the field of photovoltaic cell technology, and more specifically, to a photovoltaic cell and its preparation method, a photovoltaic module and a photovoltaic system. Background Technology

[0002] As the photovoltaic industry iterates towards larger sizes, thinner wafers, and higher efficiency, the laser cutting damage problem in the solar cell dicing process has become increasingly prominent, becoming a key bottleneck restricting cell yield and reliability.

[0003] Traditional laser dicing technology uses high-energy-density pulsed lasers to ablate the surface of silicon wafers to achieve material separation. The essence of this process is to utilize laser energy to deposit in a localized area of ​​the silicon material within an extremely short time, generating instantaneous high temperatures and ultra-high temperature gradients. Physical grooves are formed through material melting, vaporization, and plasma jetting. However, this high-energy ablation method inevitably generates a significant heat-affected zone, typically several times wider than the physical groove width. This leads to silicon wafer lattice distortion, edge chipping, and microcrack formation, not only reducing the mechanical strength of the battery but also creating carrier recombination centers, causing a decrease in conversion efficiency. In conventional whole-wafer silicon wafers with PN junctions, the dicing path directly severs the front-side emitter PN junction during laser / mechanical dicing. The cut surface generates numerous silicon dangling bonds, lattice damage, and microcracks. Photogenerated carriers recombine rapidly at the cut edge, simultaneously forming edge leakage current and reducing the open-circuit voltage (Voc) and fill factor (FF).

[0004] Therefore, ensuring that the emission junction is not damaged during laser scribing and reducing the cutting damage and efficiency loss caused by laser scribing are urgent problems that need to be solved in this field. Summary of the Invention

[0005] This application provides a photovoltaic cell and its preparation method, a photovoltaic module and a photovoltaic system, which can solve the problems of emission junction damage, cutting damage and efficiency reduction caused by laser scribing.

[0006] In a first aspect, a photovoltaic cell is provided, the photovoltaic cell having a front side and a back side, and in a first direction, at least one side includes a first region and a second region that are alternately distributed in sequence, the width of the first region being greater than the width of the second region; the first region has a PN junction, and the second region does not have a PN junction; In the thickness direction of the photovoltaic cell, the height of the first region is higher than the height of the second region, and the height difference between the first region and the second region is 0.5 μm to 20 μm; the first region includes a first texture structure, and the area of ​​the first region covered by the first texture structure is not less than 70%; the second region includes a second texture structure, and the area of ​​the second region covered by the second texture structure is not greater than 10%; the first region and the second region are at least covered with a passivation layer. In a two-dimensional plane, the first direction is perpendicular to the thickness direction of the photovoltaic cell.

[0007] The photovoltaic cell provided in this application embodiment eliminates the PN junction in the cutting groove area (i.e., the second region), allowing laser cutting to act only on the intrinsic silicon wafer substrate. This prevents damage to the emitter junction during slab cutting, eliminating edge leakage current and edge carrier recombination at the source, thereby improving the open-circuit voltage and conversion efficiency of the cell. At the same time, the cutting groove area uses less texture structure to avoid stress concentration caused by unevenness of the texture structure, reducing edge chipping, hidden cracks, and fragmentation defects during laser grooving and mechanical dicing, and improving production yield. The effective light-receiving area (i.e., the first region) retains a large area of ​​texture structure to reduce light reflection, ensure the light absorption capacity of the silicon wafer, and prevent loss of short-circuit current.

[0008] In some embodiments, the first texture structure is a first velvet structure having a plurality of first pyramids, and the second texture structure is a second velvet structure having a plurality of second pyramids; and / or, wherein the orthographic one-dimensional average size of the first pyramid is greater than the orthographic one-dimensional average size of the second pyramid.

[0009] In some embodiments, the average size of the orthographic projection of the first pyramid is 0.5 μm to 5 μm; and / or, the average size of the orthographic projection of the second pyramid is 0.3 μm to 5 μm.

[0010] In some embodiments, the first region has at least a serrated structure at a position near the edge of the second region, the serrated structure protruding into the second region.

[0011] In some embodiments, the ratio of the width of the second region along the first direction to the width of the photovoltaic cell is 2.7 × 10⁻⁶. -5 Up to 1.2×10 -4 .

[0012] In some embodiments, the ratio of the height of the second region along the second direction to the thickness of the photovoltaic cell is 0.0092 to 0.0654.

[0013] In some embodiments, the first region and the second region are connected by a ramp surface, which is a textured surface or a polished surface.

[0014] In some embodiments, the angle between the ramp surface and the surface of the second region is 91° to 165°; and / or, the surface of the ramp surface is covered with a passivation layer.

[0015] Secondly, a method for preparing a photovoltaic cell is provided, comprising the following steps: A pretreated initial silicon wafer substrate is provided, the initial silicon wafer substrate having a front side and a back side; at least one side of the initial silicon wafer substrate includes a first region and a second region that are alternately distributed in a first direction, the width of the first region being greater than the width of the second region; The initial silicon wafer substrate is processed to form a first texture structure in the first region and a second texture structure in the second region; wherein the first texture structure covers an area of ​​not less than 70% of the first region and the second texture structure covers an area of ​​not more than 10% of the second region. A PN junction is present on the surface of the initial silicon wafer substrate; The initial silicon wafer substrate is subjected to laser etching to form a second region without a PN junction in the laser-etched area; in the thickness direction of the photovoltaic cell, the height of the first region is higher than the height of the second region, and the height difference between the first region and the second region is 0.5 μm to 20 μm; After forming the second region without a PN junction, subsequent fabrication is carried out to form a complete photovoltaic cell; and the first region and the second region are at least covered with a passivation layer; The first texture structure covers an area of ​​not less than 70% of the first region, and the second texture structure covers an area of ​​not more than 10% of the second region.

[0016] The photovoltaic cell manufacturing method provided in this application adds a laser scribing process after oxidation to create a groove at the cut point on the cell surface. The subsequent passivation process can cover this groove, passivating the laser-scibing area and repairing the groove damage. There is no PN junction in the grooved cutting area, and the cutting only acts on the intrinsic silicon substrate without damaging the emitter junction. This avoids edge leakage and edge carrier recombination from the source, improving cell conversion efficiency. Compared with direct cutting and scribing, laser scribing causes relatively less cell cutting damage, reducing edge chipping, microcracks, and fragmentation rates, improving process yield, and relatively reducing the reduction in module power.

[0017] In some embodiments, after forming the second region without a PN junction, subsequent fabrication to form a complete photovoltaic cell includes: After forming the second region without a PN junction, the borosilicate glass layer at the back and edges is removed, the borosilicate glass layer on the front is retained as a mask, and the back is polished. Phosphorus diffusion forms N on the back side + Layers of silicon carbide and phosphorus glass are used to construct the back surface field; Remove the phosphosilicate glass layer and the borosilicate glass layer on the front and edges; A first passivation layer and an anti-reflection layer are formed on the front side; wherein the first passivation layer covers the front side and the second region; A second passivation layer is formed on the back side; A first electrode and a second electrode are formed on the front side and the back side, respectively, to complete the fabrication of the battery cell.

[0018] Thirdly, a segmented solar cell is provided, which is prepared by segmenting a photovoltaic cell along a second region as described in any of the above embodiments to form sub-cells, wherein the number of the second regions is N, the number of sub-cells formed is N+1, and the second region is the slicing path of the photovoltaic cell.

[0019] In some embodiments, the segmented battery has a front and a back, and includes a first region and a third region in a first direction, wherein the first region has a PN junction and the third region does not have a PN junction; In the thickness direction of the photovoltaic cell, the height of the first region is higher than the height of the third region, and the height difference between the first region and the third region is 0.5 μm to 20 μm; the first region includes a first texture structure, and the area of ​​the first region covered by the first texture structure is not less than 70%; the third region includes a second texture structure, and the area of ​​the third region covered by the second texture structure is not greater than 10%; the first region and the third region are at least covered with a passivation layer. In a two-dimensional plane, the first direction is perpendicular to the thickness direction of the segmented battery.

[0020] Fourthly, a photovoltaic module is provided, including segmented cells as described in the above embodiments.

[0021] Fifthly, a photovoltaic system is provided, including the photovoltaic module as described in the above embodiments. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the structure of the photovoltaic cell provided in this application; Figure 2 This is a flowchart of the method according to this application; Figure 3 It is a SEM image of the second region formed after laser scribing according to the method of the present invention; wherein the magnification is 150 times; Figure 4 This is a partial side-view SEM image of the cut surface after laser dicing according to the method of this application; wherein the magnification is 1000x; Figure 5 This is a top-view SEM image of the isolation groove formed after laser scribing of a photovoltaic cell and the non-laser scribing area; the magnification is 3000x. Figure 6 This is a front view of the pyramid structure according to this application; Figure 7 This is a top view of the pyramid structure according to this application; Figure 8 This is a cross-sectional SEM image of a photovoltaic cell with laser scribing; the magnification is 1000x. Figure 9 This is a SEM image of the laser-scribed cross-section of the segmented solar cell after laser dicing; the magnification is 2000x. Figure 10 This is a cross-sectional view of the segmented battery provided in this application; Figure 11 This application provides a schematic diagram of the photovoltaic system modules; Figure 12 This is a schematic diagram of the photovoltaic module provided in this application. Figure 13 This is an exploded view of the photovoltaic module provided in this application; The accompanying drawings are not drawn to scale.

[0023] Figure label: 1: First surface; 2: Second side; 3: Sloping surface; 4: Second surface; 5: Photovoltaic module; 6: First zone; 7: Second zone; 8: First pyramid; 9: Second pyramid; 10: Segmented cell; 11: Serrated structure; 12: Electrode; 100: First encapsulating film; 200: Cell string layer; 400: Second encapsulating film; 500: Back cover; 600: Front cover; 1000: Photovoltaic system. Detailed Implementation

[0024] The descriptions of specific structures or functions implemented according to the concept of this application disclosed in this specification are merely illustrative examples for explaining embodiments based on the concept of this application. Those skilled in the art will understand that embodiments based on the concept of this application can have various variations and forms, and are not limited to the embodiments described in this specification, but also include various modifications, equivalents, or substitutions made within the scope of the purpose, concept, and technology of this application.

[0025] In the description of this application, it should be understood that the use of terms such as "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", and "circumferential" indicates the relative orientation or positional relationship between different components, and is only for the convenience of describing this application and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0026] Although the terms "first" or "second" may be used to describe various components or components, the components or components should not be limited by the terms. The terms above are used only for the purpose of distinguishing one component or component from another. For example, without departing from the scope of the claims according to the concept of this application, a first battery cell may be referred to as a second battery cell, and similarly, a second battery cell may be referred to as a first battery cell.

[0027] In this application, unless otherwise expressly specified and limited, the terms "connected," "fixed," "set," etc., should be interpreted broadly. For example, when one component is said to "connect" another component, it should be understood that it can be directly or indirectly connected to the other component, meaning that other components may also be present in between. Similarly, the terms "fixed" and "set" should be interpreted broadly in a similar way. Furthermore, the term "connected" can refer to a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. In this application, unless otherwise expressly specified and limited, the description of "above" or "below" the second feature can mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, "above," "on top of," and "over" the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. The first feature being "below", "under", or "below" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0028] In this application, "first direction" refers to the X-axis direction of a Cartesian coordinate system; and "second direction" refers to the Y-axis direction of a Cartesian coordinate system.

[0029] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the specific embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0030] The researchers involved in this application discovered that traditional laser dicing techniques employ high-energy ablation, which generates a significant heat-affected zone due to the instantaneous high temperature. This leads to silicon wafer lattice distortion, edge chipping, and microcrack formation, reducing the mechanical strength of the battery and creating carrier recombination centers, resulting in decreased conversion efficiency. In conventional whole-wafer silicon wafers with PN junctions, the dicing path directly severs the front-side emitter PN junction during laser / mechanical dicing. This results in numerous silicon dangling bonds, lattice damage, and microcracks at the dicing surface. Photogenerated carriers recombine rapidly at the dicing edge, simultaneously creating edge leakage current and reducing the open-circuit voltage (Voc) and fill factor (FF).

[0031] Based on this, this application provides a photovoltaic cell that, by not setting a PN junction in the grooved area (i.e., the second region), laser cutting only acts on the intrinsic silicon wafer substrate, and will not damage the emitter junction during slab cutting, thereby eliminating edge leakage current and edge carrier recombination at the source, and improving the open-circuit voltage and conversion efficiency of the cell; at the same time, the grooved area adopts less texture structure, avoiding stress concentration caused by unevenness of texture structure, reducing edge chipping, hidden cracks and fragmentation defects during laser grooving and mechanical dicing, and improving production yield; the effective light-receiving area (i.e., the first region) retains a large area of ​​texture structure, reducing light reflection, ensuring the light absorption capacity of the silicon wafer, and not losing short-circuit current.

[0032] Reference Figure 1 The photovoltaic cell of this application has a front side and a back side. In a first direction, at least one side includes a first region 6 and a second region 7 that are alternately distributed in sequence. The width of the first region 6 is greater than the width of the second region 7. The first region 6 has a PN junction, and the second region 7 does not have a PN junction. In the thickness direction of the photovoltaic cell, the height of the first region 6 is higher than the height of the second region 7, and the height difference between the first region 6 and the second region 7 is 0.5 μm to 20 μm; the first region 6 includes a first texture structure, and the area of ​​the first region 6 covered by the first texture structure is not less than 70%; the second region 7 includes a second texture structure, and the area of ​​the second region 7 covered by the second texture structure is not greater than 10%; the first region 6 and the second region 7 are at least covered with a passivation layer. In a two-dimensional plane, the first direction is perpendicular to the thickness direction of the photovoltaic cell.

[0033] In this application, depending on the slab design type of the entire photovoltaic cell, the photovoltaic cell can have different numbers of first zones 6 and second zones 7. For example, when the photovoltaic cell is a 2-slab cell, it can have two first zones 6 and a second zone 7 located between the two first zones 6. Figure 1This situation is illustrated schematically. When the photovoltaic cell is a 3-segment cell, it can have three first zones 6 and two second zones 7, with each second zone 7 located between two adjacent first zones 6; that is, the photovoltaic cell has a structure of first zone 6 / second zone 7 / first zone 6 / second zone 7 / first zone 6. In summary, when the photovoltaic cell is an N-segment cell, it can have N first zones 6 and N-1 second zones 7.

[0034] Region 6 of the first area refers to the effective light-receiving region of the photovoltaic cell. A complete PN junction structure is formed within this region to achieve the generation and separation of photogenerated carriers, and it is the main photoelectric conversion functional region of the photovoltaic cell. For example... Figure 1 As shown, the first region 6 includes a first texture structure. The first region 6 of this application, by setting a texture structure with high coverage, enhances the light-trapping effect and reduces reflectivity, thereby improving the short-circuit current and conversion efficiency of the battery. Preferably, the area of ​​the first region 6 covered by the first texture structure is not less than 70%.

[0035] The second region 7 refers to the cutting area of ​​the photovoltaic cell. No PN junction is formed in this area, which serves as the cutting path for subsequent cell cleaving. If a PN junction exists in the second region 7, the silicon layer in the cutting area is thin and severely damaged, and the carriers generated by sunlight cannot be effectively collected, increasing recombination losses. Removing the PN junction eliminates the generation of ineffective carriers in this area, reducing the overall recombination current. The cutting edge has no damaged PN junction and no exposed damaged emitter, making it difficult for moisture and sodium ions to penetrate the cell after encapsulation. This significantly suppresses potential-induced degradation (PID) and efficiency degradation caused by high-temperature and humid aging, extending the module's outdoor lifespan. In this application, the second region 7 is a recessed groove structure inwards into the cell. The sidewalls and bottom of the groove can be perpendicular or at an angle. Figure 1 The diagram shows a structure in which the sidewalls of the groove are perpendicular to the bottom of the groove.

[0036] The second region 7 includes a second texture structure. Preferably, the second region 7 retains only a small amount of the second texture structure or no second texture structure at all, resulting in uniform deposition of the alumina / silicon nitride passivation film and a dense film layer. This strengthens the passivation effect on the dicing damage layer, further suppressing interfacial recombination to reduce surface recombination loss and mechanical stress concentration during the dicing process. Simultaneously, it avoids affecting the reliability of subsequent packaging processes due to excessive texture height differences. Preferably, the area of ​​the second region 7 covered by the second texture structure is no more than 10%. Even more preferably, the second region 7 does not form a second texture structure, because textured passivation films are prone to poor step coverage and pinhole defects.

[0037] like Figure 1As shown, the height difference between the first region 6 and the second region 7 is 0.5 μm to 20 μm. In this application, the second region 7 has a groove formed by laser scribing, resulting in a height difference between the first region 6 and the second region 7 within the aforementioned range. This height difference design allows for pre-thinning of the silicon substrate: wafer cutting separates only along the groove, eliminating the need for deep cutting of thick silicon, significantly reducing the thickness of the heat-damaged layer, preserving higher mechanical strength of the silicon wafer, and adapting to ultra-thin silicon wafer dicing production.

[0038] The first region 6 and the second region 7 are at least covered with a passivation layer. The passivation layer is formed by a passivation process in the preparation method described below. Preferably, the passivation layer comprises aluminum oxide and silicon nitride. The passivation layer, through chemical bonding or physical coverage, can reduce the interface state density, repair trench damage, and reduce emitter region recombination.

[0039] In this embodiment, the photovoltaic cell does not have a PN junction in the second region 7. During laser dicing, the laser only acts on the intrinsic silicon wafer substrate, and the emitter junction is not damaged during slicing. This eliminates leakage current and recombination of edge carriers at the source, improving the open-circuit voltage and conversion efficiency of the cell. At the same time, the second region 7 uses less texture structure to avoid stress concentration caused by unevenness of the texture structure, reducing edge chipping, hidden cracks, and fragmentation defects during laser grooving and mechanical dicing, thus improving production yield. The first region retains a large area of ​​texture structure to reduce light reflection, ensure the light absorption capacity of the silicon wafer, and not lose short-circuit current.

[0040] In one specific implementation, reference is made to... Figures 5 to 7 The first texture structure is a first velvet structure with a plurality of first pyramids 8, and the second texture structure is a second velvet structure with a plurality of second pyramids 9; wherein the one-dimensional average size of the orthographic projection of the first pyramid 8 is greater than the one-dimensional average size of the orthographic projection of the second pyramid 9.

[0041] In this application, "one-dimensional average orthographic projection dimension" refers to the arithmetic statistical average of the one-dimensional linear lengths (such as maximum span, equivalent linewidth, or chord length of the cross section in a specific direction) measured at various angular directions (e.g., 0°, 45°, and 90°) of the projected image, projected onto the base plane of the pyramid along its thickness direction (i.e., perpendicular to the cell surface). This dimension characterizes the average characteristic width or base dimension of the pyramid in the direction parallel to the photovoltaic cell surface, and its magnitude directly reflects the microscale of the textured structure.

[0042] The first and second textured structures are preferably velvety structures with pyramids. As the basic morphology for both textured structures, the pyramid structure can be spontaneously formed on the surface of single-crystal silicon through anisotropic chemical etching. Secondly, the pyramid structure is composed of multiple tilted (111) crystal planes, which have a low surface dangling bond density, significantly reducing the surface recombination rate and providing a high-quality adhesion interface for subsequent passivation films. Furthermore, the pyramid's conical geometry enables gradient refractive index transitions over a wide spectral range, effectively reducing Fresnel reflection losses, while its multi-angled slopes couple incident light into the cell and extend the optical path.

[0043] The average one-dimensional size of the orthographic projection of the first pyramid 8 is larger than that of the average one-dimensional size of the orthographic projection of the second pyramid 9. In the first region 6 (effective light-receiving area), the effective light-receiving area of ​​the battery maintains a micron-level pyramidal textured surface structure, with incident light being reflected and absorbed multiple times, reducing surface reflectivity and ensuring the output of short-circuit current Isc; the cut groove occupies only a very small edge area and does not occupy the effective photosensitive area, making optical loss controllable. Preferably, the average one-dimensional size of the orthographic projection of the first pyramid 8 is 0.5 μm to 5 μm.

[0044] In the second region 7 (groove region), the smaller second pyramid 9 makes the surface morphology of this region smoother and less undulating. This not only effectively disperses and reduces mechanical stress concentration during laser dicing, significantly reducing the risk of microcrack generation and propagation, thereby improving the cutting yield and edge mechanical strength of the solar cell; the smaller texture scale also helps to reduce the surface dangling bond density and interface defect states, reducing the recombination rate of photogenerated carriers at the cutting edge, thus ensuring the edge passivation effect of the solar cell after cutting and the long-term reliability of the module. Preferably, the one-dimensional average size of the orthographic projection of the second pyramid 9 is 0.3 μm to 5 μm.

[0045] In one embodiment, the first region 6 has at least a serrated structure 11 at the edge position near the second region 7, and the serrated structure 11 protrudes into the second region 7.

[0046] A serrated structure is a structure composed of several tooth-like protrusions arranged sequentially along a specific direction; each tooth-like protrusion has a peak (the top of the protrusion) and a valley (the bottom of the depression between adjacent tooth-like protrusions), with the peaks and valleys alternating along the arrangement direction. There are no particular restrictions on the shape of the serrated structure, such as... Figure 5 As shown, the outline shape of the tooth-like protrusions can be triangular or quadrilateral. The tooth height of each tooth-like protrusion is the height difference between the first region 6 and the second region 7. In this embodiment, the tooth height of each tooth-like protrusion is from 0.5 μm to 20 μm.

[0047] In one specific embodiment, the ratio of the width of the second region 7 along the first direction to the width of the photovoltaic cell is 0.0015:55 to 0.0055:45.9, i.e., 2.7 × 10⁻⁶. -5 Up to 1.2×10 -4 If this ratio is too large, it reduces the usable effective area of ​​the solar cell, thereby reducing the photoelectric conversion efficiency. If the ratio is too small, the solar cell is prone to edge damage during the cutting process, increasing the risk of microcracks. Within the above-mentioned ratio range, stress concentration at the cutting edge can be effectively passivated, while area loss can be controlled to an acceptable level.

[0048] In one specific embodiment, the ratio of the height of the second region 7 along the second direction to the thickness of the photovoltaic cell is 1.2:130 to 8.5:130, or 0.0092 to 0.0654. If this ratio is too large, it increases the risk of microcracks in the cells due to continuous expansion under outdoor thermal cycling and wind vibration, which can lead to hot spot failure in severe cases. If this ratio is too small, the edge stress of the cell cut surface is prone to concentration when assembling into a module, and delamination and moisture ingress are likely after encapsulation, thus accelerating aging.

[0049] In this embodiment, the photovoltaic cell precisely controls the ratio of different regions of the photovoltaic cell, changing the stress transmission path between the laser-cut surface and the cell body from a direct right-angle connection to a stepped transition. This gives the cell an optimal effective area, ensuring that the laser forms a sufficiently deep cut on the silicon wafer surface, causing the silicon wafer to break along the cut line during subsequent laser scribing. At the same time, it reduces the cutting damage caused during the cell cutting process, thereby reducing the risk of microcracks in the cell.

[0050] In one specific embodiment, the first zone 6 and the second zone 7 are connected by a ramp surface 3, which is a textured surface or a polished surface.

[0051] In this embodiment, the slope surface refers to the surface that is inclined relative to the first direction; with the first direction as the reference line (0° reference), the angle formed between the slope surface 3 and the first direction is denoted as α, and the angle α can be 90°, which is a right angle, or the value range of the angle α can be 91° ≤ α ≤ 165°, which is an obtuse angle.

[0052] Textured surfaces refer to surfaces exhibiting regular or irregular microscopic uneven structures. Textured surfaces are generally formed through chemical etching (texturing). Textured surfaces can consist of random or oriented pyramidal, inverted pyramidal, or honeycomb structures.

[0053] A polished surface refers to a surface with atomic or near-atomic flatness. Polished surfaces are generally achieved through chemical mechanical polishing or isotropic etching to achieve atomic-level flatness or a mirror-like surface.

[0054] The angle formed between the ramp surface 3 and the first direction can be from 91° to 165°, that is, the angle between the ramp surface 3 and the first direction is an obtuse angle. The obtuse angle arrangement allows the thermal stress generated by laser cutting to smoothly transition along the inclined surface inside the notch structure. Compared with the acute angle arrangement, the obtuse angle arrangement eliminates the stress concentration point at the root of the notch.

[0055] The photovoltaic cell stacked structure of this application embodiment includes the stacked structure of a conventional photovoltaic cell, such as electrode 12 (including a front electrode and a back electrode), a front anti-reflection / passivation layer, an emitter, and a back passivation / field-effect layer. It should be noted that the above examples are merely illustrations and do not limit the scope of the invention.

[0056] Reference Figures 2 to 9 This application also provides a method for preparing a photovoltaic cell, comprising the following steps: S1: Provide a pretreated initial silicon wafer substrate, the initial silicon wafer substrate having a front side and a back side; at least one side of the initial silicon wafer substrate includes a first region and a second region that are alternately distributed in a first direction, the width of the first region being greater than the width of the second region.

[0057] In this step, a clean initial silicon wafer substrate with no surface impurities can be provided by pre-treating the initial silicon wafer substrate, such as by cleaning. The initial silicon wafer substrate generally has a front side and a back side. As mentioned above, the initial silicon wafer substrate has at least two first regions 6 and at least one second region 7, depending on the type of photovoltaic cell ultimately formed.

[0058] Specifically, the pretreatment of the initial silicon wafer substrate includes: The initial silicon wafer substrate is placed in a cleaning tank and immersed in an alkaline cleaning solution for the first time, followed by rinsing with deionized water.

[0059] In one specific embodiment, the alkaline cleaning solution is sodium hydroxide with a concentration ranging from 1% to 2%. During the cleaning step, the substrate is immersed in the alkaline cleaning solution at a temperature of 60°C to 70°C. Furthermore, the initial time is measured from 10 to 15 minutes. Immersion in the alkaline cleaning solution removes impurities such as oil and dust from the initial silicon wafer substrate surface.

[0060] In one specific embodiment, the substrate can be rinsed repeatedly with deionized water 3 to 5 times to ensure that there is no residual cleaning solution on the initial silicon wafer substrate surface.

[0061] S2: The initial silicon wafer substrate is processed to form a first texture structure in the first region and a second texture structure in the second region.

[0062] In this step, a first texture structure is formed in the first region 6 and a second texture structure is formed in the second region 7 by texturing the initial silicon wafer substrate.

[0063] Specifically, anisotropic etching of the initial silicon wafer substrate is performed using an alkaline solution to form a first texture structure in region 6 and a second texture structure in region 7. The area of ​​region 6 covered by the first texture structure is no less than 70%. Forming the first texture structure in region 6 allows for multiple reflections and absorption of incident light, reducing surface reflectivity, ensuring the output of the short-circuit current Isc, and simultaneously removing the mechanical damage layer on the surface of the initial silicon wafer. The area of ​​region 7 covered by the second texture structure is no more than 10%. Retaining only a small amount of the second texture structure or none in region 7 results in a uniform and dense alumina / silicon nitride passivation film deposition, stronger passivation effect on the dicing damage layer, further suppressing interfacial recombination, reducing surface recombination losses and minimizing mechanical stress concentration during dicing, while also avoiding the impact of excessive texture height differences on the reliability of subsequent packaging processes.

[0064] As described above, the first texture structure is preferably a velvet structure with a first pyramid 8, and the second texture structure is preferably a velvet structure with a second pyramid 9.

[0065] In one specific implementation, the alkaline solution is generally a low-concentration alkaline solution.

[0066] S3: To give the initial silicon substrate surface a PN junction.

[0067] In this step, the PN junction and oxide layer are prepared using the corresponding processes in the existing TOPCon (Tunnel Oxide Passivated Contact) battery process.

[0068] Specifically, step S3 may include: S301: Boron is diffused onto the front side of the initial silicon wafer substrate at high temperature using a gaseous boron source to form P. + A layer and a borosilicate glass (BSG) layer are used to construct a PN junction.

[0069] In this step, the boron diffusion process is a conventional technique known to those skilled in the art and has no special limitations.

[0070] In one specific embodiment, boron diffusion is typically carried out in a tube furnace using a two-step or one-step method. For example, in this step, boron diffusion can be performed at a high temperature of 1000°C to 1050°C. Gaseous boron sources are commonly used, including but not limited to BCl3 and BBr3.

[0071] Through boron diffusion, a P-type doped region is formed on the surface of the initial silicon wafer substrate, forming a PN junction with the N-type silicon wafer substrate. This constructs the built-in electric field required for photovoltaic devices, providing the core driving force for the separation and transport of photogenerated carriers and the realization of photoelectric conversion.

[0072] S302: A silicon dioxide film is grown on the surface of the initial silicon wafer substrate.

[0073] In this step, there are no particular restrictions on the formation process of the silicon dioxide film; commonly used oxidation processes in the field can be selected. For example, a high-temperature thermal oxidation process can be used to grow the silicon dioxide film.

[0074] By oxidizing the surface of the initial silicon wafer substrate to form an oxide layer, surface passivation can be achieved, reducing surface recombination centers and carrier recombination losses. At the same time, it provides a protective or selective etching mask for subsequent processes such as alkaline polishing and passivation layer deposition, thereby improving the photoelectric conversion efficiency of the cell.

[0075] S4: Perform laser etching on the initial silicon wafer substrate to form a second region without a PN junction in the laser-etched area.

[0076] In this step, grooves are formed in the scribing area by laser scribing, so that the laser-etched area forms a second region 7 without a PN junction. Compared with direct cutting and scribing, laser scribing causes relatively less damage to the battery and reduces the power reduction of the component.

[0077] Specifically, a high-energy pulsed laser is used to directionally irradiate the scribing area on the front side of the initial silicon wafer substrate. The instantaneous high temperature of the laser melts and vaporizes the surface silicon dioxide, borosilicate glass layer, and surface silicon material in the scribing area, completely removing the insulating film layer and etching the silicon substrate. After RCA etching, grooves are formed in the scribing path. Region 7 is the laser scribing area formed by laser etching. The laser scribing area is a groove structure without a PN junction. This groove structure is used to create the cutting path for slicing the solar cells. Through laser scribing, in the thickness direction of the photovoltaic cell, the height of Region 6 is higher than that of Region 7, with a height difference of 0.5 μm to 20 μm between Region 6 and Region 7.

[0078] In one specific implementation, there are no particular restrictions on the process parameters and laser type used for laser scribing; they can be selected according to actual needs. For example, laser scribing can use ultraviolet skin / nanosecond lasers, green skin / nanosecond lasers, Nd:YVO4 lasers, etc. The examples given above are merely illustrations and not the only possible solutions.

[0079] In one specific embodiment, the laser-scribed region, i.e., the second region 7, can be formed in the cutting area on the front or back of the initial silicon wafer substrate. The number of second regions 7 without PN junctions varies depending on the type of photovoltaic cell ultimately fabricated. Generally, N laser-scribed regions (i.e., second regions 7 without PN junctions) (N≥1) are formed in the cutting area on the front or back of the initial silicon wafer substrate, so that the photovoltaic cell forms N+1 sub-cell regions, and N+1 segmented cells are obtained through laser dicing.

[0080] The second region 7 is the laser-etched area formed by laser etching, meaning the second region is a groove structure without a PN junction. Therefore, the sidewall of the groove formed by laser etching corresponds to the connection surface between the first region 6 and the second region 7. When the first region 6 and the second region 7 are perpendicularly arranged, the sidewall of the groove is perpendicular to the first direction. The first region 6 and the second region 7 can also be connected by a ramp surface 3, meaning the sidewall of the groove forms an angle with the first direction, typically between 91° and 165°. The ratio of the height of the ramp surface 3 along the second direction to the thickness of the photovoltaic cell is 0.0092 to 0.0654, meaning the ratio of the height of the groove along the second direction to the thickness of the photovoltaic cell is 0.0092 to 0.0654. Preferably, the height of the groove along the second direction is 0.5 μm to 20 μm.

[0081] The bottom surface of the second region 7 of the aforementioned photovoltaic cell corresponds to the bottom of the groove. Preferably, the width of the groove bottom along the first direction is 400 μm to 700 μm, that is, the width of the second region 7 along the first direction is 400 μm to 700 μm. Figure 3 An image of the second region 7 formed after laser scribing according to the method of the present invention is shown. It can be seen from the image that the second region 7 formed after laser scribing is a groove structure without a PN junction, and the width of the resulting groove is approximately 526.2 μm.

[0082] Laser scribing creates grooves on the initial silicon wafer substrate surface at the cut points. Subsequent passivation processes cover these grooves, passivating the laser-scrubbing area, repairing the groove damage, and reducing recombination in the emitter region. Compared to direct dicing, laser scribing causes relatively less cutting damage, resulting in a smaller reduction in module power.

[0083] S5: After forming the second region without a PN junction, subsequent fabrication is carried out to form a complete photovoltaic cell.

[0084] In this step, the subsequent cell fabrication is completed using the corresponding processes in the existing TOPCon battery technology.

[0085] Specifically, step S5 includes the following steps: S501: After forming the second region without a PN junction, remove the borosilicate glass layer on the back side and at the edges, retain the borosilicate glass layer on the front side as a mask, and polish the back side.

[0086] In this step, by removing the borosilicate glass layer on the back and edges and chemically polishing the back, the excess P-type doped layer formed by the edge expansion of the silicon wafer is completely removed, the PN junction that is conductive at the edge is cut off, and leakage at the edge of the battery is suppressed; at the same time, the borosilicate glass layer on the front is retained as a mask to prevent the front structure from being corroded.

[0087] In one specific embodiment, an aqueous solution of hydrofluoric acid (HF) is used as the etching solution. The back side and edges of the silicon wafer are completely exposed to the etching solution, achieving directional removal of the borosilicate glass layer while preserving the intact borosilicate glass layer on the front side as a protective layer for subsequent polishing processes. In this step, there are no particular limitations on the etching process parameters such as temperature and immersion time in the etching solution.

[0088] In one specific embodiment, the back side is polished by chemical polishing. Specifically, an alkaline solution is used to perform isotropic polishing etching on the single-crystal silicon. The alkaline solution can be one commonly used in the art, such as a potassium hydroxide (KOH) system or a tetramethylammonium hydroxide (TMAH) organic base system.

[0089] S502: Phosphorus diffuses to form N on the back side. + Layers of silicon carbide and phosphorus glass are used to construct the back surface field.

[0090] In this step, phosphorus doping enhances the back surface field effect and improves electron collection efficiency. At the same time, the phosphorus-silicon glass layer formed on the surface is uniform and dense, which can not only block the back diffusion of impurities and protect the doped layer, but also serve as a sacrificial layer for subsequent cleaning processes, making it easier to remove by etching.

[0091] In one specific embodiment, phosphorus doping of the back polycrystalline silicon layer is performed using a tubular diffusion process. There are no particular limitations on the diffusion process; generally, a gaseous phosphorus source, POCl3, is used.

[0092] S503: Remove the phosphosilicate glass layer on the front and edges, as well as the borosilicate glass layer on the front.

[0093] In this step, by removing the phosphosilicate glass layer and cleaning, metallic impurities, residual polycrystalline silicon, and the front borosilicate glass layer are removed, ensuring the surface of the silicon wafer substrate is clean.

[0094] In one specific embodiment, single-sided selective hydrofluoric acid etching is used to remove the phosphosilicate glass layer on the front and edge of the initial silicon wafer substrate, and a water film is used to isolate and protect the back side during the processing.

[0095] In one specific embodiment, RCA standard cleaning removes metallic impurities, residual polycrystalline silicon, and the front borosilicate glass layer. Preferably, a two-liquid stepwise cleaning system of alkaline cleaning solution (NH4OH / H2O2) + acidic cleaning solution (HCl / H2O2) is used. Through stepwise alkaline and acidic combined cleaning, a high degree of cleanliness can be achieved on the silicon wafer surface without damaging the effective doping structure, providing a good surface condition for subsequent coating and metallization processes. The adjustment of the RCA process solution ratio is mainly determined according to the actual site conditions, such as increasing the amount of alkaline solution, raising the temperature, or increasing the time.

[0096] S504: A first passivation layer and an anti-reflection layer are formed on the front side.

[0097] In this step, a passivation layer is formed on the front side to provide chemical passivation and field passivation, thereby reducing the surface recombination rate.

[0098] The first passivation layer includes at least one of an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, an aluminum nitride layer, and an aluminum oxynitride layer. When the second region 7 is formed on the front side of the initial silicon wafer substrate, the first passivation layer covers the first region 6 and the second region 7. That is, the first region 6 and the second region 7 are covered by the first passivation layer.

[0099] In one specific embodiment, the first passivation layer comprises an aluminum oxide layer. Preferably, the aluminum oxide layer is deposited on the front side of the initial silicon wafer substrate using an atomic layer deposition (ALD) process. There are no particular limitations on the ALD process, and those skilled in the art can choose according to actual conditions. Preferably, the thickness of the aluminum oxide layer ranges from 3 nm to 5 nm.

[0100] The antireflective layer includes at least one of a silicon nitride layer and a silicon oxynitride layer.

[0101] In one specific embodiment, the antireflective layer comprises a silicon nitride layer. Preferably, the silicon nitride layer is deposited using plasma-enhanced chemical vapor deposition (PECVD). There are no particular limitations on the PECVD process, and those skilled in the art can choose according to the actual situation.

[0102] S505: A second passivation layer is formed on the back side; In this step, a second passivation layer is formed on the back side to further reduce surface reflection and recombination.

[0103] The second passivation layer includes at least one of an aluminum oxide layer, a silicon nitride layer, a silicon oxynitride layer, an aluminum nitride layer, and an aluminum oxynitride layer. When the second region 7 is formed on the back side of the initial silicon wafer substrate, the second passivation layer covers the second region.

[0104] In one specific embodiment, the second passivation layer comprises a silicon nitride layer. Preferably, the silicon nitride layer is deposited using plasma-enhanced chemical vapor deposition (PECVD). There are no particular limitations on the PECVD process, and those skilled in the art can choose according to the actual situation.

[0105] S506: The first electrode and the second electrode are formed on the front and back sides respectively to complete the fabrication of the photovoltaic cell.

[0106] In this step, a complete battery grid electrode system with excellent conductivity is formed through printing and sintering processes, ensuring that the photovoltaic cell outputs photocurrent efficiently.

[0107] Specifically, metal paste is first printed on the front and back sides of the initial silicon wafer substrate to form the positive and negative electrode patterns of the battery. After printing, the wafer undergoes high-temperature sintering to form a stable ohmic contact between the metal components and the silicon substrate. Finally, the silicon wafer is subjected to light injection passivation treatment to reduce the recombination loss of charge carriers in the battery body and on the surface, thereby improving the battery conversion efficiency.

[0108] In one specific embodiment, printing can be achieved through screen printing and stencil printing. Preferably, screen printing can be used. During the printing process, the position and thickness of the paste coating are precisely controlled by using a customized high-precision screen printing plate with a specific mesh pattern, thereby sequentially forming the main grid and fine grid electrode patterns on the front and back sides.

[0109] In one specific embodiment, there are no particular limitations on the sintering process parameters. Preferably, sintering can be performed at 600°C to 850°C to allow the metal paste to form good ohmic contact with the silicon wafer, while simultaneously removing organic matter from the paste and completing the electrode curing.

[0110] To further optimize battery performance, a laser-enhanced contact optimization step can be performed after step S506. By combining laser irradiation with reverse bias, the contact area between the metal electrode and the silicon wafer is locally heated, which promotes the formation of alloyed contact between the metal and silicon, significantly reducing contact resistance, reducing current transmission loss, and reducing carrier recombination in the contact area, thereby improving the open-circuit voltage, fill factor, and overall conversion efficiency of the battery.

[0111] The photovoltaic cell manufacturing method provided in this application adds a laser scribing process after oxidation, while other processes remain unchanged. This method has no impact on the entire cell manufacturing process, requires no special gases or additional equipment, and has extremely low investment costs. Simultaneously, the laser scribing creates a second region 7 without a PN junction at the cut location on the cell surface. Subsequent passivation processes can cover this isolation groove, passivating the laser-scibing area and repairing the groove damage. Since the grooved area has no PN junction, the cutting only acts on the intrinsic silicon substrate, without damaging the emitter junction. This fundamentally avoids edge leakage and edge carrier recombination, improving cell conversion efficiency. Compared to direct dicing, laser scribing causes relatively less damage during cell cutting, reducing edge chipping, microcracks, and fragmentation rates, improving process yield, and relatively minimizing module power reduction.

[0112] The present invention also provides a segmented solar cell, which is prepared by segmenting the photovoltaic cell along the second region 7 of any of the above embodiments to form sub-cells, wherein the number of the second region 7 is N, the number of the sub-cells formed is N+1, and the second region 7 is the segmentation path of the photovoltaic cell.

[0113] Specifically, the photovoltaic cell is formed by laser cleaving along a groove (second region) formed on the surface of the photovoltaic cell. Since the cell can be cleaved along the second region, at least one side of the cleaved cell is a cut surface, and the cleaved cell has all the structural features of the aforementioned photovoltaic cell.

[0114] In one feasible implementation, the segmented battery has a front and a back, including a first region 6 and a third region, the third region being a part of the aforementioned second region; the width of the first region 6 is greater than the width of the third region; the first region 6 has a PN junction, while the third region does not have a PN junction; In the thickness direction of the segmented battery, the height of the first region 6 is higher than the height of the third region, and the height difference between the first region 6 and the third region is 0.5 μm to 20 μm; the first region 6 includes a first texture structure, and the area of ​​the first region 6 covered by the first texture structure is not less than 70%; the third region includes a second texture structure, and the area of ​​the third region covered by the second texture structure is not greater than 10%; the first region 6 and the third region are at least covered with a passivation layer. In a two-dimensional plane, the first direction is perpendicular to the thickness direction of the segmented battery.

[0115] For example, when the battery is split along the center line of the second zone 6, the resulting split battery includes the third zone and the first zone 6, and the width of the third zone along the first direction is approximately half that of the second zone.

[0116] like Figure 10 As shown, the segmented solar cell 10 includes a complete first region 6 and a third region. The first region 6 has a first surface 1, which includes a first texture structure; the third region has a second surface 4, which has a small amount of second texture structure or no second texture structure. The first region and the third region are connected by a ramp surface 3. The ramp surface 3 shown in the figure forms an obtuse angle with the first direction. However, the first region 6 and the third region can also be connected perpendicularly. The segmented solar cell 10 also has a second side surface 2, which is a cut surface formed by laser dicing. Because a second region without a PN junction is provided on the surface of the photovoltaic cell, and a groove structure is formed in the second region by laser scribing, defects such as edge chipping, hidden cracks, and fragmentation during laser dicing and mechanical dicing can be reduced.

[0117] Before laser cleaving of photovoltaic cells, a whole-cell testing and sorting process is required. This whole-cell testing and sorting is a pre-inspection process for the electrical performance and appearance of the entire cell before laser cleaving. Specifically, complete photovoltaic cells are fed into fully automated testing and sorting equipment to complete IV curve testing and EL microcrack detection, accurately extracting core electrical parameters such as open-circuit voltage, short-circuit current, peak power, fill factor, and photoelectric conversion efficiency. Simultaneously, a vision system is used to screen for appearance defects such as surface color difference, grid line defects, microcracks, and dirt. The equipment automatically classifies and categorizes the cells according to preset power levels and quality grades, rejecting inefficient, defective, and abnormal cells.

[0118] Whole-cell testing and sorting can screen qualified substrate cells in advance, ensuring the consistency of the original whole-cell performance in subsequent laser slicing, avoiding inefficient and defective cells from entering the slicing process, and reducing the defect rate of small-cell finished products from the source.

[0119] Then, the bottoms of the N grooves (second region) on the photovoltaic cell are laser-cut to form N+1 sub-cells. The resulting sub-cells, i.e., segmented cells, consist of a complete first region and a third region, with the third region being a part of the second region. The characteristics of the first and third regions are as described above. For example, the first region of the sub-cell has a PN junction, while the third region does not; the height difference between the first and third regions is 0.5 μm to 20 μm; both the first and third regions are at least covered with a passivation layer, etc.

[0120] There are no particular restrictions on the type of laser used for laser dicing. For example, a combination of nanosecond fiber lasers, picosecond fiber lasers, continuous fiber lasers, and pulsed lasers can be used. In one specific embodiment, infrared light can be used for laser dicing, and the thermal dicing power can range from 35% to 65%. The examples given above are merely illustrative and not the only possible solutions.

[0121] Compared to direct cutting and scribing, laser scribing creates grooves that cause relatively less cutting damage, and the reduction in component power is also relatively smaller. Figure 4 A partial side view of the cut surface after laser dicing according to the method of this application is shown. As can be seen from the figure, after laser dicing according to the method of this application, the cut surface is smooth and free of defects such as chipping, microcracks, and silicon slag residue.

[0122] After the sub-cells are cut by laser along the groove (second zone) to obtain the photovoltaic cells, all photovoltaic cells undergo secondary precision testing and final sorting. The cut sub-cells are then sent one by one to a dedicated cell testing machine for IV photoelectric performance testing, EL crack re-inspection, and appearance re-inspection to correct for process deviations such as edge damage, micro-cracks, and electrical drift caused by the cutting process. The system accurately collects the power, efficiency, voltage, and current parameters of each cell and performs fine grading and classification according to precision levels.

[0123] Small cell testing and sorting can screen out abnormal small cells with cutting damage, edge leakage, and performance degradation, ensuring that the electrical properties of sub-cell small cells used in the same batch of packaging are highly matched, and greatly improving the accuracy of module series matching and overall output power.

[0124] This application also provides a photovoltaic system 1000, which can be applied in photovoltaic power plants, such as ground power plants, rooftop power plants, and water-based power plants, and can also be applied to equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, solar buildings, etc.

[0125] It is understandable that the application scenarios of the PV system 1000 are not limited to this; that is to say, PV systems can be applied in all fields that require solar energy for power generation. Taking a PV power generation system as an example, refer to... Figure 9 The photovoltaic system 1000 may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple photovoltaic modules. For example, multiple photovoltaic modules may form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can combine the current generated by the photovoltaic array. The combined current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to realize solar power supply.

[0126] Reference Figure 10 and Figure 11 A photovoltaic module 5 is a device that directly converts light energy into electrical energy through the photoelectric effect or photochemical effect. A photovoltaic module is typically a stacked encapsulation structure, which includes at least the following from the light-facing side to the back-lighting side: a front cover plate 600, a first encapsulating film 100, a cell string layer 200, a second encapsulating film 400, and a back cover plate 500, as well as a frame surrounding the stacked structure and a junction box located on one side of the back cover plate.

[0127] The front cover 600 may be made of a material with excellent light transmittance, impact resistance, corrosion resistance, and weather resistance, and may optionally include at least one of the following materials: tempered glass, plexiglass, transparent ceramics, organic fibers, or polymers. In some embodiments, the front cover 600 may include at least one of an insulating barrier layer, a fluorinated weather-resistant layer, and a transition adhesive layer.

[0128] The back cover 500 typically needs to possess insulation, water resistance, aging resistance, weather resistance, and corrosion resistance. It may optionally include at least one of the following composite back covers as the substrate: tempered glass, plexiglass, metal back cover, or PET film. The PET-based composite back cover may, depending on the needs of different applications, include various types such as composite (e.g., TPT / KPK, TPE / KPE), coated (e.g., TPC, KPC, CPC), and co-extruded (e.g., PO).

[0129] It is understandable that the material selection of the front cover 600 and the back cover 500 does not affect each other, and the same or different materials can be selected according to different application scenarios of the components (such as residential photovoltaics and building-integrated photovoltaics).

[0130] The first encapsulating film 100 and the second encapsulating film 400 may be selected from at least one of ethylene-vinyl acetate copolymer (EVA) film, polyvinyl octene coelastomer (POE) film, EVA-POE-EVA co-extruded film (EPE), polyvinyl butyral (PVB), polyethylene terephthalate (PET) film, or liquid silicone. In some embodiments, the first encapsulating film 100 and the second encapsulating film 400 may further include one or more functional additives selected from the group consisting of crosslinking agents, coupling agents, antioxidants, ultraviolet absorbers, etc., to improve the degree of crosslinking, weather resistance, adhesive strength, and anti-aging properties of the film. It is understood that the first encapsulating film 100 and the second encapsulating film 400 may be made of the same or different materials.

[0131] The battery string layer 200 includes multiple battery strings, which can be combined in series, parallel, or series-parallel configurations to achieve current collection and output. Further, each battery string is formed by sequentially connecting multiple battery cells via connectors. In some embodiments, at least a portion of the connector is electrically connected to the back electrode of one battery cell, and at least another portion of the connector is electrically connected to the front or back electrode of another battery cell to form a battery string. The connector may optionally include conductive elements such as solder strips, busbars, or metal clips. In some embodiments, to improve welding performance, oxidation resistance, and weather resistance, the connector material may preferably be a highly conductive metal material, such as at least one of silver, copper, tin, and nickel, or an alloy thereof. In some embodiments, to balance conductivity and cost control, the connector material may also be at least one of metal-clad composite materials such as silver-coated copper, copper-coated silver, copper-coated aluminum, aluminum-coated copper, tin-plated copper, or nickel-plated copper. The electrical connection may be selected from one of the following methods: laser welding, spot welding, bonding, ultrasonic welding, resistance welding, or brazing.

[0132] The solar cell may include a semiconductor substrate, a first emitter of a first conductivity type, and a second emitter of a second conductivity type. It is understood that one of the first and second conductivity types is P-type, and the other is N-type. The semiconductor substrate may include an N-type silicon substrate or a P-type silicon substrate. N-type silicon substrates are typically formed by doping with Group V elements such as phosphorus, arsenic, or antimony, and have the characteristic that the majority charge carriers are electrons; P-type silicon substrates are typically formed by doping with Group III elements such as boron, gallium, or aluminum, and have the characteristic that the majority charge carriers are holes.

[0133] The solar cell can employ a grid line design with no main grid (OBB), multiple main grid (MBB), or super-multiple main grid (SMBB). In some embodiments, the grid line material can be selected as at least one of silver-based conductive paste or silver-coated copper composite paste. The paste uses highly conductive metal powder as the conductive substrate, and the substrate can be at least one of silver powder, copper powder, or silver-coated copper composite powder. To improve the ohmic contact performance, conductivity, and long-term weather resistance of the electrodes, a composite functional layer can be formed on the surface of the substrate or in the grid line structure. The functional layer material includes at least one of glass powder, organic carrier, nickel-based barrier layer, tin-based alloy layer, or anti-oxidation and corrosion-resistant coating.

[0134] It is understood that the solar cell can be at least one of the following commonly used in the field: TOPCon (Tunnel Oxide Passivated Contact) cell, HJT (Heterojunction with Intrinsic Thin-film) cell, BC (Back Contact) cell, perovskite / tandem cell, etc.

[0135] The frame surrounds the periphery of the stacked structure and is typically made of aluminum alloy or steel alloy. In some embodiments, the frame may also be a fiberglass frame or a plastic frame. The inner side of the frame usually has grooves for filling with sealant to achieve a sealed bond with the stacked components formed by the front cover, the first encapsulating film, the battery string layers, the second encapsulating film, and the back cover, thereby blocking moisture and buffering external impacts. In some embodiments, the frame can be assembled using corner brackets.

[0136] The junction box is located on one side of the rear cover and is electrically connected to the terminals of the bus electrodes in the battery string layer via a lead-out busbar for energy extraction. The junction box typically includes a housing and cover made of weather-resistant insulating material, conductive connecting tabs disposed within the housing, and one or more bypass diodes. The bypass diodes are connected in parallel with sub-units of the battery string. The electrical leads of the junction box include photovoltaic-specific connectors and cables. The cables preferably use cross-linked polyethylene insulation sheaths and tinned copper core wires. In some embodiments, the interior of the junction box may also be filled and encapsulated with potting compound to achieve insulation, thermal conductivity, moisture protection, and fixation.

[0137] The following provides embodiments and comparative examples of the present invention to illustrate the technical effects brought about by the present invention.

[0138] Example 1

[0139] The photovoltaic cell fabrication method of this embodiment includes the following steps: S1: Place the initial silicon wafer substrate in a cleaning tank and immerse it in an alkaline cleaning solution with a sodium hydroxide concentration of 2% at 70°C for 15 minutes; then rinse it 5 times with deionized water; the initial silicon wafer substrate is M10 (182mm×182mm). S2: Anisotropic etching is performed on the cleaned initial silicon wafer substrate using a low-concentration alkaline solution to form a pyramidal textured structure on the surface of the initial silicon wafer substrate. The pyramidal base is approximately 30 μm in size. The surface of the initial silicon wafer substrate includes a first region and a second region that are alternately distributed in sequence. The area of ​​the first region covered by the pyramidal textured structure is 75%, and the area of ​​the second region covered by the pyramidal textured structure is 2%. S301: At high temperature, boron is diffused onto the front side of the initial silicon wafer substrate via gaseous BCl3 to form P. + Layers of borosilicate glass and borosilicate glass are used to construct a PN junction; S302: A silicon dioxide film is grown on the surface of the initial silicon wafer substrate to achieve surface passivation; S4: The initial silicon wafer substrate is laser-etched to form a second region without a PN junction in the laser-etched area; the height difference between the first region and the second region is 6.5 μm to 7 μm; the first region and the second region are connected by a ramp surface, and the angle between the ramp surface and the surface of the second region is 91°. S501: After forming the second region without a PN junction, hydrofluoric acid is used to remove the borosilicate glass layer on the back and edge of the initial silicon wafer substrate. Then, the back is polished with alkaline solution to remove the PN junction around the edge, while retaining the borosilicate glass layer on the front as a mask. S502: Phosphorus doping is performed on the polysilicon layer on the back side to form N + Layer and phosphosilicate glass layer; S503: Use HF to remove the phosphosilicate glass layer on the front and edges, and then use RCA standard cleaning to remove metal impurities, residual polysilicon and the front borosilicate glass layer; S504: A 5 nm aluminum oxide (Al2O3) thin film is deposited on the front side of the silicon wafer using atomic layer deposition technology; S505: Silicon nitride (SiN) is deposited on both the front and back sides using plasma-enhanced chemical vapor deposition. x Thin film, used as antireflective coating and passivation layer; S506: Metal paste is printed on the front and back of the cell using screen printing technology to form electrode patterns; the printed silicon wafer is then sintered at a high temperature of 850°C to ensure good ohmic contact between the metal paste and the silicon wafer, thus completing the fabrication of the photovoltaic cell.

[0140] Next, the battery is split along the second zone to form segmented batteries.

[0141] Example 2

[0142] Photovoltaic cells were prepared in the same manner as in Example 1, except that in step S2, the size of the tower base was about 25 μm; and in step S4, the height difference between the first and second regions ranged from 5 μm to 6 μm.

[0143] Example 3

[0144] Photovoltaic cells were prepared in the same manner as in Example 1, except that in step S2, the base size was about 30 μm, the area of ​​the first region covered by the pyramidal textured structure was 80%, and the area of ​​the second region covered by the pyramidal textured structure was 5%; in step S4, the height difference between the first region and the second region ranged from 0.5 μm to 1 μm, and the angle between the slope and the surface of the second region was 100°.

[0145] Example 4

[0146] Photovoltaic cells were prepared in the same manner as in Example 1, except that in step S2, the base size was about 30 μm, the area of ​​the first region covered by the pyramidal textured structure was 85%, and the area of ​​the second region covered by the pyramidal textured structure was 5%; in step S4, the height difference between the first region and the second region ranged from 19 μm to 20 μm, and the angle between the slope and the surface of the second region was 120°.

[0147] Example 5

[0148] Photovoltaic cells were prepared in the same manner as in Example 1, except that in step S2, the base size was about 25 μm, the area of ​​the first region covered by the pyramid velvet structure was 90%, and the area of ​​the second region covered by the pyramid velvet structure was 0%; in step S4, the height difference between the first region and the second region ranged from 10 μm to 10.5 μm, and the angle between the slope and the surface of the second region was 145°.

[0149] Comparative Example

[0150] The photovoltaic cell was prepared in the same manner as in Example 1, except that step S4 was omitted and the entire surface of the initial silicon wafer substrate was covered with a pyramidal textured structure.

[0151] The diced solar cells obtained from the cutting process were tested according to the following test methods. The performance of the photovoltaic cells obtained in Examples 1 to 3 and Comparative Example 1 is shown in Table 1 below.

[0152]

[0153] As can be seen from the table above, the performance of photovoltaic cells prepared according to the method of the present invention is significantly improved compared with photovoltaic cells prepared according to conventional methods.

[0154] The test methods for each parameter are described below: The performance of photovoltaic cells is tested in the following ways: I. Preparatory work before testing 1. Battery cell cleaning, including: Wipe the surface of the battery cells with ultrapure water, ethanol or isopropanol to remove fingerprints, dust and organic residues; After drying the solar cells with nitrogen, let them stand for 10 minutes to avoid surface contamination affecting their optical properties.

[0155] 2. Electrode contact inspection, including

[0156] Use a four-wire probe (such as the Keithley 2400 series) to perform electrical measurements on the solar cells, ensuring that the contact resistance between the metal electrodes of the solar cells and the probe is <0.1Ω; Use silver paste or spring probes to secure the battery cells and avoid pressure damage.

[0157] 3. Stabilization treatment, including: Place the solar cells under standard illumination (1000 W / m²). 2 Aging for 1 hour under light-induced degradation (LID) to eliminate light-induced degradation. The temperature of the solar cells was maintained at 25℃±0.5℃ using a constant temperature stage to avoid the impact of thermal effects on carrier mobility.

[0158] 4. Equipment calibration, including: The light source spectrum was calibrated using a standard reference cell to conform to the AM1.5G standard spectral conditions, with a calibration wavelength range of 300 nm to 1200 nm. The irradiance uniformity deviation in the test area does not exceed ±2%, and the measurement error of the temperature sensor used is less than ±0.1℃.

[0159] II. Testing Equipment and Conditions

[0160] 1. Core equipment

[0161] IV tester: Keysight B2900A series, with a voltage resolution of 0.1 mV and a current resolution of 0.1 μA; Solar simulator: Class AAA compliant, with selectable pulsed or steady-state light source (e.g., Wacom WXS-200S-20). Temperature control console: Temperature regulation is achieved based on a thermoelectric cooling (TEC) module, with a control accuracy of ±0.2℃; Spectral response instrument: equipped with a quantum efficiency (QE) testing system (such as Bentham PVE300).

[0162] 2. Standard Test Conditions (STC)

[0163] Irradiance: 1000 W / m 2 (AM1.5G standard spectrum); Temperature: 25℃±1℃ (real-time monitoring via TEC module); Light spot uniformity: The uniformity of the light spot covering the effective area of ​​the battery is >95%.

[0164] III. Key Parameter Testing Procedures

[0165] 1. Conversion efficiency (Eta) and IV characteristics (Voc, Isc, FF) testing

[0166] Test equipment: solar simulator, IV tester and four-wire probe.

[0167] step: (1) Sample placement: Place the battery cell in the center of the light spot of the simulator, and use a light shield to block the edge of the battery cell by 5mm to avoid light leakage at the edge; (2) IV scan: Apply a scan voltage from -0.5 V to Voc+0.5 V through an IV tester, set the scan step size to 10 mV, and record the IV characteristic curve of the battery simultaneously; (3) Parameter extraction: Extract the open-circuit voltage Voc (voltage when current = 0) and short-circuit current Isc (current when voltage = 0) from the IV curve; (4) Calculation of power and fill factor: Calculate the maximum power point (Pmax = Vmpp×Impp) and fill factor FF = Pmax / (Voc×Isc) on the IV curve; (5) Efficiency calculation: The conversion efficiency Eta = (Pmax / Pin) × 100% is calculated, where the incident light power Pin is calibrated by a calibrated standard cell.

[0168] 2. Series resistance (Rs) test

[0169] Method 1: Dual-light illumination method

[0170] (1) Curve measurement: at 1000 W / m 2 and 800 W / m 2 The IV curves of the battery were measured under two irradiance conditions; (2) Resistance calculation: Calculate the slope of ΔV / ΔI of the two IV curves in the region near the short-circuit current Isc, and calculate the series resistance Rs using the formula Rs = (Voc1 - Voc2) / (Isc1 - Isc2).

[0171] Method 2: Four-wire pulse measurement

[0172] (1) Pulse application: Use an IV tester to apply a short current pulse with a pulse width of 1ms to the battery cell to eliminate the influence of battery self-heating on the measurement.

[0173] (2) Resistance back deduction: According to Ohm's law ΔV=I×Rs, the series resistance Rs =ΔV / I can be deduced from the measured voltage drop ΔV. It should be noted that the inherent contact resistance of the system needs to be deducted during the calculation.

[0174] 3. Parallel Resistance (Rsh) Test

[0175] Method 1: Dark Current Method

[0176] (1) Dark-state bias scanning: Under completely dark conditions, apply a reverse bias voltage from -1V to 0V to the solar cell and perform scanning; (2) Resistance calculation: Measure the slope of the IV characteristic in the reverse saturation current region, and the parallel resistance Rsh = ΔV / ΔI. Usually, the data point is taken at a bias voltage of -0.5V.

[0177] Method 2: Low-intensity IV analysis

[0178] (1) Low light measurement: at 50 W / m 2 The IV curve of the battery was measured under low irradiance. (2) Resistance estimation: The parallel resistance Rsh can be approximated as the reciprocal of the slope of the IV curve in the region near the open-circuit voltage Voc.

Claims

1. A photovoltaic cell, characterized in that, The photovoltaic cell has a front side and a back side. In a first direction, at least one side includes a first region and a second region that are alternately distributed in sequence. The width of the first region is greater than the width of the second region. The first region has a PN junction, and the second region does not have a PN junction. In the thickness direction of the photovoltaic cell, the height of the first region is higher than the height of the second region, and the height difference between the first region and the second region is 0.5 μm to 20 μm; the first region includes a first texture structure, and the area of ​​the first region covered by the first texture structure is not less than 70%; the second region includes a second texture structure, and the area of ​​the second region covered by the second texture structure is not greater than 10%; the first region and the second region are at least covered with a passivation layer. In a two-dimensional plane, the first direction is perpendicular to the thickness direction of the photovoltaic cell.

2. The photovoltaic cell according to claim 1, characterized in that, The first texture structure is a first velvet structure with a plurality of first pyramids, and the second texture structure is a second velvet structure with a plurality of second pyramids; and / or, wherein the orthographic one-dimensional average size of the first pyramid is greater than the orthographic one-dimensional average size of the second pyramid.

3. The photovoltaic cell according to claim 1, characterized in that, The average size of the orthographic projection of the first pyramid is 0.5 μm to 5 μm; and / or, the average size of the orthographic projection of the second pyramid is 0.3 μm to 5 μm.

4. The photovoltaic cell according to claim 1, characterized in that, The first region has at least a partial serrated structure at the edge near the second region, and the serrated structure protrudes into the second region.

5. The photovoltaic cell according to claim 1, characterized in that, The ratio of the width of the second region along the first direction to the width of the photovoltaic cell is 2.7 × 10⁻⁶. -5 Up to 1.2×10 -4 .

6. The photovoltaic cell according to claim 1, characterized in that, The ratio of the height of the second region along the second direction to the thickness of the photovoltaic cell is 0.0092 to 0.0654.

7. The photovoltaic cell according to claim 1, characterized in that, The first area and the second area are connected by a ramp surface, which is a textured surface or a polished surface.

8. The photovoltaic cell according to claim 7, characterized in that, The angle between the slope and the surface of the second region is 91° to 165°; and / or, the surface of the slope is covered with a passivation layer.

9. A method for preparing a photovoltaic cell, characterized in that, The preparation method includes the following steps: A pretreated initial silicon wafer substrate is provided, the initial silicon wafer substrate having a front side and a back side; at least one side of the initial silicon wafer substrate includes a first region and a second region that are alternately distributed in a first direction, the width of the first region being greater than the width of the second region; The initial silicon wafer substrate is processed to form a first texture structure in the first region and a second texture structure in the second region; wherein the first texture structure covers an area of ​​not less than 70% of the first region and the second texture structure covers an area of ​​not more than 10% of the second region. The initial silicon wafer substrate surface is given a PN junction; The initial silicon wafer substrate is subjected to laser etching to form a second region without a PN junction in the laser-etched area; in the thickness direction of the photovoltaic cell, the height of the first region is higher than the height of the second region, and the height difference between the first region and the second region is 0.5 μm to 20 μm; After forming the second region without a PN junction, subsequent fabrication is carried out to form a complete photovoltaic cell; and the first and second regions are at least covered with a passivation layer.

10. The preparation method according to claim 9, characterized in that, After forming the second region, which does not have a PN junction, subsequent fabrication processes are performed to form a complete photovoltaic cell, including: After forming the second region without a PN junction, the borosilicate glass layer at the back and edges is removed, the borosilicate glass layer on the front is retained as a mask, and the back is polished. Phosphorus diffusion forms N on the back side. + Layers of silicon carbide and phosphorus glass are used to construct the back surface field; Remove the phosphosilicate glass layer and the borosilicate glass layer on the front and edges; A first passivation layer and an anti-reflection layer are formed on the front side; wherein the first passivation layer covers the front side and the second region; A second passivation layer is formed on the back side; A first electrode and a second electrode are formed on the front side and the back side, respectively, to complete the fabrication of the battery cell.

11. A segmented battery, characterized in that, The photovoltaic cell is prepared by slicing along the second region of any one of claims 1 to 8 to form sub-cells, wherein the number of the second regions is N, the number of sub-cells formed is N+1, and the second region is the slicing path of the photovoltaic cell.

12. The segmented battery according to claim 11, characterized in that, The segmented battery has a front and a back, and includes a first region and a third region in a first direction, wherein the first region has a PN junction and the third region does not have a PN junction; In the thickness direction of the photovoltaic cell, the height of the first region is higher than the height of the third region, and the height difference between the first region and the third region is 0.5 μm to 20 μm; the first region includes a first texture structure, and the area of ​​the first region covered by the first texture structure is not less than 70%; the third region includes a second texture structure, and the area of ​​the third region covered by the second texture structure is not greater than 10%; the first region and the third region are at least covered with a passivation layer. In a two-dimensional plane, the first direction is perpendicular to the thickness direction of the segmented battery.

13. A photovoltaic module, characterized in that, include: The segmented battery as claimed in any one of claims 11 and 12.

14. A photovoltaic system, characterized in that, Including the photovoltaic module as described in claim 13.

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