An image sensor and a method of forming the same, an imaging system
Patent Information
- Application Number
- CN202510525651.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-24
- Publication Date
- 2026-10-27
AI Technical Summary
[0003]相关技术中,由于栅格结构通过单次干法刻蚀形成、且栅格结构的图形较为密集,从而使得栅格结构受刻蚀邻近效应与离子束均匀性影响,其边角处容易形成圆角,进而减少了栅格结构暴露的面积,降低了图像传感器的量子效率
[0053]这里,由于栅格结构由延伸方向不同的第一栅格条和第二栅格条构成,从而可以通过依次形成第一栅格条和第二栅格条来形成栅格结构,减少了刻蚀邻近效应与离子束均匀性的影响,进而使得第一栅格条和第二栅格条之间的夹角为直角,如此,增加了栅格结构暴露的面积,提高了图像传感器的量子效率。
Smart Images

Figure CN122995293A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of semiconductor technology, and to, but is not limited to, an image sensor and a method for forming the same, and an imaging system. Background Technology
[0002] In image sensors, grid structures are used to isolate color filters; this reduces crosstalk between incident light (i.e., light leakage between adjacent pixels) and improves the resolution of the image sensor.
[0003] In related technologies, since the grating structure is formed by a single dry etching process and the pattern of the grating structure is relatively dense, the grating structure is affected by the etching proximity effect and the uniformity of the ion beam. Its corners are prone to rounding, which reduces the exposed area of the grating structure and reduces the quantum efficiency of the image sensor. Summary of the Invention
[0004] In view of the above, embodiments of the present disclosure provide an image sensor and a method for forming the same, as well as an imaging system.
[0005] In a first aspect, embodiments of this disclosure provide an image sensor, including:
[0006] Base;
[0007] A plurality of first grid strips are located on the surface of the substrate, the plurality of first grid strips extending along a first direction and spaced apart along a second direction;
[0008] A plurality of second grid strips are located on the surface of a plurality of first grid strips, extending along a second direction and spaced apart along the first direction; the size of the second grid strips in a third direction is greater than or equal to the size of the first grid strips in that third direction, and the bottom of the second grid strips extends between the plurality of first grid strips;
[0009] Wherein, all the first grid strips and all the second grid strips constitute a grid structure; the first direction and the second direction are two intersecting directions on the plane where the base is located, and the third direction is perpendicular to the plane where the base is located.
[0010] In some embodiments, the substrate includes:
[0011] Semiconductor substrate;
[0012] Multiple pixel units located within the semiconductor substrate and arranged in an array along the first and second directions;
[0013] An isolation structure located between two adjacent pixel units;
[0014] A plurality of color filters are arranged in an array along the first and second directions on the surface of the substrate; the projection of the color filters along the third direction is located on the corresponding pixel unit.
[0015] In some embodiments, the first grid strip includes:
[0016] A first oxide layer, a first metal layer, and a second oxide layer are stacked sequentially along the third direction, and the projection of the first grid strip along the third direction is located on the isolation structure.
[0017] In some embodiments, the first grid strip further includes:
[0018] The first anti-reflective layer is located on the surface of the second oxide layer.
[0019] In some embodiments, the second grid strip includes:
[0020] A second anti-reflective layer, a third oxide layer, and a third anti-reflective layer are stacked sequentially along the third direction, and the projection of the second grid strip along the third direction is located on the isolation structure.
[0021] In some embodiments, the grid structure further includes:
[0022] A first protective layer covering the base surface between adjacent first grid strips, as well as the sidewalls and top surface of the first grid strips;
[0023] A second protective layer that covers at least the sidewalls and top surface of the second grid strip.
[0024] Secondly, embodiments of this disclosure provide an image sensor and a method for forming the same, the method comprising:
[0025] Provide a base;
[0026] On the surface of the substrate, a plurality of first grid strips are formed that extend along a first direction and are spaced apart along a second direction;
[0027] On the surface of the plurality of first grid strips, a plurality of second grid strips are formed extending along the second direction and spaced apart along the first direction; the size of the second grid strips in a third direction is greater than or equal to the size of the first grid strips in the third direction, and the bottom of the second grid strips extends between the plurality of first grid strips;
[0028] Wherein, all the first grid strips and all the second grid strips constitute a grid structure; the first direction and the second direction are two intersecting directions on the plane where the base is located, and the third direction is perpendicular to the plane where the base is located.
[0029] In some embodiments, providing the substrate includes:
[0030] Provide semiconductor substrates;
[0031] Within the semiconductor substrate, a plurality of pixel units are formed in an array arranged along the first direction and the second direction;
[0032] An isolation structure is formed between two adjacent pixel units.
[0033] In some embodiments, the first grid strip is formed by the following steps:
[0034] A first stacked structure is formed on the surface of the substrate; the first stacked structure includes a first initial oxide layer, a first initial metal layer and a second initial oxide layer stacked sequentially along the third direction;
[0035] The first stacked structure is patterned to form a plurality of first grid strips; the first grid strips include a first oxide layer, a first metal layer and a second oxide layer stacked sequentially along the third direction, and the projection of the first grid strips along the third direction is located on the isolation structure.
[0036] In some embodiments, the first stacked structure further includes a first initial antireflective layer located on the surface of the second initial oxide layer; the method further includes:
[0037] The first initial antireflective layer is patterned to form a first antireflective layer; the first grid strip also includes the first antireflective layer located on the surface of the second oxide layer.
[0038] In some embodiments, the second grid strip is formed by the following steps:
[0039] A second stacked structure is formed on the surface of the substrate and the first grid strip; the second stacked structure includes a second initial anti-reflective layer, a third initial oxide layer and a third initial anti-reflective layer stacked sequentially along the third direction; the dimension of the second stacked structure in the third direction is greater than or equal to the dimension of the first grid strip in the third direction;
[0040] The second stacked structure is patterned to form the second grid strip; the second grid strip includes a second anti-reflective layer, a third oxide layer and a third anti-reflective layer stacked sequentially along the third direction, and the projection of the second grid strip along the third direction is located on the isolation structure.
[0041] In some embodiments, forming a second stacked structure includes:
[0042] A second initial anti-reflective layer is formed on the surface of the substrate and the first grid strip; the second initial anti-reflective layer fills the gaps between the first grid strips;
[0043] On the surface of the second initial antireflective layer, the third initial oxide layer and the third initial antireflective layer are formed sequentially.
[0044] In some embodiments, the method further includes:
[0045] After the first grid strip is formed, a first protective layer is formed on the substrate and the exposed surfaces of the first grid strip; and / or,
[0046] After the second grid strip is formed, a second protective layer is formed on the exposed surface of the second grid strip.
[0047] In some embodiments, after forming the grid structure, the method further includes:
[0048] On the surface of the substrate, a plurality of color filters are formed in an array arranged along the first direction and the second direction; the projection of the color filters along the third direction is located on the corresponding pixel unit.
[0049] Thirdly, embodiments of this disclosure provide an imaging system, including:
[0050] Process memory;
[0051] A camera, the camera including a lens, and an image sensor formed by any one of the image sensors described in the above embodiments or by any one of the forming methods described in the above embodiments.
[0052] This disclosure provides an image sensor and a method for forming the same, as well as an imaging system. The image sensor includes: a substrate; a plurality of first grid strips located on the surface of the substrate, the plurality of first grid strips extending along a first direction and spaced apart along a second direction; a plurality of second grid strips located on the surface of the plurality of first grid strips, extending along the second direction and spaced apart along the first direction; the size of the second grid strips in a third direction is greater than or equal to the size of the first grid strips in a third direction, and the bottom of the second grid strips extends between the plurality of first grid strips; wherein all the first grid strips and all the second grid strips constitute a grid structure.
[0053] Here, since the grating structure is composed of first and second grating strips with different extension directions, the grating structure can be formed by forming the first and second grating strips in sequence, which reduces the influence of etching proximity effect and ion beam uniformity. This makes the included angle between the first and second grating strips a right angle, thereby increasing the exposed area of the grating structure and improving the quantum efficiency of the image sensor. Attached Figure Description
[0054] In the accompanying drawings (which are not necessarily drawn to scale), similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts. The drawings illustrate, by way of example and not limitation, the various embodiments discussed herein.
[0055] Figure 1 A schematic diagram of the structure of an image sensor provided for related technologies;
[0056] Figure 2 A schematic diagram of the structure of the image sensor provided in the embodiments of this disclosure. Figure 1 ;
[0057] Figure 3 A schematic diagram of the structure of the image sensor provided in the embodiments of this disclosure. Figure 2 ;
[0058] Figure 4 This is a circuit schematic diagram of the pixel unit of the image sensor in an embodiment of this disclosure;
[0059] Figure 5 A schematic diagram of the structure of the image sensor provided in the embodiments of this disclosure. Figure 3 ;
[0060] Figure 6 A schematic diagram of the structure of the image sensor provided in the embodiments of this disclosure. Figure 4 ;
[0061] Figure 7 and Figure 8 A schematic diagram of the structure of the image sensor provided in the embodiments of this disclosure. Figure 5 ;
[0062] Figure 9 A schematic diagram of the structure of the image sensor provided in the embodiments of this disclosure. Figure 6 ;
[0063] Figure 10 A schematic flowchart illustrating a method for forming an image sensor according to an embodiment of this disclosure;
[0064] Figures 11 to 19 This is a schematic diagram of the structure during the formation process of the image sensor provided in the embodiments of this disclosure;
[0065] Figure 20 This is a schematic diagram of the structure of an imaging system provided in an embodiment of the present disclosure. Detailed Implementation
[0066] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
[0067] In the following description, numerous details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.
[0068] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.
[0069] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this disclosure.
[0070] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.
[0071] An image sensor is a semiconductor device that converts optical information into electrical signals. For example, an image sensor can convert the variable attenuation of light waves into a signal (i.e., a small burst of current that transmits information); such image sensors can include charge-coupled device (CCD) image sensors and complementary metal-oxide-semiconductor (CMOS) image sensors. Depending on the difference in the optical path, CMOS image sensors (CIS) can be further divided into front-illuminated (FSI) image sensors and back-illuminated (BSI) image sensors.
[0072] In back-illuminated (BSI) image sensors, the isolation of the color filter (CF) is increased by setting a grid structure (i.e., back metal grid BMG, composite metal oxide grid CMG, etc.), thereby reducing crosstalk of light incident from the back of the crystal and improving image resolution.
[0073] However, during the formation of the lattice structure, the high-energy ion bombardment generated by dry etching can cause lattice damage to the semiconductor, resulting in defects. These defects, under dark conditions, can become centers for the generation of thermally excited electron-hole pairs, thus forming dark current (DC), which leads to noise in the image sensor. Additionally, as... Figure 1 As shown, due to the high pattern density of the grid structure 10, its corners are prone to rounding due to proximity effect or etching non-uniformity during the etching process, which reduces the exposed area of the grid structure, reduces the quantum efficiency (QE) of the image sensor, and causes the image sensor to become less sensitive to light.
[0074] Based on this, the present disclosure provides an image sensor and a method for forming the same; the image sensor and the method for forming the same in the present disclosure will be described in detail below with reference to the accompanying drawings.
[0075] Before introducing the embodiments of this disclosure, let's define three directions that may be used in the following embodiments to describe the three-dimensional structure. The three directions may include a first (X-axis) direction, a second (Y-axis) direction, and a third (Z-axis) direction. The Z-axis direction can be a direction perpendicular to the plane where the substrate is located; the X-axis and Y-axis directions are two perpendicular directions on the plane where the substrate is located, wherein the X-axis direction can be the direction in which the first grid strip extends.
[0076] This disclosure provides an image sensor 100, such as... Figure 2 As shown, the image sensor 100 includes: a substrate 110; a plurality of first grid strips 120 located on the surface of the substrate 110, the plurality of first grid strips 120 extending along the X-axis direction and spaced apart along the Y-axis direction; a plurality of second grid strips 130 located on the surface of the plurality of first grid strips 120, extending along the Y-axis direction and spaced apart along the X-axis direction; the size of the second grid strips 130 in the Z-axis direction is greater than or equal to the size of the first grid strips 120 in the Z-axis direction, and the bottom of the second grid strips 130 extends between the plurality of first grid strips 120; wherein all the first grid strips 120 and all the second grid strips 130 constitute a grid structure 140.
[0077] In this embodiment, the first grid strips 120 extend along the X-axis and are spaced apart along the Y-axis, meaning the photomask pattern of the first grid strips 120 is a parallel strip structure. This has several advantages: firstly, since the strip structures are open regions without intersections, the scattering effect of the ion beam path is reduced, thereby improving the etching rate uniformity and making the contour of the first grid strips 120 closer to the design value; secondly, because the strip structure has a single direction, the ion beam only needs to maintain uniformity in that direction, reducing local etching differences caused by electron beam fluctuations, resulting in higher etching precision and uniformity. The second grid strip 130 follows the same principle.
[0078] In other words, since the grating structure is composed of first and second grating strips with different extension directions, the grating structure can be formed by sequentially forming the first and second grating strips, which reduces the influence of etching proximity effect and ion beam uniformity. This makes the included angle between the first and second grating strips a right angle, thereby increasing the exposed area of the grating structure and improving the quantum efficiency of the image sensor.
[0079] Furthermore, since the size of the second grid strip 130 in the Z-axis direction is greater than or equal to the size of the first grid strip 120 in the Z-axis direction, the opening of the grid structure 140 (i.e., the second grid strip 130) is larger, which allows the image sensor to receive more light, thus improving the sensitivity of the image sensor. In addition, since the bottom of the second grid strip 130 extends between the multiple first grid strips 120, crosstalk between adjacent light rays can be avoided, improving the imaging quality of the image sensor.
[0080] Next, please refer to Figures 3 to 9 The image sensor 100 is described in detail. Figures 3 to 9 It includes a top view, a sectional view along a-a', a sectional view along b-b', and a sectional view along c-c'.
[0081] In some embodiments, please refer to Figure 3 The substrate 110 includes: a semiconductor substrate 111; a plurality of pixel units 112 arranged in an array along the X-axis and Y-axis directions within the semiconductor substrate 111; and an isolation structure 113 located between two adjacent pixel units 112.
[0082] In this embodiment of the disclosure, the semiconductor substrate 111 may be a silicon substrate, or the semiconductor substrate may include other semiconductor elements, such as germanium (Ge), or include semiconductor compounds (such as silicon carbide), or include other semiconductor alloys (such as silicon germanium), etc.
[0083] Please refer to the embodiments disclosed herein. Figure 3 Taking a 3x3 array as an example, nine pixel units 112 arranged along the X-axis and Y-axis are disposed within a semiconductor substrate 111. The pixel units 112 are used to realize photoelectric conversion; specifically, when light shines on the pixel unit 112, the pixel unit 112 absorbs photons and generates electron-hole pairs, thereby converting the optical signal into an electrical signal.
[0084] in, Figure 4 This is the circuit schematic for pixel unit 112; please refer to it. Figure 4Each pixel unit 112 may include a photoelectric conversion layer PD, a transfer transistor TG, a floating diffusion region FD, a reset transistor RST, a source follower transistor SF, and a selection transistor SEL. The photoelectric conversion layer PD generates a charge proportional to the amount of incident light from the outside. The photoelectric conversion layer PD is coupled to the floating diffusion region FD and transfers the generated and accumulated charge to the transfer transistor TG in the floating diffusion region FD. The floating diffusion region FD converts the charge into voltage and can store the charge through its parasitic capacitance. One end of the transfer transistor TG can be connected to the photoelectric conversion layer PD, and the other end can be connected to the floating diffusion region FD. The transfer transistor TG can transfer the charge generated by the photoelectric conversion layer PD to the floating diffusion region FD under the drive of the transfer signal TX. The source follower transistor SF amplifies the potential change in the floating diffusion region FD and outputs the amplified change to the output line Vout. When the source follower transistor SF is turned on, a predetermined potential (such as the power supply voltage VDD) supplied to the drain of the source follower transistor SF can be transferred to the drain region of the selection transistor SEL. The select transistor SEL can be driven by a predetermined bias voltage (such as the row select signal RS) to select the unit pixel to be read. The reset transistor RST can periodically reset the floating diffusion region FD; the reset transistor RST can be turned on by applying a reset signal RX, so that a predetermined potential (such as the power supply voltage VDD) supplied to the drain of the reset transistor RST can be transferred to the floating diffusion region FD.
[0085] Please refer to the embodiments disclosed herein. Figure 3 The isolation structure 113 can be a deep trench isolation (DTI), which extends from the surface of the semiconductor substrate 111 into the semiconductor substrate 111 to isolate adjacent pixel units 112. The width of the isolation structure 113 can gradually decrease along the direction towards the semiconductor substrate 111 (i.e., the opposite direction of the Z-axis). The isolation structure 113 can include a multilayer stacked structure (not shown); for example, the isolation structure 113 is composed of a first dielectric layer and a second dielectric layer sequentially covering the trench sidewalls, or it can be composed of either a first dielectric layer or a second dielectric layer. The materials of the first and second dielectric layers can both be silicon oxide or other high dielectric constant materials, such as silicon oxide (SiO2). 2) Materials such as hafnium oxide (HfO2), tantalum oxide (Ta2O5), titanium oxide (TiO2), zirconium oxide (ZrO2), and aluminum oxide (Al2O3) can be used. In other embodiments, the isolation structure 113 (the first dielectric layer and / or the second dielectric layer) may also extend to cover the surface of the semiconductor substrate 111.
[0086] In some embodiments, please refer to Figure 3The image sensor 100 also includes a plurality of color filters 150 arranged in an array along the X-axis and Y-axis directions on the surface of the substrate 110; the projection of the color filters 150 along the Z-axis direction is located on the corresponding pixel unit 112.
[0087] In this embodiment of the disclosure, the color filter 150 may include a red color filter, a green color filter, a blue color filter, an infrared (IR) color filter, a transparent color filter, or a color filter of other colors. Exemplarily, the color filters may also be arranged in a Bayer pattern or any other suitable pattern.
[0088] Please continue to refer to this. Figure 3 The image sensor 100 further includes a microlens 151 disposed above the color filter 150; the microlens 151 may be semi-elliptical to guide light incident on the color filter 150 to the corresponding pixel unit 112. The microlens 151 may be an optically transparent material, such as a transparent polymer material based on polystyrene resin, polyimide resin, polysiloxane resin, acrylic resin, epoxy resin, or copolymers thereof, or an inorganic material based on silicon oxide or silicon nitride.
[0089] In some embodiments, a protective structure (not shown) is further provided on the microlens 151; wherein, the protective structure may be conformally disposed on the upper surface of the microlens 151, for example, it may be configured as a hemispherical curved surface, so as to protect the microlens 151 while also cooperating with the microlens 151 to increase or decrease the focal length, thereby improving the image resolution. Exemplarily, the material of the protective structure may be an inorganic oxide layer, including but not limited to at least one or more of silicon oxide, titanium oxide, zirconium oxide, and hafnium oxide.
[0090] Please refer to the embodiments disclosed herein. Figure 3 The image sensor 100 further includes a redistribution layer 160 located on the opposite side of the grid structure 140; the redistribution layer 160 includes a dielectric layer 161 and redistribution lines 162 located within the dielectric layer 161. The dielectric layer 161 can be made of an oxide, such as silicon oxide; the redistribution lines 162 can be made of one or more conductive metal materials, such as copper, aluminum, copper-aluminum alloy, or tungsten. The redistribution lines 162 can transmit the electrical signals generated by the image sensor 100 to the corresponding processing circuit for processing.
[0091] Please refer to the embodiments disclosed herein. Figure 3 The grid structure 140 is located among multiple color filters 150 and is composed of first grid strips 120 and second grid strips 130 extending in different directions. Next, please refer to... Figures 5 to 9 The grid structure 140 is described in detail. Figures 5 to 9Only the substrate 110 and the grid structure 140 are shown. For other structures in the image sensor 100 (e.g., color filter 150, microlens 151, etc.), please refer to [link to relevant documentation]. Figure 3 The details are not elaborated here.
[0092] In some embodiments, please refer to Figure 5 The first grid strip 120 includes a first oxide layer 121, a first metal layer 122 and a second oxide layer 123 stacked sequentially along the Z-axis direction. The projection of the first grid strip 120 along the Z-axis direction is located on the isolation structure 113.
[0093] In this embodiment of the disclosure, the materials of the first oxide layer 121 and the second oxide layer 123 include at least one of silicon oxide, aluminum oxide, tantalum oxide, and combinations thereof; the material of the first metal layer 122 includes tungsten, titanium, or tantalum.
[0094] Furthermore, the refractive indices of the first oxide layer 121 and the second oxide layer 123 can both be less than or equal to the refractive index of the first metal layer 122; for example, the materials of the first oxide layer 121 and the second oxide layer 123 can both be silicon oxide with a refractive index of about 1.45, and the first metal layer 122 can be tungsten with a refractive index of about 1.91.
[0095] This creates a gradient refractive index transition between the first oxide layer 121, the first metal layer 122, and the second oxide layer 123. By utilizing Fresnel's law of reflection, interface reflection is reduced, allowing more light to penetrate to the underlying pixel unit 112 (location can be referenced). Figure 3 This improves the quantum efficiency of the image sensor 100.
[0096] Furthermore, the first oxide layer 121 and the second oxide layer 123 can guide light to be confined within the corresponding pixel unit, reducing crosstalk between pixels; the first metal layer 122 can reflect unabsorbed light back to the pixel unit 112, reducing light loss, thereby improving the sharpness and contrast of image edges. In some embodiments, the first oxide layer 121 and the second oxide layer 123 can also be used to improve the interface contact performance between the first metal layer 122 and the second grid strip 130 (and / or the isolation structure 113).
[0097] Please refer to the embodiments disclosed herein. Figure 5 The thicknesses of the first oxide layer 121, the first metal layer 122, and the second oxide layer 123 can be increased sequentially along the Z-axis direction, that is, the thickness of the first metal layer 122 is greater than that of the first oxide layer 121 and less than that of the second oxide layer 123; in this way, the structural stability of the first grid strip 120 can be improved.
[0098] In some embodiments, please refer to Figure 6The first grid strip 120 also includes a first anti-reflective layer 124 located on the surface of the second oxide layer 123.
[0099] In this embodiment of the disclosure, the material of the first antireflective layer 124 includes a nitrogen-containing material, such as silicon nitride or silicon carbide nitride. For example, when the material of the first antireflective layer 124 is silicon carbide nitride, the refractive index is approximately 2.0.
[0100] In this embodiment, the first antireflective layer 124 is made of a nitrogen-containing material. On the one hand, since the refractive index of the nitrogen-containing material is higher (greater than that of the oxide layer), the reflection loss of light can be reduced, thereby improving the sensor's response sensitivity to blue light (especially improving color reproduction under low light conditions). On the other hand, since the nitrogen-containing material has high hardness and strength and a low coefficient of thermal expansion, the warping of the first grid strip 120 can be reduced by providing the first antireflective layer 124 on the surface of the first grid strip 120, thereby helping to improve the product yield of the image sensor 10.
[0101] In some embodiments, please refer to Figure 7 and Figure 8 ,or Figure 7 and Figure 9 The grid structure 140 further includes: a base 110 surface covering the adjacent first grid strips 120, and a first protective layer 141 covering the sidewalls and top surface of the first grid strips 120.
[0102] In this embodiment of the disclosure, the material of the first protective layer 141 includes at least one of silicon oxide, aluminum oxide, tantalum oxide, and combinations thereof.
[0103] In this embodiment, since the first protective layer 141 covers the surfaces of the first grid strip 120 and the substrate 110, the semiconductor lattice damage caused by high-energy ion bombardment during the subsequent formation of the second grid strip 130 can be avoided, thereby reducing dark current formed due to defects such as lattice damage, resulting in better image sensor clarity.
[0104] It should be noted that, for ease of understanding the arrangement and extension directions of the various structures in an image sensor, such as... Figure 7 As shown, a top view can also be a perspective view.
[0105] In some embodiments, please refer to Figure 5 or Figure 6 The second grid strip 130 includes a second anti-reflective layer 131, a third oxide layer 132 and a third anti-reflective layer 133 stacked sequentially along the Z-axis direction, and the projection of the second grid strip 130 along the Z-axis direction is located on the isolation structure 113.
[0106] In this embodiment of the disclosure, the materials of the second antireflective layer 131 and the third antireflective layer 133 include nitrogen-containing materials, such as silicon nitride and silicon carbide nitride; the material of the third oxide layer 132 includes at least one of silicon oxide, aluminum oxide, tantalum oxide, and combinations thereof.
[0107] Please refer to the embodiments disclosed herein. Figure 5 or Figure 6 The second anti-reflective layer 131 can be larger in size along the Z-axis direction than the first grid strip 120, and the bottom of the second anti-reflective layer 131 can extend to the adjacent first grid strip 120; thus, the etching difficulty when forming the second grid strip 130 can be reduced.
[0108] Furthermore, since the second grid strip 130 includes a second anti-reflection layer 131, a third oxide layer 132, and a third anti-reflection layer 133 stacked sequentially along the Z-axis, the anti-reflection (AR) effect or refractive index gradient design of the multilayer film system can be realized, thereby eliminating interface reflection and allowing more light to penetrate to the lower pixel unit 112 (location can be referenced). Figure 3 This improves the utilization rate of light, resulting in a higher quantum efficiency for the image sensor 100.
[0109] In this embodiment, since no metal layer is provided in the second grid strip 130, on the one hand, there is no metal contamination during the formation of the second grid strip 130, that is, the metal contamination during the formation of the grid structure 140 as a whole is reduced; on the other hand, the second grid strip 130 (non-metallic) can absorb stray light, avoiding crosstalk between adjacent pixels caused by the high reflectivity of metal materials (such as tungsten, aluminum, etc.), and improving the clarity of the image sensor.
[0110] It should be noted that the reference Figure 7 and Figure 8 ,or Figure 7 and Figure 9 When the grid structure 140 includes a first protective layer 141 covering the surface of the first grid strip 120 and the substrate 110, the bottom of the second anti-reflective layer 131 may extend between the surfaces of the first protective layer 141.
[0111] In some embodiments, please refer to Figure 7 and Figure 8 ,or Figure 7 and Figure 9 The grid structure 140 also includes a second protective layer 142 that covers at least the sidewalls and top surface of the second grid strip 130.
[0112] In this embodiment, the material of the second protective layer 142 includes at least one of silicon oxide, aluminum oxide, tantalum oxide, and combinations thereof. By providing the second protective layer 142, interface reflection can be reduced, while simultaneously improving the stability of the grid structure 140.
[0113] In this embodiment, the grid structure 140 can reflect or absorb light of non-target wavelengths incident from the crystal back, thereby reducing crosstalk between different pixel units, improving the isolation of the color filter 150, and thus improving image clarity and color accuracy. Furthermore, the grid structure 140 can also improve light utilization by reducing light scattering and absorption, thereby enhancing the sensor's sensitivity and dynamic range.
[0114] In this embodiment, since the grid structure is composed of first grid strips and second grid strips with different extension directions, the grid structure can be formed by sequentially forming the first grid strips and the second grid strips, which reduces the influence of etching proximity effect and ion beam uniformity, and makes the included angle between the first grid strips and the second grid strips a right angle. In this way, the exposed area of the grid structure is increased, and the quantum efficiency of the image sensor is improved.
[0115] This disclosure also provides a method for forming an image sensor 100, please refer to... Figure 10 The method for forming the image sensor 100 includes steps S110 to S130.
[0116] Step S110, provide substrate 110.
[0117] In step S120, a plurality of first grid strips 120 extending along the X-axis and spaced apart along the Y-axis are formed on the surface of the substrate 110.
[0118] In step S130, a plurality of second grid strips 130 extending along the Y-axis and spaced apart along the X-axis are formed on the surface of the plurality of first grid strips 120; the size of the second grid strips 130 in the Z-axis direction is greater than or equal to the size of the first grid strips 120 in the Z-axis direction, and the bottom of the second grid strips 130 extends between the plurality of first grid strips 120.
[0119] All the first grid strips 120 and all the second grid strips 130 constitute the grid structure 140.
[0120] In this embodiment, since the second grid strip 130 is formed after the first grid strip 120 is formed, and since both the first grid strip 120 and the second grid strip 130 are strip structures, the influence of etching proximity effect and ion beam uniformity is reduced, thereby making the included angle between the first grid strip and the second grid strip a right angle. In this way, the exposed area of the grid structure is increased, and the quantum efficiency of the image sensor is improved.
[0121] Next, the method for forming the image sensor 100 will be described in detail. Figures 11 to 19 This is a schematic diagram of the structure during the formation process of the memory provided in an embodiment of the present disclosure; wherein, Figures 11 to 19 It includes a top view, a sectional view along a-a', a sectional view along b-b', and a sectional view along c-c'.
[0122] In some embodiments, step S110, providing substrate 110, includes steps S111 to S113.
[0123] Step S111, provide as follows Figure 11 The semiconductor substrate 111 shown.
[0124] In this embodiment of the disclosure, the semiconductor substrate 111 may be a silicon substrate, or the semiconductor substrate may include other semiconductor elements, such as germanium (Ge), or include semiconductor compounds (such as silicon carbide), or include other semiconductor alloys (such as silicon germanium), etc.
[0125] Step S112: Within the semiconductor substrate 111, a plurality of arrays arranged in an array along the X-axis and Y-axis directions are formed. Figure 11 The pixel unit 112 shown.
[0126] In this embodiment of the disclosure, ion implantation can be performed on the semiconductor substrate 111 to form a photoelectric conversion layer PD, a transfer transistor TG, a floating diffusion region FD, a reset transistor RST, a source follower transistor SF, and a select transistor SEL device, thereby forming a pixel unit 112.
[0127] For example, if the semiconductor substrate 111 is P-type doped, N-type ions (such as phosphorus ions, arsenic ions, etc.) are implanted into the semiconductor substrate 111 to form a pixel unit 112 of an N-type photodiode. In other embodiments, when the semiconductor substrate 111 is N-type doped, P-type ions (such as boron ions, gallium ions, etc.) can also be implanted into the semiconductor substrate 111 to form a pixel unit 112 of a P-type photodiode. During the formation of the pixel unit 112, to ensure the yield of the pixel unit 112 formed after ion implantation, multiple ion implantations at different angles can be performed to form pixel units 112 conforming to a preset pattern.
[0128] Step S113, forming as shown in the figure between two adjacent pixel units 112. Figure 11 The isolation structure 113 shown.
[0129] In this embodiment of the present disclosure, a semiconductor substrate 111 is etched to form an etch trench located between two adjacent pixel units 112; an isolation structure 113 is formed in the trench. The isolation structure 113 includes a first dielectric layer and a second dielectric layer sequentially covering the sidewalls of the trench; or, a first dielectric layer or a second dielectric layer filling the trench.
[0130] The etching processes described in this disclosure include, but are not limited to, dry etching, wet etching, and combinations thereof.
[0131] Please refer to the embodiments disclosed herein. Figure 11 The method of forming the image sensor 100 further includes: forming a redistribution layer 160 located on the bottom surface of the semiconductor substrate 111; the redistribution layer 160 includes a dielectric layer 161 and redistribution 162 located in the dielectric layer 161.
[0132] In some embodiments, in step S120, a plurality of [likely referring to a specific type of substrate] extending along the X-axis direction and spaced apart along the Y-axis direction are formed on the surface of the substrate 110. Figure 13 The first grid strip 120 shown includes steps S121 to S122.
[0133] Step S121, on the surface of the substrate 110, form as shown in the image. Figure 12 The first stacked structure 120a shown includes a first initial oxide layer 121a, a first initial metal layer 122a and a second initial oxide layer 123a stacked sequentially along the Z-axis direction.
[0134] In some embodiments, please refer to Figure 12 The first stacked structure 120a further includes a first initial antireflective layer 124a located on the surface of the second initial oxide layer 123a. Thus, the aforementioned structure can be subsequently formed. Figure 6 or Figure 9 The first grid strip 120 is shown. In other embodiments, the first initial anti-reflective layer 124a may not be formed; in this case, the above-described structure can be formed subsequently. Figure 5 or Figure 8 The first grid strip 120 is shown.
[0135] The deposition processes involved in the embodiments of this disclosure include, but are not limited to: chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma enhanced chemical vapor deposition (PECVD), sputtering, metal-organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), and combinations thereof.
[0136] Step S122: Pattern the first stacked structure 120a to form multiple layers, such as... Figure 13 The first grid strip 120 shown includes a first oxide layer 121, a first metal layer 122, a second oxide layer 123 and a first anti-reflective layer 124 stacked sequentially along the Z-axis direction. The projection of the first grid strip 120 along the Z-axis direction is located on the isolation structure 113.
[0137] In this embodiment, since the first grid strips 120 extend along the X-axis and are spaced apart along the Y-axis, the photomask pattern of the first grid strips 120 is a parallel strip structure. In this way, on the one hand, since the strip structures are open regions without intersections, the scattering effect of the ion beam path is weakened, thereby improving the uniformity of the etching rate and making the outline of the first grid strips 120 closer to the design value. On the other hand, since the strip structure is unidirectional, the ion beam only needs to maintain uniformity in this direction, reducing the local etching differences caused by electron beam fluctuations, resulting in higher etching accuracy and uniformity.
[0138] In this embodiment of the present disclosure, after forming the first grid strip 120, the method for forming the image sensor 100 further includes cleaning the gaps between the first grid strips 120 to reduce the accumulation of etching residues. Cleaning can also be performed after the second grid strip 130 is formed, and will not be described further hereafter.
[0139] In some embodiments, after forming the first grid strip 120, the method of forming the image sensor 100 further includes: forming, on the exposed surfaces of the substrate 110 and the first grid strip 120, a surface as shown in the figure. Figure 14 The first protective layer 141 is shown.
[0140] In this embodiment, since the first protective layer 141 covers the surfaces of the first grid strip 120 and the substrate 110, the semiconductor lattice damage caused by high-energy ion bombardment during the subsequent formation of the second grid strip 130 can be avoided, thereby reducing dark current formed due to defects such as lattice damage, resulting in better image sensor clarity.
[0141] In other embodiments, the first protective layer 141 may not be formed, thus achieving the above-mentioned structure. Figure 5 The structure shown.
[0142] In this embodiment of the disclosure, after forming the first protective layer 141, the method for forming the image sensor 100 further includes: ... Figure 14 The structure shown undergoes annealing to reduce stress. Annealing can also be performed after the second protective layer 142 is formed; details will not be elaborated further.
[0143] In some embodiments, in step S130, a plurality of grid strips extending along the Y-axis and spaced apart along the X-axis are formed on the surface of the plurality of first grid strips 120. Figure 17 and Figure 18 The second grid strip 130 shown includes steps S131 and S132.
[0144] Step S131, on the surfaces of the substrate 110 and the first grid strip 120, form as shown in the figure. Figure 15 and Figure 16 The second stacked structure 130a shown includes a second initial antireflective layer 131a, a third initial oxide layer 132a and a third initial antireflective layer 133a stacked sequentially along the Z-axis direction; the dimension of the second stacked structure 130a in the Z-axis direction is greater than or equal to the dimension of the first grid strip 120 in the Z-axis direction.
[0145] In some embodiments, please refer to Figure 15 and Figure 16 The formation of the second stacked structure 130a specifically includes: forming a second initial anti-reflection layer 131a on the surface of the substrate 110 and the first grid strip 120; filling the gaps between the first grid strips 120 with the second initial anti-reflection layer 131a; and sequentially forming a third initial oxide layer 132a and a third initial anti-reflection layer 133a on the surface of the second initial anti-reflection layer 131a.
[0146] Step S132, pattern the second stacked structure 130a to form as shown Figure 17 and Figure 18The second grid strip 130 shown includes a second anti-reflective layer 131, a third oxide layer 132 and a third anti-reflective layer 133 stacked sequentially along the Z-axis direction. The projection of the second grid strip 130 along the Z-axis direction is located on the isolation structure 113.
[0147] In this embodiment, since the second grid strips 130 extend along the Y-axis and are spaced apart along the X-axis, the photomask pattern of the second grid strips 130 is a parallel strip structure. In this way, on the one hand, since the strip structures are open regions without intersections, the scattering effect of the ion beam path is weakened, thereby improving the uniformity of the etching rate and making the outline of the second grid strips 130 closer to the design value. On the other hand, since the strip structure is unidirectional, the ion beam only needs to maintain uniformity in this direction, reducing the local etching differences caused by electron beam fluctuations, resulting in higher etching accuracy and uniformity.
[0148] In this embodiment of the present disclosure, the first grid strip 120 and the second grid strip 130 constitute a grid structure 140. Since the second grid strip 130 is formed after the first grid strip 120 is formed, the influence of etching proximity effect and ion beam uniformity is reduced. As a result, the included angle between the first grid strip and the second grid strip is a right angle, making the pattern of the grid structure 140 regular, increasing the exposed area of the grid structure, and improving the quantum efficiency of the image sensor.
[0149] In this embodiment, since no metal layer is provided in the second grid strip 130, on the one hand, there is no metal contamination during the formation of the second grid strip 130, that is, the metal contamination during the formation of the grid structure 140 as a whole is reduced; on the other hand, the second grid strip 130 (non-metallic) can absorb stray light, avoiding crosstalk between adjacent pixels caused by the high reflectivity of metal materials (such as tungsten, aluminum, etc.), and improving the clarity of the image sensor.
[0150] In some embodiments, the method of forming an image sensor further includes: after forming the second grid strip 130, forming, on the exposed surface of the second grid strip 130, a surface as shown in the image sensor. Figure 19 The second protective layer 142 is shown.
[0151] In some embodiments, after forming the grid structure 140, the method for forming the image sensor further includes: forming, on the surface of the substrate 110, a grid structure 140, as shown in the figure. Figure 3 The multiple color filters 150 are arranged in an array along the X-axis and Y-axis directions; the projection of the color filters 150 along the Z-axis direction is located on the corresponding pixel unit 112.
[0152] In this embodiment of the disclosure, after forming the color filter 150, the method for forming the image sensor 100 further includes: forming as shown in the figure. Figure 3The microlens 151 shown is positioned above the color filter 150; the microlens 151 may be semi-elliptical to guide the light incident on the color filter 150 to the corresponding pixel unit 112.
[0153] In this embodiment of the present disclosure, after forming the microlens 151, the method for forming the image sensor 100 further includes: setting a protective structure (not shown) on the microlens 151; wherein the protective structure may be disposed conformally on the upper surface of the microlens 151, for example, it may be set as a hemispherical curved surface.
[0154] The image sensor formed by the forming method provided in this embodiment is similar to the image sensor in the above embodiments. For technical features not disclosed in detail in this embodiment, please refer to the above embodiments for understanding. Here, they will not be repeated.
[0155] In addition, embodiments of this disclosure also provide an imaging system 200 that uses the image sensor 100 described above to capture images. (See reference...) Figure 20 The imaging system 200 includes: a processing memory 210; a camera 220, which includes a lens 221 and an image sensor 100 in the above embodiments.
[0156] In this embodiment of the disclosure, the imaging system 200 may be a portable electronic device, such as a camera, mobile phone, tablet computer, webcam, camcorder, video surveillance system, automotive imaging system, video game system with imaging capabilities, or any other desired imaging system or device that captures digital image data.
[0157] Camera 220 can be used to convert incident light into digital image data. Camera 220 may include a lens 221 and a corresponding image sensor 100. Lens 221 may include a fixed lens and / or an adjustable lens, and may include microlenses formed on the imaging surface of image sensor 100; during image capture operation, light from the scene can be focused onto image sensor 100 through lens 221. Image sensor 100 may include circuitry for converting analog pixel data into corresponding digital image data to be provided to processing memory 210.
[0158] The processing memory 210 may include one or more integrated circuits, such as memory and processors (e.g., image processing circuitry, microprocessors, storage devices such as random access memory and non-volatile memory, etc.), and may be implemented using components separate from and / or part of the camera 220 (e.g., circuitry forming part of an integrated circuit within an integrated circuit that includes the image sensor 100 or is associated with the image sensor 100). The processing memory 210 may be used to process and store image data captured by the camera 220. The processed image data may be provided to external devices (e.g., computers, external displays, or other devices) as needed using wired and / or wireless communication paths coupled to the processing memory 210.
[0159] In the several embodiments provided in this disclosure, it should be understood that the disclosed structures and methods can be implemented in a non-target manner. The structural embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the various components shown or discussed are coupled to each other or directly coupled.
[0160] The features disclosed in the several method or structural embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method or structural embodiments.
[0161] The above are merely some embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.
Claims
1. An image sensor, characterized in that, include: Base; A plurality of first grid strips are located on the surface of the substrate, the plurality of first grid strips extending along a first direction and spaced apart along a second direction; A plurality of second grid strips are located on the surface of a plurality of first grid strips, extending along a second direction and spaced apart along the first direction; the size of the second grid strips in a third direction is greater than or equal to the size of the first grid strips in that third direction, and the bottom of the second grid strips extends between the plurality of first grid strips; Wherein, all the first grid strips and all the second grid strips constitute a grid structure; the first direction and the second direction are two intersecting directions on the plane where the base is located, and the third direction is perpendicular to the plane where the base is located.
2. The image sensor according to claim 1, characterized in that, The substrate includes: Semiconductor substrate; Multiple pixel units located within the semiconductor substrate and arranged in an array along the first and second directions; An isolation structure located between two adjacent pixel units; A plurality of color filters are arranged in an array along the first and second directions on the surface of the substrate; the projection of the color filters along the third direction is located on the corresponding pixel unit.
3. The image sensor according to claim 2, characterized in that, The first grid strip includes: A first oxide layer, a first metal layer, and a second oxide layer are stacked sequentially along the third direction, and the projection of the first grid strip along the third direction is located on the isolation structure.
4. The image sensor according to claim 3, characterized in that, The first grid strip also includes: The first anti-reflective layer is located on the surface of the second oxide layer.
5. The image sensor according to claim 2, characterized in that, The second grid strip includes: A second anti-reflective layer, a third oxide layer, and a third anti-reflective layer are stacked sequentially along the third direction, and the projection of the second grid strip along the third direction is located on the isolation structure.
6. The image sensor according to claim 2, characterized in that, The grid structure also includes: A first protective layer covering the base surface between adjacent first grid strips, as well as the sidewalls and top surface of the first grid strips; A second protective layer that covers at least the sidewalls and top surface of the second grid strip.
7. A method for forming an image sensor, characterized in that, The method includes: Provide a base; On the surface of the substrate, a plurality of first grid strips are formed that extend along a first direction and are spaced apart along a second direction; On the surface of the plurality of first grid strips, a plurality of second grid strips are formed extending along the second direction and spaced apart along the first direction; the size of the second grid strips in a third direction is greater than or equal to the size of the first grid strips in the third direction, and the bottom of the second grid strips extends between the plurality of first grid strips; Wherein, all the first grid strips and all the second grid strips constitute a grid structure; the first direction and the second direction are two intersecting directions on the plane where the base is located, and the third direction is perpendicular to the plane where the base is located.
8. The forming method according to claim 7, characterized in that, The provided substrate includes: Provide semiconductor substrates; Within the semiconductor substrate, a plurality of pixel units are formed in an array arranged along the first direction and the second direction; An isolation structure is formed between two adjacent pixel units.
9. The forming method according to claim 8, characterized in that, The first grid strip is formed by the following steps: A first stacked structure is formed on the surface of the substrate; the first stacked structure includes a first initial oxide layer, a first initial metal layer and a second initial oxide layer stacked sequentially along the third direction; The first stacked structure is patterned to form a plurality of first grid strips; the first grid strips include a first oxide layer, a first metal layer and a second oxide layer stacked sequentially along the third direction, and the projection of the first grid strips along the third direction is located on the isolation structure.
10. The forming method according to claim 9, characterized in that, The first stacked structure further includes a first initial antireflective layer located on the surface of the second initial oxide layer; the method further includes: The first initial antireflective layer is patterned to form a first antireflective layer; the first grid strip also includes the first antireflective layer located on the surface of the second oxide layer.
11. The forming method according to claim 8, characterized in that, The second grid strip is formed by the following steps: A second stacked structure is formed on the surface of the substrate and the first grid strip; the second stacked structure includes a second initial anti-reflective layer, a third initial oxide layer and a third initial anti-reflective layer stacked sequentially along the third direction; the dimension of the second stacked structure in the third direction is greater than or equal to the dimension of the first grid strip in the third direction; The second stacked structure is patterned to form the second grid strip; the second grid strip includes a second anti-reflective layer, a third oxide layer and a third anti-reflective layer stacked sequentially along the third direction, and the projection of the second grid strip along the third direction is located on the isolation structure.
12. The forming method according to claim 11, characterized in that, Forming a second layered structure, including: A second initial anti-reflective layer is formed on the surface of the substrate and the first grid strip; the second initial anti-reflective layer fills the gaps between the first grid strips; On the surface of the second initial antireflective layer, the third initial oxide layer and the third initial antireflective layer are formed sequentially.
13. The forming method according to claim 7, characterized in that, The method further includes: After the first grid strip is formed, a first protective layer is formed on the substrate and the exposed surfaces of the first grid strip; and / or, After the second grid strip is formed, a second protective layer is formed on the exposed surface of the second grid strip.
14. The forming method according to claim 8, characterized in that, After forming the grid structure, the method further includes: On the surface of the substrate, a plurality of color filters are formed in an array arranged along the first direction and the second direction; the projection of the color filters along the third direction is located on the corresponding pixel unit.
15. An imaging system, characterized in that, include: Process memory; A camera, the camera comprising a lens, and an image sensor formed by the image sensor of any one of claims 1 to 6 or the forming method of any one of claims 7 to 14.