An image sensor and a method of forming the same

Abstract

Embodiments of the present disclosure provide an image sensor and a forming method thereof; the image sensor comprises: a substrate comprising a first active region extending along a first direction; an isolation structure located on one side of the first active region along a second direction and penetrating through the substrate along a third direction; the isolation structure comprises a first isolation structure and a second isolation structure stacked in the opposite direction of the third direction, a functional layer is arranged at the bottom of the first isolation structure, and the second isolation structure extends into the functional layer; wherein the functional layer is used for balancing the electric charge in the first isolation structure.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor technology, and to, but is not limited to, an image sensor and a method for forming the same. Background Technology

[0002] In image sensors, trench isolation is typically formed between pixel units to reduce pixel crosstalk caused by light diffraction, thereby improving the image quality of the image sensor.

[0003] In related technologies, due to the presence of a SiN / SiO interface in trench isolation, and the high-energy electrons generated by glow discharge during the etching process of trench isolation bombarding the SiN / SiO interface, causing valence band electrons to absorb energy and jump to the conduction band, thereby generating electron-hole pairs. Furthermore, due to their low mobility, the holes remain at the SiN / SiO interface, forming a positive charge trap region. This allows the accumulated positive charge at the interface to cause the adjacent channel bands to bend downwards, which can easily lead to channel punch-through effect and affect the performance of the image sensor. Summary of the Invention

[0004] In view of this, embodiments of the present disclosure provide an image sensor and a method for forming the same.

[0005] In a first aspect, embodiments of this disclosure provide an image sensor, comprising: a substrate including a first active region extending along a first direction; an isolation structure located on one side of the first active region along a second direction and penetrating the substrate along a third direction; the isolation structure comprising a first isolation structure and a second isolation structure stacked in the opposite direction to the third direction, wherein a functional layer is disposed at the bottom of the first isolation structure, and the second isolation structure extends into the functional layer; wherein the functional layer is used to balance the charge in the first isolation structure; the first direction and the second direction intersect, and both the first direction and the second direction are parallel to the plane where the substrate is located, and the third direction is perpendicular to the plane where the substrate is located.

[0006] In some embodiments, the first isolation structure includes: a first material layer located on one side of the first active region along the second direction and extending along the first direction; the first material layer including an opening toward the third direction; the functional layer located at least on the bottom surface inside the first material layer, or penetrating the bottom of the first material layer; the inside of the first material layer being one side of the region surrounded by the first material layer; and a second material layer filling the inside of the first material layer having the functional layer.

[0007] In some embodiments, the second material layer includes: a nitride layer located inside the first material layer and not covered by the functional layer; and a first oxide layer filling the inside of the first material layer having the functional layer and the nitride layer.

[0008] In some embodiments, the nitride layer further extends between the inner sidewall of the first material layer and the functional layer; or, the nitride layer further extends to the surface of the functional layer.

[0009] In some embodiments, the second material layer further includes: a second oxide layer located outside the nitride layer and between the functional layer; the outside of the nitride layer is the side away from the first oxide layer.

[0010] In some embodiments, the image sensor further includes: a first conductive structure located on the top surface of the functional layer for discharging charge from the first isolation structure.

[0011] In some embodiments, the minimum dimension of the first isolation structure in the second direction is greater than the dimension of the second isolation structure in the second direction.

[0012] In some embodiments, the image sensor further includes: a gate structure located on the surface of the first active region and extending along the second direction to a portion of the surface of the first isolation structure; the first active region and the gate structure constituting a reset transistor; a photodiode for receiving incident light and generating photoelectrons; a transmission gate transistor for transferring and temporarily storing the photoelectrons to a floating diffusion node; and the reset transistor for resetting the potential of the floating diffusion node.

[0013] In a second aspect, embodiments of this disclosure provide a method for forming an image sensor, the method comprising: providing a substrate; the substrate including a first active region extending along a first direction; forming an isolation structure located on one side of the first active region along a second direction and penetrating the substrate along a third direction; the isolation structure including a first isolation structure and a second isolation structure stacked in the opposite direction to the third direction, a functional layer being disposed at the bottom of the first isolation structure, and the second isolation structure extending into the functional layer; wherein the functional layer is used to balance the charge in the first isolation structure; the first direction and the second direction intersect, and both the first direction and the second direction are parallel to the plane where the substrate is located, and the third direction is perpendicular to the plane where the substrate is located.

[0014] In some embodiments, the isolation structure is formed by the following steps: performing a first etching process from a first surface of the substrate to form a first etched groove extending along the first direction on one side of the first active region along the second direction; forming the first isolation structure in the first etched groove; the first isolation structure includes a first material layer located on the surface of the first etched groove, and the functional layer located on the bottom surface of the first material layer or penetrating the bottom of the first material layer; performing a second etching process from a second surface of the substrate to form a second etched groove extending along the third direction and exposing the functional layer; forming the second isolation structure in the second etched groove; wherein the minimum dimension of the first isolation structure in the second direction is greater than the dimension of the second isolation structure in the second direction; the first surface and the second surface are two opposing surfaces of the substrate along the third direction, and the first surface is the surface on one side of the first active region.

[0015] In some embodiments, the first isolation structure further includes a second material layer, and forming the first isolation structure further includes forming the second material layer, wherein the second material layer fills the remaining first etched groove.

[0016] In some embodiments, the second material layer includes a nitride layer and a first oxide layer; forming the second material layer includes: forming the nitride layer at least on the sidewall of the first material layer before or after forming the functional layer; and filling the first oxide layer inside the first material layer having the functional layer and the nitride layer after forming the functional layer and the nitride layer.

[0017] In some embodiments, the second material layer further includes a second oxide layer, and forming the second material layer further includes: after forming the functional layer, forming the second oxide layer on the exposed surface of the functional layer, the second oxide layer being located between the nitride layer and the functional layer.

[0018] In some embodiments, the method further includes: forming a first conductive structure on the top surface of the functional layer, the first conductive structure being used to discharge charge from the first isolation structure.

[0019] In some embodiments, the method further includes: forming a gate structure located on the surface of the first active region and extending along the second direction to a portion of the surface of the first isolation structure; the first active region and the gate structure constituting a reset transistor; forming a photodiode for receiving incident light and generating photoelectrons; forming a transmission gate transistor for transferring and temporarily storing the photoelectrons to a floating diffusion node; and the reset transistor for resetting the potential of the floating diffusion node.

[0020] This disclosure provides an image sensor and a method for forming the same; wherein the image sensor includes: a substrate, including a first active region extending along a first direction; an isolation structure located on one side of the first active region along a second direction and penetrating the substrate along a third direction; the isolation structure includes a first isolation structure and a second isolation structure stacked in the opposite direction of the third direction, a functional layer being disposed at the bottom of the first isolation structure, and the second isolation structure extending into the functional layer; wherein the functional layer is used to balance the charge in the first isolation structure.

[0021] Here, a functional layer is provided at the bottom of the first isolation structure, and the functional layer is used to balance the charge in the first isolation structure. On the one hand, the first isolation structure and the second isolation structure can be isolated by the functional layer, avoiding the bombardment of the first isolation structure by high-energy electrons generated by glow discharge during the etching process of the second isolation structure. On the other hand, even if electron-hole pairs are generated during the etching process, the functional layer can ensure charge balance. In this way, the charge band of the first active region will not bend, reducing the generation of channel punch-through effect. Attached Figure Description

[0022] In the accompanying drawings (which are not necessarily drawn to scale), similar reference numerals may describe similar parts in different views. Similar reference numerals with different letter suffixes may indicate different examples of similar parts. The drawings illustrate, by way of example and not limitation, the various embodiments discussed herein.

[0023] Figure 1 A schematic diagram of the structure of an image sensor provided for related technologies;

[0024] Figures 2 to 15 This is a schematic diagram of the structure of an image sensor provided in an embodiment of this disclosure;

[0025] Figure 16 This is a circuit schematic diagram of the pixel unit of the image sensor in an embodiment of this disclosure;

[0026] Figure 17 A schematic flowchart illustrating a method for forming an image sensor according to an embodiment of this disclosure;

[0027] Figures 18 to 22 This is a schematic diagram of the structure during the formation process of the image sensor provided in the embodiments of this disclosure;

[0028] Figures 23 to 25 This is a schematic diagram of another image sensor forming process provided in an embodiment of the present disclosure;

[0029] Figure 26 This is a schematic diagram of the structure of an imaging system provided in an embodiment of the present disclosure. Detailed Implementation

[0030] Exemplary embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be implemented in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.

[0031] In the following description, numerous details are set forth in order to provide a more thorough understanding of this disclosure. However, it will be apparent to those skilled in the art that this disclosure may be practiced without one or more of these details. In other instances, to avoid confusion with this disclosure, certain technical features well-known in the art have not been described; that is, not all features of actual embodiments are described herein, nor are well-known functions and structures described in detail.

[0032] In the accompanying drawings, for clarity, the dimensions of layers, areas, and elements, as well as their relative dimensions, may be exaggerated. The same reference numerals denote the same elements throughout.

[0033] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, components, areas, layers, and / or portions, these elements, components, areas, layers, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, component, area, layer, or portion from another element, component, area, layer, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, area, layer, or portion discussed below may be referred to as a second element, component, area, layer, or portion. And the discussion of a second element, component, area, layer, or portion does not imply that the first element, component, area, layer, or portion necessarily exists in this disclosure.

[0034] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprise” and / or “comprising,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0035] An image sensor is a semiconductor device that converts optical information into electrical signals. For example, an image sensor can convert the variable attenuation of light waves into a signal (i.e., a small burst of current that transmits information); such image sensors can include charge-coupled device (CCD) image sensors and complementary metal-oxide-semiconductor (CMOS) image sensors. Depending on the difference in the optical path, CMOS image sensors (CIS) can be further divided into front-illuminated (FSI) image sensors and back-illuminated (BSI) image sensors.

[0036] Furthermore, by forming a trench isolation between two adjacent pixels, the pixel crosstalk problem caused by light diffraction in back-illuminated image sensors can be effectively solved. This not only improves quantum efficiency (QE), enabling the image sensor to capture more light signals, but also significantly reduces noise in the image, thereby improving the signal-to-noise ratio (SNR) and dynamic range, making the image clearer.

[0037] However, please refer to Figure 1The image sensor 10 in the related art includes at least a transistor 12 (i.e., an RST transistor) and a trench isolation 11; wherein the transistor 12 includes an active region 12a and a gate structure 12b, and the trench isolation 11 includes a first trench isolation 11b and a second trench isolation 11a. Because the first trench isolation 11b is formed first and the second trench isolation 11a is formed in the process of forming the trench isolation 11, and the first trench isolation 11b is usually set as a three-layer structure of SiO-SiN-SiO, the high-energy electrons generated by glow discharge in the etching process of forming the second trench isolation 11a will bombard the SiN / SiO interface, causing the valence band electrons to absorb energy and jump to the conduction band, thereby generating electron-hole pairs. Furthermore, the holes are stuck at the SiN / SiO interface due to their low mobility, forming a positive charge trap region, which causes the positive charge to accumulate at the SiN / SiO interface, thereby causing the energy band of the P-type channel or N-type channel (i.e., the active region 12a) to bend downward (the Fermi level is close to the conduction band). This easily causes the channel punch-through effect, causing the transistor 12 to turn on when it should be off, reducing the performance of the image sensor.

[0038] Based on this, the present disclosure provides an image sensor and a method for forming the same; the image sensor and the method for forming the same in the present disclosure will be described in detail below with reference to the accompanying drawings.

[0039] Before introducing the embodiments of this disclosure, let's define three directions that may be used in the following embodiments to describe the three-dimensional structure. These three directions may include a first (X-axis) direction, a second (Y-axis) direction, and a third (Z-axis) direction. The Z-axis direction can be a direction perpendicular to the plane where the substrate is located; the X-axis and Y-axis directions are two perpendicular directions on the plane where the substrate is located, wherein the X-axis direction can be the direction of extension of the first active region.

[0040] This disclosure provides an image sensor 100, such as... Figure 2 As shown, the image sensor 100 includes a substrate 110 and an isolation structure 120. The substrate 110 includes a first active region 111 extending along the X-axis direction. The isolation structure 120 is located on one side of the first active region 111 along the Y-axis direction and extends through the substrate 110 along the Z-axis direction. The isolation structure 120 includes a first isolation structure 130 and a second isolation structure 140 stacked in opposite directions along the Z-axis direction. A functional layer 131 is disposed at the bottom of the first isolation structure 130, and the second isolation structure 140 extends into the functional layer 131. The functional layer 131 is used to balance the charge in the first isolation structure 130.

[0041] Please refer to the embodiments disclosed herein. Figure 2The substrate 110 can be a silicon substrate, and the semiconductor substrate can also include other semiconductor elements, such as germanium (Ge), or include semiconductor compounds (such as silicon carbide), or include other semiconductor alloys (such as silicon germanium), etc.

[0042] Please refer to the embodiments disclosed herein. Figure 2 The first active region 111 is formed by doping on the substrate 110. For example, when the substrate is a P-type substrate, N-type ions (such as phosphorus ions, arsenic ions, etc.) can be doped on the surface of the substrate 110 to form a source region and a drain region, with a channel region between the source region and the drain region; the source region, drain region and channel region together constitute the first active region 111; or, when the substrate is an N-type substrate, P-type boron ions (such as boron ions, gallium ions, etc.) can be doped on the surface of the substrate 110 to form the first active region 111.

[0043] Please refer to the embodiments disclosed herein. Figure 2 The image sensor 100 also includes a gate structure 160 located on the surface of the first active region 111; the first active region 111 and the gate structure 160 constitute a reset transistor (RST). The gate structure 160 can extend along the Y-axis to a portion of the surface of the first isolation structure 130. This not only reduces the photolithographic alignment tolerance during the formation of the gate structure 160, but also helps control the length of the channel region during substrate surface doping, thereby reducing process complexity and improving the stability of the reset transistor.

[0044] In this embodiment, the material of the functional layer 131 can be any suitable semiconductor material such as polycrystalline silicon. Furthermore, the functional layer 131 can be doped with P-type or N-type ions as needed, thereby introducing electrons and holes generated during the etching process into the functional layer 131.

[0045] In this embodiment, since a functional layer is provided at the bottom of the first isolation structure and the functional layer is used to balance the charge in the first isolation structure, on the one hand, the first isolation structure and the second isolation structure can be isolated by the functional layer, avoiding the bombardment of the first isolation structure by high-energy electrons generated by glow discharge during the etching process of the second isolation structure; on the other hand, even if electron-hole pairs are generated during the etching process, the functional layer can ensure charge balance, so that the charge band of the first active region will not bend, reducing the generation of channel punch-through effect.

[0046] Next, please refer to Figures 3 to 15 The image sensor 100 is described in detail. Figures 3 to 15 Includes a top view and a sectional view along a-a'.

[0047] First, the first isolation structure 130 will be described. In some embodiments, please refer to... Figures 3 to 6 In any one of the following, the first isolation structure 130 includes: a first material layer 132, a functional layer 131, and a second material layer 133; the first material layer 132 is located on one side of the first active region 111 along the Y-axis direction and extends along the X-axis direction; the first material layer 132 includes an opening facing the Z-axis direction; the functional layer 131 is located at least on the bottom surface inside the first material layer 132 (see reference). Figure 3 , Figure 5 and Figure 6 ), or penetrating the bottom of the first material layer 132 (see reference). Figure 4 The second material layer 133 fills the inner side of the first material layer 132, which has a functional layer 131. Here, the inner side of the first material layer 132 is one side of the area surrounded by the first material layer 132.

[0048] In the embodiments disclosed herein, please continue to refer to [the relevant documentation / reference]. Figures 3 to 6 In either case, the width of the first isolation structure 130 can be gradually reduced in the opposite direction of the Z-axis; on the one hand, when an excessively high electric field strength appears in the first active region 111, the first isolation structure 130 can be prevented from breaking down; on the other hand, compared with the vertical structure with a high aspect ratio, this structure can be realized by conventional photolithography and etching processes, which reduces the requirements for process accuracy and equipment, and improves the feasibility of the process and the yield.

[0049] In this embodiment of the disclosure, the functional layer 131 can be any suitable shape; for example, please refer to Figure 3 and Figure 4 Functional layer 131 is a block extending along the X-axis; for example, please refer to... Figure 5 and Figure 6 The functional layer 131 is U-shaped and extends along the X-axis. The material of the first material layer 132 can be silicon oxide or other high dielectric constant materials, such as silicon oxide (SiO2), hafnium oxide (HfO2), tantalum oxide (Ta2O5), titanium oxide (TiO2), zirconium oxide (ZrO2), aluminum oxide (Al2O3), etc.

[0050] In this embodiment of the present disclosure, the second isolation structure 140 may extend to the surface of the functional layer 131 (see reference). Figure 3 , Figure 5 and Figure 6 Alternatively, the second isolation structure 140 may extend into the interior of the functional layer 131 (see reference). Figure 4 ).

[0051] In this embodiment, since the functional layer 131 is located at the bottom of the first material layer 132, and the second isolation structure 140 can extend to the surface or interior of the functional layer 131, the high-energy electrons generated by the glow discharge will not bombard the interface between the first material layer 132 and the second material layer 133 during the etching process of forming the second isolation structure 140. As a result, the charge band of the first active region will not bend, reducing the generation of the channel punch-through effect.

[0052] In some embodiments, please refer to Figures 7 to 9 In any one of them, the second material layer 133 includes: a nitride layer 1331 and a first oxide layer 1332, wherein the nitride layer 1331 is located inside the first material layer 132 and is not covered by the sidewall of the functional layer 131; the first oxide layer 1332 fills the inside of the first material layer 132 having the functional layer 131 and the nitride layer 1331.

[0053] In this embodiment of the disclosure, the material of the nitride layer 1331 includes a nitrogen-containing material, such as silicon nitride or silicon carbide nitride. The material of the first oxide layer 1332 may be silicon oxide or other high dielectric constant materials, such as silicon oxide, hafnium oxide, tantalum oxide, titanium oxide, zirconium oxide, aluminum oxide, etc.

[0054] Please refer to the embodiments disclosed herein. Figures 7 to 9 In either case, since the first isolation structure 130 includes a first material layer 132 and a second material layer 133 (i.e., a nitride layer 1331 and a first oxide layer 1332), the first material layer 132, the nitride layer 1331, and the first oxide layer 1332 constitute an oxide-nitride-oxide (ONO) structure. On the one hand, since the dielectric constant of nitride is between that of oxide and silicon, the ONO structure can provide better insulation effect within the same size by utilizing the higher dielectric constant of the nitride layer, effectively reducing leakage current between adjacent devices (i.e., pixel units) and improving the performance and stability of the image sensor. On the other hand, since nitride has high hardness and mechanical strength, the nitride layer in the ONO structure can enhance the mechanical properties of the first isolation structure 130, enabling it to withstand various mechanical stresses during the image sensor manufacturing process and reducing the risk of structural deformation and damage.

[0055] In this embodiment, since the functional layer 131 can isolate the interface (e.g., SiN / SiO interface) between the second isolation structure 140 and the first material layer 132 and the nitride layer 1331, it avoids the high-energy electrons generated by glow discharge during the etching process of the second isolation structure from bombarding the interface between the first material layer 132 and the nitride layer 1331, thereby reducing the generation of electron holes. As a result, the charge band of the first active region will not bend, reducing the generation of channel punch-through effect.

[0056] In some embodiments, please refer to Figure 10 or Figure 11 The nitride layer 1331 can also extend between the inner sidewall of the first material layer 132 and the functional layer 131.

[0057] Thus, since the nitride layer 1331 (i.e., nitride) is relatively dense, the nitride layer 1331 extends to the sidewall inside the first material layer 132 and between the functional layer 131. This can prevent high-energy electrons generated by glow discharge during the etching process that forms the second isolation structure 140 from bombarding the interface between the nitride layer 1331 and the oxide layer, thereby enhancing the resistance to ion migration and improving the stability and reliability of the image sensor 100 during its formation.

[0058] It should be noted that the nitride layer 1331 and the first oxide layer 1332 can be adjacent (see reference). Figure 11 They can also be non-adjacent (please refer to...) Figure 10 ).

[0059] In some embodiments, please refer to Figure 12 The nitride layer 1331 can also extend to the surface of the functional layer 131.

[0060] This allows for an increase in the size of the nitride layer 1331 (i.e., nitride) in the first isolation structure 130. Since the dielectric constant of nitride is higher than that of oxide, increasing the size of the nitride can improve the overall dielectric constant of the ONO structure, thereby improving the insulation effect of the first isolation structure 130 and further reducing leakage current. Simultaneously, it also enhances the mechanical properties of the first isolation structure 130, reducing the possibility of structural deformation and damage.

[0061] In some embodiments, please refer to Figure 13 and Figure 14 The second material layer 133 further includes: a second oxide layer 1333, located between the outer side of the nitride layer 1331 and the functional layer 131; the outer side of the nitride layer 1331 is the side away from the first oxide layer 1332.

[0062] In this embodiment of the disclosure, the material of the second oxide layer 1333 may be silicon oxide or other high dielectric constant materials, such as silicon oxide, hafnium oxide, tantalum oxide, titanium oxide, zirconium oxide, aluminum oxide, etc.

[0063] In this embodiment, on the one hand, since the second oxide layer 1333, the nitride layer 1331, and the first oxide layer 1332 can form an oxide-nitride-oxide (ONO) structure, the isolation performance of the first isolation structure 130 is further improved. On the other hand, the functional layer 131 and the nitride layer 1331 can be isolated by the second oxide layer 1333.

[0064] It should be noted that, please refer to Figure 13 When the functional layer 131 completely covers the inner sidewall of the first material layer 132, the second isolation structure 140 can penetrate the bottom of the functional layer 131. Since the functional layer 131 completely covers the inner sidewall of the first material layer 132, even if electron-hole pairs are generated during the etching process of the second isolation structure, the functional layer 131 can absorb the generated electrons and holes to ensure charge balance in the first active region. In this way, the charge band of the first active region will not bend, reducing the generation of channel punch-through effect.

[0065] Next, the second isolation structure 140 will be described. In this embodiment, the second isolation structure 140 may include one or more layers. For example, please refer to... Figure 15 The second isolation structure 140 may include a first dielectric layer 141, a second dielectric layer 142 and a third dielectric layer 143 that sequentially cover the sidewalls of the trench.

[0066] The materials of the first dielectric layer 141, the second dielectric layer 142, and the third dielectric layer 143 can be silicon oxide or other high dielectric constant materials, such as silicon oxide, hafnium oxide, tantalum oxide, titanium oxide, zirconium oxide, aluminum oxide, etc. Adjacent pixel units can be jointly isolated by the first isolation structure 130 and the second isolation structure 140.

[0067] In this embodiment of the disclosure, the isolation structure 120 may be a full backside deep trench isolation (FBDTI), the first isolation structure 130 may be a shallow trench isolation (STI), and the second isolation structure 140 may be a deep trench isolation (DTI).

[0068] In some embodiments, please refer to Figures 2 to 15 In either case, the minimum dimension of the first isolation structure 130 in the Y-axis direction is greater than the dimension of the second isolation structure 140 in the Y-axis direction.

[0069] Thus, firstly, since the first isolation structure 130 has a larger dimension along the Y-axis, it can provide a greater isolation distance, which not only reduces parasitic capacitance and leakage current, better meeting electrical performance requirements, but also reduces the difficulty of etching or filling the first isolation structure 130. Secondly, since the second isolation structure 140 needs to penetrate into the substrate, its depth-to-width ratio is large. To reduce sidewall collapse or voids during the etching or filling process of the second isolation structure 140, setting its width (i.e., the dimension along the Y-axis) to a smaller value can reduce the processing difficulty and the risk of damage to surrounding structures.

[0070] In some embodiments, please refer to Figure 15 The image sensor 100 also includes a first conductive structure 150 located on the top surface of the functional layer 131 for discharging charge from the first isolation structure 130.

[0071] In this embodiment of the disclosure, the material of the first conductive structure 150 can be any material with good conductivity, such as any one or more of titanium (Ti), titanium nitride (TiN), tungsten nitride (WN), tungsten (W), cobalt (Co), platinum (Pt), palladium (Pd), ruthenium (Ru), and copper (Cu).

[0072] In this embodiment of the present disclosure, by applying a voltage to the functional layer 131 through the first conductive structure 150, the accumulated charge in the functional layer 131 can be discharged, thereby reducing charge accumulation and thus not affecting the charge band of the first active region, reducing the generation of channel punch-through effect.

[0073] In some embodiments, please refer to Figure 15 The image sensor 100 also includes: a photodiode 170, a transmission gate transistor 180, and a reset transistor (including a first active region 111 and a gate structure 160); the photodiode 170 is used to receive incident light and generate photoelectrons; the transmission gate transistor 180 is used to transfer and temporarily store the photoelectrons to the floating diffusion node; and the reset transistor is used to reset the potential of the floating diffusion node.

[0074] In this embodiment of the disclosure, the image sensor 100 further includes: a floating diffusion region (not shown), a source follower transistor (not shown), and a selection transistor (not shown); wherein, the photodiode 170, the transmission gate transistor 180, the floating diffusion region, the reset transistor, the source follower transistor, and the selection transistor together constitute a pixel unit.

[0075] Please refer to the embodiments disclosed herein. Figure 15 The gate structure 160 includes a gate dielectric layer 161 and a gate conductive layer 162. The gate dielectric layer can be made of silicon oxide or other suitable materials. The gate conductive layer can be made of any material with good conductivity, such as titanium, titanium nitride, tungsten nitride, or tungsten, or any one or more of these. Other types of transistors may also include an active region and a gate. For details on the specific structures of other types of transistors, please refer to the reset transistor example; further details are omitted here.

[0076] Please refer to the embodiments disclosed herein. Figure 15 The image sensor 100 also includes a second conductive structure 151, which is electrically connected to the gate conductive layer 162. The gate conductive layer 162 can control the conduction and cutoff of the current in the first active layer.

[0077] Please refer to the embodiments disclosed herein. Figure 15 The image sensor 100 also includes an insulating structure 190 that covers the surface of the substrate 110, the reset transistor (i.e., the gate structure 160), the transmission gate transistor 180, and other structures to prevent leakage current in the image sensor 100.

[0078] In addition, a doped layer 112 is disposed on the surface of the substrate 110. When the substrate is an N-type substrate, the doped layer 112 can be P-type doped. The doped layer 112 can isolate adjacent reset transistors (including the first active region 111 and the gate structure 160) and transmission gate transistors 180.

[0079] It should be noted that, Figure 15 The top view in the image only shows the isolation structure 120, the gate structure 160, and the transmission gate transistor 180.

[0080] Finally, a detailed explanation of the circuit principles of the pixel units in the image sensor 100 is provided; please refer to [link / reference needed]. Figure 16 Each pixel unit may include a photodiode (PD), a transmission gate transistor (TG), a floating diffusion region (FD), a reset transistor (RST), a source follower transistor (SF), and a select transistor (SEL). The photodiode (PD) generates a charge proportional to the amount of incident light from the outside. The photodiode (PD) is coupled to the floating diffusion region (FD) and transfers the generated and accumulated charge to the transmission gate transistor (TG) of the floating diffusion region (FD). The floating diffusion region (FD) converts the charge into a voltage and stores the charge through its parasitic capacitance. One end of the transmission gate transistor (TG) can be connected to the photodiode (PD), and the other end can be connected to the floating diffusion region (FD). Driven by a transfer signal (TX), the transmission gate transistor (TG) transfers the charge generated by the photodiode (PD) to the floating diffusion region (FD). The source follower transistor (SF) amplifies the potential change in the floating diffusion region (FD) and outputs the amplified change to the output line Vout. When the source follower transistor (SF) is turned on, a predetermined potential (such as the power supply voltage VDD) supplied to the drain of the source follower transistor (SF) can be transferred to the drain region of the select transistor (SEL). The select transistor SEL can be driven by a predetermined bias voltage (such as the row select signal RS) to select the unit pixel to be read. The reset transistor RST can periodically reset the floating diffusion region FD; the reset transistor RST can be turned on by applying a reset signal RX, so that a predetermined potential (such as the power supply voltage VDD) supplied to the drain of the reset transistor RST can be transferred to the floating diffusion region FD.

[0081] This disclosure also provides a method for forming an image sensor 100, please refer to... Figure 17The method for forming the image sensor 100 includes steps S110 and S120.

[0082] Step S110, providing a substrate 110; the substrate 110 includes a first active region 111 extending along the X-axis direction.

[0083] In step S120, an isolation structure 120 is formed located on one side of the first active region 111 along the Y-axis and penetrating the substrate 110 along the Z-axis. The isolation structure 120 includes a first isolation structure 130 and a second isolation structure 140 stacked in opposite directions along the Z-axis. A functional layer 131 is disposed at the bottom of the first isolation structure 130, and the second isolation structure 140 extends into the functional layer 131. The functional layer 131 is used to balance the charge in the first isolation structure 130.

[0084] In this embodiment, since a functional layer is provided at the bottom of the first isolation structure and the functional layer is used to balance the charge in the first isolation structure, on the one hand, the first isolation structure and the second isolation structure can be isolated by the functional layer, avoiding the bombardment of the first isolation structure by high-energy electrons generated by glow discharge during the etching process of the second isolation structure; on the other hand, even if electron-hole pairs are generated during the etching process, the functional layer can ensure charge balance, so that the charge band of the first active region will not bend, reducing the generation of channel punch-through effect.

[0085] Next, the method for forming the image sensor 100 will be described in detail. Figures 18 to 22 This is a schematic diagram of the structure during the formation process of the image sensor 100 provided in this embodiment of the disclosure; wherein, Figures 18 to 22 Includes a top view and a sectional view along a-a'.

[0086] First, perform step S110, providing, for example Figure 18 The substrate 110 shown includes a first active region 111 extending along the X-axis direction.

[0087] In this embodiment of the present disclosure, the first active region 111 is formed by doping on the substrate 110. For example, when the substrate is a P-type substrate, N-type ions (such as phosphorus ions, arsenic ions, etc.) can be doped on the surface of the substrate 110 to form a source region and a drain region, with a channel region between the source region and the drain region; the source region, drain region, and channel region together constitute the first active region 111; or, for example, when the substrate is an N-type substrate, P-type boron ions (such as boron ions, gallium ions, etc.) can be doped on the surface of the substrate 110 to form the first active region 111.

[0088] It should be noted that the step of doping the substrate 110 can be performed after the substrate 110 is provided or after the gate structure 160 is formed; this disclosure is not limited in this respect, and the location of the first active region 111 is only shown here as an example.

[0089] Next, step S120 is executed to form as follows: Figure 22 The isolation structure 120 shown is located on one side of the first active region 111 along the Y-axis and extends through the substrate 110 along the Z-axis. The isolation structure 120 includes a first isolation structure 130 and a second isolation structure 140 stacked in opposite directions along the Z-axis. A functional layer 131 is disposed at the bottom of the first isolation structure 130, and the second isolation structure 140 extends into the functional layer 131. The functional layer 131 is used to balance the charge in the first isolation structure 130.

[0090] In some embodiments, the isolation structure 120 is formed by the following steps: steps S121 to S124.

[0091] Step S121: A first etching process is performed on the first surface of the substrate 110 to form an etching pattern on one side of the first active region 111 along the Y-axis direction. Figure 18 The first etched groove 130a extends along the X-axis direction as shown.

[0092] The etching processes described in this disclosure include, but are not limited to, dry etching, wet etching, and combinations thereof.

[0093] Step S122, in the first etched groove 130a, form as shown Figure 21 The first isolation structure 130 shown includes a first material layer 132 located on the surface of the first etched groove 130a, and a functional layer 131 located on the bottom surface of the first material layer 132.

[0094] This disclosure provides embodiments to form as follows: Figure 14 The first isolation structure 130 shown is used as an example for explanation. In implementation, as shown, the surfaces exposed on the substrate 110 and the first etched groove 130a are sequentially formed as follows: Figure 19 The diagram shows a first initial material layer 132a and an initial functional layer 131a; wherein, the first initial material layer 132a located on the surface of the first etched groove 130a constitutes the first material layer 132, and the first initial material layer 132a located on the surface of the substrate 110 constitutes the initial gate dielectric layer 161a. Next, the first initial material layer 132a is etched to form... Figure 20 The functional layer 131 shown is located at the bottom of the first material layer 132.

[0095] It should be noted that when forming functional layers 131 of other shapes (e.g.) Figure 13The U-shape shown can also be formed by deposition on the surface of the first material layer 132. This disclosure does not limit the method or shape of forming the functional layer 131.

[0096] The deposition processes involved in the embodiments of this disclosure include, but are not limited to: chemical vapor deposition (CVD), physical vapor deposition (PVD), plasma enhanced chemical vapor deposition (PECVD), sputtering, metal-organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), and combinations thereof.

[0097] In some embodiments, the first isolation structure 130 further includes a second material layer 133, and forming the first isolation structure 130 further includes: forming a material layer 133. Figure 21 The second material layer 133 shown fills the remaining first etched groove 130a.

[0098] In some embodiments, the second material layer 133 includes a nitride layer 1331 and a first oxide layer 1332; forming the second material layer 133 specifically includes: after forming the functional layer 131, forming a nitride layer 1331 at least on the sidewall of the first material layer 132; after forming the functional layer 131 and the nitride layer 1331, filling the inner side of the first material layer 132 having the functional layer 131 and the nitride layer 1331 with the first oxide layer 1332.

[0099] In some embodiments, the second material layer 133 further includes a second oxide layer 1333, and forming the second material layer 133 further includes: after forming the functional layer 131, forming the second oxide layer 1333 on the exposed surface of the functional layer 131, wherein the second oxide layer 1333 is located between the nitride layer 1331 and the functional layer 131.

[0100] Please refer to the following when implementing: Figure 21 A second oxide layer 1333, a nitride layer 1331, and a first oxide layer 1332 are sequentially formed on the exposed surfaces of the first material layer 132 and the functional layer 131; the second oxide layer 1333, the nitride layer 1331, and the first oxide layer 1332 constitute the second material layer 133.

[0101] In some other embodiments, when the second material layer 133 comprises only a nitride layer 1331 and a first oxide layer 1332, please refer to... Figures 7 to 9 , Figure 12 A nitride layer 1331 and a first oxide layer 1332 can be sequentially formed on the exposed surfaces of the first material layer 132 and the functional layer 131. Alternatively, please refer to... Figure 10 and Figure 11 Before the formation of functional layer 131, nitride layer 1331 is formed; after the formation of functional layer 131, first oxide layer 1332 is formed.

[0102] In some embodiments, after forming the first isolation structure 130, the method of forming the image sensor 100 further includes: forming as shown in the figure. Figure 22 The gate structure 160 shown is located on the surface of the first active region 111 (i.e., the channel region) and extends along the Y-axis to a portion of the surface of the first isolation structure 130; the first active region 111 and the gate structure 160 constitute a reset transistor (RST); a photodiode 170 is formed, which is used to receive incident light and generate photoelectrons; a transmission gate transistor 180 is formed, which is used to transfer and temporarily store photoelectrons to the floating diffusion node; and a reset transistor is used to reset the potential of the floating diffusion node.

[0103] It should be noted that the gate structure 160 includes a gate dielectric layer 161 and a gate conductive layer 162; the gate dielectric layer 161 is formed by etching the initial gate dielectric layer 161a. Additionally, other types of transistors may also include an active region and a gate; for details on the specific structures of other types of transistors, please refer to the reset transistor for further understanding, which will not be elaborated here.

[0104] In this embodiment of the present disclosure, the method for forming the image sensor 100 further includes: forming a floating diffusion region (not shown), a source follower transistor (not shown), and a selection transistor (not shown); wherein, the photodiode 170, the transmission gate transistor 180, the floating diffusion region, the reset transistor, the source follower transistor, and the selection transistor together constitute a pixel unit.

[0105] In addition, the method for forming the image sensor 100 further includes forming a doped layer 112 on the surface of the substrate 110, wherein when the substrate is an N-type substrate, the doped layer 112 may be P-type doped. The doped layer 112 can isolate adjacent reset transistors (including the first active region 111 and the gate structure 160) and transmission gate transistors 180.

[0106] Step S123: A second etching process is performed on the second surface of the substrate 110 to form a second etched groove (not shown) that extends along the Z-axis and exposes the functional layer 131.

[0107] In this embodiment of the disclosure, during the formation of the second etched groove, the functional layer 131 can isolate the interface (e.g., SiN / SiO interface) between the first material layer 132 and the nitride layer 1331, thus preventing high-energy electrons generated by glow discharge from bombarding the interface between the first material layer 132 and the nitride layer 1331 during the etching process of the second etched groove. This reduces the generation of electron holes, thereby preventing the charge band of the first active region from bending and reducing the generation of channel punch-through effect.

[0108] In step S124, a second isolation structure 140 is formed in the second etched groove; wherein, the minimum dimension of the first isolation structure 130 in the Y-axis direction is greater than the dimension of the second isolation structure 140 in the Y-axis direction; the first surface and the second surface are two surfaces of the substrate 110 opposite to each other along the Z-axis direction, and the first surface is the surface on one side of the first active region 111.

[0109] In this embodiment of the disclosure, the second isolation structure 140 may include one or more layers. For example, please refer to... Figure 22 A first dielectric layer 141, a second dielectric layer 142, and a third dielectric layer 143 are formed to sequentially cover the surface exposed by the second etched groove; the first dielectric layer 141, the second dielectric layer 142, and the third dielectric layer 143 constitute a second isolation structure 140. Thus, adjacent pixel units can be isolated together by the first isolation structure 130 and the second isolation structure 140.

[0110] Thus, firstly, since the first isolation structure 130 has a larger dimension along the Y-axis, it can provide a greater isolation distance, which not only reduces parasitic capacitance and leakage current, better meeting electrical performance requirements, but also reduces the difficulty of etching or filling the first isolation structure 130. Secondly, since the second isolation structure 140 needs to penetrate into the substrate, its depth-to-width ratio is large. To reduce sidewall collapse or voids during the etching or filling process of the second isolation structure 140, setting its width (i.e., the dimension along the Y-axis) to a smaller value can reduce the processing difficulty and the risk of damage to surrounding structures.

[0111] This disclosure also provides embodiments such as Figure 15 The method for forming the image sensor 100 shown. Figures 23 to 25 This is a structural schematic diagram of the formation process of another image sensor 100 provided in an embodiment of this disclosure.

[0112] First, in such Figure 18 In the first etched groove 130a shown, as shown, the following are formed sequentially: Figure 23 The first material layer 132 and the second material layer 133 are shown.

[0113] The second material layer 133 may include a nitride layer 1331 and a first oxide layer 1332; or, a second oxide layer 1333, a nitride layer 1331 and a first oxide layer 1332; its structure can be understood with reference to the above embodiments, and will not be described again here.

[0114] Next, the second material layer 133 and the first material layer 132 are etched sequentially to form a structure as shown in the figure. Figure 24 The third etched groove 131b is shown. The third etched groove 131b penetrates the bottom of the first material layer 132.

[0115] Finally, a pattern is formed in the third etched groove 131b as shown in the image. Figure 25 Functional layer 131 is shown.

[0116] In this embodiment of the disclosure, when forming such Figure 25 After the first isolation structure 130 shown, the method of forming the image sensor 100 further includes: forming as shown in the figure. Figure 15 The photodiode 170, transmission gate transistor 180, floating diffusion region (not shown), reset transistor (including first active region 111 and gate structure 160), source follower transistor (not shown), and select transistor (not shown) shown together constitute a pixel unit. Here, gate structure 160 includes gate dielectric layer 161 and gate conductive layer 162; gate dielectric layer 161 is formed by etching an initial gate dielectric layer 161a.

[0117] In this embodiment of the disclosure, the method for forming the image sensor 100 further includes: sequentially forming as shown in the figure. Figure 15 The doped layer 112 and insulating structure 190 are shown.

[0118] In some embodiments, the method of forming the image sensor 100 further includes: forming a layer such as a top surface of the functional layer 131. Figure 15 The first conductive structure 150 shown is used to discharge the charge in the first isolation structure 130. At the same time, a second conductive structure 151 is formed that is electrically connected to the gate conductive layer 162. The second conductive structure 151 can control the conduction and cutoff of the current in the first active layer through the gate conductive layer 162.

[0119] In this embodiment of the present disclosure, by applying a voltage to the functional layer 131 through the first conductive structure 150, the accumulated charge in the functional layer 131 can be discharged, thereby reducing charge accumulation and thus not affecting the charge band of the first active region, reducing the generation of channel punch-through effect.

[0120] In this embodiment, since a functional layer is provided at the bottom of the first isolation structure and the functional layer is used to balance the charge in the first isolation structure, on the one hand, the first isolation structure and the second isolation structure can be isolated by the functional layer, avoiding the bombardment of the first isolation structure by high-energy electrons generated by glow discharge during the etching process of the second isolation structure; on the other hand, even if electron-hole pairs are generated during the etching process, the functional layer can ensure charge balance, so that the charge band of the first active region will not bend, reducing the generation of channel punch-through effect.

[0121] The image sensor formed by the forming method provided in this embodiment is similar to the image sensor in the above embodiments. For technical features not disclosed in detail in this embodiment, please refer to the above embodiments for understanding. Here, they will not be repeated.

[0122] In addition, embodiments of this disclosure also provide an imaging system 200 that uses the image sensor 100 described above to capture images. (See reference...) Figure 26 The imaging system 200 includes: a processing memory 210; a camera 220, which includes a lens 221 and an image sensor 100 in the above embodiments.

[0123] In this embodiment of the disclosure, the imaging system 200 may be a portable electronic device, such as a camera, mobile phone, tablet computer, webcam, camcorder, video surveillance system, automotive imaging system, video game system with imaging capabilities, or any other desired imaging system or device that captures digital image data.

[0124] Camera 220 can be used to convert incident light into digital image data. Camera 220 may include a lens 221 and a corresponding image sensor 100. Lens 221 may include a fixed lens and / or an adjustable lens, and may include microlenses formed on the imaging surface of image sensor 100; during image capture operation, light from the scene can be focused onto image sensor 100 through lens 221. Image sensor 100 may include circuitry for converting analog pixel data into corresponding digital image data to be provided to processing memory 210.

[0125] The processing memory 210 may include one or more integrated circuits, such as memory and processors (e.g., image processing circuitry, microprocessors, storage devices such as random access memory and non-volatile memory, etc.), and may be implemented using components separate from and / or part of the camera 220 (e.g., circuitry forming part of an integrated circuit within an integrated circuit that includes the image sensor 100 or is associated with the image sensor 100). The processing memory 210 may be used to process and store image data captured by the camera 220. The processed image data may be provided to external devices (e.g., computers, external displays, or other devices) as needed using wired and / or wireless communication paths coupled to the processing memory 210.

[0126] In the several embodiments provided in this disclosure, it should be understood that the disclosed structures and methods can be implemented in a non-target manner. The structural embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the various components shown or discussed are coupled to each other or directly coupled.

[0127] The features disclosed in the several method or structural embodiments provided in this disclosure can be arbitrarily combined without conflict to obtain new method or structural embodiments.

[0128] The above are merely some embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. An image sensor, characterized in that, include: The substrate includes a first active region extending along a first direction; An isolation structure is located on one side of the first active region along a second direction and extends through the substrate along a third direction; the isolation structure includes a first isolation structure and a second isolation structure stacked in the opposite direction of the third direction, a functional layer is disposed at the bottom of the first isolation structure, and the second isolation structure extends into the functional layer; The functional layer is used to balance the charge in the first isolation structure; the first direction and the second direction intersect, and both the first direction and the second direction are parallel to the plane where the substrate is located, and the third direction is perpendicular to the plane where the substrate is located.

2. The image sensor according to claim 1, characterized in that, The first isolation structure includes: A first material layer is located on one side of the first active region along the second direction and extends along the first direction; the first material layer includes an opening facing the third direction; The functional layer is located at least on the bottom surface inside the first material layer, or penetrates the bottom of the first material layer; the inside of the first material layer is one side of the area surrounded by the first material layer. The second material layer fills the inner side of the first material layer having the functional layer.

3. The image sensor according to claim 2, characterized in that, The second material layer includes: A nitride layer, located inside the first material layer and not covered by the functional layer on the sidewall; The first oxide layer fills the inner side of the first material layer having the functional layer and the nitride layer.

4. The image sensor according to claim 3, characterized in that, The nitride layer further extends between the inner sidewall of the first material layer and the functional layer; or, The nitride layer also extends to the surface of the functional layer.

5. The image sensor according to claim 3 or 4, characterized in that, The second material layer also includes: The second oxide layer is located outside the nitride layer and between the functional layer; the outside of the nitride layer is the side away from the first oxide layer.

6. The image sensor according to claim 1, characterized in that, The image sensor also includes: A first conductive structure, located on the top surface of the functional layer, is used to discharge the charge in the first isolation structure.

7. The image sensor according to claim 1, characterized in that, The minimum dimension of the first isolation structure in the second direction is greater than the dimension of the second isolation structure in the second direction.

8. The image sensor according to claim 1, characterized in that, The image sensor also includes: A gate structure is located on the surface of the first active region and extends along the second direction to a portion of the surface of the first isolation structure; the first active region and the gate structure constitute a reset transistor; a photodiode is used to receive incident light and generate photoelectrons; A transmission gate transistor is used to transfer and temporarily store the photogenerated electrons to a floating diffusion node; a reset transistor is used to reset the potential of the floating diffusion node.

9. A method for forming an image sensor, characterized in that, The method includes: A substrate is provided; the substrate includes a first active region extending along a first direction; An isolation structure is formed located on one side of the first active region along the second direction and penetrating the substrate along the third direction; the isolation structure includes a first isolation structure and a second isolation structure stacked in the opposite direction of the third direction, a functional layer is disposed at the bottom of the first isolation structure, and the second isolation structure extends into the functional layer; The functional layer is used to balance the charge in the first isolation structure; the first direction and the second direction intersect, and both the first direction and the second direction are parallel to the plane where the substrate is located, and the third direction is perpendicular to the plane where the substrate is located.

10. The forming method according to claim 9, characterized in that, The isolation structure is formed through the following steps: A first etching process is performed on the first surface of the substrate to form a first etching groove extending along the first direction on one side of the first active region along the second direction; The first isolation structure is formed in the first etched groove; the first isolation structure includes a first material layer located on the surface of the first etched groove, and the functional layer located on the bottom surface of the first material layer or penetrating the bottom of the first material layer; A second etching process is performed from the second surface of the substrate to form a second etched groove that extends along the third direction and exposes the functional layer; The second isolation structure is formed in the second etched groove; Wherein, the minimum dimension of the first isolation structure in the second direction is greater than the dimension of the second isolation structure in the second direction; the first surface and the second surface are two opposing surfaces of the substrate along the third direction, and the first surface is the surface on one side of the first active region.

11. The forming method according to claim 10, characterized in that, The first isolation structure further includes a second material layer, and the formation of the first isolation structure further includes: A second material layer is formed, which fills the remaining first etched groove.

12. The forming method according to claim 11, characterized in that, The second material layer includes a nitride layer and a first oxide layer; forming the second material layer includes: The nitride layer is formed at least on the sidewall of the first material layer before or after the formation of the functional layer; After the functional layer and the nitride layer are formed, the first oxide layer is filled inside the first material layer having the functional layer and the nitride layer.

13. The forming method according to claim 12, characterized in that, The second material layer further includes a second oxide layer, and forming the second material layer further includes: After the functional layer is formed, a second oxide layer is formed on the exposed surface of the functional layer, the second oxide layer being located between the nitride layer and the functional layer.

14. The forming method according to claim 9, characterized in that, The method further includes: A first conductive structure is formed on the top surface of the functional layer, the first conductive structure being used to discharge the charge in the first isolation structure.

15. The forming method according to claim 9, characterized in that, The method further includes: A gate structure is formed, the gate structure being located on the surface of the first active region and extending along the second direction to a portion of the surface of the first isolation structure; the first active region and the gate structure constitute a reset transistor; A photodiode is formed, which is used to receive incident light and generate photogenerated electrons; A transmission gate transistor is formed, which is used to transfer and temporarily store the photogenerated electrons to the floating diffusion node; the reset transistor is used to reset the potential of the floating diffusion node.

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