Pixel unit and preparation method, pixel array, image sensor and chip

Abstract

The application provides a pixel unit and a preparation method thereof, a pixel array, an image sensor and a chip, and relates to the technical field of semiconductors.The method comprises the following steps: providing a substrate; the substrate comprises an absorption region; the absorption region is used for sensing a light signal to generate photo-generated electrons; at least one first insertion layer is formed on the absorption region in the substrate; wherein the at least one first insertion layer is arranged at intervals, and each first insertion layer comprises at least one discontinuous region; a transmission region is formed in the discontinuous region, and a compensation region is formed on each transmission region; a storage layer is formed on each first insertion layer in the substrate; wherein the transmission region is used for transmitting the photo-generated electrons generated by the absorption region to the corresponding storage layer for storage, the compensation region is opposite to the conduction type of the storage layer, and the compensation region is used for reducing the lateral electron transmission barrier in the storage layer. The application is used for providing a technical scheme of an image sensor capable of realizing high full-well capacity and high imaging quality.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a pixel unit and its fabrication method, a pixel array, an image sensor, and a chip. Background Technology

[0002] As various electronic products place increasingly higher demands on the performance of image sensors, the full-well capacity of image sensors has become an important evaluation criterion. Full-well capacity refers to the maximum number of photogenerated electrons that an image sensor pixel unit can accommodate. The higher the full-well capacity, the larger the dynamic range of the image sensor and the better the high-intensity imaging effect of the image sensor.

[0003] Currently, in order to achieve high full-well capacity, the dosage of ion doping in the storage layer of the pixel unit photodiode is increased, or multiple implantation methods are used to extend and deepen the storage layer of the photodiode vertically. However, the increase in ion doping concentration makes it difficult for the photodiode to be depleted, thereby increasing the transmission noise of the image sensor, forming image trailing, and ultimately reducing the imaging quality of the image sensor. Summary of the Invention

[0004] This application provides a pixel unit and its fabrication method, a pixel array, an image sensor, and a chip, which provide a technical solution for an image sensor capable of achieving high full-well capacity and high imaging quality.

[0005] In a first aspect, this application provides a method for fabricating a pixel unit, the method comprising:

[0006] A substrate is provided; the substrate includes an absorption region; the absorption region is used to sense optical signals and generate photogenerated electrons;

[0007] In the substrate, at least one first insertion layer is formed on the absorption region; wherein the at least one first insertion layer is spaced apart, and each first insertion layer includes at least one discontinuity region;

[0008] A transmission region is formed in each of the discontinuity regions, and a compensation region is formed on the transmission region;

[0009] In the substrate, a storage layer is formed on each first insertion layer; the transport region is used to transport photogenerated electrons generated by the absorption region to the corresponding storage layer for storage; the compensation region has the opposite conductivity type to the storage layer and is used to reduce the lateral electron transport barrier in the corresponding storage layer.

[0010] In an alternative embodiment, the method further includes forming a first clamping layer disposed on the uppermost storage layer in the substrate.

[0011] In one alternative implementation, the first clamping layer has a different conductivity type than the storage layer, and / or the doping concentration of the first clamping layer is greater than the doping concentration of the uppermost storage layer.

[0012] In one alternative implementation, the doping concentration of each storage layer increases sequentially along the direction from the first insertion layer to the first clamping layer.

[0013] In one alternative embodiment, the doping concentration of the first clamping layer is 10. 17 -10 21 / cm 3 ; and / or, the doping concentration of each of the memory layers is 10. 17 -10 20 / cm 3 .

[0014] In one alternative embodiment, the thickness of the first clamping layer is 10nm-300nm along the direction of the substrate thickness; and / or, the thickness of each storage layer is 10nm-500nm; and / or, the thickness of each first insertion layer is 10nm-500nm.

[0015] In one alternative implementation, the first insertion layer has a different conductivity type than the absorption region, and / or the first insertion layer has a different conductivity type than the transmission region, and / or the first insertion layer has a different conductivity type than the storage layer.

[0016] In an optional implementation, the method further includes:

[0017] A gate oxide layer is formed on the first clamping layer;

[0018] A transmission gate is formed on the gate oxide layer, and a floating diffusion region is formed in the substrate on the other side of the transmission gate; wherein the first clamping layer and the storage layer are located on one side of the transmission gate, and the projection of the transmission gate on the substrate partially overlaps with the first clamping layer and the storage layer.

[0019] In one alternative implementation, the conductivity type of the floating diffusion region is the same as that of the storage layer, and / or the doping concentration of the floating diffusion region is greater than that of the uppermost storage layer.

[0020] In one alternative embodiment, the doping concentration of the storage layer is 10. 17 -10 20 / cm 3 And / or, the doping concentration of the floating diffusion region is 10. 18 -10 21 / cm 3 .

[0021] In one alternative implementation, the provision of the substrate includes:

[0022] An epitaxial layer is provided; the epitaxial layer has a first side and a second side in a direction perpendicular to the thickness direction of the epitaxial layer;

[0023] A first isolation structure is formed in the epitaxial layer from a first side therein, and a second isolation structure is formed in the epitaxial layer from a second side therein;

[0024] An absorption region is formed in the epitaxial layer between the first isolation structure and the second isolation structure.

[0025] In an optional implementation, the method further includes:

[0026] In the epitaxial layer, a second clamping layer is formed on the side of the absorption region opposite to the first insertion layer.

[0027] In one alternative embodiment, the second clamping layer penetrates the epitaxial layer in a direction perpendicular to the thickness direction of the epitaxial layer.

[0028] In one optional embodiment, forming an absorption region in the epitaxial layer located between the first isolation structure and the second isolation structure includes:

[0029] A first absorption layer and a second absorption layer are formed in the epitaxial layer between the first isolation structure and the second isolation structure; wherein the first absorption layer is located on the second absorption layer.

[0030] In one optional embodiment, the first absorption layer and the second absorption layer have the same conductivity type;

[0031] The conductivity types of the first absorption layer and the second absorption layer are different from the conductivity type of the second clamping layer;

[0032] And / or, the doping concentration of the first absorption layer is greater than the doping concentration of the second absorption layer.

[0033] In one optional embodiment, the doping concentration of the first absorption layer is 1x10⁻⁶. 15 -10 18 / cm 3 And / or, the doping concentration of the second absorption layer is 10. 12 -10 17 / cm 3 .

[0034] In one alternative implementation, the second absorption layer partially overlaps with the second clamping layer, and / or the first absorption layer partially overlaps with the second absorption layer, and / or the transmission region partially overlaps with the first absorption layer.

[0035] In one optional embodiment, the storage layer, the transport region, and the first absorption layer have the same conductivity type, and the doping concentration of the storage layer, the transport region, and the first absorption layer gradually decreases. In another optional embodiment, the doping concentration of the storage layer is greater than the doping concentration of the corresponding compensation region.

[0036] In one alternative embodiment, the ion doping concentration of the storage layer is 10. 17 -10 20 / cm 3 And / or, the ion doping concentration of the transport region is 10. 18 -10 20 / cm 3 And / or, the ion doping concentration of the compensation region is 10. 16 -10 19 / cm 3 .

[0037] In one optional implementation, the doping concentration of the compensation region overlapping the storage layer is less than the doping concentration of the storage layer on both sides of the compensation region.

[0038] In an alternative implementation, before forming the second clamping layer located on the side of the absorption region opposite to the first insertion layer, the method further includes:

[0039] At least one second insertion layer is formed at intervals within the absorption region; wherein the bottom of the second insertion layer is located within the second absorption layer, and the top of the second insertion layer extends through the second absorption layer until it is located within the first absorption layer.

[0040] In one alternative implementation, the at least one second insertion layer has a different doping type than the first absorption layer and the second absorption layer.

[0041] In one optional embodiment, a first isolation structure is formed in the epitaxial layer from a first side of the epitaxial layer, and a second isolation structure is formed in the epitaxial layer from a second side of the epitaxial layer, comprising:

[0042] A trench isolation structure is formed in the epitaxial layer;

[0043] Ion doping is performed on the epitaxial layer from the first side to form a first well isolation structure, and ion doping is performed on the epitaxial layer from the second side to form a second well isolation structure.

[0044] In one alternative implementation, the first well isolation structure surrounds the trench isolation structure.

[0045] In one alternative embodiment, the conductivity type of the first well isolation structure and the second well isolation structure is different from the conductivity type of the absorption region; the absorption region is in contact with the first well isolation structure and the second well isolation structure.

[0046] In one alternative embodiment, the first insertion layer penetrates the substrate in a direction perpendicular to the thickness direction of the substrate, the transmission region is formed in the inter-terminal region in a direction perpendicular to the extension direction of the first insertion layer, and the compensation region is formed on the transmission region in a direction perpendicular to the extension direction of the first insertion layer.

[0047] In one optional implementation, the conductivity type of the storage layer is P-type, and the conductivity type of the compensation region is N-type; or, the conductivity type of the storage layer is N-type, and the conductivity type of the compensation region is P-type.

[0048] In an optional embodiment, when the conductivity type of the storage layer is N-type, the dopant ion of the storage layer is one of P, As and Sb, the conductivity type of the compensation region is P-type, and the dopant ion of the compensation region is one of Bf2, B and In.

[0049] Alternatively, if the conductivity type of the storage layer is P-type, the dopant ion of the storage layer is one of Bf2, B, Ga, Al, and In; if the conductivity type of the compensation region is N-type, the dopant ion of the compensation region is one of P, As, and Sb.

[0050] Secondly, embodiments of this application also provide a pixel unit, which is prepared according to the pixel unit preparation method described in any one of the first aspects.

[0051] Thirdly, embodiments of this application also provide a pixel array, including a plurality of pixel units arranged in an array as described in the second aspect.

[0052] Fourthly, embodiments of this application also provide an image sensor, including a row selection logic unit, a column selection logic unit, a control logic unit, a readout circuit, and the pixel array described in the third aspect;

[0053] The column selection logic unit, the row selection logic unit, and the readout circuit are all electrically connected to the logic control unit.

[0054] The row selection logic unit is used to select the activated row pixel unit under the control of the logic control unit;

[0055] The column selection logic unit is used to select the activated column pixel unit under the control of the logic control unit;

[0056] The readout circuit is electrically connected to the pixel units in the pixel array and is used to read electrical signals from the selected pixel units.

[0057] Fifthly, embodiments of this application also provide a chip, including the image sensor of the first aspect.

[0058] The technical solution provided in this application embodiment includes a method for fabricating a pixel unit comprising: providing a substrate, the substrate including an absorption region for sensing light signals to generate photogenerated electrons; then, forming at least one first insertion layer on the absorption region in the substrate; wherein the at least one first insertion layer is spaced apart, and each first insertion layer includes at least one discontinuity region; forming a transmission region in the discontinuity region, and forming a compensation region on each transmission region; forming a storage layer on each first insertion layer in the substrate; wherein the transmission region is used to transmit photogenerated electrons generated by the absorption region to the corresponding storage layer for storage, and the compensation region has the opposite conductivity type to the storage layer, and the compensation region is used to reduce the lateral electron transport barrier in the storage layer.

[0059] Based on this, the pixel unit obtained in the embodiments of this application includes at least one storage layer and at least one first insertion layer on one side, and the conductivity type of the storage layer and the first insertion layer are different, which is used to form a junction capacitance and store photogenerated electrons. Therefore, the pixel unit in the embodiments of this application can use at least one storage layer and the corresponding insertion layer to store more photogenerated electrons, so as to achieve a high full-well capacity of the pixel unit.

[0060] It should be understood that a first insertion layer is formed between the storage layer and the absorption region. This first insertion layer causes a large transmission barrier between the absorption region and the storage layer. Based on this, the embodiments of this application form a transmission region that penetrates the first insertion layer between the absorption region and the storage layer, which enhances the transmission of photogenerated electrons in the absorption region toward the storage layer and eliminates image ghosting caused by the transmission barrier between the absorption region and the storage layer.

[0061] It should be further understood that, due to the presence of discontinuities in the first insertion layer, the potential of the region where the discontinuities of the first insertion layer are connected to the storage layer increases, thereby increasing the lateral electron transport barrier in the transmission region. Based on this, the embodiments of this application form a compensation region on the transmission region. The compensation region has the opposite conductivity type to the storage layer. The compensation region is used to reduce the lateral electron transport barrier in the storage layer, thereby eliminating image ghosting caused by the lateral electron transport barrier in the storage layer. Attached Figure Description

[0062] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0063] Figure 1 This is a structural diagram of step 1 of fabricating a pixel unit according to an embodiment of this application;

[0064] Figure 2(a) shows the structure of step 2 of preparing a pixel unit according to an embodiment of this application. Figure 1 ;

[0065] Figure 2(b) is a structural diagram of step 2 of preparing a pixel unit according to an embodiment of this application;

[0066] Figure 3(a) shows the structure of step 3 of preparing a pixel unit according to an embodiment of this application. Figure 1 ;

[0067] Figure 3(b) is a structural diagram of step 3 of preparing a pixel unit according to an embodiment of this application;

[0068] Figure 4(a) shows the structure of step 4 of preparing a pixel unit according to an embodiment of this application. Figure 1 ;

[0069] Figure 4(b) is a structural diagram of step 4 of preparing a pixel unit according to an embodiment of this application;

[0070] Figure 4(c) is a structural diagram of step 4 of preparing a pixel unit according to an embodiment of this application;

[0071] Figure 4(d) is a structural diagram of step 4 of preparing a pixel unit according to an embodiment of this application;

[0072] Figure 5(a) shows the structure of step 5 of preparing a pixel unit according to an embodiment of this application. Figure 1 ;

[0073] Figure 5(b) is a structural diagram of step 5 of preparing a pixel unit according to an embodiment of this application;

[0074] Figure 5(c) is a structural diagram of step 5 of preparing a pixel unit according to an embodiment of this application;

[0075] Figure 5(d) is a structural diagram of step 5 of preparing a pixel unit according to an embodiment of this application;

[0076] Figure 6(a) shows the structure of step 6 in preparing a pixel unit according to an embodiment of this application. Figure 1 ;

[0077] Figure 6(b) is a structural diagram of step 6 of preparing a pixel unit according to an embodiment of this application;

[0078] Figure 6(c) is a structural diagram of step 6 of preparing a pixel unit according to an embodiment of this application;

[0079] Figure 6(d) is a structural diagram of step 6 of preparing a pixel unit according to an embodiment of this application;

[0080] Figure 7(a) shows the structure of step 7 of preparing a pixel unit according to an embodiment of this application. Figure 1 ;

[0081] Figure 7(b) is a structural diagram of step 7 of preparing a pixel unit according to an embodiment of this application;

[0082] Figure 7(c) is a structural diagram of step 7 of preparing a pixel unit according to an embodiment of this application;

[0083] Figure 7(d) is a structural diagram of step 7 of preparing a pixel unit according to an embodiment of this application;

[0084] Figure 8(a) shows the structure of step 8 of preparing a pixel unit according to an embodiment of this application. Figure 1 ;

[0085] Figure 8(b) is a structural diagram of step 8 of preparing a pixel unit according to an embodiment of this application;

[0086] Figure 8(c) is a structural diagram of step 8 of preparing a pixel unit according to an embodiment of this application;

[0087] Figure 8(d) is a structural diagram of step 8 of preparing a pixel unit according to an embodiment of this application;

[0088] Figure 9 A pixel unit structure provided in the embodiments of this application Figure 1 ;

[0089] Figure 10 A second structural diagram of a pixel unit provided in an embodiment of this application;

[0090] Figure 11 Figure 3 shows a structure of a pixel unit provided in an embodiment of this application;

[0091] Figure 12 Figure 4 shows a structure of a pixel unit provided in an embodiment of this application;

[0092] Figure 13 A structural diagram of a comparative pixel unit is provided for an embodiment of this application;

[0093] Figure 14(a) shows an embodiment of this application. Figure 9 Simulation diagram of the reset potential of the AA' tangent in the N+ storage layer of pixel unit;

[0094] Figure 14(b) shows an embodiment of this application. Figure 13 Simulation diagram of the reset potential of the BB' tangent in the N+ storage layer of the pixel unit;

[0095] Figure 15(a) is a simulation diagram of the full-well capacity of the pixel unit provided in the embodiment of this application;

[0096] Figure 15(b) shows the simulation diagram of the full-well capacity of the existing pixel unit;

[0097] Figure 16 This is a schematic diagram of the structure of an image sensor provided in an embodiment of this application.

[0098] Figure label:

[0099] 20: Substrate; 21a-First isolation structure; 21b-Second isolation structure; 22-Floating diffusion region; 23-Gate oxide layer; 24-Transfer gate; 25-Physical isolation structure; 26-First clamping layer; 27-Memory layer; 27a-First partial memory layer; 27b-Second partial memory layer; 27c-Third partial memory layer; 27d-Fourth partial memory layer; 28-First insertion layer; 28a-First partial first insertion layer; 28b-Second partial first insertion layer; 28c-Third partial first insertion layer; 28d-Fourth partial first insertion layer; 29-Transfer region; 29a-First transfer region; 29b-Second transfer region; 210-Compensation region; 210a-First compensation region; 210b-First compensation region; 211-First absorption layer; 212-Second absorption layer; 213-Second clamping layer; 214-Second insertion layer;

[0100] 200 - Pixel unit; 1000 - Image sensor; 101 - Pixel array; 102 - Row selection logic unit; 103 - Readout circuit; 104 - Column selection logic unit; 105 - Control logic unit.

[0101] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0102] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0103] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. It is understood that the terms “first,” “second,” etc., as used herein may be used to describe various information or data, but these elements are not limited by these terms. These terms are only used to distinguish first information from another type of information. For example, without departing from the scope of this application, first action information may be referred to as second action information, and similarly, second action information may be referred to as first action information. Both first action information and second action information are action information, but they are not the same action information.

[0104] First, let me explain the terms used in this application:

[0105] Image sensors, which convert light signals into electrical signals, are core components of modern digital cameras, camcorders, smartphone cameras, and other devices.

[0106] A pixel is the basic building block of an image sensor. Each pixel is responsible for capturing incident light and converting it into an electrical signal.

[0107] A pixel array is a two-dimensional grid structure composed of multiple pixel units. Photogenerated electrons are free electrons generated during the photoelectric effect when photons strike a semiconductor material (such as silicon).

[0108] The technical solution provided in this application can be applied to high dynamic range image sensors, where the dynamic range is determined by the full-well capacity and the noise floor. Therefore, improving the dynamic range of an image sensor can be achieved by increasing the full-well capacity.

[0109] Currently, to achieve high full-well capacity, methods such as increasing the N-type ion doping dose of the photodiode in the pixel unit or using multiple N-type implantations to deepen the vertical extension of the photodiode are employed. However, increasing the N-type ion doping concentration makes it difficult to deplete the photodiode, thereby increasing the transmission noise of the image sensor, causing image trailing, and ultimately reducing the imaging quality of the image sensor. Subsequently, existing technologies have proposed increasing the PN junction area of ​​the photodiode to increase its capacitance and improve the full-well capacity.

[0110] Based on this, the technical concept of this application embodiment is: to design a method that can increase the PN junction area of ​​the photodiode to increase the photodiode capacitance, thereby achieving a high full-well capacity of the pixel unit, and while achieving a high full-well capacity, suppressing image ghosting, so that the pixel full-well capacity of the image sensor is significantly improved compared with the prior art.

[0111] Specifically, according to the PN junction capacitance formula,

[0112]

[0113] Where ε is the dielectric constant, S is the area, and W is the depletion layer width. From the above equation, it can be seen that besides increasing the area, another effective way to increase the junction capacitance of a PN junction is to reduce the width of the depletion region. For a P+N photodiode, the width W of the depletion region can be expressed by the following equation:

[0114]

[0115] Where, N D As shown in the equation, increasing the N-type doping concentration can significantly reduce the width of the depletion layer, thereby increasing the junction capacitance of the PN junction and thus improving the full-well capacity of the pixel. However, as mentioned earlier, increasing the N-type doping concentration of the photodiode can easily cause image ghosting and increase transmission noise, reducing the imaging quality of the image sensor. To address this contradiction, this application proposes a new technical concept that greatly increases the N-type doping concentration of the photodiode while suppressing image ghosting, significantly improving the full-well capacity of the image sensor compared to existing technologies.

[0116] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0117] In a first aspect, embodiments of this application provide a method for fabricating a pixel unit, comprising the following steps:

[0118] S101, providing a substrate; the substrate includes an absorption region; the absorption region is used to sense light signals to generate photogenerated electrons.

[0119] The absorption region can be prepared using semiconductor materials such as Si, Ge, AsGa, InGaAs, InGaAsP, and InP. It should be understood that semiconductor materials have suitable band gaps and can effectively absorb light of specific wavelengths. Therefore, the absorption region can generate photoelectrons based on the absorbed light signal.

[0120] The choice of material for the absorption region can be made according to actual needs, and this application does not impose any special limitations on this.

[0121] S102, in the substrate, at least one first insertion layer is formed on the absorption region; wherein the at least one first insertion layer is spaced apart, and each first insertion layer includes at least one discontinuity region.

[0122] In this embodiment, at least one first insertion layer can be formed in the substrate by ion implantation. The at least one first insertion layer is spaced apart for subsequent formation of a storage layer in the spaced regions. Each first insertion layer includes at least one discontinuity region for subsequent formation of a transport region to improve the transport barrier between the absorption region and the storage layer.

[0123] It should be understood that when forming the first insertion layer of each layer by ion implantation, the required dopant ion type can be selected according to the dopant ion type of the absorption region and the storage layer, so that the conductivity type of the first insertion layer is opposite to that of the absorption region and the storage layer, so as to form a PN junction in the contact region between the first insertion layer and the absorption region and the storage layer, thereby storing photogenerated electrons.

[0124] When forming the first insertion layer using ion implantation, the ion implantation energy and dose can be selected based on the depth of each first insertion layer and the ion doping concentration. The implantation energy determines the penetration depth of the ions in the material. Higher energies allow ions to penetrate deeper into the material, while lower energies confine them to the vicinity of the surface. The implantation dose determines the ion concentration.

[0125] Based on this, the ion implantation capability required to form the lowest first insertion layer among at least one first insertion layer is the highest, and the ion implantation capability required to form the uppermost first insertion layer among at least one first insertion layer is the lowest.

[0126] S103, a transmission region is formed in the discontinuity region, and a compensation region is formed on each transmission region.

[0127] In the embodiments of this application, a transport region can be formed in each discontinuity region by ion implantation, and a compensation region can be formed on each transport region.

[0128] When forming each transport region using ion implantation, the required dopant ion type can be selected according to the dopant ion type of the absorption region and the storage layer, so that the conductivity type of the transport region is the same as that of the absorption region and the storage layer, thereby reducing the potential difference between the transport region and the contact region of the absorption region and the storage layer, and thus reducing the transport barrier of photogenerated electrons and eliminating image ghosting of the image sensor.

[0129] For example: the absorption region and storage layer are N-type conductive, and the transport region is also set to N-type conductive. Or, the absorption region and storage layer are P-type conductive, and the transport region is also set to P-type conductive.

[0130] When forming transport regions using ion implantation, the ion implantation energy and dose can be selected based on the depth of each transport region and the concentration of ion doping. The implantation energy determines the penetration depth of ions in the material. Higher energies allow ions to penetrate deeper into the material, while lower energies confine them to the vicinity of the surface. The implantation dose determines the ion concentration. Therefore, the highest ion implantation capability is required to form the lowest transport region, and the lowest is required to form the uppermost transport region. S104, in the substrate, a storage layer is formed on each first insertion layer; wherein the first clamping layer has a different conductivity type than the storage layer, the transport region is used to transport photogenerated electrons generated by the absorption region to the corresponding storage layer for storage, the compensation region has a different conductivity type than the storage region, and the compensation region is used to reduce the lateral electron transport barrier within the corresponding storage layer.

[0131] When forming each compensation region using ion implantation, the required doping ion type can be selected according to the doping ion type of the storage layer, so that the conductivity type of the compensation region is different from that of the storage layer, thereby reducing the lateral potential difference in the storage layer, and thus reducing the lateral transport barrier in the storage layer, eliminating image ghosting of the image sensor.

[0132] When forming each compensation region using ion implantation, the required dopant ion type can be selected according to the dopant ion type of the storage layer to reduce the lateral potential difference in the storage layer, thereby reducing the lateral electron transport barrier in the storage layer and eliminating image ghosting of the image sensor.

[0133] Based on this, the pixel unit obtained in the embodiments of this application includes at least one storage layer and at least one first insertion layer on one side, and the conductivity type of the storage layer and the first insertion layer are different, which is used to form a junction capacitance and store photogenerated electrons. Therefore, the pixel unit in the embodiments of this application can use at least one storage layer and the corresponding insertion layer to store more photogenerated electrons, so as to achieve a high full-well capacity of the pixel unit.

[0134] It should be understood that a first insertion layer is formed between the storage layer and the absorption region. This first insertion layer causes a large transmission barrier between the absorption region and the storage layer. Based on this, the embodiments of this application form a transmission region that penetrates the first insertion layer between the absorption region and the storage layer, which enhances the transmission of photogenerated electrons in the absorption region toward the storage layer and eliminates image ghosting caused by the transmission barrier between the absorption region and the storage layer.

[0135] It should be further understood that, due to the presence of discontinuities in the first insertion layer, the potential of the region where the discontinuities of the first insertion layer are connected to the storage layer increases, thereby increasing the transmission barrier between the transmission region and the storage layer. Based on this, the embodiments of this application form a compensation region on the transmission region. The compensation region is used to reduce the lateral electron transmission barrier in the corresponding storage layer, thereby eliminating image ghosting caused by the lateral transmission barrier in the storage layer.

[0136] The above content provides an overall description of the pixel unit fabrication method provided in the embodiments of this application. The following content describes the pixel unit fabrication method provided in the embodiments in more detail.

[0137] The pixel unit fabrication method provided in this application embodiment may include the following steps:

[0138] Step 1, refer to Figure 1 An epitaxial layer 20 is provided. The epitaxial layer 20 has a first side and a second side in a direction perpendicular to the thickness direction of the epitaxial layer 20.

[0139] The epitaxial layer 20 includes P-type or N-type semiconductor materials such as Si, Ge, AsGa, InGaAs, InGaAsP, and InP.

[0140] Optionally, the outer layer 20 may be made of Si.

[0141] In this embodiment, the doping type of the epitaxial layer 20 can be P-type or N-type, which can be selected according to actual needs. For example, the N-type doped epitaxial layer 20 can provide electrons as the main charge carriers, while the P-type doped epitaxial layer 20 can provide holes as the main charge carriers.

[0142] The doping concentration of the epitaxial layer 20 is 10. 11 / cm 3 -10 17 / cm 3 To provide an epitaxial layer 20 with a lower doping concentration.

[0143] Step 2, referring to Figure 2(a), a first isolation structure is formed in the epitaxial layer 20 from the first side of the epitaxial layer 20, and a second isolation structure is formed in the epitaxial layer 20 from the second side of the epitaxial layer 20.

[0144] Step 2 may include forming a trench isolation structure 25 in the epitaxial layer 20.

[0145] The trench isolation structure 25 can be one of shallow trench isolation, semi-trench isolation or full trench isolation, and the embodiments of this application do not make special limitations on this.

[0146] The trench isolation structure achieves electrical isolation between pixel units by etching trenches in the epitaxial layer 20 and filling them with insulating materials (such as silicon dioxide or silicon nitride). This is used to prevent charge leakage and current crosstalk between adjacent pixels, thereby improving the signal-to-noise ratio and image quality of the image sensor.

[0147] From the first side of the epitaxial layer 20, the epitaxial layer 20 is doped with ions of a first conductivity type to form a first well isolation structure 21a. From the second side of the epitaxial layer 20, the epitaxial layer 20 is doped with ions of the first conductivity type to form a second well isolation structure 21b.

[0148] The first well isolation structure 21a and the second well isolation structure 21b are well isolation structures formed by ion implantation. The doping type of the first well isolation structure 21a and the second well isolation structure 21b can be P-type or N-type. This application embodiment does not make any special limitation on this.

[0149] Optionally, the first well isolation structure 21a and the second well isolation structure 21b are p-type doped, and the ion implantation element can be one of B, In and Bf2, with a doping concentration of 10. 15 -10 20 / cm 3 .

[0150] In this embodiment, by forming a first well isolation structure 21a and a second well isolation structure 21b on both sides of the epitaxial layer 20, different functional regions can be effectively isolated, preventing parasitic bipolar effects and leakage current. Furthermore, the first well isolation structure 21a and the second well isolation structure 21b help reduce capacitive coupling and current crosstalk between different pixel units, improving signal integrity. In some examples, the first well isolation structure 21a and the second well isolation structure 21b can also provide a certain degree of thermal isolation, reducing the impact of heat diffusion on adjacent pixel units and improving the stability and performance of the image sensor in high-temperature environments.

[0151] Optionally, referring to Figure 2(a), the first well isolation structure 21a surrounds the trench isolation structure 25 to reduce the dark current of the pixel unit. In image sensors, dark current refers to the undesirable current generated in the pixel unit under dark conditions. Dark current can cause image noise, reducing the signal-to-noise ratio and overall performance of the sensor. It should be understood that trench isolation structures typically introduce surface states and interface defects, which can become sources of dark current. By forming the first well isolation structure 21a around the trench isolation structure, these defects can be effectively passivated, reducing the generation of dark current.

[0152] Step 3, referring to Figure 3(a), an absorption region is formed in the epitaxial layer 20 between the first isolation structure 21a and the second isolation structure 21b.

[0153] Optionally, step 3 may include: forming a first absorption layer 211 and a second absorption layer 212 in the epitaxial layer 20 between the first isolation structure 21a and the second isolation structure 21b; wherein the first absorption layer 211 is located on the second absorption layer 212.

[0154] The first absorption layer 211 and the second absorption layer 212 have the same doping type, which can be P-type or N-type. The doping element can be one of P, As, B, In, and Bf2. This application embodiment does not make any special limitation on this.

[0155] Optionally, the first absorption layer 211 and the second absorption layer 212 are N-type doped layers, and the doping element can be either P or As.

[0156] For example, the doping concentration of the first absorption layer 211 is greater than the doping concentration of the second absorption layer 212.

[0157] It should be understood that the first absorption layer 211 is connected to the first insertion layer and transmits photogenerated electrons to the storage layer through the transmission region. In this embodiment, the storage layer has a high doping concentration to achieve a high full-well capacity. Therefore, the doping concentration of the first absorption layer 211 is set to be greater than that of the second absorption layer 212, so that the doping concentration of the second absorption layer 212, the first absorption layer 211 and the storage layer gradually transition, thereby optimizing the electric field distribution of the pixel unit and improving the overall performance of the image sensor.

[0158] In an optional embodiment, the doping concentration of the first absorber layer 211 is 1 x 10⁻⁶. 15 -10 18 / cm 3 And / or, the doping concentration of the second absorber layer 212 is 10. 12 -10 17 / cm 3 .

[0159] Referring to Figure 3(a), the method for fabricating a pixel unit further includes forming a second clamping layer 213 in the epitaxial layer 20.

[0160] Optionally, the second clamping layer 213 extends through the epitaxial layer 20 in a direction perpendicular to the thickness direction of the epitaxial layer 20 to reduce the backside dark current of the pixel unit.

[0161] In this embodiment, the second clamping layer 213 penetrates the epitaxial layer 20 along a direction perpendicular to the thickness direction of the epitaxial layer 20. This can control the electric field distribution in the epitaxial layer 20, reduce the phenomenon of electric field concentration in the back area of ​​the pixel unit, and reduce the thermal excitation and recombination of charge carriers by optimizing the electric field, thereby reducing the dark current.

[0162] It should be understood that the order in which the second clamping layer 213 is formed and the first absorption layer 211 and the second absorption layer 212 are formed is not specifically limited in this embodiment. The second clamping layer 213 may be formed first, or the first absorption layer 211 and the second absorption layer 212 may be formed first.

[0163] In one example, a second clamping layer 213 is first fabricated within the epitaxial layer 20, and then a second absorption layer 212 and a first absorption layer 211 are sequentially fabricated in the regions of the first well isolation structure 21a and the second well isolation structure 21b above the second clamping layer 213.

[0164] It should be further understood that the doping type of the first well isolation structure 21a and the second well isolation structure 21b, the second absorption layer 212 and the first absorption layer 211, and the second clamping layer 213 can be P-type or N-type, and the embodiments of this application do not impose any special limitations on this.

[0165] In one example, in order to achieve a high full-well capacity of the pixel unit, the conductivity types of the first well isolation structure 21a and the second well isolation structure 21b are opposite to those of the second absorption layer 212 and the first absorption layer 211; and the second absorption layer 212 and the first absorption layer 211 are in contact with the first well isolation structure 21a and the second well isolation structure 21b.

[0166] Based on this, a PN junction can be formed in the contact area between the absorption region and the first well isolation structure 21a and the second well isolation structure 21b to increase the PN junction capacitance of the pixel unit, thereby achieving a high full-well capacity of the pixel unit.

[0167] Optionally, the second absorption layer 212, the first absorption layer 211, the first well isolation structure 21a, and the second well isolation structure 21b can be made using the same photomask to reduce the cost of the device and improve the quantum efficiency of the pixel.

[0168] In another example, in order to achieve a higher full-well capacity of the pixel unit, the second clamping layer 213 has the opposite conductivity type to the second absorption layer 212 and the first absorption layer 211. Based on this, a PN junction can be formed in the contact area of ​​the second absorption layer 212, the first absorption layer 211 and the second clamping layer 213 to increase the PN junction capacitance of the pixel unit, thereby achieving a high full-well capacity of the pixel unit.

[0169] In one alternative embodiment, the second absorption region 212 partially overlaps with the second clamping layer 213, and / or the first absorption layer 211 partially overlaps with the second absorption layer 212.

[0170] It should be understood that the second absorption region 212 and the second clamping layer 213 partially overlap, which can optimize the local electric field distribution in the pixel unit, reduce the concentration of electric field in certain areas, and thus reduce the recombination rate of charge carriers and dark current.

[0171] The first absorption layer 211 and the second absorption layer 212 can achieve a wide spectral response, improving the photoelectric conversion efficiency of the pixel unit. Furthermore, the overlapping region can increase the path length for light absorption, improving the absorption efficiency of the pixel unit for incident light and thus enhancing the overall quantum efficiency of the image sensor.

[0172] In a preferred embodiment, referring to FIG2(b), between step 2 and step 3, the improved pixel unit fabrication method of this application further includes:

[0173] Step 31: Form at least one second insertion layer 214 (214a, 214b) spaced apart within the absorption region.

[0174] Referring to Figure 3(b), the bottom of the second insertion layer 214 (214a, 214b) is located within the second absorption layer 212, and the top of the second insertion layer 214 (214a, 214b) extends through the second absorption layer 212 until it is located within the first absorption layer 211.

[0175] The second insertion layer 214 (214a, 214b) has the opposite doping type to the first absorption layer 211 and the second absorption layer 212. Based on this, a PN junction can be formed in the contact area between the second absorption layer 212, the first absorption layer 211 and the second insertion layer 214 (214a, 214b) to improve the PN junction capacitance of the pixel unit, thereby achieving a high full-well capacity of the pixel unit.

[0176] Optionally, when the first absorption layer 211 and the second absorption layer 212 are N-type doped, the second insertion layer 214 (214a, 214b) can be P-type doped, and the doping element can be one of B, In and Bf2.

[0177] When the doping concentration of the first absorption layer 211 is 10 15 -10 18 / cm 3 And / or, the doping concentration of the second absorber layer 212 is 10. 12 -10 17 / cm 3 At that time, the doping concentration of the second insertion layer (214a, 214b) was 10. 16 -10 21 / cm 3 .

[0178] In this embodiment of the application, the shape of the second insertion layer (214a, 214b) can be polygonal. Each second insertion layer (214a, 214b) is not connected and is not connected to the first well isolation structure 21a and the second well isolation structure 21b. The second insertion layer can be directly connected to the back clamping layer 213 (such as 214a) or not connected to the back clamping layer 213 (such as 214b).

[0179] Step 4, referring to Figures 4(a), 4(b), 4(c) and 4(d), at least one first insertion layer is formed on the absorption region in the substrate; wherein the at least one first insertion layer is spaced apart, and each first insertion layer includes at least one discontinuity region.

[0180] For example, referring to FIG4(a), a first insertion layer (28a and 28b) is formed on the absorption region in the substrate. The first insertion layer includes a discontinuity region that divides the first insertion layer into two parts, 28a and 28b. The first insertion layer can be an N-type or P-type doped region, and the embodiments of this application do not impose any special limitations on it.

[0181] The first insertion layer is a p-type doped layer, and the doping element can be one of B, In, and Bf2, with a p-type doping concentration of 10. 17 -10 20 / cm 3 ,

[0182] The first insertion layer extends across the entire pixel in the horizontal direction. In addition, the vertical width H of the first insertion layer 28 is 10-500nm.

[0183] For example, referring to Figure 4(b), a first insertion layer is formed on the absorption region in the substrate. Specifically, the structural first insertion layer is fabricated on the first absorption layer 211 using the positive adhesive of the photomask 1. This first insertion layer includes two discontinuous regions that divide the first insertion layer into three parts: 28a, 28b, and 28c. The lateral widths of the two discontinuous regions are W1 and W2, respectively. W1 and W2 may be the same or different; this embodiment does not specifically limit this.

[0184] The first insertion layer can be an N-type or P-type doped region, and the embodiments of this application do not impose any special limitations on this.

[0185] The first insertion layer is a p-type doped layer, and the doping element can be one of B, In, and Bf2, with a p-type doping concentration of 10. 17 -10 20 / cm 3 ,

[0186] The first insertion layer extends across the entire pixel in the horizontal direction. In addition, the vertical width H of the first insertion layer 28 is 10-500nm.

[0187] For example, in the substrate, two or more vertically unconnected first insertion layers are made on the first absorption layer using the positive adhesive of the photomask 1, and these layers intersect with the pixel units on the left and right sides in the horizontal direction. The bottommost first insertion layer is connected to the first absorption layer.

[0188] Referring to Figure 4(c), in this embodiment, two unconnected first insertion layers, namely first insertion layer 28Ⅰ and first insertion layer 28Ⅱ, are formed on the absorption region along a direction perpendicular to the thickness direction of the substrate. The first insertion layer 28Ⅱ located below the first insertion layer 28Ⅰ is connected to the first absorption layer 211. The first insertion layers 28Ⅰ and 28Ⅱ can be N-type or P-type doped regions, and this embodiment does not impose any special limitations on them.

[0189] The first insertion layer 28Ⅰ and the first insertion layer 28Ⅰ are p-type doped layers, and the doping element can be one of B, In and Bf2, with a p-type doping concentration of 10. 17 -10 20 / cm 3The ion implantation energy of the first insertion layer 28Ⅱ is higher than that of the first insertion layer 28Ⅰ. The p-type doping concentration of the first insertion layer 28Ⅰ can be greater than, equal to, or less than the ion doping concentration of the first insertion layer 28Ⅱ. Furthermore, the longitudinal widths H1 and H2 of the first insertion layer 28Ⅰ and the second insertion layer 28Ⅱ are 10-500 nm, where H1 can be greater than, equal to, or less than H2, and the spacing D between the first insertion layer 28Ⅰ and the second insertion layer 28Ⅱ is 10-500 nm. In other embodiments, if there are three or more unconnected first insertion layers, the spacing between two adjacent first insertion layers is 10-500 nm.

[0190] In this embodiment, each first insertion layer has at least one discontinuity region. For example, referring to FIG4(c), the first insertion layer 28Ⅰ has a discontinuity region that divides the first insertion layer 28Ⅰ into two parts, 28a and 28b. The first insertion layer 28ⅠⅡ has a discontinuity region that divides the first insertion layer 28Ⅱ into two parts, 28c and 28d.

[0191] For example, referring to Figure 4(d), in a substrate having second insertion layers (214a and 214b), two unconnected first insertion layers, namely first insertion layer 28Ⅰ and first insertion layer 28Ⅱ, are formed on the absorption region along a direction perpendicular to the thickness direction of the substrate. The first insertion layer 28Ⅱ, located below the first insertion layer 28Ⅰ, is connected to the first absorption layer 211. The first insertion layers 28Ⅰ and 28Ⅱ can be N-type or P-type doped regions, and this application embodiment does not impose any special limitations on this.

[0192] For example, the first insertion layer 28Ⅰ and the first insertion layer 28Ⅰ are p-type doped layers, and the doping element can be one of B, In and Bf2, with a p-type doping concentration of 10. 17 -10 20 / cm 3 The ion implantation energy of the first insertion layer 28Ⅱ is higher than that of the first insertion layer 28Ⅰ. The p-type doping concentration of the first insertion layer 28Ⅰ can be greater than, equal to, or less than the ion doping concentration of the first insertion layer 28Ⅱ. Furthermore, the longitudinal widths H1 and H2 of the first insertion layer 28Ⅰ and the second insertion layer 28Ⅱ are 10-500 nm, where H1 can be greater than, equal to, or less than H2, and the spacing D between the first insertion layer 28Ⅰ and the second insertion layer 28Ⅱ is 10-500 nm. In other embodiments, if there are three or more unconnected first insertion layers, the spacing between two adjacent first insertion layers is 10-500 nm.

[0193] In this embodiment, each first insertion layer has at least one discontinuity region. For example, referring to FIG4(c), the first insertion layer 28Ⅰ has a discontinuity region that divides the first insertion layer 28Ⅰ into two parts, 28a and 28b. The first insertion layer 28ⅠⅡ has a discontinuity region that divides the first insertion layer 28Ⅱ into two parts, 28c and 28d.

[0194] Step 5, referring to Figures 5(a), 5(b), 5(c) and 5(d), form a transmission region in the discontinuity region.

[0195] Specifically, referring to Figure 5(a), the transmission region 29 is fabricated over the entire area of ​​the discontinuity region w in the first insertion layer 28 using the reverse adhesive of the photomask 1. The transmission region 29b can be an N-type or P-type doped region, and this embodiment does not impose any special limitations on it.

[0196] For example, the transport region 29 is an N-type doped layer, and the doping element can be one of P, As, or Sb. The N-type doping concentration of the transport region 29 is higher than that of the first absorption layer 211, preferably 1e. 16 -1e 19 / cm 3 Furthermore, the longitudinal width of the transmission region 29 can be equal to or greater than the depth of the discontinuity region, and the lower boundary of the transmission region 29 can at least partially overlap with the first absorption layer 211, forming a local high potential region at the overlap to collect photogenerated electrons generated by the first absorption region 211 and the second absorption region 212.

[0197] Referring to Figure 5(b), transmission regions 29a and 29b that completely cover the discontinuities of the first insertion layer in the longitudinal direction are fabricated using the reverse adhesive of the photomask 1 within all discontinuities of the first insertion layer. In this embodiment, two unconnected transmission regions with a longitudinal width of K are fabricated, namely transmission region 29a and transmission region 29b. The transmission regions 29a and 29b can be N-type or P-type doped regions, and this embodiment does not impose any special limitations on them.

[0198] For example, transport regions 29a and 29b are N-type doped layers, and the doping element can be one of P, As, or Sb. The N-type doping concentration of transport regions 29a and 29b is higher than the doping concentration of the first absorption layer 211, preferably 10. 16 -10 19 / cm 3 Furthermore, the longitudinal width K of the transmission regions 29a and 29b can be equal to or greater than the depth H of the discontinuity region, and their lower boundaries at least partially overlap with the first absorption layer 211, forming a local high potential region at the overlap to collect photogenerated electrons generated by the first absorption region 211 and the second absorption region 412.

[0199] Referring to Figure 5(c), transport regions 29a and 29b are fabricated using different ion implantation energies across the entire discontinuity region of the first insertion layer 28Ⅰ and the second insertion layer 28Ⅱ using the reverse adhesive of photomask 1. Transport region 29a completely covers the discontinuity region of the first insertion layer (28a and 28b) in the longitudinal direction, and transport region 29b completely covers the discontinuity region of the first insertion layer (28c and 28d) in the longitudinal direction. Transport regions 29a and 29b may be longitudinally non-connected or at least partially overlap in the longitudinal direction. Transport regions 29a and 29b may be N-type or P-type doped regions, and this embodiment does not impose any special limitations on this.

[0200] For example, transport regions 29a and 29b are N-type doped layers, and the doping element can be either P or As. The N-type doping concentration is higher than the n-type doping concentration of the N1 absorber layer 511, preferably 1e. 16 -1e 19 / cm 3 Furthermore, the ion implantation energy of the transport region 29a is less than that of the transport region 29b; the longitudinal width of the transport region 29a can be equal to or greater than H1, the longitudinal width of the transport region 29b can be equal to or greater than H2, and the lower boundary of the transport region 29b at least partially overlaps with the first absorption layer 211 to form a local high potential region, which collects photogenerated electrons generated by the first absorption region 211 and the second absorption region 212.

[0201] It is worth noting that in this embodiment, the insertion layer has only one discontinuity region, so that each insertion layer has a transmission region running through it. In other embodiments, each insertion layer may have more than two discontinuities, thus having more than two transmission regions.

[0202] Referring to Figure 5(d), in a substrate having second insertion layers (214a and 214b), transport regions 29a and 29b are fabricated using the reverse adhesive of photomask 1 in the entire range of the discontinuity regions of the upper first insertion layers (28a and 28b) and the lower first insertion layers (28c and 28d) with different ion implantation energies. Transport region 29a completely covers the discontinuity region of the upper first insertion layers (28a and 28b) in the longitudinal direction, and transport region 29b completely covers the discontinuity region of the lower first insertion layers (28c and 28d) in the longitudinal direction. The transport regions 29a and 29b may be longitudinally non-connected or at least partially overlap in the longitudinal direction. The transport regions 29a and 29b may be N-type or P-type doped regions, and this embodiment does not impose any special limitations on this.

[0203] For example, transport regions 29a and 29b can be N-type doped layers, and the doping element can be either P or As, with an N-type doping concentration higher than the n-type doping concentration of the first absorption layer 211, preferably 10. 16 -1019 / cm 3 Furthermore, the ion implantation energy of the transport region 29a is less than that of the transport region 29b; the longitudinal width of the transport region 29a can be equal to or greater than H1; the longitudinal width of the transport region 29b can be equal to or greater than H2; and the lower boundary of the transport region 29b at least partially overlaps with the first absorption layer 211 to form a local high potential region, which collects photogenerated electrons generated by the first absorption region 211 and the second absorption region 212.

[0204] It should be noted that in this embodiment, each of the upper first insertion layer (28a and 28b) and the lower first insertion layer (28c and 28d) has only one discontinuity region, thus having only one transmission region. In other embodiments, each first insertion layer may have more than two discontinuity regions, thus having more than two N transmission regions. Step 6, referring to Figures 6(a), 6(b), 6(c), and 6(d), a compensation region is formed on each transmission region.

[0205] It should be noted here that, in the embodiments of this application, the first storage layer 27a, the second storage layer 27b, the third storage layer 27c, and the fourth storage layer 27d can be understood as storage layers located in different regions of the same layer, or they can be storage layers located in different layers.

[0206] Similarly, the first part first insertion layer 28a, the second part first insertion layer 28b, the third part first insertion layer 28c and the fourth part first insertion layer 28d can be understood as first insertion layers located in different regions of the same layer, or they can be first insertion layers located in different layers.

[0207] Specifically, referring to Figure 6(a), a compensation region 210 is fabricated above the transmission region 29 using the reverse adhesive of photomask 1. The transmission region 29 and the compensation region 210 are connected. The compensation region 210 is located above the transmission region 29, and its lateral width can be the same as that of the transmission region 29. It is fabricated using the same photomask 1 to reduce the cost of the device (in other embodiments, the lateral width of the compensation region 210 can be greater than or less than the lateral width of the transmission region 29, and it can be fabricated separately using two photomasks). The compensation region is an N-type or P-type doped layer, and this application does not impose any special limitations on this.

[0208] For example, when the conductivity type of the transport region is P-type, the dopant ions may include Bf2, B, or In; when the conductivity type of the transport region is N-type, the dopant ions in the transport region are one of P, As, and Sb, and the P-type or N-type doping concentration is 10. 16 -10 19 / cm 3 .

[0209] Referring to Figure 6(b), a compensation region 210 is formed above the transmission region 29 using the reverse adhesive of photomask 1. In this embodiment, there is a first compensation region 210a and a lower compensation region 210b. The upper transmission region 29a is connected to the first compensation region 210a, and the lower transmission region 29b is connected to the second compensation region 210b. The lateral width of the compensation region can be the same as that of the transmission region, and it can be fabricated using the same photomask 1 to reduce the cost of the device (in other embodiments, the lateral width of the compensation region can be greater than or less than the lateral width of the transmission region, and it can be fabricated using an additional photomask different from photomask 1). The compensation region is an N-type or P-type doped layer, and this embodiment does not impose any special limitations on it.

[0210] It is worth noting that, in the embodiments of this application, the first compensation area 210a and the second compensation area 210b may refer to compensation areas located on different layers, or they may refer to compensation areas located in different areas on the same layer.

[0211] Similarly, the first transmission area 29a and the second transmission area 29b can refer to transmission areas located on different layers, or they can refer to transmission areas located in different areas on the same layer.

[0212] For example, if the conductivity type of the compensation region is P-type, the dopant ions may include Bf2, B, or In; if the conductivity type of the compensation region is N-type, the dopant ions may be one of P, As, and Sb. The doping concentration of the compensation region is 10. 16 -10 19 / cm 3 .

[0213] Referring to Figure 6(c), compensation regions are further fabricated above each transmission region using photomask 1. In this embodiment, a first compensation region 210a is fabricated above the upper transmission region 29a, and a second compensation region 210b is fabricated above the lower transmission region 29b. The first compensation region 210a is connected to the upper transmission region 29a, and the second compensation region 210b is located between the upper transmission region 29a and the lower transmission region 29b. The lateral width of the first compensation region 210a can be the same as that of the upper transmission region 29a, and it can be fabricated using the same photomask 1 to reduce the cost of the device (in other embodiments, the lateral width of the first compensation region 210a can be greater than or less than the lateral width of the upper transmission region 29a, and it can be fabricated using an additional photomask different from photomask 1). The compensation region is an N-type or P-type doped layer, and this embodiment does not impose any special limitations on it.

[0214] For example:

[0215] For example, if the conductivity type of the compensation region is P-type, the dopant ions may include Bf2, B, or In; if the conductivity type of the compensation region is N-type, the dopant ions may be one of P, As, and Sb. The doping concentration of the compensation region is 10. 16 -10 19 / cm 3 Furthermore, the ion implantation energy of the second compensation region 210b is greater than that of the first compensation region 210a.

[0216] Referring to Figure 6(d), in the substrate having the second insertion layers (214a and 214b), compensation regions are further fabricated above each transmission region using photomask 1. In this embodiment, a first compensation region 210a is fabricated above the upper transmission region 29a, and a second compensation region 210b is fabricated above the lower transmission region 29b. The first compensation region 210a is connected to the upper transmission region 29a, and the second compensation region 210b is located between the upper transmission region 29a and the lower transmission region 29b. The lateral width of the first compensation region 210a can be the same as that of the upper transmission region 29a, and it can be fabricated using the same photomask 1 to reduce the cost of the device (in other embodiments, the lateral width of the first compensation region 210a can be greater than or less than the lateral width of the upper transmission region 29a, and it can be fabricated using an additional photomask different from photomask 1). The compensation region can be an N-type or P-type doped layer, and this embodiment does not impose any special limitations on this.

[0217] For example:

[0218] For example, if the conductivity type of the compensation region is P-type, the dopant ions may include Bf2, B, or In; if the conductivity type of the compensation region is N-type, the dopant ions may be one of P, As, and Sb. The doping concentration of the compensation region is 10. 16 -10 19 / cm 3 Furthermore, the ion implantation energy of the second compensation region 210b is greater than that of the first compensation region 210a.

[0219] Step 7, referring to Figures 7(a), 7(b), 7(c), and 7(d), a storage layer is formed on each first insertion layer in the substrate; wherein the first insertion layer and the storage layer have different conductivity types, the transport region is used to transport photogenerated electrons generated by the absorption region to the corresponding storage layer for storage, and the compensation region is used to reduce the increase in lateral potential in the storage layer caused by the presence of the discontinuity region of the first insertion layer, thereby reducing the lateral electron transport barrier in the storage layer.

[0220] Specifically, referring to Figure 7(a), a storage layer 27 of a photodiode is fabricated above the first insertion layer 28 using a photomask 2; the storage layer 27 is continuously distributed in the lateral direction without interruption and covers the compensation region 210 and is connected to the first insertion layer 28; the storage layer 27 can be an N-type or P-type doped layer, and this embodiment does not impose any special limitations on it.

[0221] For example, the storage layer 27 can be an N-type doped layer, and the doping element can be either P or As, with an N-type doping concentration greater than the P-type doping concentration of the compensation region 210, preferably 10. 17 -10 20 / cm 3 Therefore, the net N-type doping concentration in the overlapping region of the compensation region 210 and the storage layer 27 is lower than the N-type doping concentration in the storage layer 27 on both sides of the compensation region 210, reaching 10. 17 -10 19 / cm 3 This reduces the lateral electron transport barrier within the storage layer, thereby eliminating image ghosting caused by the lateral electron transport barrier within the storage layer.

[0222] It should be understood that a larger storage width will result in the storage layer 27 not being fully utilized, leading to image ghosting, while a smaller storage width L will reduce the full-well capacity of the pixels. Based on this, in this embodiment, the vertical depth L of the storage layer 27 is set to 10-500 nm.

[0223] In some examples, referring to FIG7(a), a first clamping layer 26 is formed on the storage layer 27. The first clamping layer 26 can be an N-type or P-type doped layer, and the embodiments of this application do not impose any special limitations on it.

[0224] For example, the first clamping layer 26 is a p-type doped layer, and the doping element can be one of B, In, and Bf2, with a p-type doping concentration of 10. 17 -10 21 / cm 3 Furthermore, the longitudinal width of the first clamping layer 26 is 10-300nm.

[0225] Based on this, the storage layer 27 is sandwiched between the first clamping layer 26 and the first insertion layer 28 in the longitudinal direction to form a P++N+P+ sandwich structure. This structure has a high ion doping concentration and a thin thickness, so it can achieve a high junction capacitance, significantly improve the full well capacity of the pixel, and the result is a low Vpin voltage, which can effectively reduce image ghosting.

[0226] Referring to Figure 7(b), a photodiode storage layer 27 is sequentially fabricated above the first insertion layer 28 using a photomask 2. The storage layer 27 is continuously distributed without interruption in the lateral direction and completely covers the compensation regions 210a and 210b, and is connected to the first insertion layer 28 in the vertical direction. The storage layer 27 can be an N-type or P-type doped layer, and this embodiment does not impose any special limitations on it.

[0227] The storage layer 27 is an N-type doped layer, and the doping element can be either P or As. Its N-type doping concentration is greater than the P-type doping concentration of the compensation region 210, preferably 10. 17 -10 20 / cm 3 This results in the net N-type doping concentration in the overlapping region of the compensation region 210 and the storage layer 27 being lower than the N-type doping concentration in the storage layer 27 on both sides of the compensation region 210, reaching 10. 17 -10 19 / cm 3 The vertical depth L of the storage layer 27 is 10-500nm. A larger vertical width L will cause the storage layer 27 to not be fully exhausted, resulting in image ghosting, while a smaller N+ width L will reduce the full well capacity of the pixel.

[0228] In some examples, referring to FIG7(b), a first clamping layer 26 is formed on the storage layer 27. The first clamping layer 26 can be an N-type or P-type doped layer, and the embodiments of this application do not impose any special limitations on it.

[0229] For example, the first clamping layer 26 is a p-type doped layer, and the doping element can be one of B, In, and Bf2, with a p-type doping concentration of 10. 17 -10 21 / cm 3 Furthermore, the longitudinal width of the first clamping layer 26 is 10-300nm.

[0230] Based on this, the storage layer 27 is sandwiched between the first clamping layer 26 and the first insertion layer 28 in the longitudinal direction to form a P++N+P+ sandwich structure. This structure has a high ion doping concentration and a thin thickness, so it can achieve a high junction capacitance, significantly improve the full well capacity of the pixel, and the result is a low Vpin voltage, which can effectively reduce image ghosting.

[0231] Referring to Figure 7(c), a photodiode storage layer is sequentially fabricated above each first insertion layer 28 using a photomask 2. In this embodiment, a storage layer 27b is first fabricated at the gap between the upper and lower first insertion layers, and then a storage layer 27a is fabricated above the upper first insertion layer. The storage layers 27a and 27b are continuously distributed without interruption in the lateral direction and respectively cover the compensation regions 210a and 210b. The upper storage layer 27a and the lower storage layer 27b can be N-type or P-type doped layers, and this embodiment does not impose any special limitations on this.

[0232] For example, the upper storage layer 27a and the lower storage layer 27b are n-type doped layers, and the doping element can be either P or As. The n-type doping concentration of the upper storage layer 27a is greater than the p-type doping concentration of the first compensation region 210a, preferably 10. 17 -10 20 / cm 3 This results in the net n-type doping concentration in the overlapping region of the first compensation region 210a and the upper storage layer 27a being lower than the n-type doping concentration of the upper storage layer 27a on both sides of the first compensation region 210a; the n-type doping concentration of the lower storage layer 27b is greater than the p-type doping concentration of the second compensation region 210b, preferably 10. 17 -10 20 / cm 3 This results in the net n-type doping concentration in the overlapping area of ​​the second compensation region 210b and the lower storage layer 27b being lower than the n-type doping concentration of the lower storage layer 27b on the left and right sides of the second compensation region 210b. The vertical depths L1 and L2 of the upper storage layer 27a and the lower storage layer 27b are 10-500nm. A larger vertical width L will cause the storage layer to not be completely exhausted, resulting in image ghosting, while a smaller vertical width L will reduce the full well capacity of the pixel.

[0233] In some examples, continuing to refer to Figure 7(c), a first clamping layer 26 is fabricated on the topmost storage layer 27. The first clamping layer 26 can be an N-type or P-type doped layer, and the embodiments of this application do not impose any special limitations on this.

[0234] For example, the first clamping layer 26 is a p-type doped layer, and the doping element can be one of B, In, and Bf2, with a p-type doping concentration of 10. 17 -10 21 / cm 3 Furthermore, the longitudinal width of the P++ clamping layer 26 is 10-300 nm;

[0235] Referring again to Figure 7(c), the N+ storage layer 27a is sandwiched vertically between the P++ first clamping layer 26 and the P+ first insertion layer (composed of 28a and 28b), forming a P++N+P+ sandwich structure. The N+ storage layer 27b is sandwiched vertically between the P+ first insertion layer (composed of 28a and 28b) and the P+ first insertion layer (composed of 28c and 28d), forming a P+N+P+ sandwich structure. These two structures have a high ion doping concentration and a thin thickness, thus achieving a high junction capacitance and significantly improving the full-well capacity of the pixel unit.

[0236] In one example, referring to FIG7(d), a photodiode storage layer is fabricated above each first insertion layer using a photomask 2; in this embodiment, a lower storage layer 27b is first fabricated at the gap between the upper first insertion layer (composed of 28a and 28b) and the lower first insertion layer (composed of 28c and 28d), and then an upper storage layer 27a is fabricated above the upper first insertion layer (composed of 28a and 28b).

[0237] In this embodiment, the upper storage layer 27a and the lower storage layer 27b are continuously distributed in the lateral direction without interruption, and respectively cover the first compensation region 210a and the second compensation region 210b; the upper storage layer 27a and the lower storage layer 27b can be N-type or P-type doped layers, and this embodiment does not impose any special limitations on them.

[0238] The upper storage layer 27a and the lower storage layer 27b are N-type doped layers, and the doping element can be either P or As. The N-type doping concentration of the upper storage layer 27a is greater than the p-type doping concentration of the first compensation region 210a, preferably 10. 17 -10 20 / cm 3 This results in the net N-type doping concentration in the overlapping region of the first compensation region 210a and the upper storage layer 27a being lower than the N-type doping concentration of the upper storage layer 27a on both sides of the first compensation region 210a; the N-type doping concentration of the lower storage layer 27b is higher than the p-type doping concentration of the second compensation region 210b, preferably 10. 17 -10 20 / cm 3 This results in the net N-type doping concentration in the overlapping area of ​​the second compensation region 210b and the lower storage layer 27b being lower than the N-type doping concentration of the lower storage layer 27b on the left and right sides of the second compensation region 210b. The vertical depths L1 and L2 of the upper storage layer 27a and the lower storage layer 27b are 10-500nm. A larger N+ width L will cause the storage layer to not be completely exhausted, resulting in image ghosting, while a smaller storage layer will reduce the full well capacity of the pixel unit.

[0239] Optionally, in this embodiment, a first clamping layer 26 is subsequently prepared above the upper storage layer 27a; the first clamping layer 26 can be an N-type or P-type doped layer, and this embodiment does not impose any special limitations on it.

[0240] For example, the first clamping layer 26 is a p-type doped layer, and the doping element can be one of B, In, and Bf2, with a p-type doping concentration of 10. 17 -10 21 / cm 3 Furthermore, the vertical width of the first clamping layer 26 is 10-300 nm; the upper storage layer 27a is vertically sandwiched between the first clamping layer 26 and the upper first insertion layer, forming a P++N+P+ sandwich structure; the lower storage layer 27b is vertically sandwiched between the lower first insertion layer and the upper first insertion layer, forming a P+N+P+ sandwich structure. These two structures have high ion doping concentration and thin thickness, thus achieving high junction capacitance and significantly improving the full-well capacity of the pixel. It should be noted that in this embodiment, there are 2 P+ first insertion layers and 2 N+ storage layers. In other embodiments, there may be 1 P+ first insertion layer and 1 N+ storage layer, or there may be 2 or more first insertion layers and N+ storage layers 27 of the same number to achieve a larger full-well capacity.

[0241] In this embodiment, the preparation order in steps 2 to 7 above can be adjusted according to specific needs. This embodiment is just an example and is not intended as a special limitation.

[0242] Step 8, referring to Figures 8(a), 8(b), 8(c) and 8(d), a gate oxide layer 23 is formed on the substrate.

[0243] A transmission gate 24 is formed on the gate oxide layer 23, wherein the first clamping layer 26 and the storage layer 27 are located on one side of the transmission gate 24, and the projection of the transmission gate 24 on the substrate partially overlaps with the first clamping layer 26 and the storage layer 27.

[0244] Step 9, continuing to refer to Figures 8(a), 8(b), 8(c) and 8(d), form a floating diffusion region 22 located on the other side of the transmission gate 24 in the substrate.

[0245] In this embodiment, the floating diffusion region 22 can be an N-type or P-type doped layer, and this application embodiment does not impose any special limitations on it.

[0246] For example, the floating diffusion region 22 is an N-type doped layer, and the doping element can be either P or As, with an N-type doping concentration of 10. 18 -1021 / cm 3 .

[0247] Based on this, the resulting floating diffusion region 22 and storage layer are located on opposite sides of the transfer gate 24. The floating diffusion region 22 stores charge and can exchange charge with the storage layer through the transfer gate 24. The transfer gate 24 is a control gate used to control the transfer of photogenerated electrons between the storage layer and the floating diffusion region 22. By applying a voltage, charge transfer between the floating diffusion region FD and the storage layer can be achieved, thereby realizing storage or read operations.

[0248] In this step, the order of fabrication of the floating diffusion region 22 and the transmission gate 24 is not specifically limited. The floating diffusion region 22 can be fabricated first and then the transmission gate 24 can be fabricated, or the transmission gate 24 can be fabricated first and then the floating diffusion region 22 can be fabricated.

[0249] In this embodiment, the longitudinal width is the dimension along the thickness direction of the substrate, and the transverse width is the dimension along the direction perpendicular to the thickness direction of the substrate.

[0250] It is worth noting that, in this embodiment, different conductivity types refer to different types of doped ions. For example, different conductivity types in the transport region and the compensation region can be understood as the ions doped in the transport region being N-type and the ions doped in the compensation region being P-type, or the ions doped in the transport region being P-type and the ions doped in the compensation region being N-type.

[0251] Similarly, in this embodiment, the same conductivity type means that the doped ions are of the same type. For example, the same conductivity type of the first absorption layer and the second absorption layer can be understood as: the ions doped in the first absorption layer and the second absorption layer are both P-type, or the ions doped in the first absorption layer and the second absorption layer are both N-type.

[0252] Through the above steps, we obtained the corresponding multiple pixel units, such as Figure 9 , Figure 10 , Figure 11 and Figure 12 As shown.

[0253] Among them, reference Figure 9 In pixel unit 200, the transmission region 29 connects the N1 absorption layer 211 and the storage layer 27 in the longitudinal direction, and transmits the photogenerated electrons generated by the N1 absorption layer 211 and the N- absorption layer 212 to the N+ storage layer 27 for storage; the B compensation region 210 can effectively reduce the increase in lateral potential in the N+ storage layer 27 caused by the discontinuity region of the first insertion layer, eliminate the lateral electron transmission barrier in the storage layer 27, and reduce image ghosting. Figure 13A comparison is shown of pixel structure 300 without the B-compensation region. Its pixel structure is identical to pixel structure 200 except for the B-compensation region, and it is also one of the protected structures of this application. Figures 14(a) and 14(b) show a comparison. Figure 9 AA' and Figure 13 The simulation diagram of the reset potential at the same position in the N+ storage layer of the pixel unit along the BB' tangent is shown in Figure 14(b). As can be seen from Figure 14(b), when the transmission gate TX is turned on to reset the pixel unit, a local potential maximum point is formed at point C in the N+ storage layer 27 above the discontinuity region of the first insertion layer 28 on the BB' tangent of the pixel 300. An electron potential barrier is formed on the BB' tangent, preventing the photodiode of the pixel structure 300 from being fully reset. As can be seen from Figure 14(a), the potential distribution of the pixel structure 200 with the B compensation region is continuous in the AA' tangential direction. The potential at point C is reduced due to the p-type injection of the B compensation region. Therefore, the photodiode of the pixel structure 200 is easily fully reset, eliminating image ghosting.

[0254] Figures 15(a) and 15(b) show a comparison of the full-well capacity simulation diagrams of the pixel unit of the present application embodiment and the existing pixel unit. At the same pixel scale, the full-well capacity of the existing pixel unit is only 17000e-, while the full-well capacity of the pixel unit of the present application embodiment reaches 70000e-. The full-well capacity of the pixel unit of the present application embodiment is more than 4 times that of the existing pixel. Moreover, the pixel unit of the present application embodiment can achieve a reset electron residual number of 0e-. Therefore, the image sensor based on the pixel unit of the present application embodiment can realize an image sensor with high full-well capacity and low ghosting.

[0255] Reference Figure 10 In pixel unit 200, the N-transmission region 29 vertically connects the N1 absorption layer 211 and the N+ storage layer 27, transmitting photogenerated electrons generated by the N1 first absorption layer 211 and the N- second absorption layer 212 to the N+ storage layer 27 for storage. The B-compensation region 210 can effectively reduce the increase in lateral potential in the N+ storage layer 27 caused by the discontinuity region of the first P+ first insertion layer, eliminate the lateral electron transport barrier in the storage layer 27, and reduce image ghosting. Therefore, the image sensor based on the pixel of this invention can realize an image sensor with high full-well capacity and low ghosting.

[0256] Reference Figure 11In pixel unit 200, the upper N-transmission region 29a vertically connects the upper N+ storage layer 27a and the lower N+ storage layer 27b. The lower N-transmission region 29b vertically connects the first absorption layer 211 and the lower N+ storage layer 27b, thereby transmitting photogenerated electrons generated by the first absorption layer 211 and the second absorption layer 212 to the upper N+ storage layer 27a and the lower N+ storage layer 27b. The upper B-compensation region 210a can effectively reduce the potential increase of the upper N+ storage layer 27a caused by the discontinuity of the upper P+ first insertion layer, and the lower B-compensation region 210b can effectively reduce the lateral potential increase in the lower N+ storage layer 27b caused by the discontinuity of the lower first insertion layer, eliminating the lateral electron transport barrier in the storage layer 27 and reducing image ghosting. Therefore, the pixel triad image sensor based on the embodiment of this application can realize an image sensor with high full-well capacity and low ghosting.

[0257] Reference Figure 12 In pixel unit 200, the upper N-transmission region 29a vertically connects the upper N+ storage layer 27a and the lower N+ storage layer 27b, and the second N-transmission region 29b vertically connects the N1 absorption layer 211 and the lower N+ storage layer 27b, thereby transmitting photogenerated electrons generated by the N1 first absorption layer 211 and the N- second absorption layer 212 to the upper N+ storage layer 27a and the lower N+ storage layer 27b. The upper B-compensation region 210a can effectively reduce the increase in lateral potential in the upper N+ storage layer 27a caused by the discontinuity region of the upper P+ first insertion layer, and the lower B-compensation region 210b can effectively reduce the increase in lateral potential in the lower N+ storage layer 27b caused by the discontinuity region of the lower P+ first insertion layer, eliminating the lateral electron transport barrier in the storage layer 27b and reducing image ghosting. Furthermore, with Figure 11 Compared to pixel unit 200, Figure 12 In the pixel unit 200, the vertical second insertion layers 214a and 214b form an additional vertical PN junction with the first absorption layer 211 and the second absorption layer 214, increasing the junction capacitance of the entire pixel unit. Therefore, the image sensor based on the pixel unit of this application embodiment can achieve an image sensor with high full-well capacity and low ghosting. It should be noted that the method of increasing well capacity by using vertical back-side P-intercalation layers in this embodiment is also applicable to... Figure 9 , Figure 10 In the pixel unit.

[0258] In this embodiment, the doping concentration of the first clamping layer is greater than the doping concentration of the topmost storage layer.

[0259] The first clamping layer has a different conductivity type than the storage layer. For example, the first clamping layer has a first conductivity type and a doping concentration of 10. 17 -10 21 / cm 3 ; and / or, the conductivity type of the storage layer is the second conductivity type, and the doping concentration is 10. 17 -10 20 / cm 3 .

[0260] In this embodiment, by forming a first clamping layer on the storage layer and the transport region, a potential barrier is formed between the clamping layer and the storage layer due to the difference in conductivity types, preventing unwanted charge movement and preventing unnecessary charge leakage from the storage layer to other areas. Furthermore, because the first clamping layer has a high doping concentration, a potential barrier is formed in the clamping layer for the pixel unit, preventing the reverse flow of photogenerated electrons, thereby ensuring that photogenerated electrons are effectively retained in the storage layer.

[0261] Optionally, the doping concentration of each storage layer increases sequentially along the direction from the first insertion layer to the first clamping layer.

[0262] Based on this, from the first insertion layer to the first clamping layer, the doping concentration of each storage layer gradually increases to form a gradient change in doping concentration, which makes each storage layer form a gradual electric field. The gradual electric field formed by the doping concentration gradient helps to accelerate the transmission of photogenerated electrons from the absorption region to the storage layer, thereby improving the response speed of the image sensor.

[0263] Along the thickness direction of the substrate, the thickness of the first clamping layer is 10nm-300nm; and / or, the thickness of each memory layer is 10nm-500nm. And / or, the thickness of each first insertion layer is 10nm-500nm.

[0264] As can be seen, the first clamping layer, the storage layer and the first insertion layer form a sandwich structure. This sandwich structure has a high ion doping concentration and a thin thickness, thus achieving a high junction capacitance and significantly improving the full-well capacity of the pixel.

[0265] In one alternative embodiment, the absorption region and the transport region have the same conductivity type, and the bottommost transport region at least partially overlaps with the absorption region. This overlapping design increases the efficiency of charge collection from the absorption region to the transport region.

[0266] In this embodiment, the absorption region and the transport region have the same conductivity type, which ensures efficient charge transport between the two regions while reducing the potential barrier at the interface. The bottommost transport region at least partially overlaps with the absorption region, which increases the collection efficiency of charge from the absorption region to the transport region, helps reduce the loss of photogenerated electrons during transport, and improves the sensitivity and efficiency of the pixel unit.

[0267] Optionally, the doping concentration of the transport region is greater than that of the absorption region.

[0268] Therefore, a higher doping concentration in the transport region helps to form a stronger built-in electric field, which can accelerate the movement of photogenerated electrons and thus improve the transport efficiency of photogenerated electrons. By rapidly transporting photogenerated electrons, the chance of carrier recombination during transport can be reduced, thereby improving the quantum efficiency of the image sensor.

[0269] Optionally, the doping concentration of the storage layer is greater than the doping concentration of the transport region.

[0270] The high doping concentration of the storage layer helps to form a strong electric field, which enhances the retention of photogenerated electrons. The doping concentration of the transport region is lower than that of the storage layer, which helps to form an electric field gradient, promotes the transport of photogenerated electrons from the absorption layer to the storage layer, and reduces image ghosting.

[0271] In this embodiment of the application, the storage layer surrounds the corresponding compensation region. It should be understood that the compensation region is used to reduce the lateral electron transport barrier within the corresponding storage layer, thereby eliminating image ghosting caused by the lateral transport barrier between storage layers. Therefore, the storage layer is used to surround the compensation region to avoid the impact of the compensation region on other functional layers, thereby affecting the performance of the pixel unit.

[0272] Optionally, the conductivity type of the storage layer is different from that of the compensation region; the doping concentration of the storage layer is greater than that of the corresponding compensation region.

[0273] In one optional implementation, the conductivity type of the storage layer is P-type, and the conductivity type of the compensation region is N-type; or, the conductivity type of the storage layer is N-type, and the conductivity type of the compensation region is P-type.

[0274] In an optional embodiment, when the conductivity type of the storage layer is N-type, the dopant ion of the storage layer is one of P, As and Sb, the conductivity type of the compensation region is P-type, and the dopant ion of the compensation region is one of Bf2, B and In.

[0275] Alternatively, if the conductivity type of the storage layer is P-type, the dopant ion of the storage layer is one of Bf2, B, Ga, Al, and In; if the conductivity type of the compensation region is N-type, the dopant ion of the compensation region is one of P, As, and Sb.

[0276] Based on this, the net doping concentration in the overlapping region of the compensation region and the storage layer can be lower than the doping concentration in the storage layers on the left and right sides of the compensation region. This effectively reduces the increase in lateral potential within the storage layer caused by the discontinuity region of the first insertion layer, eliminates the lateral electron transport barrier within the storage layer, and reduces image ghosting. Therefore, an image sensor based on the pixels of this invention can achieve an image sensor with high full-well capacity and low ghosting.

[0277] For example, the ion doping concentration of the storage layer is 10. 17 -10 20 / cm 3 And / or, the ion doping concentration of the transport region is 10. 18 -10 20 / cm 3 And / or, the ion doping concentration of the compensation region is 10. 16 -10 19 / cm 3 .

[0278] Based on the above description, in the embodiments of this application, the first and second absorption layers of the absorption region have low doping concentrations. It should be understood that low doping concentrations help increase the light absorption depth, enabling more photons to be captured and photogenerated electrons to be generated. The doping concentration of the transport region is higher than that of the first absorption layer but lower than that of the storage layer, to form an electric field gradient and promote the transport of photogenerated electrons from the absorption layer to the storage layer. The high doping concentration of the storage layer helps to form a strong electric field, enhancing the retention capability of photogenerated electrons.

[0279] In one alternative embodiment, the first insertion layer penetrates the substrate in a direction perpendicular to the thickness direction of the substrate, the transmission region is formed in the inter-terminal region in a direction perpendicular to the extension direction of the first insertion layer, and the compensation region is formed on the transmission region in a direction perpendicular to the extension direction of the first insertion layer.

[0280] Optionally, in this embodiment, the first insertion layer has a different conductivity type than the absorption region, transport region, and storage layer. Based on this, a PN junction can be formed between the first insertion layer and the storage layer. The built-in electric field of the PN junction helps retain photogenerated electrons in the storage layer, preventing them from diffusing in undesirable directions, thus improving the storage layer's ability to retain photogenerated electrons and its storage efficiency. Alternatively, the first insertion layer can form a heterojunction with the absorption region. The built-in electric field of the heterojunction helps to effectively separate photogenerated electron and hole pairs generated in the absorption region, reducing recombination losses. The heterojunction can also form a potential barrier, controlling the flow of photogenerated electrons from the absorption region to the transport region.

[0281] In some examples, the conductivity type of the floating diffusion region is the same as that of the storage layer, and / or the doping concentration of the floating diffusion region is greater than that of the uppermost storage layer.

[0282] It should be understood that the similar conductivity type reduces the potential barrier at the interface, facilitating the smooth transport of photogenerated electrons from the storage layer to the floating diffusion region, which can improve the efficiency and accuracy of signal readout from the image sensor. The higher doping concentration in the floating diffusion region compared to the storage layer creates a strong electric field, which in turn facilitates the rapid collection and transport of photogenerated electrons.

[0283] Optionally, the doping concentration of the storage layer is 10. 17 -10 20 / cm 3 And / or, the doping concentration of the floating diffusion region is 10. 18 -10 21 / cm 3 .

[0284] Secondly, embodiments of this application provide a pixel unit, which is prepared according to the pixel unit preparation method described in any one of the first aspects.

[0285] As described above, the pixel unit prepared according to the pixel unit preparation method of any one of the first aspects, such as Figure 9 , Figure 10 , Figure 11 and Figure 12 As shown.

[0286] Among them, reference Figure 9 In pixel unit 200, the transmission region 29 connects the N1 absorption layer 211 and the storage layer 27 in the longitudinal direction, and transmits the photogenerated electrons generated by the N1 absorption layer 211 and the N- absorption layer 212 to the N+ storage layer 27 for storage; the B compensation region 210 can effectively reduce the increase in lateral potential in the N+ storage layer 27 caused by the discontinuity region of the first insertion layer, eliminate the lateral electron transmission barrier in the storage layer, and reduce image ghosting.

[0287] Reference Figure 10 In pixel unit 200, the N-transmission region 29 vertically connects the N1 absorption layer 211 and the N+ storage layer 27, transmitting photogenerated electrons generated by the N1 first absorption layer 211 and the N- second absorption layer 212 to the N+ storage layer 27 for storage. The B-compensation region 210 can effectively reduce the increase in lateral potential within the N+ storage layer 27 caused by the discontinuity region of the first P+ first insertion layer, eliminating the lateral electron transport barrier within the storage layer and reducing image ghosting. Therefore, an image sensor based on the pixels of this invention can achieve an image sensor with high full-well capacity and low ghosting.

[0288] Reference Figure 11In pixel unit 200, the upper N-transmission region 29a vertically connects the upper N+ storage layer 27a and the lower N+ storage layer 27b. The lower N-transmission region 29b vertically connects the first absorption layer 211 and the lower N+ storage layer 27b, thereby transmitting photogenerated electrons generated by the first absorption layer 211 and the second absorption layer 212 to the upper N+ storage layer 27a and the lower N+ storage layer 27b. The upper B-compensation region 210a can effectively reduce the potential increase of the upper N+ storage layer 27a caused by the discontinuity region (interval region) of the upper P+ first insertion layer, and the lower B-compensation region 210b can effectively reduce the lateral potential increase in the lower N+ storage layer 27b caused by the discontinuity region of the lower first insertion layer, eliminating the lateral electron transport barrier in the storage layer and reducing image ghosting. Therefore, the pixel triad image sensor based on the embodiment of this application can realize an image sensor with high full-well capacity and low ghosting.

[0289] Reference Figure 12 In pixel unit 200, the upper N-transmission region 29a vertically connects the upper N+ storage layer 27a and the lower N+ storage layer 27b, and the second N-transmission region 29b vertically connects the N1 absorption layer 211 and the lower N+ storage layer 27b, thereby transmitting photogenerated electrons generated by the N1 first absorption layer 211 and the N- second absorption layer 212 to the upper N+ storage layer 27a and the lower N+ storage layer 27b. The upper B-compensation region 210a can effectively reduce the increase in lateral potential in the upper N+ storage layer 27a caused by the discontinuity region of the upper P+ first insertion layer, and the lower B-compensation region 210b can effectively reduce the increase in lateral potential in the lower N+ storage layer 27b caused by the discontinuity region of the lower P+ first insertion layer, eliminating the lateral electron transport barrier in the storage layer and reducing image ghosting. Furthermore, with Figure 11 Compared to pixel unit 200, Figure 12 In the pixel unit 200, the vertical second insertion layers 214a and 214b form an additional vertical PN junction with the first absorption layer 211 and the second absorption layer 214, increasing the junction capacitance of the entire pixel unit. Therefore, the image sensor based on the pixel unit of this application embodiment can achieve an image sensor with high full-well capacity and low ghosting. It should be noted that the method of increasing well capacity by using vertical back-side P-intercalation layers in this embodiment is also applicable to... Figure 9 , Figure 10 In the pixel unit.

[0290] Thirdly, embodiments of this application also provide a pixel array, including a plurality of pixel units arranged in an array as described in the second aspect.

[0291] For example, a pixel array consists of n pixel units arranged in rectangular rows (y rows) and columns (x columns), with the pixel units being insulated from each other by an isolation structure.

[0292] Fourthly, embodiments of this application also provide an image sensor, including a row selection logic unit, a column selection logic unit, a control logic unit, a readout circuit, and the pixel array described in the third aspect; the column selection logic unit, the row selection logic unit, and the readout circuit are all electrically connected to the logic control unit; the row selection logic unit is used to select a conducting row pixel unit under the control of the logic control unit; the column selection logic unit is used to select a conducting column pixel unit under the control of the logic control unit; the readout circuit is electrically connected to the pixel units in the pixel array and is used to read electrical signals from the selected pixel units.

[0293] Reference Figure 16 The image sensor 1000 includes a pixel array 101, a row selection logic unit 102, a readout circuit 103, a column selection logic unit 104, and a control logic unit 105. The readout circuit and the row selection logic unit are connected to the pixel array, the column selection logic unit is connected to the pixel array through the readout circuit, and the control logic unit is connected to the row selection logic unit and the column selection logic unit.

[0294] Fifthly, embodiments of this application also provide a chip that includes the image sensor described in the fourth aspect.

[0295] In practical applications, this chip has been used in multiple fields such as new energy vehicles, smart home appliances, rail transportation, and aerospace.

[0296] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for fabricating a pixel unit, characterized in that, The method includes: A substrate is provided; the substrate includes an absorption region; the absorption region is used to sense optical signals and generate photogenerated electrons; In the substrate, at least one first insertion layer is formed on the absorption region; wherein the at least one first insertion layer is spaced apart, and each first insertion layer includes at least one discontinuity region; A transmission region is formed in each of the discontinuity regions, and a compensation region is formed on the transmission region; In the substrate, a storage layer is formed on each first insertion layer; the transport region is used to transport photogenerated electrons generated by the absorption region to the corresponding storage layer for storage; the compensation region has the opposite conductivity type to the storage layer and is used to reduce the lateral electron transport barrier in the corresponding storage layer.

2. The method according to claim 1, characterized in that, The method further includes: forming a first clamping layer disposed on the uppermost storage layer in the substrate.

3. The method according to claim 2, characterized in that, The first clamping layer has a different conductivity type than the storage layer, and / or the doping concentration of the first clamping layer is greater than the doping concentration of the uppermost storage layer.

4. The method according to claim 3, characterized in that, Along the direction from the first insertion layer to the first clamping layer, the doping concentration of each storage layer increases sequentially.

5. The method according to claim 2, characterized in that, Along the direction of the substrate thickness, the thickness of the first clamping layer is 10nm-300nm; and / or, the thickness of each storage layer is 10nm-500nm; and / or, the thickness of each first insertion layer is 10nm-500nm.

6. The method according to claim 1, characterized in that, The first insertion layer has a different conductivity type than the absorption region, and / or the first insertion layer has a different conductivity type than the transmission region, and / or the first insertion layer has a different conductivity type than the storage layer.

7. The method according to claim 2, characterized in that, The method further includes: A gate oxide layer is formed on the first clamping layer; A transmission gate is formed on the gate oxide layer, and a floating diffusion region is formed in the substrate on the other side of the transmission gate; wherein the first clamping layer and the storage layer are located on one side of the transmission gate, and the projection of the transmission gate on the substrate partially overlaps with the first clamping layer and the storage layer.

8. The method according to claim 7, characterized in that, The conductivity type of the floating diffusion region is the same as that of the storage layer, and / or the doping concentration of the floating diffusion region is greater than that of the uppermost storage layer.

9. The method according to any one of claims 1-8, characterized in that, The substrate provided includes: An epitaxial layer is provided; the epitaxial layer has a first side and a second side in a direction perpendicular to the thickness direction of the epitaxial layer; A first isolation structure is formed in the epitaxial layer from a first side therein, and a second isolation structure is formed in the epitaxial layer from a second side therein; An absorption region is formed in the epitaxial layer between the first isolation structure and the second isolation structure.

10. The method according to claim 9, characterized in that, The method further includes: In the epitaxial layer, a second clamping layer is formed on the side of the absorption region opposite to the first insertion layer.

11. The method according to claim 10, characterized in that, The second clamping layer penetrates the epitaxial layer in a direction perpendicular to the thickness direction of the epitaxial layer.

12. The method according to claim 10, characterized in that, An absorption region is formed in the epitaxial layer between the first isolation structure and the second isolation structure, including: A first absorption layer and a second absorption layer are formed in the epitaxial layer between the first isolation structure and the second isolation structure; wherein the first absorption layer is located on the second absorption layer; wherein the first absorption layer and the second absorption layer have the same conductivity type.

13. The method according to claim 12, characterized in that, The conductivity types of the first absorption layer and the second absorption layer are different from those of the second clamping layer.

14. The method according to claim 12, characterized in that, The doping concentration of the first absorption layer is greater than that of the second absorption layer.

15. The method according to claim 12, characterized in that, The second absorption layer partially overlaps with the second clamping layer, and / or the first absorption layer partially overlaps with the second absorption layer, and / or the transmission region partially overlaps with the first absorption layer.

16. The method according to claim 12, characterized in that, The storage layer, the transport region, and the first absorption layer have the same conductivity type, and the doping concentration of the storage layer, the transport region, and the first absorption layer gradually decreases.

17. The method according to claim 12, characterized in that, The method further includes: At least one second insertion layer is formed at intervals within the absorption region; wherein the bottom of the second insertion layer is located within the second absorption layer, and the top of the second insertion layer extends through the second absorption layer until it is located within the first absorption layer; wherein the doping type of the second insertion layer is different from that of the first absorption layer and the second absorption layer.

18. The method according to claim 9, characterized in that, Forming a first isolation structure in the epitaxial layer from a first side and forming a second isolation structure in the epitaxial layer from a second side, comprising: A trench isolation structure is formed in the epitaxial layer; Ion doping is performed on the epitaxial layer from a first side to form a first well isolation structure, and ion doping is performed on the epitaxial layer from a second side to form a second well isolation structure; wherein the first well isolation structure surrounds the trench isolation structure.

19. The method according to claim 18, characterized in that, The conductivity type of the first well isolation structure and the second well isolation structure is different from the conductivity type of the absorption region; the absorption region is in contact with the first well isolation structure and the second well isolation structure.

20. The method according to any one of claims 1-8, characterized in that, The doping concentration of the storage layer is greater than the doping concentration of the corresponding compensation region.

21. The method according to any one of claims 1-8, characterized in that, The first insertion layer penetrates the substrate in a direction perpendicular to the thickness direction of the substrate, the transmission region is formed in the inter-terminal region in a direction perpendicular to the extension direction of the first insertion layer, and the compensation region is formed on the transmission region in a direction perpendicular to the extension direction of the first insertion layer.

22. The method according to any one of claims 1-8, characterized in that, The conductivity type of the storage layer is P-type, and the conductivity type of the compensation region is N-type; or, the conductivity type of the storage layer is N-type, and the conductivity type of the compensation region is P-type.

23. The method according to claim 22, characterized in that, When the conductivity type of the storage layer is N-type, the doping ion of the storage layer is one of P, As and Sb, the conductivity type of the compensation region is P-type, and the doping ion of the compensation region is one of Bf2, B and In. Alternatively, if the conductivity type of the storage layer is P-type, the dopant ion of the storage layer is one of Bf2, B, Ga, Al, and In; if the conductivity type of the compensation region is N-type, the dopant ion of the compensation region is one of P, As, and Sb.

24. A pixel unit, characterized in that, The pixel unit is prepared according to any one of claims 1-23.

25. A pixel array, characterized in that, It includes multiple pixel units arranged in an array as described in claim 24.

26. An image sensor, characterized in that, It includes a row selection logic unit, a column selection logic unit, a control logic unit, a readout circuit, and the pixel array as described in claim 25; The column selection logic unit, the row selection logic unit, and the readout circuit are all electrically connected to the logic control unit. The row selection logic unit is used to select the activated row pixel unit under the control of the logic control unit; The column selection logic unit is used to select the activated column pixel unit under the control of the logic control unit; The readout circuit is electrically connected to the pixel units in the pixel array and is used to read electrical signals from the selected pixel units.

27. A chip, characterized in that, Including the image sensor as described in claim 26.

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