Display panel, preparation method thereof and display device

Abstract

Embodiments of the present application provide a display panel, a preparation method thereof and a display device, and solve the problem of poor flatness of the film layer of the display device in the prior art. The display panel comprises a substrate, a first planarization layer, a first conductive part, a second planarization layer, a pixel definition layer and a first electrode. The first planarization layer is located on one side of the substrate. The first conductive part is located on the side of the first planarization layer away from the substrate. The second planarization layer is located on the side of the first conductive part and the first planarization layer away from the substrate. The pixel definition layer is located on the side of the second planarization layer away from the substrate. The pixel definition layer comprises a pixel definition part and a pixel opening enclosed by the pixel definition part. The orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the first conductive part on the substrate. At least part of the first electrode is located within the pixel opening. The orthographic projection of the first electrode on the substrate and the orthographic projection of the first conductive part on the substrate partially overlap.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to a display panel, its manufacturing method, and a display device. Background Technology

[0002] Organic light-emitting diode (OLED) and flat panel display devices based on light-emitting diode (LED) technologies are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display devices.

[0003] However, the film layer flatness of existing display devices is poor. Summary of the Invention

[0004] In view of this, the present application provides a display panel, a method for manufacturing the same, and a display device, which solves the problem of poor film flatness in the prior art display devices.

[0005] A first aspect of this application provides a display panel, which includes a substrate, a first planarization layer, a first conductive portion, a second planarization layer, a pixel definition layer, and a first electrode. The first planarization layer is located on one side of the substrate; the first conductive portion is located on the side of the first planarization layer opposite to the substrate; the second planarization layer is located on the side of the first conductive portion and the first planarization layer opposite to the substrate; the pixel definition layer is located on the side of the second planarization layer opposite to the substrate, and the pixel definition layer includes a pixel definition portion and a pixel opening enclosed by the pixel definition portion. The orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the first conductive portion on the substrate; at least a portion of the first electrode is located within the pixel opening, and the orthographic projection of the first electrode on the substrate and the orthographic projection of the first conductive portion on the substrate partially overlap.

[0006] In one embodiment, the display panel further includes a second conductive portion and a third conductive portion stacked together, the second conductive portion and the third conductive portion being located between the substrate and the first planarization layer; the orthographic projection of the second conductive portion and the third conductive portion on the substrate is located within the orthographic projection of the pixel opening on the substrate; preferably, the second conductive portion is located on the side of the third conductive portion away from the substrate; preferably, the second conductive portion is a first capacitor plate and the third conductive portion is a second capacitor plate.

[0007] In one embodiment, the display panel further includes a thin-film transistor located between the substrate and the first electrode; preferably, the orthographic projection of the thin-film transistor on the substrate and the orthographic projection of the first conductive portion on the substrate do not overlap.

[0008] In one embodiment, the first planarization layer is provided with a first via, which penetrates the first planarization layer in a direction perpendicular to the display panel, and the second planarization layer is provided with a second via, which penetrates the second planarization layer in a direction perpendicular to the display panel. The first electrode is electrically connected to the thin-film transistor through the first via and the second via. Preferably, the orthographic projection of the second via on the substrate and the orthographic projection of the first conductive part on the substrate do not overlap.

[0009] In one embodiment, the thin-film transistor includes an active portion and a gate, the gate being located on the side of the active portion away from the substrate; preferably, the orthographic projection of the gate onto the substrate is located within the orthographic projection of the active portion onto the substrate; preferably, the gate and the third conductive portion are disposed in the same layer; preferably, the thin-film transistor further includes a source and a drain, the source and drain being located on the side of the gate away from the substrate, and the source and drain being electrically connected to the active portion; preferably, it further includes a gate insulating layer, the gate insulating layer being located between the gate and the active portion; preferably, it further includes an interlayer insulating layer, the interlayer insulating layer being located between the source and drain and the gate.

[0010] In one embodiment, the display panel further includes a light-emitting functional part and a second electrode, wherein the light-emitting functional part is located within the pixel opening and the second electrode is located on the side of the pixel definition part and the light-emitting functional part away from the substrate; preferably, the display panel further includes a thin film encapsulation layer, wherein the thin film encapsulation layer is located on the side of the second electrode away from the substrate.

[0011] In one embodiment, the display panel further includes a support pillar located on the side of the pixel definition portion away from the substrate, and the support pillar is located between the pixel definition portion and the second electrode.

[0012] A second aspect of this application provides a method for fabricating a display panel, the method comprising: sequentially fabricating a first planarization layer, a first conductive portion, and a second planarization layer on one side of a substrate; fabricating a first electrode on the side of the second planarization layer away from the substrate, wherein the orthographic projection of the first electrode on the substrate and the orthographic projection of the first conductive portion on the substrate partially overlap; and fabricating a pixel definition layer on the side of the second planarization layer away from the substrate, the pixel definition layer comprising a pixel definition portion and a pixel opening enclosed by the pixel definition portion, wherein the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the first conductive portion on the substrate, and at least a portion of the first electrode is located within the pixel opening.

[0013] In one embodiment, sequentially preparing a first planarization layer, a first conductive portion, and a second planarization layer on one side of a substrate includes: coating a first organic material layer on one side of the substrate to obtain a first planarization layer; preparing a first conductive portion on the side of the first planarization layer away from the substrate; and coating the first planarization layer and the first conductive portion on the side away from the substrate to obtain a second planarization layer.

[0014] A third aspect of this application provides a display device, which includes the display panel described above, or the display panel obtained by the preparation method described above.

[0015] This application provides a display panel, its fabrication method, and a display device. The display panel includes a substrate, a first planarization layer, a first conductive portion, a second planarization layer, a pixel definition layer, and a first electrode. The first planarization layer is located on one side of the substrate; the first conductive portion is located on the side of the first planarization layer opposite to the substrate; the second planarization layer is located on the side of the first conductive portion and the first planarization layer opposite to the substrate; the pixel definition layer is located on the side of the second planarization layer opposite to the substrate, and includes a pixel definition portion and a pixel opening enclosed by the pixel definition portion. The orthographic projection of the pixel opening on the substrate lies within the orthographic projection of the first conductive portion on the substrate; at least a portion of the first electrode is located within the pixel opening, and the orthographic projections of the first electrode and the first conductive portion on the substrate partially overlap. In the above embodiment, by providing a first conductive portion between the first and second planarization layers, the first conductive portion, being a metal planarization layer, can improve the film flatness of the display panel due to its harder metal material and better film flatness. Furthermore, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the first conductive portion on the substrate. The first conductive portion, in conjunction with the first planarization layer and the second planarization layer, can improve the surface flatness of the first electrode within the pixel opening and enhance the display effect of the display panel. Attached Figure Description

[0016] The above and other objects, features, and advantages of this application will become more apparent from the more detailed description of the embodiments of this application in conjunction with the accompanying drawings. The drawings are provided to further illustrate the embodiments of this application and form part of the specification. They are used together with the embodiments of this application to explain this application and do not constitute a limitation thereof. In the drawings, the same reference numerals generally represent the same components or steps.

[0017] Figure 1 This is a schematic cross-sectional view of the display panel provided in the first embodiment of this application.

[0018] Figure 2 This is a cross-sectional structural diagram of the display panel provided in the second embodiment of this application.

[0019] Figure 3 This is a cross-sectional structural diagram of the display panel provided in the third embodiment of this application.

[0020] Figure 4 This is a schematic cross-sectional view of the display panel provided in the fourth embodiment of this application.

[0021] Figure 5This is a cross-sectional structural diagram of the display panel provided in the fifth embodiment of this application.

[0022] Figure 6 This is a cross-sectional structural diagram of the display panel provided in the sixth embodiment of this application.

[0023] Figure 7 This is a schematic flowchart of the method for manufacturing a display panel provided in an embodiment of this application.

[0024] Figure 8 This is a schematic diagram of the cross-sectional structure of the display module provided in the embodiment of this application.

[0025] Figure 9 This is a schematic diagram of the structure of the display device provided in the embodiments of this application. Detailed Implementation

[0026] Organic Light Emitting Display (OLED) and flat panel displays based on Light Emitting Diode (LED) technologies are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide application range, becoming the mainstream display devices. However, current display panels have high requirements for the flatness of the anode, so the circuit traces of the display substrate have a significant impact on the flatness of the anode. In current technology, an organic planarization layer is usually used to fill the circuit traces of the display substrate to achieve flatness. However, the organic film layer needs to be coated and cured, and after actual curing, the film layer of the display panel still has the problem of unevenness due to the influence of the circuit traces of the display substrate.

[0027] In view of this, embodiments of this application provide a display panel, a method for manufacturing the same, and a display device. The display panel includes a substrate, a first planarization layer, a first conductive portion, a second planarization layer, a pixel definition layer, and a first electrode. The first planarization layer is located on one side of the substrate; the first conductive portion is located on the side of the first planarization layer opposite to the substrate; the second planarization layer is located on the side of the first conductive portion and the first planarization layer opposite to the substrate; the pixel definition layer is located on the side of the second planarization layer opposite to the substrate, and includes a pixel definition portion and a pixel opening enclosed by the pixel definition portion. The orthographic projection of the pixel opening on the substrate lies within the orthographic projection of the first conductive portion on the substrate; at least a portion of the first electrode is located within the pixel opening, and the orthographic projections of the first electrode and the first conductive portion on the substrate partially overlap. The above embodiments, by providing a first conductive portion between the first and second planarization layers, improve the film flatness of the display panel because the metal material of the first conductive portion is relatively hard and the film flatness is good. Furthermore, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the first conductive portion on the substrate. The first conductive portion, in conjunction with the first planarization layer and the second planarization layer, can improve the surface flatness of the first electrode within the pixel opening and enhance the display effect of the display panel.

[0028] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0029] In the accompanying drawings, the dimensions of layers and regions may be exaggerated for clarity. It is understood that when a structure is referred to as being "on" or "below" another structure, the structure may be directly on or below the other structure, or there may be intermediate structures. The same reference numerals always indicate the same structure. Structures referred to herein include any of the following: membrane, element, device, component, assembly.

[0030] When a structure is referred to as being “connected” to another structure, it can be directly connected to the other structure or indirectly connected to the other structure by means of one or more intermediate structures placed between them.

[0031] In this specification, "electrical connection" includes the situation where components are connected together by elements that have a certain electrical function. There are no particular limitations on what constitutes an "electrical function," as long as it allows for the transmission and reception of electrical signals between the connected components. Examples of "electrical functions" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with various functions.

[0032] In this specification, the term "same-layer arrangement" refers to a structure formed by two (or more) structures through the same patterning process, and their materials may be the same or different.

[0033] Figure 1 This is a schematic cross-sectional view of the display panel provided in the first embodiment of this application. Figure 1 As shown, the display panel 100 includes a substrate 10, a first planarization layer 20, a first conductive portion 30, a second planarization layer 40, a pixel definition layer 50, and a first electrode 61. The first planarization layer 20 is located on one side of the substrate 10, the first conductive portion 30 is located on the side of the first planarization layer 20 opposite to the substrate 10, and the second planarization layer 40 is located on the side of the first conductive portion 30 and the first planarization layer 20 opposite to the substrate 10. The pixel definition layer 50 is located on the side of the second planarization layer 40 opposite to the substrate 10. The pixel definition layer 50 includes a pixel definition portion 51 and a pixel opening 52 enclosed by the pixel definition portion 51. The orthographic projection of the pixel opening 52 on the substrate 10 lies within the orthographic projection of the first conductive portion 30 on the substrate 10. At least a portion of the first electrode 61 is located within the pixel opening 52, and the orthographic projection of the first electrode 61 on the substrate 10 and the orthographic projection of the first conductive portion 30 on the substrate 10 partially overlap.

[0034] In the above embodiment, a first conductive portion 30 is provided between the first planarization layer 20 and the second planarization layer 40. Since the metal material of the first conductive portion 30 is relatively hard and the film layer has good flatness, the first conductive portion 30, as a metal planarization layer, can improve the film layer flatness of the display panel 100. Furthermore, the orthographic projection of the pixel opening 52 on the substrate 10 is located within the orthographic projection of the first conductive portion 30 on the substrate 10. The first conductive portion 30, in conjunction with the first planarization layer 20 and the second planarization layer 40, can improve the surface flatness of the first electrode 61 within the pixel opening 52, thereby improving the display effect of the display panel 100.

[0035] Optionally, in one embodiment, the substrate 10 may be, but is not limited to, any one of a conductive silicon (Si) substrate, a silicon oxide (SiOx) substrate, an aluminum oxide (Al2O3) substrate (i.e., a sapphire substrate), a silicon carbide (SiC) substrate, or a gallium nitride (GaN) substrate. Furthermore, the substrate 10 may also be a flexible substrate, for example, a flexible substrate made of polyimide (PI).

[0036] Optionally, in one embodiment, the materials of the first planarization layer 20 and the second planarization layer 40 may include organic materials, and the first planarization layer 20 and the second planarization layer 40 can fill the circuit traces of the display panel to achieve a planarization function.

[0037] Optionally, in one embodiment, the display panel 100 further includes a light-emitting device 60, which may be an organic light-emitting diode (OLED), a micro light-emitting diode (Micro LED), a quantum dot light-emitting diode (QLED), etc. The light-emitting device 60 may be a light-emitting device of various colors, such as a red light-emitting device R, a green light-emitting device G, a blue light-emitting device B, a white light-emitting device W, etc.

[0038] Optionally, in one embodiment, the light-emitting device 60 includes a first electrode 61 and a second electrode 62 stacked together, and at least one light-emitting functional part 63 located between the first electrode 61 and the second electrode 62. The second electrode 62 is located on the side of the first electrode 61 and the pixel definition part 51 facing away from the substrate 10. The first electrode 61 may be an anode, and the second electrode 62 may be a cathode. The at least one light-emitting functional part 63 includes an emitting layer (EML), and may further include at least one of a hole injection layer (HIL), a hole transport layer (HTL), and an electron-blocking layer (EBL) located between the anode and the emitting layer (EML), and at least one of an electron injection layer (EIL), an electron transport layer (ETL), and a hole-blocking layer (HBL) located between the cathode and the emitting layer (EML).

[0039] Optionally, in one embodiment, the pixel definition layer 50 can be a light-transmitting material to allow light from the light-emitting device 60 to pass through the pixel definition layer 50 more effectively. Optionally, the pixel definition layer 50 can be an opaque material, which can improve the light absorption of the pixel definition layer 50, reduce the reflectivity of the display panel, further reduce optical crosstalk between adjacent light-emitting devices 60, and improve the display effect of the display panel 100.

[0040] Optionally, in one embodiment, the pixel definition layer 50 is made of an inorganic material.

[0041] Figure 2 This is a schematic cross-sectional view of the display panel provided in the second embodiment of this application. (See attached diagram.) Figure 2 As shown, Figure 2 The display panel shown and Figure 1 The difference in the display panels shown is that, Figure 2 The display panel 100 shown also includes a second conductive part 70 and a third conductive part 80.

[0042] Optionally, in one embodiment, the display panel 100 further includes a second conductive portion 70 and a third conductive portion 80 stacked together, the second conductive portion 70 and the third conductive portion 80 being located between the substrate 10 and the first planarization layer 20, and the orthographic projection of the second conductive portion 70 and the third conductive portion 80 on the substrate 10 being located within the orthographic projection of the pixel opening 52 on the substrate 10.

[0043] Specifically, in one embodiment, the second conductive portion 70 is located on the side of the third conductive portion 80 that is away from the substrate 10.

[0044] Furthermore, in one embodiment, the orthographic projection of the second conductive portion 70 on the substrate 10 coincides with the orthographic projection of the third conductive portion 80 on the substrate 10.

[0045] Optionally, in one embodiment, the orthographic projections of the second conductive portion 70 and the third conductive portion 80 on the substrate 10 are located within the orthographic projection of the first conductive portion 30 on the substrate 10, so as to avoid the second conductive portion 70 and the third conductive portion 80 affecting the flatness of the first electrode 61.

[0046] Optionally, in one embodiment, the second conductive part 70 is the first capacitor plate, and the third conductive part 80 is the second capacitor plate.

[0047] Figure 3 This is a schematic cross-sectional view of the display panel provided in the third embodiment of this application. Figure 3 As shown, Figure 3 The display panel shown and Figure 2 The difference in the display panels shown is that, Figure 3The display panel 100 shown also includes a thin-film transistor 90.

[0048] Optionally, in one embodiment, the display panel 100 further includes a thin-film transistor 90, which is located between the substrate 10 and the first electrode 61.

[0049] Optionally, in one embodiment, the orthographic projection of the thin-film transistor 90 on the substrate 10 and the orthographic projection of the first conductive portion 30 on the substrate 10 do not overlap.

[0050] Specifically, in one embodiment, the thin-film transistor 90 includes an active portion 91 and a gate 92, with the gate 92 located on the side of the active portion 91 away from the substrate 10.

[0051] The active part 91 is the core functional layer of the thin-film transistor 90. Its material properties and structure directly determine the electrical performance of the device, such as mobility, on / off ratio, and stability. The active part 91 can form a conductive channel under the gate voltage regulation of the gate 92 to control the current between the source and drain.

[0052] It should be understood that the specific material of the active part 91 is not limited in the embodiments of this application. For example, the material of the active part 91 can be amorphous silicon (a-Si), or polycrystalline silicon, such as low temperature polycrystalline silicon (LTPS) or high temperature polycrystalline silicon (HTPS), or oxide semiconductor, such as indium gallium zinc oxide (IGZO) or zinc oxide (ZnO).

[0053] The gate 92 is a key control electrode in the thin-film transistor 90. By applying voltage, the conductivity of the semiconductor channel is adjusted, thereby controlling the switching state of the device.

[0054] It should be understood that the specific material of the gate 92 is not limited in the embodiments of this application. For example, the gate 92 can be a metal gate, and the material of the gate 92 can be aluminum (Al), molybdenum (Mo), copper (Cu), or a composite metal layer (such as Mo / Al / Mo). Metal gates have the characteristics of low resistance and high stability. Alternatively, the material of the gate 92 can be a transparent conductive oxide, such as indium tin oxide (ITO), which can be used in transparent or flexible devices.

[0055] Optionally, in one embodiment, the orthogonal projection of the gate 92 on the substrate 10 lies within the orthogonal projection of the active portion 91 on the substrate 10.

[0056] Optionally, in one embodiment, the gate 92 and the third conductive portion 80 are disposed in the same layer.

[0057] Optionally, in one embodiment, the thin-film transistor 90 further includes a source / drain electrode 93 located on the side of the gate 92 away from the substrate 10, and the source / drain electrode 93 and the gate 92 are electrically connected.

[0058] Specifically, in one embodiment, the source-drain 93 includes a source 931 and a drain 932.

[0059] In this transistor 90, the source 931 and drain 932 are the two electrodes that are in direct contact with the active part 91, and are responsible for the injection and collection of charge carriers. Specifically, the source 931 can be used as the charge carrier injection terminal, and the drain 932 can be used as the charge carrier collection terminal to output current.

[0060] It should be understood that this application does not limit the specific materials of the source / drain electrode 93. For example, the source / drain electrode 93 can be a metal electrode, and the material of the source / drain electrode 93 can be aluminum (Al), molybdenum (Mo), titanium (Ti), copper (Cu) and their stacks (such as Ti / Al / Ti, Mo / Al / Mo), etc.; or the material of the source / drain electrode 93 can be a transparent conductive oxide, such as indium tin oxide (ITO), aluminum zinc oxide (AZO), etc.; or the material of the source / drain electrode 93 can be a flexible electrode, such as silver nanowires (AgNW), conductive polymers (such as PEDOT:PSS), graphene, etc.

[0061] Optionally, in one embodiment, the first electrode 61 and the thin-film transistor 90 are electrically connected.

[0062] In one manner, the first electrode 61 and the thin-film transistor 90 are electrically connected.

[0063] Specifically, the first planarization layer 20 is provided with a first via 21, which penetrates the first planarization layer 20 in a direction Z perpendicular to the display panel 100. The second planarization layer 40 is provided with a second via 41, which penetrates the second planarization layer 40 in a direction Z perpendicular to the display panel 100. The first electrode 61 is directly electrically connected to the drain 932 of the thin film transistor 90 through the first via 21 and the second via 41.

[0064] Optionally, in one embodiment, the first via 21 and the second via 41 are connected.

[0065] Optionally, in one embodiment, the orthographic projection of the second via 41 on the substrate 10 and the orthographic projection of the first conductive portion 30 on the substrate 10 do not overlap.

[0066] Optionally, in one embodiment, the display panel 100 further includes a gate insulating layer 110, which is located between the gate 92 and the active portion 91, and is used to insulate the gate 92 and the active portion 91.

[0067] Optionally, in one embodiment, the display panel 100 further includes an interlayer insulating layer 120 located between the source / drain electrode 93 and the gate electrode 92, the interlayer insulating layer 120 being used to insulate the gate electrode 92 and the source / drain electrode 93.

[0068] Specifically, in one embodiment, the interlayer insulating layer 120 includes a first interlayer insulating layer 121 and a second interlayer insulating layer 122, with the second interlayer insulating layer 122 located on the side of the first interlayer insulating layer 121 away from the substrate 10.

[0069] Figure 4 This is a schematic cross-sectional view of the display panel provided in the fourth embodiment of this application. Figure 4 As shown, Figure 4 The display panel shown and Figure 3 The difference in the display panel shown is that the display panel 100 also includes a connecting electrode 130.

[0070] Optionally, in one embodiment, the display panel further includes a connection electrode 130 located between the first electrode 61 and the thin-film transistor 90.

[0071] Optionally, in one embodiment, the first electrode 61 is electrically connected to the connecting electrode 130 through the first via 21, and then electrically connected to the drain 932 of the thin-film transistor 90 through the connecting electrode 130, the second via 41.

[0072] Optionally, in one embodiment, the orthographic projection of the connection electrode 130 on the substrate 10 lies within the orthographic projection of the drain electrode 932 on the substrate 10.

[0073] Figure 5 This is a schematic cross-sectional view of the display panel provided in the fifth embodiment of this application. Figure 5 As shown, Figure 5 The display panel shown and Figure 4 The difference in the display panels shown is that, Figure 5 The display panel 100 shown also includes a thin film encapsulation layer 140.

[0074] Optionally, in one embodiment, the display panel 100 further includes a thin film encapsulation layer 140. The thin film encapsulation layer 140 is located on the side of the second electrode 62 away from the substrate 10. The thin film encapsulation layer 140 is used to encapsulate the light-emitting device 60, which can isolate water and oxygen, reduce the probability of failure of the light-emitting device 60 and the underlying layer structure due to impurities such as water and oxygen entering the light-emitting device 60, and ensure that the manufacturing process of the display panel 100 does not affect the lifespan and reliability of the OLED device.

[0075] Optionally, in one embodiment, the thin-film encapsulation layer 140 includes a first encapsulation layer 141, a second encapsulation layer 142, and a third encapsulation layer 143 sequentially stacked on the side of the second electrode 62 facing away from the substrate 10.

[0076] Optionally, in one embodiment, the first encapsulation layer 141 and the third encapsulation layer 143 are inorganic encapsulation layers. For example, the material of the inorganic encapsulation layer is silicon oxide, silicon oxynitride, or silicon nitride, etc. The inorganic encapsulation layer can be a single layer, multiple layers, composite layers, etc.

[0077] Optionally, in one embodiment, the second encapsulation layer 142 is an organic encapsulation layer. Exemplarily, the organic encapsulation layer is made of fiber materials, resin materials, or materials used in multilayer boards, etc. The organic encapsulation layer can be a single layer, multiple layers, composite layers, etc.

[0078] Figure 6 This is a schematic cross-sectional view of the display panel provided in the sixth embodiment of this application. Figure 6 As shown, Figure 6 The display panel shown and Figure 4 The difference in the display panel shown is that the display panel 100 also includes a support column 150.

[0079] Optionally, in one embodiment, the display panel 100 further includes a support post 150, which is located on the side of the pixel definition portion 51 away from the substrate 10 and between the pixel definition portion 51 and the second electrode 62. The support post 150 is used to ensure the spacing between the pixel definition layer 50 and the fixture during the process of evaporating the light-emitting material.

[0080] This application provides a display panel including a substrate, a first planarization layer, a first conductive portion, a second planarization layer, a pixel definition layer, and a first electrode. The first planarization layer is located on one side of the substrate; the first conductive portion is located on the side of the first planarization layer opposite to the substrate; the second planarization layer is located on the side of the first conductive portion and the first planarization layer opposite to the substrate; the pixel definition layer is located on the side of the second planarization layer opposite to the substrate, and includes a pixel definition portion and a pixel opening enclosed by the pixel definition portion. The orthographic projection of the pixel opening on the substrate lies within the orthographic projection of the first conductive portion on the substrate; at least a portion of the first electrode is located within the pixel opening, and the orthographic projections of the first electrode and the first conductive portion on the substrate partially overlap. By providing a first conductive portion between the first and second planarization layers, the first conductive portion, being a metal planarization layer, can improve the film flatness of the display panel due to its harder metal material and better film flatness. Furthermore, the orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the first conductive portion on the substrate. The first conductive portion, in conjunction with the first planarization layer and the second planarization layer, can improve the surface flatness of the first electrode within the pixel opening and enhance the display effect of the display panel.

[0081] This application also provides a method for manufacturing a display panel. Figure 7 This is a schematic flowchart illustrating the method for manufacturing a display panel according to an embodiment of this application. Figure 7 As shown, the preparation method includes:

[0082] Step S100: A first planarization layer, a first conductive portion, and a second planarization layer are sequentially prepared on one side of the substrate.

[0083] Optionally, in one embodiment, the sequential fabrication of a first planarization layer 20, a first conductive portion 30, and a second planarization layer 40 on one side of the substrate 10 includes:

[0084] A first organic material layer is coated on one side of the substrate 10 to obtain a first planarization layer 20; a first conductive portion 30 is prepared on the side of the first planarization layer 20 away from the substrate 10; a second organic material layer is coated on the first planarization layer 20 and the first conductive portion 30 on the side away from the substrate 10 to obtain a second planarization layer 40.

[0085] Step S200: Prepare a first electrode on the side of the second planarization layer away from the substrate.

[0086] The orthographic projection of the first electrode 61 on the substrate 10 and the orthographic projection of the first conductive part 30 on the substrate 10 overlap.

[0087] Step S300: Prepare a pixel definition layer on the side of the second planarization layer away from the substrate.

[0088] The pixel definition layer 50 includes a pixel definition part 51 and a pixel opening 52 enclosed by the pixel definition part 51. The orthogonal projection of the pixel opening 52 on the substrate 10 is located within the orthogonal projection of the first conductive part 30 on the substrate 10.

[0089] Optionally, in one embodiment, at least a portion of the first electrode 61 is located within the pixel opening 52.

[0090] The display panel fabrication method provided in this application embodiment, by setting a first conductive portion between a first planarization layer and a second planarization layer, improves the film flatness of the display panel by using the first conductive portion as a metal planarization layer due to the hardness of the metal material and the good film flatness of the first conductive portion. Furthermore, the orthogonal projection of the pixel opening onto the substrate lies within the orthogonal projection of the first conductive portion onto the substrate. The first conductive portion, in conjunction with the first and second planarization layers, improves the surface flatness of the first electrode within the pixel opening, thereby enhancing the display effect of the display panel. Furthermore, the first and second planarization layers are formed through two organic coating processes, further increasing the film flatness of the display panel.

[0091] One embodiment of this application also provides a display module. Figure 8 This is a schematic cross-sectional view of the display module provided in an embodiment of this application. Figure 8 As shown, the display module 200 includes the display panel 100 provided in the above embodiments, or the display panel 100 obtained by the preparation method provided in the above embodiments.

[0092] Optionally, in one embodiment, the display module 200 further includes a cover plate 210 located on the side of the thin film encapsulation layer 140 away from the substrate 10. The cover plate 210 is the outermost protective component of the display module 200 and is typically made of transparent or translucent material. The cover plate 210 is used to protect the display panel 100 inside the display module 200 from physical damage, dust or moisture, while also providing touch functionality.

[0093] Specifically, the cover plate 210 can provide physical protection for the display panel 100, preventing damage to the display panel 100 from scratches, impacts, etc.

[0094] Specifically, the cover plate 210 has high transmittance, ensuring the display effect of the display module 200.

[0095] Optionally, in one embodiment, the cover plate 210 may be a glass cover plate.

[0096] Optionally, in one embodiment, the display module 200 further includes an optical adhesive layer 220 located between the display panel 100 and the cover plate 210 to bond the display panel 100 and the cover plate 210 together.

[0097] It should be understood that the specific type of optical adhesive layer 220 is not shown in the embodiments of this application. For example, optical adhesive layer 220 can be a solid optical adhesive, which can be pre-formed into a film, is easy to bond, and is suitable for mass production; or optical adhesive layer 220 can be a liquid optical adhesive, which is suitable for complex structures such as curved screens; or optical adhesive layer 220 can be an anti-blue light optical adhesive, which contains blue light absorbers and can reduce harmful blue light.

[0098] Optionally, in one embodiment, the display module 200 further includes a touch metal layer 230, which is located between the display panel 100 and the optical adhesive layer 220. The touch metal layer 230 can sense the user's touch operation and convert the sensed touch operation into an electrical signal, which is then transmitted to the driving circuit of the display panel 100. Optionally, the touch metal layer 230 can be a single-layer structure. Optionally, the touch metal layer 230 can be a multi-layer structure.

[0099] The display module 200 provided according to any embodiment of this application and the display panel 100 provided in the embodiments of this application belong to the same inventive concept and have corresponding film layer structures and beneficial effects. Details not described in detail in the embodiments of the display module 200 can be found in the embodiments of the display panel 100, and will not be repeated here.

[0100] One embodiment of this application also provides a display device. Figure 9 This is a schematic diagram of the structure of the display device provided in the embodiments of this application. Figure 9 As shown, the display device 300 includes the display panel 100 provided in the above embodiments, or the display panel 100 obtained by the manufacturing method provided in the above embodiments, or the display module 200 provided in the above embodiments. The display device 300 is a product with image display function. For example, the display device 300 can be used to display static images, such as pictures or photographs. The display device can also be used to display dynamic images, such as videos.

[0101] In addition, the display device 300 can also perform functions such as taking photos, recording videos, fingerprint recognition, and facial recognition. Accordingly, the display device 300 also includes at least one functional module for implementing the above functions, such as an under-display camera or an under-display fingerprint recognition sensor.

[0102] The display device 300 provided according to any embodiment of this application and the display panel 100 provided in the embodiments of this application belong to the same inventive concept and have corresponding film layer structures and beneficial effects. Details not described in detail in the embodiments of the display device 300 can be found in the embodiments of the display panel 100, and will not be repeated here.

[0103] The basic principles of this application have been described above with reference to specific embodiments. However, it should be noted that the advantages, benefits, and effects mentioned in this application are merely examples and not limitations, and should not be considered as essential features of each embodiment of this application. Furthermore, the specific details disclosed above are for illustrative and facilitative purposes only, and are not limitations. These details do not limit the application to the necessity of employing the aforementioned specific details for implementation.

[0104] The block diagrams of devices, apparatuses, devices, and systems involved in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, devices, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms meaning “including but not limited to,” and are used interchangeably with them. The terms “or” and “and” as used herein refer to the terms “and / or,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0105] It should also be noted that in the apparatus, equipment, and methods of this application, the components or steps can be disassembled and / or recombined. These disassemblies and / or recombinations should be considered as equivalent solutions of this application.

[0106] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the aspects shown herein, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0107] The above description has been given for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of this application to the forms disclosed herein. Although numerous exemplary aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, alterations, additions, and sub-combinations thereof.

[0108] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A display panel, characterized in that, include: Substrate; A first planarization layer is located on one side of the substrate. A first conductive portion is located on the side of the first planarization layer that is away from the substrate. The second planarization layer is located on the side of the first conductive portion and the first planarization layer that is away from the substrate. A pixel definition layer is located on the side of the second planarization layer away from the substrate. The pixel definition layer includes a pixel definition portion and a pixel opening enclosed by the pixel definition portion. The orthographic projection of the pixel opening on the substrate is located within the orthographic projection of the first conductive portion on the substrate. as well as A first electrode, at least a portion of which is located within the pixel opening, wherein the orthographic projection of the first electrode on the substrate and the orthographic projection of the first conductive portion on the substrate overlap.

2. The display panel according to claim 1, characterized in that, The display panel further includes a second conductive portion and a third conductive portion stacked together, the second conductive portion and the third conductive portion being located between the substrate and the first planarization layer; the orthographic projection of the second conductive portion and the third conductive portion on the substrate is located within the orthographic projection of the pixel opening on the substrate; Preferably, the second conductive portion is located on the side of the third conductive portion that is away from the substrate. Preferably, the second conductive part is the first capacitor plate, and the third conductive part is the second capacitor plate.

3. The display panel according to claim 2, characterized in that, The display panel further includes a thin-film transistor, which is located between the substrate and the first electrode. Preferably, the orthographic projection of the thin-film transistor on the substrate and the orthographic projection of the first conductive portion on the substrate do not overlap.

4. The display panel according to claim 3, characterized in that, The first planarization layer has a first via, which penetrates the first planarization layer in a direction perpendicular to the display panel. The second planarization layer has a second via, which penetrates the second planarization layer in a direction perpendicular to the display panel. The first electrode is electrically connected to the thin-film transistor through the first via and the second via. Preferably, the orthographic projection of the second via on the substrate and the orthographic projection of the first conductive portion on the substrate do not overlap.

5. The display panel according to claim 3, characterized in that, The thin-film transistor includes an active portion and a gate, wherein the gate is located on the side of the active portion away from the substrate. Preferably, the orthographic projection of the gate on the substrate is located within the orthographic projection of the active portion on the substrate; Preferably, the gate and the third conductive portion are disposed in the same layer; Preferably, the thin-film transistor further includes a source and a drain, the source and drain being located on the side of the gate opposite to the substrate, and the source and drain being electrically connected to the active portion; Preferably, it further includes a gate insulating layer, the gate insulating layer being located between the gate and the active portion; Preferably, it further includes an interlayer insulating layer located between the source / drain and the gate.

6. The display panel according to claim 1, characterized in that, It also includes a light-emitting functional part and a second electrode, wherein the light-emitting functional part is located inside the pixel opening, and the second electrode is located on the side of the pixel definition part and the light-emitting functional part away from the substrate. Preferably, the display panel further includes a thin-film encapsulation layer located on the side of the second electrode opposite to the substrate.

7. The display panel according to claim 6, characterized in that, The display panel further includes a support pillar located on the side of the pixel definition portion away from the substrate, and the support pillar is located between the pixel definition portion and the second electrode.

8. A method for manufacturing a display panel, characterized in that, include: A first planarization layer, a first conductive portion, and a second planarization layer are sequentially prepared on one side of a substrate. A first electrode is formed on the side of the second planarization layer away from the substrate, and the orthogonal projection of the first electrode on the substrate and the orthogonal projection of the first conductive portion on the substrate overlap. A pixel definition layer is prepared on the side of the second planarization layer away from the substrate. The pixel definition layer includes a pixel definition portion and a pixel opening enclosed by the pixel definition portion. The orthogonal projection of the pixel opening on the substrate is located within the orthogonal projection of the first conductive portion on the substrate. At least a portion of the first electrode is located within the pixel opening.

9. The preparation method according to claim 8, characterized in that, The step of sequentially fabricating a first planarization layer, a first conductive portion, and a second planarization layer on one side of a substrate includes: A first organic material layer is coated on one side of the substrate to obtain the first planarization layer; A first conductive portion is formed on the side of the first planarization layer opposite to the substrate. A second organic material layer is coated on the side of the first planarization layer and the first conductive portion away from the substrate to obtain a second planarization layer.

10. A display device, characterized in that, The display panel includes the display panel described in any one of claims 1-7, or the display panel obtained by the preparation method described in any one of claims 8-9.

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