A display panel and a preparation method of the display panel

Abstract

The application discloses a display panel and a preparation method thereof, and relates to the technical field of display. The display panel comprises an array substrate, a polaroid and an encapsulation layer. The array substrate comprises a substrate, a conductive layer and a driving electrode line. The conductive layer is arranged on the substrate. The conductive layer comprises a plurality of conductive tracks. The conductive layer and the substrate are separated by a first insulating layer. The uppermost layer of the array substrate is provided with a second insulating layer. The polaroid is arranged above the array substrate and is spaced apart from the array substrate. The driving electrode line is arranged between the second insulating layer and the polaroid. The encapsulation layer is arranged between the polaroid and the array substrate to encapsulate the polaroid and the array substrate. The encapsulation layer covers at least part of the driving electrode line. The display panel can reduce the width of the lower frame of the screen body, improve the screen-to-body ratio and improve the user experience.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display panel and a method for manufacturing the display panel. Background Technology

[0002] As the mobile phone industry chain matures, mobile phones have evolved from mere communication tools into an indispensable part of our daily lives and social interactions. However, a mature industry chain also means that mobile phone designs are becoming more homogenized. To enhance competitiveness and sales, achieving narrow bezels and designing phones with high screen-to-body ratios has become a crucial R&D strategy for mobile phone manufacturers.

[0003] At the bottom bezel of the screen, exposed driving electrode lines are formed on the surface of the array substrate. However, to prevent the internal structure of the display panel from being corroded by external moisture, the encapsulation layer needs to be located at the edge of the array substrate. Generally, since the driving electrode lines are located at the bottom bezel of the screen and close to the edge of the array substrate, the encapsulation edge of the encapsulation layer needs to be located outside the driving electrode lines. This results in a larger non-display area at the bottom bezel of the screen, affecting the screen-to-body ratio and reducing the user experience. Summary of the Invention

[0004] The purpose of this invention is to provide a display panel and a method for manufacturing the display panel, which can reduce the width of the bottom bezel of the screen, increase the screen-to-body ratio, and improve the user experience.

[0005] To achieve this objective, the present invention adopts the following technical solution:

[0006] A display panel, the display panel comprising:

[0007] An array substrate includes a substrate, a conductive layer, and driving electrode lines. The conductive layer is disposed on the substrate and includes multiple conductive lines. The conductive layer is separated from the substrate by a first insulating layer, and a second insulating layer is disposed on the conductive layer.

[0008] A polarizer is disposed above and spaced apart from the array substrate, and the driving electrode line is disposed between the second insulating layer and the polarizer;

[0009] An encapsulation layer is disposed between the polarizer and the array substrate to encapsulate the polarizer and the array substrate, the encapsulation layer covering at least a portion of the drive electrode lines.

[0010] As an optional solution for the above-mentioned display panel, the driving electrode line includes a risk contour line along the thickness direction of the display panel. The risk contour line is the outer contour line of a segment of the driving electrode line that is covered by the encapsulation layer and has the conductive trace below it. The display panel includes a first planarization structure, which is disposed on the array substrate and covers the risk contour line.

[0011] As an alternative to the above-mentioned display panel, the display panel further includes a planarization layer disposed on the array substrate, and the planarization layer includes at least the first planarization structure.

[0012] As an optional solution for the above-mentioned display panel, the planarization layer has a film-forming groove extending through the second insulating layer and the driving electrode line. The encapsulation layer covers the planarization layer and is encapsulated to the second insulating layer and the driving electrode line through the film-forming groove. The film-forming groove does not intersect with the risk contour line. The portion of the planarization layer covering the risk contour line forms the first planarization structure.

[0013] As an alternative to the aforementioned display panel, the thickness of the first planarization structure gradually increases from the outside to the inside.

[0014] As an alternative to the above-mentioned display panel, there is no conductive trace below the outer contour of the driving electrode line covered by the encapsulation layer along the thickness direction of the display panel.

[0015] As an alternative to the above-mentioned display panel, during the design phase of the display panel, the position of the conductive trace below the outer contour of the driving electrode line covered by the encapsulation layer is changed.

[0016] As an alternative to the above-mentioned display panel, during the design phase of the display panel, the shape of the driving electrode line is changed to change the position of the outer contour line of the driving electrode line.

[0017] A method for manufacturing a display panel, the method comprising:

[0018] An array substrate is fabricated, with a second insulating layer disposed on the top layer of the array substrate, and driving electrode lines disposed on the second insulating layer;

[0019] The array substrate is encapsulated to form an encapsulation layer that covers at least a portion of the driving electrode lines;

[0020] The polarizer is placed on the encapsulation layer.

[0021] As an alternative to the above-mentioned display panel fabrication method, the area covered by the encapsulation layer in the outer contour of the driving electrode line is called the risk contour line, and the fabrication method further includes:

[0022] A planarization layer is formed on the upper surface of the array substrate, and a film-forming groove is formed in the planarization layer that extends to the second insulating layer and the driving electrode line, and the film-forming groove does not intersect with the risk contour line.

[0023] An encapsulation layer is fabricated on the planarization layer, and the encapsulation layer covers the film formation groove to encapsulate the second insulating layer and the drive electrode line.

[0024] As an alternative to the above-mentioned method for manufacturing the display panel, the fabrication of the array substrate includes:

[0025] Provide a substrate;

[0026] A first insulating layer, a conductive layer, and a second insulating layer are sequentially deposited on a substrate. The conductive layer includes multiple conductive traces.

[0027] A driving electrode line is disposed on the second insulating layer, and there are no conductive traces below the outer contour of the driving electrode line covered by the encapsulation layer along the thickness direction of the display panel.

[0028] The beneficial effects of this invention are:

[0029] This invention provides a display panel and a method for manufacturing the display panel. In this display panel, the array substrate is the electronic center of the display panel, and the conductive layer is used to arrange conductive traces. The conductive traces activate the corresponding electrodes, thereby driving and controlling the switching and display of each pixel. To avoid short circuits, the conductive layer is separated from the substrate by a first insulating layer, and the conductive layer is separated from the driving electrode lines by a second insulating layer. The polarizer can control the polarization direction of light, thereby achieving the regulation of display brightness, color, and contrast. The encapsulation layer of the display panel is disposed between the polarizer and the array substrate, which can seal the gap between the polarizer and the array substrate and prevent external moisture from entering the interior of the display panel and causing corrosion to the internal structure of the display panel. Moreover, the encapsulation layer covers at least part of the driving electrode lines, so that the encapsulation layer and the driving electrode lines intersect, and the outer edge of the encapsulation layer is equivalent to moving inward, thereby reducing the width of the non-display area at the bottom bezel of the screen.

[0030] This display panel can reduce the width of the bottom bezel of the screen, increase the screen-to-body ratio, and improve the user experience. Attached Figure Description

[0031] Figure 1 This is a cross-sectional view of a display panel provided in the background art of this invention;

[0032] Figure 2This is a cross-sectional view of a display panel provided in an embodiment of the present invention;

[0033] Figure 3 This is a first top perspective view of a display panel provided in an embodiment of the present invention;

[0034] Figure 4 This is a second top perspective view of a display panel provided in an embodiment of the present invention;

[0035] Figure 5 This is a third top perspective view of a display panel provided in an embodiment of the present invention.

[0036] In the picture:

[0037] 1. Array substrate; 11. Substrate substrate; 12. Driving electrode line; 121. Risk contour line; 122. Normal contour line; 13. Conductive trace; 14. First insulating layer; 15. Second insulating layer;

[0038] 2. Polarizing film;

[0039] 3. Encapsulation layer;

[0040] 4. Optical adhesive layer; 41. High-refractive-index layer; 42. Low-refractive-index layer;

[0041] 5. Planarization layer; 51. First planarization structure; 52. Second planarization structure; 53. Film-forming groove. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. The technical solutions of this invention are clearly and completely described. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0043] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the invention. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the invention for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0044] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The terms "first position" and "second position" refer to two different positions.

[0045] Unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing" should be interpreted broadly. For example, they can refer to fixed connections or detachable connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and connections within two components or interactions between two components. Those skilled in the art can understand the specific meaning of these terms in this invention based on the specific circumstances.

[0046] Unless otherwise expressly specified and limited, "above" or "below" a second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of a second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" of a second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0047] The technical solution of the present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0048] This embodiment provides a display device, which includes a housing and a display panel. The display panel is mounted on and fixed to the housing, and a power supply is provided inside the housing to power the display panel. As display devices are increasingly used in various aspects of daily life, such as mobile phones, smartwatches, and in-vehicle screens, the requirements for these devices are also becoming more demanding. In this embodiment, a mobile phone is used as an example for illustration.

[0049] The display panel includes an array substrate, an anode layer, a pixel definition layer, a cathode layer, and a light-emitting layer. The cathode layer is a single cathode plate, and the anode layer includes multiple anode plates spaced apart below the cathode layer along the thickness direction of the display panel. The pixel definition layer defines and limits the shape and size of pixels to ensure that each pixel functions correctly. The light-emitting layer includes multiple light-emitting units located between corresponding cathode plates and corresponding anode plates. The array substrate controls the anode to energize the corresponding anode plate and the cathode, thereby activating the light-emitting units to emit light and display images.

[0050] It is worth noting that the display panel includes a display area and a non-display area surrounding the display area. The anode layer, pixel definition layer, and light-emitting layer are located within the display area, while the cathode layer and array substrate are located in both the display area and the non-display area. This ensures that the array substrate can control the anode of the anode layer within the display area, thereby ensuring that each pixel can function properly.

[0051] like Figure 1 and Figure 2 As shown, in this embodiment, the array substrate 1 includes a substrate 11, a conductive layer and driving electrode lines 12. The conductive layer is disposed on the substrate 11 and includes multiple conductive lines 13. The conductive layer and the substrate 11 are separated by a first insulating layer 14. A second insulating layer 15 is disposed on the conductive layer, and the driving electrode lines 12 are disposed on the second insulating layer 15.

[0052] The array substrate 1 is the electronic center of the display panel, and the conductive layer is used to arrange the conductive traces 13. The corresponding electrode plates are activated through the conductive traces 13, thereby driving and controlling the switching and display of each pixel. In order to avoid short circuits, the conductive layer is separated from the substrate 11 by the first insulating layer 14, and the conductive layer is separated from the driving electrode line 12 by the second insulating layer 15.

[0053] Furthermore, the array substrate 1 includes multiple conductive layers, each conductive layer having multiple conductive traces 13. In order to prevent the conductive traces 13 of adjacent conductive layers from coming into contact and short-circuiting, a first insulating layer 14 is also provided between two adjacent conductive layers. Moreover, the first insulating layer 14 and the second insulating layer 15 are made of the same material and have the same structure; in this embodiment, they are referred to by different names only for the purpose of distinction.

[0054] Generally, traces in different conductive layers have different functions. For example, the first conductive layer M1 has two functional signal lines, which can be any two of the first direction reset signal line Vref-x, scan signal line Vscan, and first direction power signal line Vdd-x. The second conductive layer M2 has one functional signal line, which is a functional signal line other than the two functional signal lines in the first conductive layer M1, among the first direction reset signal line Vref-x, scan signal line Vscan, and first direction power signal line Vdd-x. The source electrode S and drain electrode D are located in the third conductive layer M3, and the signal connection trace Vlink is located in the fourth conductive layer M4. The data signal line Vdata, the second direction reset signal line Vref-y, and the second direction power signal line Vdd-y are jointly disposed in the fifth conductive layer M5.

[0055] In this embodiment, along the direction away from the substrate 11, the first conductive layer M1, the second conductive layer M2, the third conductive layer M3 and the fourth conductive layer M4 are sequentially disposed, and the distance between the fifth conductive layer M5 and the anode layer is the same as the distance between the fourth conductive layer M4 and the anode layer.

[0056] In this embodiment, the driving electrode line 12 includes an anode driving electrode and a cathode driving electrode. Both the anode driving electrode and the cathode driving electrode are located at the lower frame of the display panel. The anode driving electrode is closer to the display area than the cathode driving electrode. The cathode layer extends from the left and right frames of the display panel to the lower frame and is electrically connected to the cathode driving electrode, thereby bypassing the anode driving electrode and avoiding short circuit between the two.

[0057] like Figure 1 and Figure 2 As shown, generally speaking, the driving electrode line 12 is the uppermost structure of the array substrate 1 in the non-display area. To prevent the internal structure of the display panel from being corroded by external moisture, the display panel also includes an encapsulation layer 3 and a cover plate. The encapsulation layer 3 is disposed between the cover plate and the array substrate 1 to encapsulate the cover plate and the array substrate 1. The outer edge of the encapsulation layer 3 simultaneously seals and connects the cover plate and the array substrate 1 to form an annular sealing structure, thereby surrounding the internal structure of the display panel.

[0058] Specifically, the cover plate includes an optical adhesive layer 4 and a polarizer 2. The optical adhesive layer 4 is disposed on the side of the polarizer 2 facing the array substrate 1. The optical adhesive layer 4 can optimize the optical performance (such as brightness, contrast, and viewing angle) and structural reliability of the display by regulating the refraction and reflection behavior of light at the interface. The polarizer 2 can control the polarization direction of light, thereby realizing the regulation of display brightness, color and contrast.

[0059] like Figure 1 and Figure 2As shown, the optical adhesive layer 4 includes a low-refractive-index layer 42 and a high-refractive-index layer 41. The low-refractive-index layer 42 is located on the side of the high-refractive-index layer 41 that is away from the polarizer 2, and the refractive index of the low-refractive-index layer 42 is lower than that of the high-refractive-index layer 41. When light enters the high-refractive-index layer 41 (e.g., RI≈1.3~1.4) from the low-refractive-index layer 42 (e.g., glass, RI≈1.5), it can reduce interface reflection (Fresnel reflection) and improve transmittance. Meanwhile, the high-refractive-index layer 41 (RI≈1.5~1.7) can reduce the interface refractive index difference, allowing more light to be transmitted to the outside.

[0060] However, the cathode driving electrode of the driving electrode line 12 is located on the outermost side of the upper surface of the array substrate 1. The area where the encapsulation layer 3 is sealed to the array substrate 1 also needs to surround the cathode driving electrode, resulting in a larger width of the bottom bezel of the display panel, which affects the improvement of the screen ratio of the display panel and reduces the user experience.

[0061] To address the aforementioned issues, in this embodiment, the encapsulation layer 3 covers at least a portion of the cathode driving electrode. This structure allows the encapsulation layer 3 to intersect with the cathode driving electrode, effectively shifting the outer edge of the encapsulation layer 3 inwards, thereby reducing the width of the non-display area at the bottom bezel of the screen.

[0062] This display panel can reduce the width of the bottom bezel of the screen, increase the screen-to-body ratio, and improve the user experience.

[0063] In some embodiments, CVD (Chemical Vapor Deposition Encapsulation) technology is used to deposit a high-density thin film on the upper surface of the array substrate 1 to form an encapsulation layer 3. This thin film can seal the structure on the surface of the array substrate 1, greatly improving the reliability of the encapsulation and extending the lifespan of the display panel. The cover plate can be directly disposed on the encapsulation layer 3, as long as the flatness of the encapsulation layer 3 is ensured.

[0064] Since the encapsulation layer 3 is a thin film, its outer contour can be partially located on the cathode driving electrode. As long as the sealing between the encapsulation layer 3 and the cathode driving electrode is guaranteed, the overall sealing of the display panel can be guaranteed, thereby allowing the outer contour of the encapsulation layer 3 to move further inward and greatly reducing the width of the bottom bezel.

[0065] During the manufacturing process of the display panel, high-temperature and high-humidity reliability testing is required to ensure stable product performance. For ease of description, along the thickness direction of the display panel, the outer contour line of the cathode driving electrode covered by the encapsulation layer 3 and with conductive traces 13 underneath is called the risk contour line 121, and the other outer contour lines are called normal contour lines 122. Here, "covered by the encapsulation layer 3" refers to the area covered by the encapsulation layer 3 and the array substrate 1 forming a seal. Even if other parts are covered by the encapsulation layer 3, it only serves to protect the surface and cannot prevent moisture from entering through the edges.

[0066] like Figure 1 As shown, during the test, when the cathode driving electrode is raised within the risk contour line 121, it is easy to puncture the encapsulation layer 3. At the same time, the cathode driving electrode will attract potassium ions in the polarizer 2, causing the potassium ions to pass through the encapsulation layer 3 and approach the edge of the cathode driving electrode and accumulate, thereby forming an alkaline environment locally. This can easily cause the conductive traces 13 of the conductive layer below to be corroded, resulting in display abnormalities.

[0067] like Figure 2 and Figure 3 As shown, to solve the above problems, the display panel includes a first planarization structure 51, which is disposed on the array substrate 1 and covers the risk contour line 121. That is, the first planarization structure 51 is located between the risk contour line 121 and the encapsulation layer 3. The first planarization structure 51 is a key functional film, mainly used to improve surface flatness, optimize subsequent process conditions, and improve display performance. The first planarization structure 51 on the array substrate 1 can separate the risk contour line 121 from the encapsulation layer 3. It can improve flatness through the first planarization structure 51, thereby improving the film formation quality of the encapsulation layer 3 at this position. It can also prevent the risk contour line 121 from directly contacting the encapsulation layer 3, preventing the risk contour line 121 of the cathode driving electrode from lifting up and piercing the encapsulation layer 3, thereby ensuring the integrity of the encapsulation layer 3 structure, preventing potassium ions from passing through the encapsulation layer 3 and accumulating near the edge of the cathode driving electrode, and ensuring that the conductive trace 13 is not corroded.

[0068] like Figure 3 As shown, in the prior art, in order to ensure the flatness of the surface of the array substrate 1, the display panel also includes a planarization layer 5, which is disposed on the array substrate 1. By covering the surface of the array substrate 1 with a planarization layer 5, and then encapsulating it with an encapsulation layer 3, the overall film-forming properties of the encapsulation layer 3 can be improved.

[0069] In this embodiment, the planarization layer 5 includes a first planarization structure 51, that is, the first planarization structure 51 is formed together with the planarization layer 5, which can improve efficiency and ensure that the first planarization structure 51 is at the same height as other positions of the planarization layer 5, thereby ensuring the consistency of the display panel.

[0070] It is worth noting that the encapsulation layer 3 is a thin film formed of inorganic materials, which has the best bonding effect with inorganic materials and can best ensure the effectiveness of encapsulation. On the array substrate 1, the outermost layer is the planarization layer 5, which does not have the ability to prevent moisture intrusion. Moreover, most of the planarization layer 5 is made of organic materials, which also leads to a weaker bond between the planarization layer 5 and the encapsulation layer 3.

[0071] like Figure 3 As shown, to ensure the encapsulation effect, the planarization layer 5 has a film-forming groove 53 that extends through the second insulating layer 15 and the cathode driving electrode. The encapsulation layer 3 covers the planarization layer 5 and is encapsulated to the second insulating layer 15 and the cathode driving electrode through the film-forming groove 53. The film-forming groove 53 does not intersect with the risk contour line 121. The portion of the planarization layer 5 that covers the risk contour line 121 forms the first planarization structure 51.

[0072] Since the planarization layer 5 is a film layer that completely covers the array substrate 1, the outer contour line of the cathode driving electrode that is covered by the encapsulation layer 3 and has conductive traces 13 underneath is called the risk contour line 121. Here, "covered by the encapsulation layer 3" means that it is partially covered by the planarization layer 5 in the film formation groove 53. In other words, the outer contour line of the cathode driving electrode that is covered by the planarization layer 5 that is in direct contact with the array substrate 1 and has conductive traces 13 underneath is called the risk contour line 121.

[0073] Since both the second insulating layer 15 and the cathode driving electrode are made of inorganic materials, when CVD encapsulation is performed and the encapsulation layer 3 is formed on the surface of the planarization layer 5, the encapsulation layer 3 can contact the second insulating layer 15 and the cathode driving electrode through the film forming groove 53. In other words, the encapsulation layer 3 can form an encapsulation structure with the array substrate 1 through the film forming groove 53.

[0074] In some embodiments, the film-forming groove 53 is a horizontal groove at the lower edge of the display panel, which prevents moisture from entering the interior of the display panel through the lower edge. In this embodiment, the film-forming groove 53 is an annular groove surrounding the display area. Therefore, the encapsulation layer 3 can form an annular sealing structure with the array substrate 1 through the annular film-forming groove 53, thereby surrounding the internal structure of the display panel.

[0075] In this embodiment, the portion of the planarization layer 5 other than the first planarization structure 51 is referred to as the second planarization structure 52. It is worth noting that the planarization layer 5 is a complete film structure when it is disposed on the surface of the array substrate 1. Then, according to the design, the planarization layer 5 at the location where the film formation groove 53 needs to be formed is removed, and the film formation groove 53 can be formed on the planarization layer 5. In the remaining planarization layer 5, the portion covering the risk contour line 121 forms the first planarization structure 51, and the remaining portion forms the second planarization structure 52.

[0076] It is worth noting that when the planarization layer 5 is grooved, the grooved position must avoid the risk contour line 121, so that the film forming groove 53 will not pass through the risk contour line 121. This ensures that the encapsulation layer 3 is encapsulated with the second insulating layer 15 and the cathode driving electrode through the film forming groove 53. The film forming groove 53 passes through the normal contour line 122. Since there is no conductive trace 13 below the normal contour line 122, even if the cathode driving electrode is raised at this point and punctures the encapsulation layer 3, causing potassium ions to accumulate and forming an alkaline environment, it will not corrode the conductive trace 13, thus ensuring the display effect of the display panel.

[0077] like Figure 2 As shown, in this embodiment, the thickness of the first planarization structure 51 gradually increases from the outside to the inside. Since the first planarization structure 51 protrudes from the surface of the array substrate 1, its thickness gradually changes, so that the encapsulation layer 3 formed during CVD encapsulation has a gently sloping structure, which improves the planarization effect, ensures the continuity of the encapsulation layer 3, and avoids breakage of the encapsulation layer 3.

[0078] It is worth noting that by covering the risk contour line 121 with the first planarization structure 51 to isolate the risk contour line 121 from the encapsulation layer 3, the accumulation of potassium ions and corrosion of the conductive traces 13 can be effectively prevented. In this embodiment, the probability of display abnormalities occurring during high-temperature and high-humidity reliability testing of the display panel can also be further reduced through design.

[0079] like Figure 4 and Figure 5 As shown, along the thickness direction of the display panel, there are no conductive traces 13 below the outer contour line of the cathode driving electrode covered by the encapsulation layer 3. That is to say, the outer contour of the cathode driving electrode is a normal contour line 122, and there are no conductive traces 13 below the entire outer contour. This structure ensures that even if the cathode driving electrode is raised and pierces the encapsulation layer 3, causing potassium ions to accumulate, the resulting alkaline environment will not corrode the conductive traces 13, thus guaranteeing the display effect.

[0080] It is worth noting that both the first planarization structure 51 and the avoidance of conductive traces 13 below the outer contour of the cathode driving electrode can prevent potassium ions from accumulating and corroding the conductive traces 13 due to the tilting of the cathode driving electrode. In some embodiments, one method can be used alone, or both methods can be used simultaneously to further improve reliability.

[0081] In this embodiment, to avoid the presence of conductive traces 13 below the outer contour of the cathode driving electrode, the position of the conductive traces 13 below the outer contour of the cathode driving electrode covered by the encapsulation layer 3 can be changed during the design stage of the display panel.

[0082] like Figure 4 As shown, during the design process, it is necessary to prioritize the design of the position of the cathode driving electrode, mark its shape and size, and design the position of the film-forming groove 53 of the planarization layer 5, determining the area where the film-forming groove 53 intersects with the contour line of the cathode driving electrode. When routing the conductive traces 13 of the multilayer conductive layer, it is necessary to ensure that the conductive traces 13 avoid the outer contour line of the cathode driving electrode that intersects with the film-forming groove 53. In other words, the cathode driving electrode only has a normal contour line 122 and no risky contour line 121.

[0083] like Figure 5 As shown, in some embodiments, the shape of the cathode driving electrode is changed during the design phase of the display panel to alter the position of its outer contour. When a conductive trace 13 exists below the outer contour of the cathode driving electrode intersecting the film-forming groove 53, meaning the position of the conductive trace 13 cannot be changed during the design phase, the position of the outer contour of the cathode driving electrode can be altered. In other words, the position of the normal contour 122 of the cathode driving electrode needs to be changed.

[0084] Specifically, changing the position of the normal outline 122 of the cathode driving electrode can be achieved by increasing or decreasing the area of ​​the cathode driving electrode, or by changing the shape of the cathode driving electrode.

[0085] This embodiment also provides a method for manufacturing a display panel, used to manufacture the above-mentioned display panel, the method comprising:

[0086] An array substrate 1 is fabricated. The top layer of the array substrate 1 is provided with a second insulating layer 15, and a cathode driving electrode is provided on the second insulating layer 15.

[0087] The array substrate 1 is encapsulated to form an encapsulation layer 3, which covers at least part of the cathode driving electrode;

[0088] The polarizer 2 is placed on the encapsulation layer 3.

[0089] In this display panel, the array substrate 1 is the electronic central hub of the display panel. The array substrate 1 includes a substrate 11, a conductive layer, and a cathode driving electrode. The conductive layer is disposed on the substrate 11 and includes multiple conductive lines 13. The conductive layer and the substrate 11 are separated by a first insulating layer 14. A second insulating layer 15 is disposed on the top layer of the array substrate 1. The array substrate 1 is the electronic central hub of the display panel, and the conductive layer is used to arrange the conductive lines 13. The conductive lines 13 activate the corresponding electrode plates, thereby driving and controlling the switching and display of each pixel. To avoid short circuits, the conductive layer and the substrate 11 are separated by the first insulating layer 14, and the conductive layer and the cathode driving electrode are separated by the second insulating layer 15.

[0090] The conductive layer is used to arrange conductive traces 13, which activate the corresponding electrodes, thereby driving and controlling the switching and display of each pixel. To avoid short circuits, the conductive layer is separated from the substrate 11 by a first insulating layer 14, and the conductive layer is separated from the cathode driving electrode by a second insulating layer 15. The polarizer 2 can control the polarization direction of light, thereby controlling the brightness, color, and contrast of the display. The encapsulation layer 3 of the display panel is disposed between the polarizer 2 and the array substrate 1, which can seal the gap between the polarizer 2 and the array substrate 1, preventing external moisture from entering the interior of the display panel and causing corrosion to the internal structure of the display panel. Moreover, the encapsulation layer 3 covers at least part of the cathode driving electrode, so that the encapsulation layer 3 and the cathode driving electrode intersect, and the outer edge of the encapsulation layer 3 moves inward, thereby reducing the width of the non-display area at the bottom bezel of the screen.

[0091] In this embodiment, the preparation method further includes:

[0092] A planarization layer 5 is formed on the upper surface of the array substrate 1, and a film forming groove 53 is formed in the planarization layer 5, which extends to the second insulating layer 15 and the cathode driving electrode, and the film forming groove 53 does not intersect with the risk contour line 121.

[0093] An encapsulation layer 3 is fabricated on the planarization layer 5, and the encapsulation layer 3 covers the film formation groove 53 to encapsulate the second insulating layer 15 and the cathode driving electrode.

[0094] Since the encapsulation layer 3 is a thin film formed of inorganic materials, its bonding effect with inorganic materials is the best, ensuring the effectiveness of the encapsulation. On the array substrate 1, the outermost layer is the planarization layer 5, which does not have the ability to prevent moisture intrusion. Moreover, most of the planarization layer 5 is made of organic materials, which also leads to a weaker bond between the planarization layer 5 and the encapsulation layer 3.

[0095] Therefore, a film-forming groove 53 is formed in the planarization layer 5, and an encapsulation layer 3 is formed on the planarization layer 5 by CVD encapsulation technology, so that the material is deposited in the film-forming groove 53 when covering the film-forming groove 53, so that the encapsulation layer 3 can be encapsulated to the second insulating layer 15 and the cathode driving electrode of the array substrate 1 through the film-forming groove 53. Since the second insulating layer 15 and the cathode driving electrode are both made of inorganic materials, the encapsulation layer 3 can form a highly reliable encapsulation structure with the array substrate 1 through the film-forming groove 53.

[0096] In this embodiment, the film-forming groove 53 is an annular groove surrounding the display area. Therefore, the encapsulation layer 3 can form an annular sealing structure with the array substrate 1 through the annular film-forming groove 53, thereby surrounding the internal structure of the display panel.

[0097] The film-forming groove 53 is formed by removing the corresponding structure at a preset position on the complete planarization layer 5.

[0098] In this embodiment, fabricating the array substrate 1 includes:

[0099] A substrate 11 is provided;

[0100] A first insulating layer 14, a conductive layer, and a second insulating layer 15 are sequentially deposited on a substrate 11. The conductive layer includes multiple conductive traces 13.

[0101] A cathode driving electrode is disposed on the second insulating layer 15, and there is no conductive trace 13 below the outer contour line of the cathode driving electrode covered by the encapsulation layer 3 along the thickness direction of the display panel.

[0102] This method ensures that the outer contour of the cathode driving electrode is a normal contour line 122, and there are no conductive traces 13 below the entire outer contour. This structure ensures that even if the cathode driving electrode is raised and pierces the encapsulation layer 3, causing potassium ions to accumulate, the resulting alkaline environment will not corrode the conductive traces 13, thus guaranteeing the display effect.

[0103] During the design process, the location of the cathode driving electrode should be prioritized, and its shape and size should be marked. The location of the film-forming groove 53 in the planarization layer 5 should also be designed, and the area where the film-forming groove 53 intersects with the contour line of the cathode driving electrode should be determined. When routing the conductive traces 13 of the multilayer conductive layer, it is necessary to ensure that the conductive traces 13 avoid the outer contour line of the cathode driving electrode that intersects with the film-forming groove 53. In other words, the cathode driving electrode only has a normal contour line 122 and no risky contour line 121.

[0104] In some embodiments, during the design phase of the display panel, the shape of the cathode driving electrode is changed to alter the position of its outer contour. When a conductive trace 13 exists below the outer contour of the cathode driving electrode intersecting the film-forming groove 53, meaning the position of the conductive trace 13 cannot be changed during the design phase, the position of the outer contour of the cathode driving electrode can be altered; that is, the position of the normal contour 122 of the cathode driving electrode needs to be changed.

[0105] Specifically, changing the position of the normal outline 122 of the cathode driving electrode can be achieved by increasing or decreasing the area of ​​the cathode driving electrode, or by changing the shape of the cathode driving electrode.

[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention. The above specific embodiments have further described the purpose, technical solutions and beneficial effects of the present invention in detail. It should be understood that the above are only specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A display panel, characterized in that, The display panel includes: An array substrate (1) includes a substrate (11), a conductive layer and driving electrode lines (12). The conductive layer is disposed on the substrate (11), the conductive layer includes multiple conductive lines (13), and the conductive layer is separated from the substrate (11) by a first insulating layer (14), and a second insulating layer (15) is disposed on the conductive layer. A polarizer (2) is disposed above the array substrate (1) and spaced apart from the array substrate (1), and a driving electrode line (12) is disposed between the second insulating layer (15) and the polarizer (2). An encapsulation layer (3) is disposed between the polarizer (2) and the array substrate (1) to encapsulate the polarizer (2) and the array substrate (1), and the encapsulation layer (3) covers at least a portion of the driving electrode lines (12).

2. The display panel according to claim 1, characterized in that, The driving electrode line (12) includes a risk contour line (121) along the thickness direction of the display panel. The risk contour line (121) is the outer contour line of a segment of the driving electrode line (12) that is covered by the encapsulation layer (3) and has the conductive trace (13) below it. The display panel includes a first planarization structure (51) which is disposed on the array substrate (1) and covers the risk contour line (121).

3. The display panel according to claim 2, characterized in that, The display panel further includes a planarization layer (5), which is disposed on the array substrate (1) and includes at least the first planarization structure (51).

4. The display panel according to claim 3, characterized in that, The planarization layer (5) has a film-forming groove (53) extending through the second insulating layer (15) and the driving electrode line (12). The encapsulation layer (3) covers the planarization layer (5) and is encapsulated to the second insulating layer (15) and the driving electrode line (12) through the film-forming groove (53). The film-forming groove (53) does not intersect with the risk contour line (121). The portion of the planarization layer (5) covering the risk contour line (121) forms the first planarization structure (51).

5. The display panel according to claim 2, characterized in that, The thickness of the first planarization structure (51) gradually increases from the outside to the inside.

6. The display panel according to any one of claims 1 to 5, characterized in that, Along the thickness direction of the display panel, there is no conductive trace (13) below the outer contour of the driving electrode line (12) covered by the encapsulation layer (3).

7. The display panel according to claim 6, characterized in that, During the design phase of the display panel, the position of the conductive trace (13) below the outer contour of the driving electrode line (12) covered by the encapsulation layer (3) is changed.

8. The display panel according to claim 6, characterized in that, During the design phase of the display panel, the shape of the driving electrode line (12) is changed to change the position of the outer contour line of the driving electrode line (12).

9. A method for manufacturing a display panel, characterized in that, The preparation method is used to prepare the display panel according to any one of claims 1 to 8, and the preparation method includes: An array substrate (1) is fabricated. A second insulating layer (15) is disposed on the top layer of the array substrate (1). A driving electrode line (12) is disposed on the second insulating layer (15). The array substrate (1) is encapsulated to form an encapsulation layer (3) that covers at least a portion of the driving electrode lines (12); The polarizer (2) is placed on the encapsulation layer (3).

10. The method for manufacturing a display panel according to claim 9, characterized in that, The area covered by the encapsulation layer (3) within the outer contour of the driving electrode line (12) is called the risk contour line (121). The preparation method also includes: A planarization layer (5) is formed on the upper surface of the array substrate (1), and a film forming groove (53) is formed in the planarization layer (5) that extends to the second insulating layer (15) and the driving electrode line (12), and the film forming groove (53) does not intersect with the risk contour line (121). An encapsulation layer (3) is fabricated on the planarization layer (5), and the encapsulation layer (3) covers the film formation groove (53) to encapsulate to the second insulating layer (15) and the drive electrode line (12).

11. The method for manufacturing a display panel according to claim 9, characterized in that, Fabrication of the array substrate (1) includes: A substrate (11) is provided; A first insulating layer (14), a conductive layer, and a second insulating layer (15) are sequentially deposited on a substrate (11). The conductive layer includes multiple conductive traces (13). A driving electrode line (12) is provided on the second insulating layer (15), and there is no conductive trace (13) below the outer contour of the driving electrode line (12) covered by the encapsulation layer (3) along the thickness direction of the display panel.

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