Chip testing apparatus

CN122995623APending Publication Date: 2026-10-27YOUWEI IMAGE TECH (SUZHOU) CO LTD
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Patent Information

Application Number
CN202611369849.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-04
Publication Date
2026-10-27

AI Technical Summary

Technical Problem

[0008]本发明的目的在于提供一种芯片检测设备,以解决2D相机和3D相机检测协同问题

Benefits of technology

[0019]与现有技术相比,本发明的芯片检测设备采用了上下多层设计,由下至上依次为2D相机、3D相机、光源和待测芯片,2D相机和3D相机均固定在支架上,可同时或分时进行拍照检测。并且2D相机和3D相机无位移机构驱动移动,在检测时处于静止状态,不会因为移动造成定位误差,因此在保证检测精度的同时减少了检测时间,提高了检测效率,以满足高速检测需求。

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Abstract

The application discloses a kind of chip detection equipment, including support, 2D camera, multiple 3D cameras and light source, the support includes the support plate of top, the support plate is used to place the chip to be measured, the 2D camera is fixed in the support bottom, its lens is towards the chip to be measured, the 3D camera is supported in the support, and it is set between the 2D camera and support plate, the lens of this multiple 3D cameras is towards the chip to be measured, the light source is fixed on the support and is set between the support plate and 3D camera, and it is towards the support plate.The chip detection equipment of the application adopts upper and lower multilayer design, 2D camera and 3D camera are fixed on support, can be simultaneously or time-sharing to carry out photographing detection, 2D camera and 3D camera are without displacement mechanism drive movement, in static state when detecting, will not cause positioning error because of moving, reduce detection time while guaranteeing detection precision, improve detection efficiency, to meet the demand of high speed detection.
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Description

Technical Field

[0001] This invention belongs to the field of semiconductor manufacturing equipment technology, and specifically relates to a chip testing device. Background Technology

[0002] With the development of semiconductor packaging technology, chip products are becoming increasingly smaller and pin density is continuously increasing, leading to a greater diversity of chip appearance defects. In addition to planar defects such as surface scratches, contamination, and edge chipping, three-dimensional defects such as pin warping, coplanarity deviations, surface protrusions or depressions, and foreign objects also directly affect chip soldering quality and overall system reliability. Therefore, high-speed, high-precision chip defect detection equipment typically requires the simultaneous use of 2D and 3D cameras. The 2D camera acquires planar images of the chip surface to detect planar appearance defects, while the 3D camera acquires three-dimensional contour information of the chip surface to detect height-related three-dimensional defects.

[0003] In conventional testing equipment, 2D and 3D cameras are typically designed as independent structures, each with its own mounting bracket, motion mechanism, and working station. The two cameras are used to photograph and inspect the chip at different stations or stages of the testing process. This separate testing method has the following problems:

[0004] 2D and 3D inspections cannot be performed simultaneously. Because the installation and working positions of the two cameras are independent, after the chip completes 2D appearance inspection, it needs to be transferred by a transport mechanism to the 3D camera's inspection station for 3D inspection, or the chip can remain stationary while the 2D and 3D cameras move and switch between inspections. The waiting time for transport and alignment between the two inspections reduces the equipment's inspection cycle time, making it difficult to meet high-speed inspection requirements.

[0005] The testing process requires frequent movement of the camera or stage. Some devices use motion mechanisms to move the camera above the chip for image capture. In addition to the travel distance, camera movement introduces vibration and positioning errors during reversals and stops, reducing both testing efficiency and accuracy.

[0006] The independent operation of the two cameras results in a complex structure and a large footprint. Each camera requires its own independent support, travel, and protective structure, increasing the overall size and manufacturing and assembly costs. Furthermore, the two cameras are mounted on different structural components, lacking a stable mechanical reference for their relative position. This necessitates separate calibration, which is cumbersome, inconsistent, and makes it difficult to directly integrate 2D image data and 3D height data for comprehensive analysis.

[0007] The information disclosed in this background section is intended only to enhance the understanding of the overall background of the invention and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0008] The purpose of this invention is to provide a chip inspection device to solve the problem of coordinated inspection between 2D and 3D cameras.

[0009] To achieve the above objectives, a specific embodiment of the present invention provides a chip testing device, including a bracket, a 2D camera, multiple 3D cameras, and a light source. The bracket includes a top support plate for placing the chip under test. The 2D camera is fixed to the bottom of the bracket with its lens facing the chip under test. The 3D cameras are supported on the bracket and disposed between the 2D camera and the support plate, with the lenses of the multiple 3D cameras facing the chip under test. The light source is fixed on the bracket and disposed between the support plate and the 3D cameras, facing the support plate.

[0010] In one or more embodiments of the present invention, the chip testing device further includes a horizontal calibration block, a vertical calibration block, and a motor connected to the vertical calibration block and driving it to move up and down. The horizontal calibration block and the vertical calibration block are used to be placed on the support plate when calibrating the 2D camera and the 3D camera.

[0011] In one or more embodiments of the present invention, the light source includes a first light source in the shape of a rectangle and a second light source in the shape of an annular bowl disposed above the first light source, and the first light source and the second light source are respectively provided with a longitudinally penetrating channel.

[0012] In one or more embodiments of the present invention, a plurality of the 3D cameras are arranged around the periphery of the first light source.

[0013] In one or more embodiments of the present invention, the light-emitting surface of the first light source is located above the top of the 3D camera.

[0014] In one or more embodiments of the present invention, the 3D camera is pivotally connected to the bracket.

[0015] In one or more embodiments of the present invention, the 2D camera is supported on a base plate, the base plate being movably connected to the bracket.

[0016] In one or more embodiments of the present invention, the base plate is provided with a first receiving groove for accommodating a 2D camera, and the length and width of the first receiving groove are greater than the length and width of the 2D camera. The base plate is provided with a mounting hole, and the 2D camera is provided with an elongated hole coaxial with the mounting hole.

[0017] In one or more embodiments of the present invention, the top of the bracket is provided with two L-shaped platforms, the light source is disposed below the two platforms, and the support plate is supported on the two platforms.

[0018] In one or more embodiments of the present invention, the support plate is provided with a second receiving groove for accommodating a chip or a horizontal calibration block or a vertical calibration block.

[0019] Compared with existing technologies, the chip inspection device of this invention adopts a multi-layer design, consisting of a 2D camera, a 3D camera, a light source, and the chip under test, arranged from bottom to top. Both the 2D and 3D cameras are fixed on a support, allowing for simultaneous or time-sharing image inspection. Furthermore, the 2D and 3D cameras are not driven by any displacement mechanism and remain stationary during inspection, preventing positioning errors caused by movement. Therefore, while ensuring inspection accuracy, this reduces inspection time and improves inspection efficiency to meet the demands of high-speed inspection. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0021] Figure 1 This is a schematic diagram of a chip testing device according to an embodiment of the present invention;

[0022] Figure 2 This is a side view of a chip testing device according to an embodiment of the present invention;

[0023] Figure 3 This is a bottom view of a chip testing device according to an embodiment of the present invention;

[0024] Figure 4 This is a schematic diagram of a horizontal calibration block in one embodiment of the present invention;

[0025] Figure 5 This is a schematic diagram of a vertical calibration block in one embodiment of the present invention.

[0026] Explanation of key figure labels:

[0027] 1-Bracket, 11-Support plate, 111-Second receiving slot, 12-Vertical plate, 13-First layer plate, 14-Second layer plate, 15-Base plate, 151-First receiving slot, 16-Table plate, 17-Intermediate plate, 2-2D camera, 3-3D camera, 4-Light source, 41-First light source, 42-Second light source, 51-Horizontal calibration block, 52-Vertical calibration block, 53-Motor. Detailed Implementation

[0028] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.

[0029] like Figure 1-3 As shown, a chip inspection device according to one embodiment of the present invention includes a bracket 1, a 2D camera 2, multiple 3D cameras 3, and a light source 4. A support plate 11 is disposed on the top of the bracket 1, and the chip to be tested is placed on the support plate 11. The 2D camera 2 is fixed to the bottom of the bracket 1 and is used for planar defect inspection of the chip, with its lens facing the chip under test. Multiple 3D cameras 3 are fixed to the bracket 1 and located between the 2D camera 2 and the support plate 11, and are used for photographic inspection of three-dimensional defects of the chip, with the lenses of the multiple 3D cameras facing the chip under test. The light source 4 is fixed to the bracket 1 and disposed between the support plate 11 and the 3D cameras, facing the chip under test, and is used to provide a good lighting environment for the inspection process.

[0030] To facilitate simultaneous chip inspection by both 2D camera 2 and 3D camera 3, they are positioned on the same side (below) of support plate 11. Due to the relatively large size of 2D camera 2, to reduce the overall size of the device, it is placed at the bottom of bracket 1, while 3D camera 3 is positioned above 2D camera 2. To ensure that the light emitted from light source 4 avoids the lenses of 2D camera 2 and 3D camera 3 and directly illuminates the chip under test, light source 4 is positioned above 2D camera 2, with 3D camera 3 surrounding light source 4, and the light-emitting surface of light source 4 located above the top of 3D camera 3. This configuration significantly reduces the overall size of the device while ensuring the normal operation of the inspection process.

[0031] The chip inspection device in this embodiment adopts a multi-layer design, consisting of a 2D camera 2, a 3D camera 3, a light source 4, and the chip under test, arranged from bottom to top. Both the 2D camera 2 and the 3D camera 3 are fixed on the bracket 1, allowing for simultaneous or time-sharing image inspection. Furthermore, the 2D camera 2 and the 3D camera 3 are not driven by any displacement mechanism and remain stationary during inspection, preventing positioning errors caused by movement. Therefore, while ensuring inspection accuracy, this reduces inspection time and improves inspection efficiency to meet the demands of high-speed inspection.

[0032] After prolonged use, the bodies and lenses of 2D camera 2 and 3D camera 3 may undergo micron-level deformation due to ambient temperature and heat generated during long-term operation. This gradually alters the optical path geometry. Furthermore, prolonged high-speed operation and vibration may cause slight displacements in the mounting positions of 2D camera 2, 3D camera 3, and light source 4. While these changes are small, the equipment requires micron-level judgment; if the drift exceeds the tolerance, misjudgments or missed judgments will occur. Therefore, the cameras need to be recalibrated after a period of use.

[0033] like Figure 4 and Figure 5 As shown, camera calibration includes two parts: horizontal calibration and vertical calibration. These are performed by the horizontal calibration block 51 and the numerical calibration block 52 driven by the motor 53, respectively. During calibration, the horizontal calibration block 51, the vertical calibration block 52, and the motor 53 are placed on the support plate 11.

[0034] The horizontal calibration block 51 can be set with features such as a central cross mark or symmetrically distributed circular holes / positioning features. The central cross mark is the calibration origin, which can be captured by both 2D camera 2 and 3D camera 3. It is a common feature point for establishing a common coordinate reference and can also be used to center the optical axis.

[0035] The vertical calibration block 52 is mainly used for the vertical calibration of the 3D camera 3. The motor 53 drives the vertical calibration block 52 to precisely rise and fall to a series of known height positions, and the height value of each position is precisely known. The 3D camera 3 scans the top surface of the vertical calibration block 52 position by position, and a set of height values ​​is obtained for each position.

[0036] During horizontal calibration, the horizontal calibration block 51 is placed on the support plate 11. The 2D camera 2 and the 3D camera 3 observe the feature marks on the horizontal calibration block 51 to complete the calibration of camera pixel equivalents, lens distortion, and camera coordinate system. During vertical calibration, the motor 53 drives the vertical calibration block 52 to move along the vertical direction to several known height positions. The 3D camera 3 measures each height position to complete the calibration of the zero point, scale factor, and linear accuracy in the height direction. Based on this, using the observation results of the two cameras on the same calibration feature, the coordinate system calibration between the 2D camera 2 and the 3D camera 3 is completed, enabling the plane data and height data output by both cameras to be unified under the same coordinate system for fusion and judgment.

[0037] like Figure 2 As shown, the support 1 includes a vertical plate 12, and a first layer plate 13, a second layer plate 14, and a base plate 15 fixed to the vertical plate 12. The first layer plate 13 is disposed above the second layer plate 14, and a support plate 11 is supported on the first layer plate 13. The base plate 15 is disposed below the second layer plate 14 and is used to support the 2D camera 2. The second layer plate 14 is disposed in the middle and is used to support the 3D camera 3 and the light source 4.

[0038] Preferably, two L-shaped platforms 16 are provided on the first layer 13, fixed to the first layer 13 in pairs, with a support plate 11 supporting the platforms 16. These two platforms 16 expand the vertical space, specifically the space above the second layer 14. This arrangement, by adding platforms 16, expands the installation space of the light source 4 without excessively increasing the distance between the first and second layers 13 and 14, preventing the overall equipment structure from becoming overly cramped and facilitating disassembly and maintenance.

[0039] exist Figure 2 In the middle, three 3D cameras 3 are fixed on the second layer plate 14. The second layer plate 14 is a rectangular plate, one side of which is fixed to the vertical plate 12, and the three 3D cameras 3 are fixed on the remaining side, and are set at equal intervals to obtain information about the chip or the horizontal calibration block 51 and the vertical calibration block 52 from different angles more comprehensively.

[0040] Preferably, the 3D camera 3 is pivotally connected to the second layer plate 14, so its shooting angle is adjustable, which is more conducive to calibration.

[0041] In one embodiment, two light sources 4 are provided, including a first light source 41 and a second light source 42 disposed above the first light source 41. Figure 2 As shown, the first light source 41 has a rectangular structure, while the second light source 42 has a ring-shaped bowl structure. The chip surface (especially the metal leads and solder surfaces) reflects light very strongly. Shining light from a single direction will produce glaring highlights and heavy shadows, obscuring defects. The bowl-shaped second light source 42 is used to eliminate this problem. It can diffuse the light from all directions, uniformly illuminating the chip surface without shadows or highlights. It is suitable for detecting surface defects of the chip, such as scratches, dirt, oxidation discoloration, edge chipping, and solder ball morphology.

[0042] In this embodiment, the first rectangular light source 41 is configured to provide low-angle or directional illumination, complementing the second light source 42 for directional light emission. The low-angle grazing light emitted by the first light source 41 is extremely sensitive to height differences and edges. Three-dimensional defects such as raised pins, missing pins, foreign object protrusions, and cracks will create obvious light-dark contrasts under low-angle light, which are almost invisible under the uniform light emitted by the second light source 42.

[0043] The first light source 41 and the second light source 42 are usually not lit simultaneously, but are switched at different times. By switching the illumination of the light sources, the 2D camera 2 and the 3D camera 3 capture images of different types of defects, and the system can fuse multiple images for judgment. In this way, a single inspection can cover both appearance defects and three-dimensional defects, without the need for multiple workstations.

[0044] Since the 2D camera 2 is located below the first light source 41, in order to ensure that the 2D camera can successfully acquire chip information, both the first light source 41 and the second light source 42 emit light from the side, and a vertically penetrating channel is provided in the middle. The 2D camera 2 can capture chip information through this channel.

[0045] like Figure 2 As shown, the 3D camera 3 surrounds the first light source 41. In order to avoid some of the emitted light directly entering the 3D camera 3 and causing interference, the first light source 41 is set so that the light-emitting surface is higher than the top of the 3D camera 3, that is, the light-emitting surface is higher than the plane where the lens of the 3D camera 3 is located.

[0046] The 2D camera 2 is supported on the base plate 15. In one embodiment, the base plate 15 is movably connected to the side plate 12, so that the position of the 2D camera 2 can be finely adjusted up and down to improve the flexibility of detection and calibration.

[0047] For example in Figure 1 , 3 In the middle plate 17, a middle plate 17 is fixed on the vertical plate 12. The base plate 15 is L-shaped, and the 2D camera 2 is fixed on the horizontal plate of the base plate 15. Fixing holes (not shown) are provided on the middle plate 17, and elongated holes coaxial with the fixing holes are provided on the vertical plate of the base plate 15. Screws and nuts are installed in the corresponding fixing holes and elongated holes to fix the base plate 15 on the middle plate 17, and it can move up and down.

[0048] Preferably, an arrow is provided on the middle plate 17 and a scale is provided on the base plate 15, and the distance of the 2D camera 2 can be controlled by the arrow and the scale.

[0049] The base plate 15 is provided with a first receiving groove 151 and a mounting hole (not shown) for accommodating the 2D camera 2. The 2D camera 2 is provided with an elongated hole coaxial with the mounting hole. The 2D camera 2 is fixed to the base plate 15 by setting a combination of bolts and nuts in the corresponding mounting hole and elongated hole. The length and width of the first receiving groove 151 are larger than the length and width of the portion of the 2D camera 2 located in the first receiving groove 151. Therefore, the position of the 2D camera 2 on the base plate 15 can be finely adjusted, which provides high flexibility and facilitates testing and calibration.

[0050] like Figure 4 , 5 As shown, a second receiving groove 111 is provided on the support plate 11. The second receiving groove 111 is used to place the chip to be tested, or to place the horizontal calibration block 51 and the vertical calibration block 52 when it is necessary to calibrate the 2D camera 2 and the 3D camera 3.

[0051] The specific methods and data processing procedures involved in the above calibration process, such as camera intrinsic parameter calibration, distortion calibration, hand-eye calibration, and altitude calibration, can all be implemented using general calibration methods known in the field, and will not be elaborated here.

[0052] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.

[0053] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A chip testing device, characterized in that, include: A support bracket, which includes a top support plate for placing the chip under test; A 2D camera is fixed to the bottom of the bracket, with its lens facing the chip under test; Multiple 3D cameras are supported on the bracket and positioned between the 2D camera and the support plate, with the lenses of the multiple 3D cameras facing the chip under test; The light source is fixed on the bracket and positioned between the support plate and the 3D camera, facing the support plate.

2. The chip testing equipment according to claim 1, characterized in that, It also includes a horizontal calibration block, a vertical calibration block, and a motor that connects to the vertical calibration block and drives it to move up and down. The horizontal and vertical calibration blocks are placed on the support plate when calibrating the 2D and 3D cameras.

3. The chip testing equipment according to claim 1, characterized in that, The light source includes a first light source in the shape of a rectangle and a second light source in the shape of an annular bowl disposed above the first light source, and the first light source and the second light source are respectively provided with a longitudinally penetrating channel.

4. The chip testing equipment according to claim 3, characterized in that, Multiple 3D cameras surround the first light source.

5. The chip testing equipment according to claim 3, characterized in that, The light-emitting surface of the first light source is located above the top of the 3D camera.

6. The chip testing equipment according to claim 1, characterized in that, The 3D camera is pivotally connected to the bracket.

7. The chip testing equipment according to claim 1, characterized in that, The 2D camera is supported on a base plate, which is movably connected to the bracket.

8. The chip testing equipment according to claim 7, characterized in that, The base plate is provided with a first receiving groove for accommodating a 2D camera, and the length and width of the first receiving groove are greater than the length and width of the 2D camera. The base plate is provided with a mounting hole, and the 2D camera is provided with an elongated hole coaxial with the mounting hole.

9. The chip testing equipment according to claim 1, characterized in that, The top of the bracket is provided with two L-shaped platforms, the light source is located below the two platforms, and the support plate is supported on the two platforms.

10. The chip testing equipment according to claim 2, characterized in that, The support plate is provided with a second receiving slot for accommodating chips or horizontal calibration blocks and vertical calibration blocks.