A SiC power module packaging structure based on diamond-copper composite interconnection column

Abstract

The present application relates to the technical fields of semiconductor packaging, and particularly relates to a SiC power module packaging structure based on a diamond copper composite interconnection column, a double-sided heat dissipation path is formed through a first copper-clad ceramic substrate and a second copper-clad ceramic substrate; a metallization layer is arranged on the upper surface and the lower surface of the interconnection column, the interconnection column simultaneously serves as a current conduction channel and a heat conduction channel, the copper layer of the first copper-clad ceramic substrate and the second copper-clad ceramic substrate is electrically connected with the corresponding metallization layer of the interconnection column through a second welding layer; a power chip is electrically connected with the copper layer of the first copper-clad ceramic substrate through a first welding layer, and the power chip is electrically connected with the metallization layer of the interconnection column through a second welding layer; the first welding layer and the second welding layer are high-temperature interconnection layers formed through a transient liquid phase soldering process.The present application improves the overall heat conduction capacity and the upper limit of heat dissipation, and can reduce the parasitic inductance, and improves the long-term reliability.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and in particular to a SiC power module packaging structure based on diamond-copper composite interconnect pillars. Background Technology

[0002] SiC power modules are high-efficiency power conversion core components manufactured based on silicon carbide (SiC), a novel semiconductor material. In SiC power module packaging structures, copper pillars are typically used as interconnect elements between the upper surface of the power chip and the upper copper-clad ceramic substrate. The thermal conductivity of copper is approximately 380 W / (m·K), limiting the upper limit of the interconnect pillars' thermal conductivity. Furthermore, the coefficient of thermal expansion of copper is approximately 17 ppm / K, which differs significantly from the approximately 3.7 ppm / K of the power chip. This difference leads to substantial thermomechanical stress at the interconnect interface during thermal cycling, affecting package reliability.

[0003] Furthermore, SiC power module packaging structures typically feature double-sided heat dissipation, which usually requires more than two reflow soldering processes to complete all solder connections. If conventional reflow soldering processes are used, the thermal process of the second reflow soldering may cause remelting or performance degradation of the first solder layer, posing a risk of decreased interconnect reliability. These issues are difficult to resolve simultaneously using a single process in high-power-density SiC power module packaging. Summary of the Invention

[0004] This invention aims to solve the following technical problems existing in the current SiC power module packaging structure: the thermal conductivity of copper pillars is limited; the thermal expansion coefficient of copper differs greatly from that of the power chip, resulting in large thermomechanical stress at the interconnect interface during thermal cycling, which reduces the reliability of the package; the double-sided heat dissipation structure requires more than two reflow soldering processes, and the thermal process of the second soldering may cause the first solder layer to remelt or degrade in performance, resulting in a decrease in the reliability of the interconnect layer or even failure.

[0005] To achieve the above objectives, the present invention provides a SiC power module packaging structure based on diamond-copper composite interconnect pillars, including a first copper-clad ceramic substrate, a second copper-clad ceramic substrate, a power chip, and interconnect pillars made of carbon-based metal composite material. The first copper-clad ceramic substrate and the second copper-clad ceramic substrate form a double-sided heat dissipation path; The upper and lower surfaces of the interconnect pillars are both provided with metallization layers. The interconnect pillars serve as both current conduction channels and heat conduction channels. The copper layer of the second copper-clad ceramic substrate is electrically connected to the metallization layer corresponding to the interconnect pillars through a third solder layer. The power chip is electrically connected to the copper layer of the first copper-clad ceramic substrate through a first solder layer, and the power chip is electrically connected to the metallization layer of the interconnect pillar through a second solder layer. Both the first welding layer and the third welding layer are high-temperature interconnect layers formed by transient liquid phase welding process, and the melting point of the high-temperature interconnect layer is higher than 300°C.

[0006] Furthermore, the carbon-based metal composite material is a diamond-copper composite material, wherein the volume content of diamond in the diamond-copper composite material is 40% to 60%.

[0007] Furthermore, the thermal conductivity of the diamond-copper composite material is not less than 450 W / (m·K), and the coefficient of thermal expansion is 6~10 ppm / K.

[0008] Furthermore, the metallization layer comprises, from the inside out, a nickel layer, a palladium layer, and a gold layer.

[0009] Further, the thickness of the nickel layer is set to 1~2μm, the thickness of the palladium layer is set to 0.03~0.3μm, the thickness of the gold layer is set to 0.01~0.1μm, and the total thickness of the metallization layer is set to 1~3μm.

[0010] Furthermore, the side surface of the interconnect pillar is formed with a roughened structure, which is a micro-protrusion or micro-pore, and the roughness of the roughened structure is 0.5~3μm.

[0011] Furthermore, the roughening structure is formed before the metallization layer, and the encapsulation is embedded in the micro-protrusions or micro-pores, forming a mechanical anchoring structure between the interconnect pillars and the encapsulation.

[0012] Furthermore, both the first and third welding layers are formed using SAC305 solder through a transient liquid phase welding process, and contain Sn-Cu phase and Sn-Ag phase diffusion interface layers.

[0013] Furthermore, the ceramic layers of both the first copper-clad ceramic substrate and the second copper-clad ceramic substrate are Si3N4 ceramic layers.

[0014] Furthermore, the power chip includes a SiC chip and an FRD chip. The drain and source of the SiC chip are electrically connected to the copper layers of the first copper-clad ceramic substrate and the second copper-clad ceramic substrate, respectively, through the interconnect pillars. The gate of the SiC chip is electrically connected to the pins through bonding wires. The cathode and anode of the FRD chip are electrically connected to the copper layers of the first copper-clad ceramic substrate and the second copper-clad ceramic substrate, respectively, through the interconnect pillars.

[0015] The above-described solution of the present invention has the following beneficial effects: This invention employs carbon-based metal composite interconnect pillars, such as diamond-copper composite interconnect pillars, which significantly improves thermal conductivity, effectively reduces the junction temperature of the power chip during operation, and broadens the overall heat dissipation limit of the packaging structure. At the same time, the interconnect pillars also have current conduction function, replacing the traditional bonding wire structure and reducing the parasitic inductance of the package. In this invention, the thermal expansion coefficient of the diamond-copper composite material is about 8ppm / K, which is closer to the 3.7ppm / K of the power chip than the 17ppm / K of copper. The thermal expansion coefficient mismatch is greatly reduced, which significantly reduces the thermomechanical stress generated at the interconnect interface during thermal cycling, thereby improving the reliability and service life of the packaging structure under long-term thermal cycling conditions. This invention uses SAC305 solder to form a diffusion interface layer containing Sn-Cu and Sn-Ag phases through a transient liquid phase soldering process. The solder layer has a melting point higher than 300°C, which solves the technical problem of remelting or performance degradation of the first solder layer in the packaging structure during multiple reflow soldering processes. It also achieves stable and reliable connection of interconnect layers under multiple high-temperature soldering processes. This invention roughens the side surface of the interconnect pillars to form tiny protrusions or micropores with a preset roughness, and embeds the molding compound therein to form a mechanical anchoring structure. This transforms the shear stress at the interface between the interconnect pillars and the molding compound into local compressive stress, which significantly improves the anti-delamination ability of the interface between the interconnect pillars and the molding compound under thermal cycling conditions, reduces the interface delamination effect after molding, and further improves the long-term reliability of the overall package. Other beneficial effects of the present invention will be described in detail in the following detailed description section. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the overall structure of the present invention; Figure 2 This is another schematic diagram of the overall structure of the present invention; Figure 3 for Figure 2 Detailed diagram A.

[0017] [Explanation of Labels in the Attached Image] 1-First copper-clad ceramic substrate; 2-Second copper-clad ceramic substrate; 3-Interconnect pillar; 4-First bonding layer; 5-Second bonding layer; 6-Third bonding layer; 7-SiC chip; 8-FRD chip; 9-Bonding wire. Detailed Implementation

[0018] To make the technical problems, solutions, and advantages of this invention clearer, a detailed description will be provided below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention. Furthermore, the technical features involved in the different embodiments of this invention described below can be combined with each other as long as they do not conflict with each other.

[0019] In the description of this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0020] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a locking connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0021] like Figure 1 , Figure 2As shown, an embodiment of the present invention provides a SiC power module packaging structure based on diamond-copper composite interconnect pillars 3, which has an overall three-layer "sandwich" stacked structure. The lower layer, the first copper-clad ceramic substrate 1, forms the bottom heat dissipation surface of the packaging structure, and the upper layer, the second copper-clad ceramic substrate 2, forms the top heat dissipation surface of the packaging structure. The two layers are arranged facing each other, forming a double-sided heat dissipation structure. The power chip is located in the middle layer, and its lower surface is electrically connected to the upper copper layer of the first copper-clad ceramic substrate 1 via a first bonding layer 4. The first bonding layer 4 is formed using a transient liquid phase welding process, with a melting point higher than 300°C. The interconnect pillars 3, made of diamond-copper composite material, are disposed on the upper surface of the power chip. The lower surface metallization layer of the interconnect pillar 3 is electrically connected to the upper surface of the power chip via a second bonding layer 5, and the upper surface metallization layer of the interconnect pillar 3 is electrically connected to the lower surface copper layer of the second copper-clad ceramic substrate 2 via a third bonding layer 6. The third bonding layer 6 is also formed using a transient liquid phase welding process, with a melting point higher than 300°C. Therefore, the interconnect pillar 3 of the diamond-copper composite material simultaneously serves as both a current conduction channel and a heat conduction channel in this stacked structure. The current conduction path is formed by the copper layer of the first copper-clad ceramic substrate 1 through the first welding layer 4, the power chip, the second welding layer 5, the interconnect pillar 3, the third welding layer 6, and the copper layer of the second copper-clad ceramic substrate 2 to form a closed electrical connection. The heat is conducted bidirectionally to the upper and lower heat dissipation surfaces along the same path.

[0022] Because the diamond-copper composite interconnect pillars 3 replace traditional copper pillars, their thermal conductivity is higher than that of copper, and their coefficient of thermal expansion is lower than that of copper and closer to that of the power chip. Therefore, when the SiC power module is operating, the mismatch in the coefficient of thermal expansion between the interconnect pillars 3 and the power chip is reduced. Consequently, the thermomechanical stress generated at the interconnect interface during thermal cycling is reduced, and the long-term reliability of the packaging structure is improved. Each solder layer is formed using a transient liquid phase soldering process. The solder layer melting point is higher than 300°C. In subsequent reflow soldering processes, the formed solder layers will not remelt, thus ensuring the reliable superposition of multiple soldering processes.

[0023] It is understood that this solution is not limited to diamond-copper composite materials; other carbon-based metal composite materials with high thermal conductivity and low coefficient of thermal expansion can also be used, as long as their thermal conductivity and coefficient of thermal expansion meet the aforementioned matching requirements with the power chip. Similarly, this solution is not limited to SiC power modules; other similar module packaging structures can also adopt this solution.

[0024] In some embodiments, the volume content of diamond in the diamond-copper composite material in this embodiment is 40% to 60%. Diamond has extremely high thermal conductivity (approximately 2000 W / (m·K)) and extremely low coefficient of thermal expansion (approximately 0.86 ppm / K). When the interconnect pillar 3 is formed using a diamond-copper composite material with a diamond content of 50%, the thermal conductivity of the interconnect pillar 3 is approximately 500 W / (m·K), and the coefficient of thermal expansion is approximately 8 ppm / K. In comparison, the thermal conductivity of a copper pillar is approximately 380 W / (m·K), the coefficient of thermal expansion is approximately 17 ppm / K, and the coefficient of thermal expansion of a power chip is approximately 3.7 ppm / K. The coefficient of thermal expansion of the diamond-copper composite interconnect pillar 3 is closer to that of the power chip than that of a copper pillar, significantly reducing the degree of thermal expansion mismatch and significantly reducing the thermomechanical stress generated at the interconnect interface during thermal cycling; at the same time, its thermal conductivity is higher than that of a copper pillar, effectively reducing the junction temperature of the power chip under operating conditions and broadening the heat dissipation upper limit of the double-sided heat dissipation structure.

[0025] From a parameter range perspective, the thermal conductivity of diamond-copper composite materials needs to be no less than 450 W / (m·K), and the coefficient of thermal expansion needs to be 6~10 ppm / K. Within this parameter range, the thermal conductivity of interconnect pillar 3 is better than that of copper pillars, and the matching of the coefficient of thermal expansion with the power chip is further improved. The thermomechanical stress at the interconnect interface is further reduced, which helps to improve the reliability and service life of the packaging structure under long-term thermal cycling conditions.

[0026] At the same time, such as Figure 3 As shown, metallization layers are formed on both the upper and lower surfaces of interconnect pillar 3. The metallization layers, from the surface of interconnect pillar 3 outwards, consist of a nickel layer, a palladium layer, and a gold layer. The nickel layer directly covers the diamond-copper composite material as a diffusion barrier layer, preventing the base metal of interconnect pillar 3 from diffusing outwards. The palladium layer covers the outside of the nickel layer, providing an intermediate transition; the gold layer covers the outside of the palladium layer, providing good solderability and oxidation resistance. The three metallization layers work synergistically to ensure a reliable metallurgical bonding interface between interconnect pillar 3 and the transient liquid phase solder layer, guaranteeing the continuity of the electrical connection path and the thermal conduction path. The metallization process is achieved using electroplating or sputtering, both of which can form a uniformly covered metallization layer on the surface of the diamond-copper composite material.

[0027] In some embodiments, the thickness of the nickel layer is set to 1~2 μm, the thickness of the palladium layer is set to 0.03~0.3 μm, the thickness of the gold layer is set to 0.01~0.1 μm, and the total thickness of the metallization layer is 1~3 μm. Within this thickness range, the functions of each layer can be effectively performed, while the total thickness of the metallization layer is controlled within a reasonable range to avoid an increase in interfacial thermal resistance due to excessive metallization layer thickness.

[0028] It is understandable that the metallization layer is not limited to a three-layer structure of nickel, palladium and gold. Other metallization schemes suitable for transient liquid phase welding processes can also be used, as long as a metallurgical bonding interface that can diffuse with the solder can be formed on the upper and lower surfaces of the interconnect pillar 3 to ensure the continuity of electrical connection and heat conduction path.

[0029] In a preferred embodiment, the side surface of the interconnect post 3 is further roughened with a roughened structure, which may be a micro-protrusion or a micropore, and the roughness may be 0.5~3μm. The roughened structure enables the interconnect post 3 and the molding compound to form a mechanical anchoring effect in addition to van der Waals force bonding: during the encapsulation process, the molding compound embeds itself into the micro-protrusion or micropore on the side surface of the interconnect post 3, converting the shear stress at the interface between the interconnect post 3 and the molding compound into local compressive stress. This significantly improves the anti-delamination ability of the interface between the interconnect post 3 and the molding compound under thermal cycling conditions and reduces the interface delamination effect after molding.

[0030] It should be noted that the roughening structure can be formed before the metallization layer. That is, the side surface of the interconnect pillar 3 is roughened first, and then the upper and lower surfaces of the interconnect pillar 3 are metallized. The roughening treatment is completed before the metallization treatment, which can ensure that the morphology of the micro protrusions or micropores is not affected by the subsequent metallization process.

[0031] In some embodiments, the first solder layer 4 and the third solder layer 6 are formed using SAC305 solder via a transient liquid phase soldering process, while the second solder layer 5 is formed using a reflow soldering process. During the soldering process, the Sn in the SAC305 solder diffuses with the Cu and Ag in the metallization layer of the interconnect pillar 3, forming a Sn-Cu and Sn-Ag phase intermetallic compound diffusion interface layer at the solder interface. This diffusion interface layer has a melting point higher than 300°C, significantly higher than the melting point of the SAC305 solder itself (approximately 220°C). Therefore, the first solder layer 4 and the third solder layer 6 will not remelt during subsequent high-temperature reflow soldering processes, achieving a high-temperature reliable connection resistant to secondary reflow soldering. This fundamentally solves the technical problem of remelting or performance degradation of the first solder layer in double-sided heat dissipation packaging structures during multiple reflow soldering processes.

[0032] It is understandable that the solder used in transient liquid phase soldering is not limited to SAC305 solder. Other low-temperature solder systems that can form an intermetallic compound interface layer with a melting point higher than 300°C through diffusion reaction can also be used, as long as the interconnect layer formed after soldering can withstand multiple subsequent high-temperature reflow soldering processes.

[0033] In some embodiments, the ceramic layers of both the first copper-clad ceramic substrate 1 and the second copper-clad ceramic substrate 2 are made of Si3N4 ceramic material. Si3N4 ceramic material has high thermal conductivity, high mechanical strength, and a thermal expansion coefficient that is well matched with the power chip. Using Si3N4 ceramic material for the copper-clad ceramic substrate can further reduce the overall thermal resistance of the packaging structure and improve the structural reliability of the copper-clad ceramic substrate during thermal cycling.

[0034] It is understood that the ceramic layers of the first copper-clad ceramic substrate 1 and the second copper-clad ceramic substrate 2 are not limited to Si3N4 ceramic material. Other ceramic materials with high thermal conductivity and thermal expansion coefficient that are well matched with the power chip can also be used. The specific selection can be determined according to the matching requirements of thermal resistance and thermal expansion coefficient.

[0035] In some embodiments, the power chip includes a SiC chip 7 and an FRD chip 8. The drain of the SiC chip 7 is electrically connected to the copper layer of the first copper-clad ceramic substrate 1 via a first bonding layer 4, and the source of the SiC chip 7 is electrically connected to the copper layer of the second copper-clad ceramic substrate 2 via a second bonding layer 5 and interconnect pillars 3. The cathode of the FRD chip 8 is electrically connected to the copper layer of the first copper-clad ceramic substrate 1 via the first bonding layer 4, and the anode of the FRD chip 8 is electrically connected to the copper layer of the second copper-clad ceramic substrate 2 via the second bonding layer 5 and interconnect pillars 3. The gate of the SiC chip 7 is electrically connected to the pin via a bonding wire 9. Since the gate signal has a small current, using a bonding wire 9 can meet the signal transmission requirements while also ensuring structural simplicity and process feasibility. The interconnect pillars 3 replace the traditional bonding wire 9 connections between the drain and source of the SiC chip 7 and the cathode and anode of the FRD chip 8, achieving electrical interconnection while also ensuring heat dissipation and reducing package parasitic inductance.

[0036] The following further explains the fabrication method of the SiC power module packaging structure, specifically including the following steps: First, a first copper-clad ceramic substrate 1 is provided, and a power chip is connected to the upper surface copper layer of the first copper-clad ceramic substrate 1 through a first bonding layer 4. The first bonding layer 4 is formed using SAC305 solder through a transient liquid phase soldering process. During the soldering process, Sn in the SAC305 solder undergoes a diffusion reaction with the metal in the copper layer of the first copper-clad ceramic substrate 1 to form a diffusion interface layer containing Sn-Cu phase and Sn-Ag phase. The melting point of the first bonding layer 4 is higher than 300°C.

[0037] Secondly, the side surface of the diamond-copper interconnect pillar 3 is roughened to form micro-protrusions or micropores with a roughness of 0.5~3μm. The roughening treatment employs either chemical etching or sandblasting. Chemical etching selectively etches the side surface of the interconnect pillar 3 with a chemical solution, forming a uniformly distributed microporous structure. Sandblasting uses high-speed abrasive particles to impact the side surface, forming micro-protrusions. Both processes can effectively achieve surface microstructures within the roughness range of 0.5~3μm, and the appropriate process can be flexibly selected based on actual process conditions.

[0038] Subsequently, the upper and lower surfaces of the roughened interconnect pillar 3 are metallized, with nickel, palladium, and gold layers formed sequentially on the upper and lower surfaces. The metallization is performed using electroplating or sputtering processes, with the nickel layer having a thickness of 1~2 μm, the palladium layer having a thickness of 0.03~0.3 μm, and the gold layer having a thickness of 0.01~0.1 μm.

[0039] Then, bonding wire 9 is soldered, followed by the provision of a second copper-clad ceramic substrate 2. A transient liquid phase soldering process is used to connect the lower surface of the second copper-clad ceramic substrate 2 to the metallization layer on the upper surface of the interconnect pillar 3, forming a third solder layer 6. The melting point of the third solder layer 6 is higher than 300°C. At this point, the second copper-clad ceramic substrate 2 and the first copper-clad ceramic substrate 1 form a complete double-sided heat dissipation path through the interconnect pillar 3 and each solder layer.

[0040] Finally, the metallization layer on the lower surface of the interconnect pillar 3 is connected to the upper surface of the power chip through a high-temperature reflow soldering process to form the second solder layer 5.

[0041] In the above preparation method, the first two welding steps adopt transient liquid phase welding process. The high melting point interconnect layer formed after each welding does not remelt during the thermal process of subsequent welding processes, realizing the reliable superposition of multiple welding processes. The process sequence of roughening treatment being completed before metallization treatment ensures the integrity of the microstructure morphology of the sidewall, enabling the interconnect post 3 to form an effective mechanical anchoring structure between the plastic encapsulated body and the plastic encapsulated body.

[0042] In summary, the SiC power module packaging structure provided in this embodiment uses diamond-copper composite interconnect pillars 3 instead of traditional copper pillars. These diamond-copper composite interconnect pillars have superior thermal conductivity and coefficient of thermal expansion compared to copper pillars. This significantly improves overall thermal conductivity and heat dissipation capacity, reduces the junction temperature of the power chip, effectively alleviates thermal mismatch in the packaging structure, reduces thermomechanical stress under thermal cycling, and enhances long-term reliability. The interconnect pillars 3 also function as current conductors, replacing bonding wires 9 to reduce parasitic inductance. The use of corresponding solder via transient liquid phase welding to form a high-melting-point diffusion interface layer solves the problem of solder layer remelting during multiple reflow soldering processes, ensuring process stability. Furthermore, the roughening treatment of the sidewalls of the interconnect pillars 3 allows the molding compound to be embedded and mechanically anchored, converting interface shear stress into compressive stress, effectively suppressing delamination, and further enhancing the overall reliability of the packaging structure.

[0043] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0044] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A SiC power module packaging structure based on diamond-copper composite interconnect pillars, characterized in that, It includes a first copper-clad ceramic substrate, a second copper-clad ceramic substrate, a power chip, and interconnect pillars made of carbon-based metal composite material; The first copper-clad ceramic substrate and the second copper-clad ceramic substrate form a double-sided heat dissipation path; The upper and lower surfaces of the interconnect pillars are both provided with metallization layers. The interconnect pillars serve as both current conduction channels and heat conduction channels. The copper layer of the second copper-clad ceramic substrate is electrically connected to the metallization layer corresponding to the interconnect pillars through a third solder layer. The power chip is electrically connected to the copper layer of the first copper-clad ceramic substrate through a first solder layer, and the power chip is electrically connected to the metallization layer of the interconnect pillar through a second solder layer. Both the first welding layer and the third welding layer are high-temperature interconnect layers formed by transient liquid phase welding process, and the melting point of the high-temperature interconnect layer is higher than 300°C.

2. The SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 1, characterized in that, The carbon-based metal composite material is a diamond-copper composite material, wherein the volume content of diamond in the diamond-copper composite material is 40% to 60%.

3. The SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 2, characterized in that, The thermal conductivity of the diamond-copper composite material is not less than 450 W / (m·K), and the coefficient of thermal expansion is 6~10 ppm / K.

4. The SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 1, characterized in that, The metallization layer consists of a nickel layer, a palladium layer, and a gold layer from the inside out.

5. The SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 4, characterized in that, The thickness of the nickel layer is set to 1~2μm, the thickness of the palladium layer is set to 0.03~0.3μm, the thickness of the gold layer is set to 0.01~0.1μm, and the total thickness of the metallization layer is set to 1~3μm.

6. The SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 1, characterized in that, The side surface of the interconnect pillar is formed with a roughened structure, which is a micro-protrusion or micro-pore, and the roughness of the roughened structure is 0.5~3μm.

7. A SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 6, characterized in that, The roughening structure is formed before the metallization layer, and the encapsulation is embedded in the micro-protrusions or micro-pores, forming a mechanical anchoring structure between the interconnect pillars and the encapsulation.

8. The SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 1, characterized in that, Both the first and third welding layers are formed using SAC305 solder through a transient liquid phase welding process, and contain Sn-Cu phase and Sn-Ag phase diffusion interface layers.

9. A SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 1, characterized in that, The ceramic layers of both the first copper-clad ceramic substrate and the second copper-clad ceramic substrate are Si3N4 ceramic layers.

10. The SiC power module packaging structure based on diamond-copper composite interconnect pillars according to claim 1, characterized in that, The power chip includes a SiC chip and an FRD chip. The drain and source of the SiC chip are electrically connected to the copper layers of the first copper-clad ceramic substrate and the second copper-clad ceramic substrate, respectively, through the interconnect pillars. The gate of the SiC chip is electrically connected to the pins through bonding wires. The cathode and anode of the FRD chip are electrically connected to the copper layers of the first copper-clad ceramic substrate and the second copper-clad ceramic substrate, respectively, through the interconnect pillars.

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