Semiconductor structure and method of forming the same

Abstract

A semiconductor structure and a forming method thereof, the semiconductor structure comprising: a substrate; a device metal layer comprising a first electrode and a second electrode, the first electrode and the second electrode each comprising a handle portion and a plurality of tooth portions connected to the handle portion, the handle portions of the first electrode and the second electrode extending along a second direction and oppositely arranged in a first direction, the plurality of tooth portions extending along the first direction and arranged side by side along the second direction; a signal loading line located on both sides of the device metal layer along the first direction, the signal loading line being electrically connected to the handle portions of the first electrode and the second electrode, the signal loading line comprising a loading end for loading a signal, the signal loading line comprising one or more end lines extending along the second direction and arranged in parallel along the first direction, the length of the end line being less than the length of the handle portion, the signal loading line further comprising a connecting line extending from the loading end to the handle portion through the end line along the first direction. The application is conducive to improving the quality factor of the semiconductor structure.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing, and more particularly to a semiconductor structure and a method for forming the same. Background Technology

[0002] Capacitors are typically made of two isolated metal plates. They are widely used in analog circuits and mixed-signal integrated circuits. Metal-oxide-metal (MOM) capacitors are widely used due to their large capacitance.

[0003] Metal-oxide-metal (MOM) capacitors are crucial components in many mixed-signal radio frequency integrated circuits (RFICs), such as analog frequency tuning circuits, switched capacitor circuits, filters, resonators, up-conversion and down-conversion mixers, and analog-to-digital converters (A / D converters). They play an inter-matching role and can greatly optimize the performance of RFICs.

[0004] However, it is currently difficult to achieve a high quality factor (Q factor) in the semiconductor structure of MOM capacitors. Summary of the Invention

[0005] The problem solved by this invention is to provide a semiconductor structure and a method for forming the same, thereby improving the quality factor of the semiconductor structure.

[0006] To address the aforementioned problems, embodiments of the present invention provide a semiconductor structure comprising: a substrate; a device metal layer located on the substrate, the device metal layer including a first electrode and a second electrode, each of the first and second electrodes including a comb handle portion and a plurality of comb teeth portions connected to the comb handle portion, the comb handle portions of the first and second electrodes extending along a second direction and arranged opposite to each other in a first direction, the plurality of comb teeth portions extending along the first direction and arranged side by side along the second direction, the comb teeth portions of the first and second electrodes being arranged in parallel and intersecting directions, the first direction being perpendicular to the second direction; and signal loading lines located on both sides of the device metal layer along the first direction, the signal loading lines being electrically connected to the comb handle portions of the first and second electrodes respectively, the signal loading lines including a loading end for loading a signal, the signal loading lines including one or more end lines extending along the second direction and arranged parallel to the first direction, the length of the end lines being less than the length of the comb handle portion, the signal loading lines also including a connecting line extending from the loading end along the first direction through the end lines to the comb handle portion, such that the end lines are connected in parallel with the comb handle portion.

[0007] Optionally, the length of one or more end lines from the loading end to the comb handle gradually increases from the loading end to the comb handle.

[0008] Optionally, the signal loading line includes multiple connecting lines extending along a first direction and arranged in parallel along a second direction, each connecting line being connected to the end of each end line, and all multiple connecting lines extending along the first direction and connected to the comb handle portion.

[0009] Optionally, one or more end lines and connecting lines are interconnected to form a mesh structure.

[0010] Optionally, the connecting line is also formed at the middle position of the end line along the second direction and extends through one or more end lines along the first direction, with one end of the connecting line at the middle position serving as the loading end and the other end connected to the comb handle portion.

[0011] Optionally, the semiconductor structure includes multiple device metal layers stacked on a substrate from bottom to top, with first and second electrodes of adjacent device metal layers arranged opposite to each other and electrically connected; the signal loading line is located in the same layer as the topmost device metal layer.

[0012] Optionally, the semiconductor structure further includes: an interconnect via structure located between the comb-handle portions of adjacent device metal layers, wherein the comb-handle portions of the first electrode and the second electrode of the adjacent device metal layers are electrically connected through the interconnect via structure.

[0013] Optionally, the semiconductor structure is suitable for radio frequency devices.

[0014] Accordingly, embodiments of the present invention also provide a method for forming a semiconductor structure, comprising: providing a substrate; forming a device metal layer on the substrate, the device metal layer including a first electrode and a second electrode, each of the first electrode and the second electrode including a comb handle portion and a plurality of comb teeth portions connected to the comb handle portion, the comb handle portions of the first electrode and the second electrode extending along a second direction and arranged opposite to each other in a first direction, the plurality of comb teeth portions extending along the first direction and arranged in parallel along the second direction, the comb teeth portions of the first electrode and the second electrode being arranged in parallel and intersecting, the first direction being perpendicular to the second direction; forming signal loading lines located on both sides of the device metal layer along the first direction, the signal loading lines being electrically connected to the comb handle portions of the first electrode and the second electrode respectively, the signal loading lines including a loading end for loading a signal, the signal loading lines including one or more end lines extending along the second direction and arranged in parallel along the first direction, the length of the end lines being less than the length of the comb handle portion, the signal loading lines also including a connecting line extending from the loading end along the first direction through the end line to the comb handle portion, so that the end line is connected in parallel with the comb handle portion.

[0015] Optionally, in the step of forming signal loading lines located on both sides of the device metal layer along the first direction, the length of one or more end lines to the comb shank gradually increases from the loading end to the comb shank.

[0016] Optionally, in the step of forming signal loading lines located on both sides of the device metal layer along the first direction, the signal loading lines include multiple connecting lines extending along the first direction and arranged in parallel along the second direction, each connecting line being connected to the end of each end line, and the multiple connecting lines extending along the first direction and connected to the comb handle portion.

[0017] Optionally, in the step of forming signal loading lines located on both sides of the device metal layer along the first direction, one or more terminal lines and interconnects are cross-interconnected to form a mesh structure.

[0018] Optionally, in the step of forming signal loading lines located on both sides of the device metal layer along the first direction, the connection is also formed at the middle position of the end line along the second direction, and extends through one or more end lines along the first direction, with one end of the connection at the middle position serving as the loading end and the other end connected to the comb handle portion.

[0019] Optionally, in the step of forming a device metal layer on the substrate, a plurality of device metal layers are formed on the substrate stacked from bottom to top, and the first electrode and second electrode of adjacent device metal layers are arranged opposite to each other and electrically connected; in the step of forming signal loading lines located on both sides of the device metal layer along the first direction, the signal loading lines are formed in the same layer as the topmost device metal layer.

[0020] Optionally, the step of forming multiple device metal layers stacked from bottom to top on the substrate further includes: forming an interconnect via structure between the comb portions of adjacent device metal layers, wherein the comb portions of the first electrode and the second electrode of the adjacent device metal layers are electrically connected through the interconnect via structure.

[0021] Optionally, the forming method is suitable for radio frequency devices.

[0022] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0023] In the semiconductor structure provided by this invention, the signal loading line includes a loading end for loading a signal. The signal loading line includes one or more end lines extending along a second direction and arranged parallel to a first direction. The length of the end lines is less than the length of the comb handle portion. The signal loading line also includes a connecting line extending from the loading end along the first direction through the end lines to the comb handle portion, such that the end lines are connected in parallel with the comb handle portion. In this invention, the first electrode and the second electrode constitute a capacitor. When a signal is loaded onto the first electrode and the second electrode through the signal loading line, the signal is transmitted layer by layer from the loading end through the connecting lines from the end lines to the comb handle portion. The length of the end lines is less than the length of the comb handle portion, and the connecting lines are divided by the end lines. For each terminal line and the corresponding connection extending from the loading end, the length of the connection is reduced and the length of the terminal line is reduced compared to the comb shank. This appropriately reduces the connection resistance of the signal loading and appropriately increases the port resistance of the capacitor. This helps to reduce the difference between the port resistance and the connection resistance between each terminal line and the corresponding connection, thereby improving impedance matching. For the entire signal loading line, the gradual transition of the signal from the loading end to the comb shank helps to improve the overall impedance matching between the signal loading line and the capacitor port, thereby reducing signal input reflection, reducing signal loss, and further improving the quality factor (Qfactor) of the semiconductor structure.

[0024] In the semiconductor structure formation method provided by this invention, the signal loading line includes a loading end for loading a signal, and the signal loading line includes one or more end lines extending along a second direction and arranged parallel to a first direction. The length of the end lines is less than the length of the comb handle portion. The signal loading line also includes a connecting line extending from the loading end along the first direction through the end lines to the comb handle portion, so that the end lines are connected in parallel with the comb handle portion. In this invention, the first electrode and the second electrode constitute a capacitor. When the first electrode and the second electrode are loaded with a signal through the signal loading line, the signal is transmitted layer by layer from the loading end through the connecting line from the end lines to the comb handle portion. The length of the end lines is less than the length of the comb handle portion, and the connecting line... When segmented by terminal lines, the length of each terminal line and its corresponding connection extending from the loading end is reduced, and the length of the terminal line is reduced relative to the comb shank. This appropriately reduces the connection resistance of the signal loading and appropriately increases the port resistance of the capacitor. This helps to reduce the difference between the port resistance and the connection resistance between each terminal line and its corresponding connection, thereby improving impedance matching. For the entire signal loading line, the gradual transition of the signal from the loading end to the comb shank helps to improve the overall impedance matching between the signal loading line and the capacitor port, thereby reducing signal input reflection, reducing signal loss, and ultimately improving the quality factor (Q factor) of the semiconductor structure. Attached Figure Description

[0025] Figures 1 to 2 This is a schematic diagram of a semiconductor structure.

[0026] Figures 3 to 6 This is a schematic diagram of a semiconductor structure according to an embodiment of the present invention;

[0027] Figures 7 to 10 This is a schematic diagram of each step in one embodiment of the method for forming a semiconductor structure according to the present invention. Detailed Implementation

[0028] Currently, improving the quality factor of semiconductor structures has become a challenge. This paper analyzes the reasons why the quality factor of a particular semiconductor structure needs improvement.

[0029] Figures 1 to 2 This is a schematic diagram of a semiconductor structure. Figure 1 This is a top view of the semiconductor structure. Figure 2 for Figure 1 Top view along the AA direction.

[0030] Reference Figure 1 and Figure 2 The semiconductor structure includes: a substrate 10; and multiple device metal layers 20 stacked on the substrate 10 from bottom to top. Each device metal layer 20 includes a first electrode 21 and a second electrode 22. Both the first electrode 21 and the second electrode 22 include a comb handle portion 31 and multiple comb teeth 32 connected to the comb handle portion 31. The comb handle portions 31 of the first electrode 21 and the second electrode 22 are aligned along a second direction (e.g., ...). Figure 1 (as shown in the Y direction) extends and in the first direction (as shown in the Y direction) Figure 1 The comb teeth 32 are arranged opposite each other in the X direction. They extend along the first direction and are arranged side by side in the second direction. The comb teeth 32 of the first electrode 21 and the second electrode 22 are arranged in parallel and intersecting directions. The first electrode 21 and the second electrode 22 of the adjacent device metal layer 20 are arranged opposite each other and electrically connected. The first direction is perpendicular to the second direction. The signal loading line 40 is located on both sides of the device metal layer 20 along the first direction. The signal loading line 40 extends along the first direction and is electrically connected to the comb handle 31.

[0031] The first electrode 21 and the second electrode 22 form a capacitor. A signal is applied to the first electrode 21 and the second electrode 22 through the signal loading line 40. The connection resistance of the signal loading line 40 is relatively large, while the capacitor port resistance of the comb shank 31 is relatively small. This results in a large difference between the connection resistance and the port resistance, leading to greater reflection of the signal input and thus greater signal loss, which in turn affects the quality factor (Q factor) of the semiconductor structure.

[0032] To address the technical problem, embodiments of the present invention provide a semiconductor structure, comprising: a substrate; a device metal layer located on the substrate, the device metal layer including a first electrode and a second electrode, each of the first and second electrodes including a comb handle portion and a plurality of comb teeth portions connected to the comb handle portion, the comb handle portions of the first and second electrodes extending along a second direction and arranged opposite to each other in a first direction, the plurality of comb teeth portions extending along the first direction and arranged side by side along the second direction, the comb teeth portions of the first and second electrodes being arranged in parallel and intersecting directions, the first direction being perpendicular to the second direction; and signal loading lines located on both sides of the device metal layer along the first direction, the signal loading lines being electrically connected to the comb handle portions of the first and second electrodes respectively, the signal loading lines including a loading end for loading a signal, the signal loading lines including one or more end lines extending along the second direction and arranged parallel to the first direction, the length of the end lines being less than the length of the comb handle portion, the signal loading lines also including a connecting line extending from the loading end along the first direction through the end lines to the comb handle portion, so that the end lines are connected in parallel with the comb handle portion.

[0033] In this embodiment of the invention, the first electrode and the second electrode constitute a capacitor. When a signal is applied to the first electrode and the second electrode through a signal loading line, the signal is transmitted layer by layer from the loading end to the comb shank through the connecting line. The length of the connecting line is less than the length of the comb shank, and the connecting line is divided by the connecting line. Therefore, for each connecting line and the corresponding connecting line extending from the loading end, the length of the connecting line is reduced, and the length of the connecting line is reduced compared to the length of the comb shank. This appropriately reduces the connecting resistance of the signal loading and appropriately increases the port resistance of the capacitor. This helps to reduce the difference between the port resistance and the connecting resistance between each connecting line and the corresponding connecting line, thereby improving impedance matching. For the entire signal loading line, the signal is gradually transmitted from the loading end to the comb shank, which helps to improve the overall impedance matching between the signal loading line and the capacitor port, thereby reducing signal input reflection, reducing signal loss, and further improving the quality factor (Q factor) of the semiconductor structure.

[0034] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0035] Figures 3 to 7 This is a schematic diagram of a semiconductor structure according to an embodiment of the present invention, wherein, Figure 3 This is a top view of the semiconductor structure. Figure 4 for Figure 3 Cross-sectional view along the AA direction. Figure 5 This is the frequency-capacitance curve for this embodiment. Figure 6 This is a frequency-Q value curve for this embodiment.

[0036] Reference Figures 3 to 7The semiconductor structure includes: a substrate 100; and a device metal layer 200 located on the substrate 100. The device metal layer 200 includes a first electrode 210 and a second electrode 220. Both the first electrode 210 and the second electrode 220 include a comb handle portion 310 and a plurality of comb teeth 320 connected to the comb handle portion 310. The comb handle portion 310 of the first electrode 210 and the second electrode 220 is along a second direction (e.g., ...). Figure 3 (as shown in the Y direction) extends and in the first direction (as shown in the Y direction) Figure 3 The comb teeth 320 are arranged opposite each other in the first direction and arranged in parallel in the second direction. The comb teeth 320 of the first electrode 210 and the second electrode 220 are arranged in parallel and intersecting directions. The first direction is perpendicular to the second direction. The signal loading line 400 is located on both sides of the device metal layer 200 along the first direction. The signal loading line 400 is electrically connected to the comb handle 310 of the first electrode 210 and the second electrode 220 respectively. The signal loading line 400 includes a loading end 410 for loading signals. The signal loading line 400 includes one or more end lines 420 that extend along the second direction and are arranged in parallel in the first direction. The length of the end line 420 is less than the length of the comb handle 310. The signal loading line 400 also includes a connecting line 430 that extends from the loading end 410 through the end line 420 along the first direction to the comb handle 310, so that the end line 420 is connected in parallel with the comb handle 310.

[0037] Substrate 100 is used to provide a process platform for the formation of semiconductor structures.

[0038] In this embodiment, the semiconductor structure is suitable for radio frequency (RF) devices.

[0039] In radio frequency (RF) devices, the performance of the capacitor structure has a critical impact on the Q factor.

[0040] The device metal layer 200 is used to form the first electrode 210 and the second electrode 220.

[0041] The first electrode 210 and the second electrode 220 both include a comb handle portion 310 and a plurality of comb teeth portions 320 connected to the comb handle portion 310. There are gaps between the comb teeth portions 320, between the comb handle portions 310, and between the comb handle portion 310 and the comb teeth portions 320, so that the first electrode 210 and the second electrode 220 constitute a capacitor.

[0042] In this embodiment, the first electrode 210 and the second electrode 220 are made of metallic materials.

[0043] Specifically, in this embodiment, the device metal layer 200 is formed in the dielectric layer, and correspondingly, the first electrode 210 and the second electrode 220 constitute a metal-oxide-metal (MOM) capacitor.

[0044] In this embodiment, the semiconductor structure includes a plurality of device metal layers 200 stacked on the substrate 100 from bottom to top, and the first electrode 210 and the second electrode 220 of adjacent device metal layers 200 are arranged opposite to each other and electrically connected.

[0045] Multiple device metal layers 200 stacked on the substrate 100 from bottom to top make the first electrode 210 and the second electrode 220 also form a capacitor in the vertical direction, which is beneficial to improving the capacitance density.

[0046] Correspondingly, multiple device metal layers 200 are formed together through a bottom-up multilayer metal layer formation process. As an example, Figure 4 The multiple device metal layers 200 from bottom to top are the first metal layer (M1) to the sixth metal layer (M6).

[0047] In this embodiment, the semiconductor structure further includes an interconnect via structure 300 located between the comb-handle portions 310 of adjacent device metal layers 200, wherein the first electrode 210 and the comb-handle portions 310 of the second electrode 220 of the adjacent device metal layers 200 are electrically connected through the interconnect via structure 300.

[0048] The interconnect via structure 300 is used to electrically connect the device metal layer 200 of adjacent layers.

[0049] Accordingly, in this embodiment, the interconnect via structure 300 is formed together with the interconnect via process steps of forming multiple metal layers from bottom to top.

[0050] Signal loading line 400 is used to load electrical signals to the first electrode 210 and the second electrode 220.

[0051] Specifically, the signal loading line 400 located on one side of the first electrode 210 loads an electrical signal onto the first electrode 210, and the signal loading line 400 located on one side of the second electrode 230 loads an electrical signal onto the second electrode 220, so that the first electrode 210 and the second electrode 220 have a potential difference to form a capacitor structure.

[0052] In this embodiment, the signal loading line 400 is electrically connected to the comb handle portion 310 of the first electrode 210 and the second electrode 220 respectively, so as to load electrical signals to the first electrode 210 and the second electrode 220 by loading electrical signals to the comb handle portion 310.

[0053] In this embodiment, the signal loading line 400 includes a loading end 410 for loading a signal. The loading end 410 is used to connect to an external electrical connection so as to load an electrical signal to the first electrode 210 and the second electrode 220 through the signal loading line 400.

[0054] In this embodiment, the signal loading line 400 includes one or more end lines 420 extending along the second direction and arranged in parallel along the first direction. The length of the end line 420 is less than the length of the comb handle portion 310. The signal loading line 400 also includes a connecting line 430 extending from the loading end 410 through the end line 420 along the first direction to the comb handle portion 310, so that the end line 420 and the comb handle portion 310 are connected in parallel.

[0055] Terminal line 420 and connection line 430 constitute signal loading line 400, so that signal loading line 400 loads electrical signals for the first electrode 210 and the second electrode 220 through multiple ports.

[0056] In this embodiment, the first electrode 210 and the second electrode 220 form a capacitor. When a signal is applied to the first electrode 210 and the second electrode 220 via the signal loading line 400, the signal is transmitted layer by layer from the loading end 410 through the connecting line 430 from the end line 420 to the comb handle portion 310. The length of the end line 420 is less than the length of the comb handle portion 310, and the connecting line 430 is divided by the end line 420. Therefore, for each end line 420 and the corresponding connecting line 430 extending from the loading end 410, the length of the connecting line 430 is reduced, and the length of the end line 420 is reduced compared to the length of the comb handle portion 310. This appropriately reduces the connection resistance of the signal loading and appropriately increases the port resistance of the capacitor. This helps to reduce the difference between the port resistance and the connection resistance between each end line 420 and the corresponding connecting line 430, thereby improving impedance matching. For the entire signal loading line 400, the gradual transition of the signal from the loading end 410 to the comb shank 310 is beneficial to improving the impedance matching between the signal loading line 400 and the capacitor port as a whole, thereby reducing signal input reflection, reducing signal loss, and further improving the quality factor (Q factor) of the semiconductor structure.

[0057] In this embodiment, the lengths of one or more end lines 420 to the comb handle portion 310 gradually increase from the loading end 410 to the comb handle portion 310.

[0058] The lengths of one or more terminal lines 420 to the comb handle 310 gradually increase from the loading end 410 to the comb handle 310, which helps to gradually transition the port resistance from the loading end 410 to the comb handle 310, reducing the probability that impedance matching is difficult due to the large difference between the connection resistance and the port resistance.

[0059] In this embodiment, the signal loading line 400 includes a plurality of connecting lines 430 extending along a first direction and arranged in parallel along a second direction. Each connecting line 430 is connected to the end of each end line 420. The plurality of connecting lines 430 extend along the first direction and are connected to the comb handle portion 310.

[0060] Each connecting line 430 is connected to the end of each end line 420. Multiple connecting lines 430 extend along the first direction and are connected to the comb handle 310, so that when the signal is transmitted from the loading end 410 to the comb handle 310, it passes through the connecting line 430 and then through each end line 420 before being loaded to the comb handle 310.

[0061] Accordingly, in this embodiment, one or more end lines 420 and connecting lines 430 are interconnected to form a mesh structure.

[0062] One or more terminal lines 420 and connecting lines 430 are interconnected to form a mesh structure, achieving the effect of transmitting signals layer by layer from the loading end 410 through the connecting lines 430 to the comb handle portion 310. Multiple connecting lines 430 extend along the first direction and are connected to the comb handle portion 310. At the signal loading port of the comb handle portion 310, the comb handle portion 310 is connected to multiple connecting lines 430, thereby forming multiple ports at the comb handle portion 310. Correspondingly, while reducing the connection resistance of the connecting lines 430 connected to each port, the port resistance of each port is increased. This helps to reduce the difference between the port resistance and the connection resistance between each terminal line 420 and the corresponding connecting line 430, thereby improving impedance matching, reducing signal input reflection, reducing signal loss, and further improving the quality factor of the semiconductor structure.

[0063] In this embodiment, the connecting line 430 is also formed at the middle position of the end line 420 along the second direction, and extends through one or more end lines 420 along the first direction. One end of the connecting line 430 at the middle position serves as the loading end 410, and the other end is connected to the comb handle portion 310.

[0064] A connecting line 430 formed at the middle position of the terminal line 420 along the second direction extends to the loading end 410, thereby connecting to an external power source to realize the loading of an electrical signal through the signal loading line 400.

[0065] In this embodiment, the signal loading line 400 is located on the same layer as the topmost device metal layer 200.

[0066] The signal loading line 400 is located on the same layer as the top device metal layer 200. Increasing the distance between the signal loading line 400 and the substrate 100 helps to reduce the coupling capacitance between the signal loading line 400 and the substrate 100.

[0067] As an example, in this embodiment, the length of the comb tooth 320 is 10 μm, the number of comb teeth 320 is 100, the width of the comb tooth 320 is 50 nm, the spacing between adjacent comb teeth 320 is 50 nm, the multilayer device metal layer 200 is a 6-layer device metal layer 200 from bottom to top, consisting of a first metal layer (M1) to a sixth metal layer (M6), the length from the loading end 410 to the comb handle 310 is 5 μm, the width of the connecting line 430 and the end line 420 is 0.5 μm, and the mesh structure signal loading line 400 is loaded on the comb handle 310 to form 5 ports. Electrical experiments are performed on the semiconductor structure provided in this embodiment.

[0068] Specifically, refer to Figure 5 The diagram shows the frequency-capacitance curves of this embodiment, with the horizontal axis representing frequency (Freq) and the vertical axis representing capacitance (capacitance). Curve 1 is the capacitance curve corresponding to the increase of frequency in the prior art, and curve 2 is the capacitance curve corresponding to the increase of frequency in this embodiment. Calculations show that in the semiconductor structure of this embodiment, due to impedance matching, the capacitance of the MOM capacitor hardly decreases with the increase of frequency before the frequency of 10GHz.

[0069] refer to Figure 6 The diagram shows the frequency-Q value (quality factor) curves of this embodiment. The horizontal axis represents frequency (Freq), and the vertical axis represents Q value. Curve 1 is the Q value curve of the semiconductor structure in the prior art as the frequency increases, and curve 2 is the Q value curve of the semiconductor structure in this embodiment as the frequency increases. Calculations show that, in the semiconductor structure of this embodiment, at a frequency of 2GHz, the Q value of the semiconductor structure in this embodiment is 115% higher than that of the prior art.

[0070] Figures 7 to 10 This is a schematic diagram of each step in an embodiment of the method for forming a semiconductor structure according to the present invention, wherein, Figure 7 This is a top view of the semiconductor structure. Figure 8 for Figure 7 Cross-sectional view along the AA direction. Figure 9 This is the frequency-capacitance curve for this embodiment. Figure 10 This is a frequency-Q value curve for this embodiment.

[0071] Reference Figure 7 and Figure 8 Provides a base of 100.

[0072] Substrate 100 is used to provide a process platform for the formation of semiconductor structures.

[0073] In this embodiment, the method for forming the semiconductor structure is suitable for radio frequency (RF) devices.

[0074] In radio frequency (RF) devices, the performance of the capacitor structure has a critical impact on the Q factor.

[0075] In this embodiment, a device metal layer 200 is formed on the substrate 100. The device metal layer 200 includes a first electrode 210 and a second electrode 220. Both the first electrode 210 and the second electrode 220 include a comb handle portion 310 and a plurality of comb teeth 320 connected to the comb handle portion 310. The comb handle portion 310 of the first electrode 210 and the second electrode 220 is along a second direction (e.g., ...). Figure 7 (as shown in the Y direction) extends and in the first direction (as shown in the Y direction) Figure 7 (As shown in the X direction) The comb teeth 320 are arranged opposite to each other, extending along the first direction and arranged side by side along the second direction. The comb teeth 320 of the first electrode 210 and the second electrode 220 are arranged in parallel and intersecting directions. The first direction is perpendicular to the second direction.

[0076] The device metal layer 200 is used to form the first electrode 210 and the second electrode 220.

[0077] The first electrode 210 and the second electrode 220 both include a comb handle portion 310 and a plurality of comb teeth portions 320 connected to the comb handle portion 310. There are gaps between the comb teeth portions 320, between the comb handle portions 310, and between the comb handle portion 310 and the comb teeth portions 320, so that the first electrode 210 and the second electrode 220 constitute a capacitor.

[0078] In this embodiment, the first electrode 210 and the second electrode 220 are made of metallic materials.

[0079] Specifically, in this embodiment, the device metal layer 200 is formed in the dielectric layer, and correspondingly, the first electrode 210 and the second electrode 220 constitute a metal-oxide-metal (MOM) capacitor.

[0080] In this embodiment, in the step of forming a device metal layer 200 on the substrate 100, a plurality of device metal layers 200 stacked from bottom to top are formed on the substrate 100, and the first electrode 210 and the second electrode 220 of adjacent device metal layers 200 are arranged opposite to each other and electrically connected.

[0081] Multiple device metal layers 200 stacked on the substrate 100 from bottom to top make the first electrode 210 and the second electrode 220 also form a capacitor in the vertical direction, which is beneficial to improving the capacitance density.

[0082] Correspondingly, multiple device metal layers 200 are formed together through a bottom-up multilayer metal layer formation process. As an example, Figure 8The multiple device metal layers 200 from bottom to top are the first metal layer (M1) to the sixth metal layer (M6).

[0083] In this embodiment, the step of forming a plurality of device metal layers 200 stacked from bottom to top on the substrate 100 further includes: an interconnecting via structure 300 located between the comb portions 310 of adjacent device metal layers 200, wherein the first electrode 210 of the adjacent device metal layers 200 and the comb portions 310 of the second electrode 220 are electrically connected through the interconnecting via structure 300.

[0084] The interconnect via structure 300 is used to electrically connect the device metal layer 200 of adjacent layers.

[0085] Accordingly, in this embodiment, the interconnect via structure 300 is formed together with the interconnect via process steps of forming multiple metal layers from bottom to top.

[0086] In this embodiment, signal loading lines 400 are formed on both sides of the device metal layer 200 along a first direction. The signal loading lines 400 are electrically connected to the comb handle portion 310 of the first electrode 210 and the second electrode 220, respectively. The signal loading line 400 includes a loading end 410 for loading signals and one or more end lines 420 extending along a second direction and arranged parallel to the first direction. The length of the end line 420 is less than the length of the comb handle portion 310. The signal loading line 400 also includes a connecting line 430 extending from the loading end 410 along the first direction through the end line 420 to the comb handle portion 310, so that the end line 420 is connected in parallel with the comb handle portion 310.

[0087] Signal loading line 400 is used to load electrical signals to the first electrode 210 and the second electrode 220.

[0088] Specifically, the signal loading line 400 located on one side of the first electrode 210 loads an electrical signal onto the first electrode 210, and the signal loading line 400 located on one side of the second electrode 230 loads an electrical signal onto the second electrode 220, so that the first electrode 210 and the second electrode 220 have a potential difference to form a capacitor structure.

[0089] In this embodiment, the signal loading line 400 is electrically connected to the comb handle portion 310 of the first electrode 210 and the second electrode 220 respectively, so as to load electrical signals to the first electrode 210 and the second electrode 220 by loading electrical signals to the comb handle portion 310.

[0090] In this embodiment, the signal loading line 400 includes a loading end 410 for loading a signal. The loading end 410 is used to connect to an external electrical connection so as to load an electrical signal to the first electrode 210 and the second electrode 220 through the signal loading line 400.

[0091] In this embodiment, the signal loading line 400 includes one or more end lines 420 extending along the second direction and arranged in parallel along the first direction. The length of the end line 420 is less than the length of the comb handle portion 310. The signal loading line 400 also includes a connecting line 430 extending from the loading end 410 through the end line 420 along the first direction to the comb handle portion 310, so that the end line 420 and the comb handle portion 310 are connected in parallel.

[0092] Terminal line 420 and connection line 430 constitute signal loading line 400, so that signal loading line 400 loads electrical signals for the first electrode 210 and the second electrode 220 through multiple ports.

[0093] In this embodiment, the first electrode 210 and the second electrode 220 form a capacitor. When a signal is applied to the first electrode 210 and the second electrode 220 via the signal loading line 400, the signal is transmitted layer by layer from the loading end 410 through the connecting line 430 from the end line 420 to the comb handle portion 310. The length of the end line 420 is less than the length of the comb handle portion 310, and the connecting line 430 is divided by the end line 420. Therefore, for each end line 420 and the corresponding connecting line 430 extending from the loading end 410, the length of the connecting line 430 is reduced, and the length of the end line 420 is reduced compared to the length of the comb handle portion 310. This appropriately reduces the connection resistance of the signal loading and appropriately increases the port resistance of the capacitor. This helps to reduce the difference between the port resistance and the connection resistance between each end line 420 and the corresponding connecting line 430, thereby improving impedance matching. For the entire signal loading line 400, the gradual transition of the signal from the loading end 410 to the comb shank 310 is beneficial to improving the impedance matching between the signal loading line 400 and the capacitor port as a whole, thereby reducing signal input reflection, reducing signal loss, and further improving the quality factor (Q factor) of the semiconductor structure.

[0094] In this embodiment, in the step of forming signal loading lines 400 located on both sides of the device metal layer 200 along the first direction, the lengths from the loading end 410 to the comb handle portion 310 and from one or more end lines 420 to the comb handle portion 310 gradually increase.

[0095] The lengths of one or more terminal lines 420 to the comb handle 310 gradually increase from the loading end 410 to the comb handle 310, which helps to gradually transition the port resistance from the loading end 410 to the comb handle 310, reducing the probability that impedance matching is difficult due to the large difference between the connection resistance and the port resistance.

[0096] In this embodiment, in the step of forming signal loading lines 400 located on both sides of the device metal layer 200 along the first direction, the signal loading line 400 includes a plurality of connecting lines 430 extending along the first direction and arranged in parallel along the second direction. Each connecting line 430 is connected to the end of each end line 420. The plurality of connecting lines 430 extend along the first direction and are connected to the comb handle portion 310.

[0097] Each connecting line 430 is connected to the end of each end line 420. Multiple connecting lines 430 extend along the first direction and are connected to the comb handle 310, so that when the signal is transmitted from the loading end 410 to the comb handle 310, it passes through the connecting line 430 and then through each end line 420 before being loaded to the comb handle 310.

[0098] Accordingly, in this embodiment, in the step of forming signal loading lines 400 located on both sides of the device metal layer 200 along the first direction, one or more terminal lines 420 and connecting lines 430 are interconnected to form a mesh structure.

[0099] One or more terminal lines 420 and connecting lines 430 are interconnected to form a mesh structure, achieving the effect of transmitting signals layer by layer from the loading end 410 through the connecting lines 430 to the comb handle portion 310. Multiple connecting lines 430 extend along the first direction and are connected to the comb handle portion 310. At the signal loading port of the comb handle portion 310, the comb handle portion 310 is connected to multiple connecting lines 430, thereby forming multiple ports at the comb handle portion 310. Correspondingly, while reducing the connection resistance of the connecting lines 430 connected to each port, the port resistance of each port is increased. This helps to reduce the difference between the port resistance and the connection resistance between each terminal line 420 and the corresponding connecting line 430, thereby improving impedance matching, reducing signal input reflection, reducing signal loss, and further improving the quality factor of the semiconductor structure.

[0100] In this embodiment, in the step of forming signal loading lines 400 located on both sides of the device metal layer 200 along the first direction, the connecting line 430 is also formed at the middle position of the end line 420 along the second direction, and extends through one or more end lines 420 along the first direction. One end of the connecting line 430 at the middle position serves as the loading end 410, and the other end is connected to the comb handle portion 310.

[0101] A connecting line 430 formed at the middle position of the terminal line 420 along the second direction extends to the loading end 410, thereby connecting to an external power source to realize the loading of an electrical signal through the signal loading line 400.

[0102] In this embodiment, in the step of forming signal loading lines 400 located on both sides of the device metal layer 200 along the first direction, the signal loading lines 400 are located in the same layer as the topmost device metal layer 200.

[0103] The signal loading line 400 is located on the same layer as the top device metal layer 200. Increasing the distance between the signal loading line 400 and the substrate 100 helps to reduce the coupling capacitance between the signal loading line 400 and the substrate 100.

[0104] As an example, in this embodiment, the length of the comb tooth 320 is 10 μm, the number of comb teeth 320 is 100, the width of the comb tooth 320 is 50 nm, the spacing between adjacent comb teeth 320 is 50 nm, the multilayer device metal layer 200 is a 6-layer device metal layer 200 from bottom to top, consisting of a first metal layer (M1) to a sixth metal layer (M6), the length from the loading end 410 to the comb handle 310 is 5 μm, the width of the connecting line 430 and the end line 420 is 0.5 μm, and the mesh structure signal loading line 400 is loaded on the comb handle 310 to form 5 ports. Electrical experiments are performed on the semiconductor structure provided in this embodiment.

[0105] Specifically, refer to Figure 9 The diagram shows the frequency-capacitance curves of this embodiment, with the horizontal axis representing frequency and the vertical axis representing capacitance. Curve 1 is the capacitance curve corresponding to the increase of frequency in the prior art, and curve 2 is the capacitance curve corresponding to the increase of frequency in this embodiment. Calculations show that in the semiconductor structure of this embodiment, due to impedance matching, the capacitance of the MOM capacitor hardly decreases with the increase of frequency before the frequency of 10GHz.

[0106] refer to Figure 10 The diagram shows the frequency-Q value (quality factor) curves of this embodiment, with the horizontal axis representing frequency and the vertical axis representing Q value. Curve 1 is the Q value curve of the semiconductor structure in the prior art as the frequency increases, and curve 2 is the Q value curve of the semiconductor structure in this embodiment as the frequency increases. Calculations show that, in the semiconductor structure of this embodiment, at a frequency of 2 GHz, the Q value of the semiconductor structure in this embodiment is 115% higher than that of the prior art.

[0107] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: Base; A device metal layer is located on the substrate. The device metal layer includes a first electrode and a second electrode. Both the first electrode and the second electrode include a comb handle portion and a plurality of comb teeth portions connected to the comb handle portion. The comb handle portions of the first electrode and the second electrode extend along a second direction and are arranged opposite to each other in a first direction. The plurality of comb teeth portions extend along the first direction and are arranged side by side along the second direction. The comb teeth portions of the first electrode and the second electrode are arranged in parallel and intersecting directions. The first direction is perpendicular to the second direction. Signal loading lines are located on both sides of the metal layer of the device along the first direction. The signal loading lines are electrically connected to the comb handle portion of the first electrode and the second electrode, respectively. The signal loading lines include loading ends for loading signals. The signal loading lines include one or more end lines extending along the second direction and arranged parallel to the first direction. The length of the end lines is less than the length of the comb handle portion. The signal loading lines also include a connecting line extending from the loading end along the first direction through the end lines to the comb handle portion, so that the end lines are connected in parallel with the comb handle portion.

2. The semiconductor structure as described in claim 1, characterized in that, From the loading end to the comb handle portion, the length of one or more of the end lines to the comb handle portion gradually increases sequentially.

3. The semiconductor structure as described in claim 1, characterized in that, The signal loading line includes a plurality of connecting lines extending along the first direction and arranged in parallel along the second direction. Each connecting line is connected to the end of each of the end lines. All of the connecting lines extend along the first direction and are connected to the comb handle portion.

4. The semiconductor structure as described in claim 3, characterized in that, One or more of the terminal lines are interconnected with the connecting lines to form a mesh structure.

5. The semiconductor structure as described in claim 3, characterized in that, The connecting line is also formed at the middle position of the end line along the second direction, and extends along the first direction through one or more of the end lines. One end of the connecting line at the middle position serves as the loading end, and the other end is connected to the comb handle portion.

6. The semiconductor structure as described in claim 1, characterized in that, The semiconductor structure includes a plurality of device metal layers stacked on the substrate from bottom to top, wherein the first electrode and the second electrode of adjacent device metal layers are arranged opposite to each other and electrically connected. The signal loading line is located on the same layer as the topmost metal layer of the device.

7. The semiconductor structure as described in claim 6, characterized in that, The semiconductor structure further includes an interconnect via structure located between the comb-handle portions of adjacent device metal layers, wherein the comb-handle portions of the first electrode and the second electrode of the adjacent device metal layers are electrically connected through the interconnect via structure.

8. The semiconductor structure as described in claim 1, characterized in that, The semiconductor structure is suitable for radio frequency devices.

9. A method for forming a semiconductor structure, characterized in that, include: Provide a base; A device metal layer is formed on the substrate. The device metal layer includes a first electrode and a second electrode. Both the first electrode and the second electrode include a comb handle portion and a plurality of comb teeth portions connected to the comb handle portion. The comb handle portions of the first electrode and the second electrode extend along a second direction and are arranged opposite to each other in a first direction. The plurality of comb teeth portions extend along the first direction and are arranged side by side along the second direction. The comb teeth portions of the first electrode and the second electrode are arranged in parallel and intersecting directions. The first direction is perpendicular to the second direction. Signal loading lines are formed on both sides of the metal layer of the device along the first direction. The signal loading lines are electrically connected to the comb handle portion of the first electrode and the second electrode, respectively. The signal loading lines include loading ends for loading signals. The signal loading lines include one or more end lines extending along the second direction and arranged parallel to the first direction. The length of the end lines is less than the length of the comb handle portion. The signal loading lines also include a connecting line extending from the loading end along the first direction through the end lines to the comb handle portion, so that the end lines are connected in parallel with the comb handle portion.

10. The method for forming a semiconductor structure as described in claim 9, characterized in that, In the step of forming signal loading lines located on both sides of the metal layer of the device along the first direction, the length of one or more of the end lines to the comb handle gradually increases from the loading end to the comb handle.

11. The method for forming a semiconductor structure as described in claim 9, characterized in that, In the step of forming signal loading lines located on both sides of the metal layer of the device along the first direction, the signal loading lines include a plurality of connecting lines extending along the first direction and arranged in parallel along the second direction, each connecting line being connected to the end of each end line, and the plurality of connecting lines extending along the first direction and connected to the comb handle portion.

12. The method for forming a semiconductor structure as described in claim 11, characterized in that, In the step of forming signal loading lines located on both sides of the metal layer of the device along the first direction, one or more of the terminal lines are interconnected with the connecting lines to form a mesh structure.

13. The method for forming a semiconductor structure as described in claim 11, characterized in that, In the step of forming signal loading lines located on both sides of the metal layer of the device along the first direction, the connecting line is also formed at the middle position of the end line along the second direction, and extends through one or more end lines along the first direction. One end of the connecting line at the middle position serves as the loading end, and the other end is connected to the comb handle portion.

14. The method for forming a semiconductor structure as described in claim 9, characterized in that, In the step of forming a device metal layer on the substrate, a plurality of device metal layers are formed on the substrate stacked from bottom to top, and the first electrode and second electrode of adjacent device metal layers are arranged opposite to each other and electrically connected. In the step of forming signal loading lines located on both sides of the device metal layer along the first direction, the signal loading lines are formed in the same layer as the topmost device metal layer.

15. The method for forming a semiconductor structure as described in claim 14, characterized in that, The step of forming a plurality of device metal layers stacked from bottom to top on the substrate further includes: forming an interconnect via structure between the comb portions of adjacent device metal layers, wherein the comb portions of the first electrode and the second electrode of the adjacent device metal layers are electrically connected through the interconnect via structure.

16. The method for forming a semiconductor structure as described in claim 9, characterized in that, The forming method is suitable for radio frequency devices.

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