A silicon interposer integrated with three-dimensional magnetic core inductors and a method of fabrication

Abstract

The application belongs to the field of advanced packaging integrated chip, and discloses a silicon adapter plate integrated with three-dimensional magnetic core inductor and a preparation method. The silicon adapter plate is prepared by forming interconnection silicon through holes and copper winding through holes in a silicon wafer, arranging damascene wiring on the front surface of the silicon wafer, arranging the front copper winding after removing the wiring in the inductor area, then pressing and pasting the front filling organic layer and opening the organic interconnection hole, arranging the front organic wiring and the front external interconnection structure, and then temporarily bonding; then, the back surface of the silicon wafer is thinned, the magnetic core groove is etched and the back surface insulation layer is deposited, the magnetic core piece is embedded in the magnetic core groove, the photosensitive organic adhesive film is pressed and pasted and the organic interconnection hole is formed, the back copper winding and the back interconnection wiring are arranged after removing the hole bottom insulation layer, so that the front copper winding, the copper winding through hole and the back copper winding jointly form a three-dimensional winding around the magnetic core piece; finally, the back organic layer and the back external interconnection structure are arranged, the bonding is released, the scribing is cleaned, and the silicon adapter plate integrated with three-dimensional magnetic core inductor is obtained. The application solves the problems in the prior art.

Description

Technical Field

[0001] This invention belongs to the field of advanced packaged integrated chip technology, specifically relating to a silicon adapter board for integrating a three-dimensional magnetic core inductor and its preparation method. Background Technology

[0002] With the development of integrated chip power supply voltage regulation and miniaturization of packaged power systems, the demand for on-chip and packaged silicon-based inductors continues to grow. Most existing silicon-based inductors are coreless planar spiral inductors or three-dimensional hollow solenoid inductors. Hollow structure inductors lack a high-permeability magnetic core magnetic gathering structure and generally suffer from low inductance values, making it difficult to meet the electromagnetic performance requirements of high-performance integrated chip voltage regulation scenarios.

[0003] Introducing a magnetic core structure into silicon-based inductors is a core technological approach to improving inductance density and increasing inductance value. Currently, the mainstream methods for integrating magnetic cores into silicon-based inductors fall into three categories: magnetic thin-film deposition, silicon steel sheet cavity embedding, and magnetic composite material compression molding. However, all of these core fabrication methods have significant limitations. On the one hand, the range of magnetic materials that can be used is limited by the fabrication process; on the other hand, the design freedom in terms of core shape, thickness, and size is low, restricting the optimization of inductor electromagnetic performance and its adaptability to various scenarios. On the other hand, existing silicon-based inductor solutions with magnetic cores are all designed for on-chip device development and cannot be integrated into silicon interposers. The entire manufacturing process is difficult to integrate with mature silicon interposer mass production processes, making large-scale application in advanced packaging systems challenging. Summary of the Invention

[0004] The purpose of this invention is to solve the problems of the difficulty in integrating core-type silicon-based inductors into silicon adapter boards and the insufficient inductor performance and process compatibility in the prior art, and to provide a silicon adapter board and preparation method for integrating three-dimensional core inductors.

[0005] To achieve the above objectives, the present invention employs the following technical solution: The present invention proposes a method for fabricating a silicon adapter plate integrating a three-dimensional magnetic core inductor, comprising the following steps: Interconnecting silicon vias and copper winding vias are formed in the silicon wafer. A front-side damask wiring insulation layer and front-side damask wiring are laid on the front side of the silicon wafer. After removing the wiring in the inductor area, front-side copper windings are laid. The front-side copper windings are electrically connected to the copper winding vias. A front-side filling organic layer is pressed onto the front-side copper winding and the front-side damascus wiring, and organic interconnect holes are formed. Front-side organic wiring is laid on the front-side filling organic layer, and the front-side organic wiring is electrically connected to the front-side copper winding and the front-side damascus wiring respectively. After laying the front-side external interconnect structure on the front-side organic wiring, the front side of the silicon wafer is bonded to the temporary bonding substrate. The back side of the silicon wafer is thinned and then etched to form a core groove. A back insulating layer is deposited on the back side of the silicon wafer and the sidewall of the core groove. The core sheet is then embedded in the core groove. A photosensitive organic adhesive film is pressed onto the core groove and photolithographically formed organic interconnect holes. The back insulating layer at the bottom of the organic interconnect holes is removed. Back copper windings and back interconnect wiring are arranged on the photosensitive organic adhesive film. The back copper windings are electrically connected to the copper winding through holes. The front copper winding, the copper winding through hole, and the back copper winding together form a three-dimensional winding surrounding the magnetic core. A back organic layer is laid on the back copper winding and the back interconnect wiring. A back external interconnect structure is laid on the back organic layer. After debonding, cleaning, and dicing, a silicon adapter board is obtained.

[0006] Preferably, the formation of interconnect silicon vias and copper winding vias within the silicon wafer specifically involves: Silicon blind vias are etched on a silicon wafer. A through-silicon via insulating layer is prepared on the surface of the silicon wafer and the sidewalls and bottom of the silicon blind vias. A barrier layer and a copper electroplating seed layer are prepared sequentially on the through-silicon via insulating layer. Copper material is filled into the silicon blind vias to form interconnected through-silicon vias. The surface of the filled silicon wafer is chemically polished and cleaned to remove impurities on the front side of the silicon wafer. Copper winding blind vias are etched on a silicon wafer. Copper winding through-hole insulation layers are prepared on the surface of the silicon wafer and the sidewalls and bottom of the copper winding blind vias. A barrier layer and a copper electroplating seed layer are prepared on the surface of the copper winding through-hole insulation layer, and copper filling material is electroplated to form copper winding through-holes. The diameter of the interconnect silicon via is smaller than that of the copper winding via, and the interconnect silicon via and the copper winding via are fabricated in steps; when the difference between the diameter of the interconnect silicon via and the diameter of the copper winding via is 0 to 5 μm, the two types of vias are simultaneously etched and simultaneously electroplated to fill.

[0007] Preferably, the step of laying out front-side damascus wiring on the front side of the silicon wafer specifically involves: The front damascus wiring insulation layer and front damascus wiring are prepared using the damascus process, and the front damascus wiring area avoids the area where the three-dimensional magnetic core inductor is laid.

[0008] Preferably, the front copper winding is laid after removing the wiring in the inductor area, specifically as follows: Plasma etching or chemical etching is used to remove the front damascus wiring insulation layer of the inductor area, fully exposing the upper end of the copper winding via; the front copper winding is prepared by a semi-additive method, forming a buffer gap between the front copper winding and the front damascus wiring insulation layer.

[0009] Preferably, the step of pressing a front-side filler organic layer onto the front-side copper winding and the front-side damascus wiring and forming organic interconnect holes specifically involves: A front-side filled organic layer is prepared using photolithography and photosensitive photoresist. The front-side filled organic layer fills the gaps around the front-side copper winding and the front-side damascus wiring. Organic interconnect holes are formed in the front-side filled organic layer using photolithography.

[0010] Preferably, the bonding of the front side of the silicon wafer to the temporary bonding substrate specifically involves: Temporary bonding adhesive is applied to both the front side of the silicon wafer and the temporary bonding substrate, and then baked after bonding to eliminate air bubbles.

[0011] Preferably, the process of thinning the back side of the silicon wafer, etching to form a magnetic core groove, and depositing a back insulating layer on the back side of the silicon wafer and the sidewalls of the magnetic core groove specifically involves: The back side of the silicon wafer is thinned sequentially by mechanical thinning and plasma etching until the silicon through-hole insulating layer and the copper winding through-hole insulating layer are exposed; photolithography combined with plasma etching forms a magnetic core groove in the area surrounded by the copper winding through-hole. Atomic layer deposition and chemical vapor deposition methods are used to deposit a back insulating layer on the back side of the silicon wafer and the sidewall of the magnetic core groove.

[0012] Preferably, the step of embedding the magnetic core sheet into the magnetic core groove specifically involves: A magnetic core adhesive film is attached to one side of the magnetic core sheet. The magnetic core adhesive film includes a support film and an adhesive film. The magnetic core sheet and the adhesive film are cut using a low-thermal-effect laser, while retaining the support film. The magnetic core sheet with the adhesive film is removed from the support film, and the side with the adhesive film is attached to the groove of the magnetic core. Multiple layers of magnetic core sheets and adhesive films are sequentially attached inside the magnetic core groove. The difference between the total height of the stacked magnetic core sheets and the depth of the magnetic core groove is less than ±10μm. The length and width of the magnetic core sheets are 5 to 60μm smaller than the length and width of the magnetic core groove. The warpage of the magnetic core sheets is less than ±20μm.

[0013] Preferably, the step of arranging the back copper winding and back interconnect wiring on the photosensitive organic adhesive film specifically involves: The back copper winding and back interconnect wiring are prepared using a semi-additive wiring process. When the required thickness of the back interconnect wiring and the back copper winding is the same, they are prepared simultaneously by a single semi-additive wiring process. When the required thicknesses of the two are different, they are prepared in two separate processes.

[0014] The present invention proposes a silicon adapter board integrating a three-dimensional magnetic core inductor, comprising a silicon layer as a substrate, silicon interconnect vias that penetrate the silicon layer to achieve conductive connection between the front and back sides, a three-dimensional magnetic core inductor embedded in the silicon layer, multilayer damask wiring disposed on the front side of the silicon layer, multilayer organic wiring disposed on the front and back sides of the silicon layer respectively, and an external interconnection structure formed on the surface of the multilayer organic wiring. The three-dimensional magnetic core inductor consists of an inductor core and an inductor winding that penetrates the silicon layer and surrounds the inductor core; the multilayer damask wiring area avoids the three-dimensional magnetic core inductor and is used for electrical interconnection; the multilayer organic wiring realizes the electrical connection between the inductor winding, the multilayer damask wiring, and the external interconnection structure; the external interconnection structure is used for the connection between the adapter board and the outside.

[0015] Compared with the prior art, the present invention has the following beneficial effects: This invention proposes a method for fabricating a silicon adapter board for an integrated three-dimensional magnetic core inductor. First, interconnect vias and copper winding vias are formed within a silicon wafer, balancing the dual requirements of high-density interconnects and low-resistance inductor windings. Then, damascus wiring is laid on the front side of the wafer to achieve high-density interconnects. After removing the wiring in the inductor region, a front-side copper winding electrically connected to the copper winding vias is laid using a semi-additive method, achieving regionalized layering of high-density interconnects and thick copper inductor windings. Next, an organic layer is laminated onto the front-side copper windings and damascus wiring, and interconnect vias are formed. Front-side organic wiring is then laid on top to achieve electrical interconnection between the front-side copper windings and the damascus wiring. Finally, a front-side external interconnect structure is laid and temporarily bonded. The substrate is bonded to complete the front-side process and protect the front-side structure. The back side is then thinned and etched to form a core groove. After depositing an insulating layer, the core is embedded in the groove, integrating the core within the adapter board without interfering with the front-side wiring. A photosensitive organic adhesive film is then pressed onto the core groove to form interconnect holes. After removing the insulating layer at the bottom of the holes, back-side copper windings and back-side interconnect wiring are laid out, electrically connected to the copper winding vias. The front-side copper windings, copper winding vias, and back-side copper windings together form a three-dimensional winding structure surrounding the core, providing a longer magnetic path and a larger coil cross-sectional area compared to planar inductors. Finally, a back-side organic layer and back-side external interconnect structure are laid out, the bonding is removed, and the wafer is cleaned and diced to obtain the silicon adapter board. Each step is performed layer-by-layer on a silicon wafer, with a reasonable process sequence and mutual compatibility. This achieves the integration of a high-inductance, low-DC-resistance three-dimensional core inductor within the silicon adapter board, thus solving the aforementioned problems in a way that ensures overall process compatibility. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a schematic cross-sectional view of the silicon adapter board for integrating the three-dimensional magnetic core inductor of the present invention. Figure 2 This is a schematic cross-sectional view of the silicon wafer after interconnecting through-silicon vias have been fabricated. Figure 3 This is a schematic cross-sectional view of the copper winding through-hole prepared according to the present invention; Figure 4 A schematic cross-sectional view of the multilayer frontal damascus wiring fabricated according to the present invention. Figure 5 This is a schematic cross-sectional view of the front copper winding after it has been fabricated according to the present invention; Figure 6 This is a cross-sectional schematic diagram of the front-side organic layer after preparation. Figure 7 This is a schematic cross-sectional view of the front organic wiring fabricated according to the present invention; Figure 8 This is a cross-sectional view of the front-side external interconnect structure after fabrication according to the present invention; Figure 9 This is a cross-sectional schematic diagram of the wafer after temporary bonding is completed on the front side of the wafer according to the present invention; Figure 10 This is a cross-sectional schematic diagram of the back silicon thinning, magnetic core groove etching, and back insulating layer fabrication of the present invention. Figure 11 This is a schematic diagram illustrating the preparation of the magnetic core film and positioning marks according to the present invention; Figure 12 This is a schematic diagram of the low-thermal-effect laser-cut film-coated magnetic core sheet of the present invention; Figure 13 This is a cross-sectional schematic diagram of the magnetic core sheet being mounted into the magnetic core groove of the present invention; Figure 14 This is a cross-sectional schematic diagram of the present invention after the back-side photosensitive organic adhesive film fills the gaps in the magnetic core groove and forms organic interconnect holes. Figure 15 This is a cross-sectional view of the back insulating layer at the bottom of the organic interconnect hole after etching and removal according to the present invention; Figure 16 This is a schematic cross-sectional view of the back-side interconnect wiring and back-side copper winding after the present invention is fabricated; Figure 17 This is a schematic cross-sectional view of the back-side multilayer wiring and back-side external interconnection structure prepared according to the present invention. Figure 18 This is a schematic cross-sectional view of the exposed back copper winding structure of the present invention; Figure 19 This is a schematic cross-sectional view of the wafer before debonding and dicing in this invention; Figure 20 This is a schematic diagram of the planar layout of the winding coil surrounding the magnetic core of the present invention; Figure 21 This is a schematic diagram of the silicon adapter board application packaging structure of the present invention.

[0018] Wherein, 1-Silicon layer; 2-Multilayer organic wiring; 3-Inductor winding; 4-Multilayer damascene wiring; 5-Inductor core; 101-Silicon wafer; 102-Silicon blind via; 103-Silicon through-hole insulating layer; 104-Interconnect silicon through-hole; 201-Copper winding blind via; 202-Copper winding through-hole insulating layer; 203-Copper winding through-hole; 301-Front-side damascene wiring insulating layer; 302-Front-side damascene wiring; 401-Front-side copper winding; 402-Gap; 501-Front-side filler organic layer; 502-Front-side organic interconnect via; 601-Front-side organic wiring; 701-External interconnect structure; 80 1-Temporary bonding adhesive; 802-Temporary bonding substrate; 901-Core groove; 902-Back insulating layer; 1001-Core sheet; 1002-Core adhesive film; 1003-Core patch positioning mark; 1004-Support film; 1005-Adhesive film; 1101-Photosensitive organic adhesive film; 1102-Back organic interconnect hole; 1201-Back interconnect wiring; 1202-Back copper winding; 1301-Back organic layer; 1302-Back external interconnect structure; 1401-Power management chip; 1402-Passive device; 1403-Packaging substrate / PCB; 1501-Functional chip. Detailed Implementation

[0019] In the following description, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of the invention. Therefore, the drawings and description are considered to be exemplary in nature and not restrictive.

[0020] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature being directly above or diagonally above the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0021] The present invention will now be described in further detail with reference to the accompanying drawings: With the development of integrated chip power supply voltage regulation and miniaturization of packaged power systems, the demand for on-chip and packaged silicon-based inductors continues to grow. Most existing silicon-based inductors are coreless planar spiral inductors or three-dimensional hollow solenoid inductors; typical solutions can be found in patent documents with application numbers 201510657578.9 and 201611042421.6. Hollow-structure inductors lack a high-permeability magnetic core for focusing magnetic energy, generally resulting in low inductance values, and their electromagnetic performance is insufficient to meet the requirements of high-performance integrated chip voltage regulation applications.

[0022] Introducing a magnetic core structure into silicon-based inductors is a core technological approach to improving inductance density and increasing inductance value. Currently, the mainstream methods for integrating magnetic cores into silicon-based inductors fall into three categories: magnetic thin-film deposition (see patent 202211701615.8), silicon steel sheet cavity embedding (see 3D MEMS In-Chip Solenoid Inductor With High Inductance Density for Power MEMS Device), and magnetic composite material compression molding (see High-Q Three-Dimensional Microfabricated Magnetic-Core Toroidal Inductors for Power Supplies in Package). However, all of the above-mentioned magnetic core fabrication schemes have obvious limitations. On the one hand, the range of magnetic materials that can be selected is limited due to the constraints of the fabrication process. At the same time, the design freedom of the magnetic core shape, thickness, and size is low, which restricts the optimization of the electromagnetic performance of the inductor and its ability to adapt to different scenarios. On the other hand, existing silicon-based inductor schemes with magnetic cores are all designed for on-chip devices and cannot be integrated into the silicon interposer. The entire manufacturing process is difficult to be compatible with mature silicon interposer mass production processes, making it difficult to apply on a large scale in advanced packaging systems.

[0023] To address the aforementioned technical problems, the objective of this invention is to fabricate a three-dimensional magnetic core inductor on a silicon adapter board. By fabricating the three-dimensional inductor windings and magnetic core within the silicon adapter board, inductors with higher inductance values ​​and lower DC resistance can be achieved. The integration of the inductor within the adapter board allows for chip or die integration using this board, eliminating or reducing the need for external interconnect inductors, thus reducing the overall size of the integrated chip or electronic system. Furthermore, the inductor's use for voltage regulation can reduce overall power consumption.

[0024] In a first aspect, the present invention provides a method for fabricating a silicon adapter plate integrating a three-dimensional magnetic core inductor, comprising the following steps: Step 1: Form interconnect silicon vias 104 and copper winding vias 203 in silicon wafer 101. Arrange front damascus wiring insulation layer 301 and front damascus wiring 302 on the front side of silicon wafer 101. After removing the wiring in the inductor area, arrange front copper winding 401. The front copper winding 401 is electrically connected to the copper winding via 203. The formation of interconnecting silicon vias 104 and copper winding vias 203 within the silicon wafer 101 specifically involves: Silicon blind vias 102 are etched on silicon wafer 101. A through-silicon via insulating layer 103 is prepared on the surface of silicon wafer 101 and the sidewalls and bottom of silicon blind vias 102. A barrier layer and a copper electroplating seed layer are sequentially prepared on the through-silicon via insulating layer 103. Copper material is filled into the silicon blind vias 102 to form interconnecting through-silicon vias 104. The surface of the filled silicon wafer 101 is chemically polished and cleaned to remove impurities on the front side of the silicon wafer 101. Copper winding blind vias 201 are etched on silicon wafer 101. Copper winding through-hole insulation layer 202 is prepared on the surface of silicon wafer 101 and the sidewalls and bottom of copper winding blind vias 201. A barrier layer and a copper electroplating seed layer are prepared on the surface of copper winding through-hole insulation layer 202, and copper filling material is electroplated to form copper winding through-hole 203. The diameter of the interconnect silicon via 104 is smaller than the diameter of the copper winding via 203. The interconnect silicon via 104 and the copper winding via 203 are prepared in steps. When the difference between the diameter of the interconnect silicon via 104 and the diameter of the copper winding via 203 is 0 to 5 μm, the two types of vias are simultaneously etched and simultaneously electroplated to fill them.

[0025] The specific steps for laying out the front-side damascene wiring 302 on the front side of the silicon wafer 101 are as follows: The front damascus wiring insulation layer 301 and the front damascus wiring 302 are prepared using the damascus process. The wiring area of ​​the front damascus wiring 302 avoids the area where the three-dimensional magnetic core inductor is laid.

[0026] The process of laying the front copper winding 401 after removing the wiring in the inductor region is as follows: The front damascus wiring insulation layer 301 of the inductor area is removed by plasma etching or chemical etching, fully exposing the upper end of the copper winding through hole 203; the front copper winding 401 is prepared by a semi-additive method, and a buffer gap 402 is formed between the front copper winding 401 and the front damascus wiring insulation layer 301.

[0027] Step 2: Press a front-side filler organic layer 501 onto the front-side copper winding 401 and the front-side damascus wiring 302 and open organic interconnect holes 502. Then, lay the front-side organic wiring 601 on the front-side filler organic layer 501. The front-side organic wiring 601 is electrically connected to the front-side copper winding 401 and the front-side damascus wiring 302 respectively. After laying the front-side external interconnect structure 701 on the front-side organic wiring 601, bond the front side of the silicon wafer 101 to the temporary bonding substrate 802. Specifically, the process of pressing a front-side filler organic layer 501 onto the front-side copper winding 401 and the front-side damascus wiring 302 and forming organic interconnect holes 502 involves: A front-side filled organic layer 501 is prepared using photolithography and photosensitive photoresist. The front-side filled organic layer 501 fills the gaps around the front-side copper winding 401 and the front-side damascus wiring 302. Organic interconnect holes 502 are formed in the front-side filled organic layer 501 using photolithography.

[0028] The bonding of the front side of the silicon wafer 101 to the temporary bonding substrate 802 specifically involves: Temporary bonding adhesive 801 is coated on both the front side of silicon wafer 101 and temporary bonding substrate 802, and then baked after bonding to eliminate air bubbles.

[0029] Step 3: Thin the back side of the silicon wafer 101 and then etch to form a magnetic core groove 901. Deposit a back insulating layer 902 on the back side of the silicon wafer 101 and the sidewall of the magnetic core groove 901. Embed the magnetic core 1001 in the magnetic core groove 901. Press a photosensitive organic adhesive film 1101 onto the magnetic core groove 901 and photolithographically form an organic interconnect hole 1102. Remove the back insulating layer 902 at the bottom of the organic interconnect hole 1102. Arrange a back copper winding 1202 and a back interconnect wiring 1201 on the photosensitive organic adhesive film 1101. The back copper winding 1202 is electrically connected to the copper winding through hole 203. The process of thinning the back side of the silicon wafer 101, etching to form a magnetic core groove 901, and depositing a back insulating layer 902 on the back side of the silicon wafer 101 and the sidewalls of the magnetic core groove 901 specifically involves: The back side of the silicon wafer 101 is thinned sequentially by mechanical thinning and plasma etching until the silicon through-hole insulating layer 103 and the copper winding through-hole insulating layer 202 are exposed; a magnetic core groove 901 is formed in the area surrounded by the copper winding through-hole 203 by photolithography combined with plasma etching. A back insulating layer 902 is deposited on the back side of silicon wafer 101 and the sidewall of magnetic core groove 901 using atomic layer deposition and chemical vapor deposition methods.

[0030] The process of embedding the magnetic core sheet 1001 into the magnetic core groove 901 specifically involves: A magnetic core adhesive film 1002 is attached to one side of the magnetic core sheet 1001. The magnetic core adhesive film 1002 includes a support film 1004 and an adhesive film 1005. The magnetic core sheet 1001 and the adhesive film 1005 are cut using a low-thermal-effect laser, while retaining the support film 1004. The magnetic core sheet 1001 carrying the adhesive film 1005 is removed from the support film 1004, and the side carrying the adhesive film 1005 is attached to the magnetic core groove 901. Multiple layers of magnetic core sheets 1001 and adhesive film 1005 are sequentially attached inside the magnetic core groove 901. The difference between the total height of the multiple magnetic core sheets 1001 and the depth of the magnetic core groove 901 is less than ±10μm. The length and width of the magnetic core sheets 1001 are 5 to 60μm smaller than the length and width of the magnetic core groove 901. The warpage of the magnetic core sheets 1001 is less than ±20μm.

[0031] The specific steps of arranging the back copper winding 1202 and the back interconnect wiring 1201 on the photosensitive organic adhesive film 1101 are as follows: The back copper winding 1202 and the back interconnect wiring 1201 are prepared by a semi-additive wiring process. When the required thickness of the back interconnect wiring 1201 and the back copper winding 1202 is the same, they are prepared simultaneously by a single semi-additive wiring process. When the required thicknesses of the two are different, they are prepared in two separate processes.

[0032] Step 4: The front copper winding 401, the copper winding through hole 203 and the back copper winding 1202 together form a three-dimensional winding surrounding the magnetic core 1001. A back organic layer 1301 is laid on the back copper winding 1202 and the back interconnect wiring 1201. A back external interconnect structure 1302 is laid on the back organic layer 1301. After debonding, cleaning and dicing, a silicon adapter board is obtained.

[0033] The method will now be described in detail with reference to the accompanying drawings: This invention proposes a silicon adapter plate integrating a three-dimensional magnetic core inductor and its fabrication method, the structure of which is as follows: Figure 1 As shown, it mainly includes a silicon layer 1 as a substrate, silicon interconnect vias 104 that penetrate the silicon layer 1 to achieve conductive connection between the front and back sides, a three-dimensional magnetic core inductor embedded inside the silicon layer 1, multilayer damascene wiring 4 on the front side of the silicon layer 1, multilayer organic wiring 2 arranged on the front and back sides of the silicon layer 1 respectively, and an external interconnection structure 701 formed on the surface of the multilayer organic wiring 2; the three-dimensional magnetic core inductor consists of an inductor core 5 and an inductor winding 3 that penetrates the silicon layer 1 and surrounds the inductor core 5; the multilayer damascene wiring 4 is arranged in an area that avoids the three-dimensional magnetic core inductor and is used for electrical interconnection; the multilayer organic wiring 2 realizes the electrical connection between the inductor winding 3, the multilayer damascene wiring 4, and the external interconnection structure 701; the external interconnection structure 701 is used for the connection between the adapter board and the outside.

[0034] Specifically, silicon layer 1 contains silicon interconnect vias 104 for electrical interconnection on both the front and back sides. An inductor core 5 and an inductor winding 3, which penetrates the silicon layer 1 and is wound around the inductor core 5, are embedded within silicon layer 1. The inductor winding 3 and the inductor core 5 together form a three-dimensional core inductor embedded in the adapter board. The front side of silicon layer 1 has multi-layer damascene wiring 4 with a small line width and spacing for high-density electrical interconnection. Both the front and back sides of silicon layer 1 have multi-layer organic wiring 2 for electrical interconnection between the inductor winding 3 and the multi-layer damascene wiring 4, as well as for electrical interconnection with external chips and substrates. The multi-layer organic wiring 2 allows for a thicker wiring structure, which is beneficial for achieving low-resistance interconnection. An external interconnection structure 701 is used for interconnection with external chips, packaging substrates, and PCBs.

[0035] The main technological process is as follows.

[0036] S1. Interconnect vias are fabricated on the silicon interposer. For example... Figure 2 As shown, a high-resistivity or ultra-high-resistivity silicon wafer 101, after chemical or plasma cleaning, is selected. An etching mask layer is prepared on the wafer surface using photolithography, and silicon blind vias 102 are etched on the silicon wafer 101 using reactive plasma etching. Subsequently, a through-silicon via insulating layer 103 is prepared on the surface of the silicon wafer 101 and the sidewalls and bottom of the silicon blind vias 102. The material can be one or more insulating materials such as silicon oxide, silicon nitride, hafnium oxide, and aluminum oxide. Preparation methods include, but are not limited to, thermal oxidation, atomic deposition, and chemical vapor deposition. Then, a barrier layer (including but not limited to materials such as Ti and TiN) and a copper electroplating seed layer are sequentially prepared on the through-silicon via insulating layer 103 using physical vapor deposition, magnetron sputtering, or thermal evaporation sputtering. Finally, copper material is filled into the silicon blind vias 102 using electroplating to form interconnecting through-silicon vias 104. Finally, the surface of the filled silicon wafer 101 is chemically polished and cleaned to remove excess metal material and other contaminants from the front side of the silicon wafer 101, in order to facilitate subsequent wiring processes.

[0037] S2, Preparation of through-holes in the copper windings of the inductor. For example... Figure 3 As shown. Similar to step S1, copper winding blind vias 201 are etched on the silicon wafer 101, and a copper winding through-hole insulating layer 202 is prepared. Subsequently, a barrier layer and a copper electroplating seed layer are prepared on its surface, and copper filling material is electroplated to form copper winding through-holes 203. The preparation of the copper winding through-hole insulating layer 202 should employ a low-temperature thin-film deposition process, such as atomic layer deposition or chemical vapor deposition, to reduce the expansion of the copper material in the interconnect silicon through-holes 104 caused by high temperature, and to avoid defects such as breakage and microcracks at the interface between the interconnect silicon through-holes 104 and the silicon wafer 101.

[0038] It should be noted that the above-described steps S1 and S2 are used to fabricate the interconnect silicon via 104 and the copper winding via 203 respectively, allowing for interconnect silicon via 104 and copper winding via 203 with different diameters. Smaller diameter interconnect silicon via 104 can increase the interconnect density of the adapter board, while larger diameter copper winding via 203 can reduce the DC resistance of the inductor. Optionally, if the diameter difference between the interconnect silicon via 104 and the copper winding via 203 is 0-5 μm, the electroplated copper filling process can effectively fill both sizes of vias, allowing for the fabrication of interconnect silicon via 104 and copper winding via 203 in a single process, shortening the process cycle.

[0039] S3, multi-layer inorganic damask cabling. For example... Figure 4 As shown, a multilayer front-side damascus wiring insulating layer 301 and front-side damascus wiring 302 are fabricated using inorganic damascus wiring technology. The material of the front-side damascus wiring insulating layer 301 includes, but is not limited to, silicon oxide and silicon nitride. The front-side damascus wiring 302 includes, but is not limited to, copper and aluminum, and the wiring area is not located in the area where the three-dimensional magnetic core inductor is fabricated. The multilayer damascus wiring process can fabricate high-density, high-bandwidth front-side damascus wiring 302 for electrical interconnection between the silicon via 104 and the chip or between chips.

[0040] S4, Preparation of the front copper winding. For example... Figure 5 As shown, an etching mask layer is prepared using photolithography, and the front damascus wiring insulation layer 301 in the three-dimensional magnetic core inductor region is removed using plasma etching or chemical etching processes, ensuring that the front damascus wiring insulation layer 301 above the copper winding via 203 is completely removed, exposing the copper material. Subsequently, a semi-additive organic wiring process is used to prepare the front copper winding 401. The front copper winding 401 and the copper winding via 203 form an electrical interconnect. This method can achieve a copper winding with a thickness much greater than the front damascus wiring 302. The thicker copper winding is beneficial for reducing the DC resistance of the inductor and improving the inductor performance. It should be noted that due to the large thickness and width of the front copper winding 401, a gap 402 should exist between the front copper winding 401 and the front damascus wiring insulation layer 301. The gap 402 helps to prevent the expansion of the front copper winding 401 at high temperatures from causing damage to the front damascus wiring insulation layer 301, and also facilitates the preparation of the front copper winding 401 using a semi-additive method.

[0041] S5, front organic layer filling. For example... Figure 6As shown. Depending on the different requirements of interconnect wiring and inductor design, there may be a height difference between the thickness of the front copper winding 401 and the multilayer front damascus wiring 302. Gaps and height differences are detrimental to the subsequent fabrication of wiring structures; therefore, organic materials are needed to fill the gaps and reduce the height difference. This invention uses photolithography and photosensitive photoresist to prepare the front-filled organic layer 501. Preferably, a thicker organic photosensitive dry film adhesive is used, and multiple layers of photosensitive dry film adhesive are pressed onto the wafer surface based on vacuum hot-pressing technology. The pressing of multiple layers of photosensitive dry film adhesive can achieve the preparation of a thicker front-filled organic layer 501, and the surface after pressing is relatively flat, which can effectively reduce the height difference between the thickness of the front copper winding 401 and the multilayer front wiring, facilitating the subsequent fabrication of interconnect wiring. Alternatively, a photoresist with a higher viscosity can be spin-coated to prepare the front-filled organic layer 501. Subsequently, photolithography is used to fabricate organic interconnect vias 502 to facilitate electrical interconnection between the front copper winding 401 and the front damascus wiring 302, as well as their external electrical interconnection. Furthermore, when the front copper winding 401 expands due to heat, the front organic filler layer 501 is not easily damaged due to its good flexibility, and it also provides a buffering effect between the front copper winding 401 and the front damascus wiring insulation layer 301.

[0042] S6, front-side organic wiring fabrication. For example... Figure 7 As shown. On the front-side organic layer 501, a semi-additive wiring process is used to fabricate a front-side organic wiring 601, which is used for the electrical interconnection between the front-side copper winding 401 and the front-side damascus wiring 302, as well as their external electrical interconnection. Repeating S5 and S6 can fabricate a multilayer organic wiring layer.

[0043] S7, Fabrication of the front-side external interconnect structure. For example... Figure 8 As shown in Figure S5, an organic layer with organic interconnect vias 502 is fabricated again. It should be noted that the front-side organic wiring 601 is generally thin, therefore, various methods such as coating, spraying, and lamination can be used to fabricate the organic layer. Subsequently, an external interconnect structure 701 is fabricated within the organic interconnect vias 502 using an electroplating process. This structure includes, but is not limited to, interconnect pads and interconnect micro-bumps, and its material can be copper, with a surface material of one or more materials such as nickel, gold, tin, or silver. The external interconnect structure 701 is used for the electrical interconnection between the front-side copper winding 401 and the front-side damascus wiring 302.

[0044] S8, frontal temporary bonding. For example... Figure 9As shown. Due to the relatively thick front-side copper winding 401, the dicing height on the wafer is larger. Therefore, a thicker temporary bonding adhesive 801 is required to avoid air bubbles after temporary bonding. The presence of air bubbles can lead to wafer cracking or chemical seepage into the front side during subsequent back-side processing. This invention employs coating a layer of temporary bonding adhesive 801 on both the wafer and the temporary bonding substrate 802, and then baking it in a vacuum nitrogen oven after bonding to reduce air bubble formation and facilitate subsequent back-side processing. The materials of the temporary bonding substrate 802 include, but are not limited to, silicon, glass, and steel.

[0045] S9, backside silicon thinning and etching. For example... Figure 10 As shown, the silicon on the back side is thinned sequentially by mechanical thinning and plasma etching until the silicon through-hole insulating layer 103 and the copper winding through-hole insulating layer 202 are exposed.

[0046] S10, Etching of magnetic core grooves and fabrication of insulating layer. For example... Figure 11 As shown, a core recess 901 is fabricated within the area surrounded by the copper winding via 203 using photolithography and plasma etching processes for core embedding. The length and width of the core recess 901 are determined based on the designed core length and width and its position within the copper winding via 203, and are 20-60 μm larger than the core length and width. Subsequently, a back insulating layer 902 is fabricated on the back surface of the wafer and the sidewalls of the recess using low-temperature thin-film fabrication processes such as atomic layer deposition and chemical vapor deposition.

[0047] S11, Magnetic core preparation and lamination. For example... Figure 12 As shown. The magnetic core 1001 should be a magnetic sheet with high permeability and low coercivity, and the material includes, but is not limited to, silicon steel, ferrite, etc., and its preparation method includes, but is not limited to, hot pressing sintering and cutting of block materials. A magnetic core adhesive film 1002 is attached to one side of the magnetic core 1001 using a vacuum laminator. This adhesive film can be DAF or other adhesive films that can be used to attach sheet structures to silicon and silicon dioxide surfaces. The magnetic core adhesive film 1002 should have at least a support film 1004 and an adhesive film 1005. Optionally, the magnetic core adhesive film 1002 is not used here, and the magnetic core 1001 can be attached by dispensing process in subsequent S13. Subsequently, optionally, to improve the magnetic core mounting accuracy, a magnetic core patch positioning mark 1003 can be prepared on the other surface of the unlaminated magnetic core 1001 using photolithography and metal thin film preparation processes (such as magnetron sputtering, physical vapor deposition, etc.) or marking preparation technology such as laser marking.

[0048] S12, Cutting of film-coated magnetic core sheets. For example... Figure 13As shown, the magnetic core 1001 is cut using low-thermal-effect lasers such as ultrafast lasers and water-guided lasers. Compared to mechanical cutting, ultrafast lasers and water-guided lasers can cut magnetic cores of various shapes, such as rectangular, toroidal, and horseshoe shapes, to meet the fabrication needs of various types of inductors. They also offer high cutting precision, preventing significant discrepancies between the cut dimensions and the dimensions of the magnetic core groove 901, which would hinder the mounting of the magnetic core 1001 within the groove. Furthermore, by adjusting the laser cutting process, it is possible to ensure that only the magnetic core 1001 and the adhesive film 1005 are cut, without cutting or partially cutting the support film 1004, thus preventing the magnetic core 1001 and the adhesive film 1002 from falling off or being lost after cutting. Moreover, compared to other laser cutting technologies, low-thermal-effect lasers can reduce warpage after laser cutting, preventing excessive warpage that would make it difficult to fabricate the wiring layer after the magnetic core is mounted.

[0049] S13, Core mounting. For example... Figure 14 As shown. Based on the selected structure and characteristics of the core adhesive film 1002, the film and the cut core sheet are subjected to processes such as ultraviolet light irradiation or heating, so that the adhesive film 1005 can be easily separated from the support film 1004, but at the same time, it can have good adhesion strength to the core sheet 1001. The core sheet 1001 with the adhesive film 1005 is removed from the support film 1004 using a pick-and-place machine, and the side with the adhesive film 1005 is attached to the core groove 901. In addition to using the core adhesive film 1002 to attach the core sheet 1001, adhesive can also be applied in dots and then pressed onto the core sheet. However, the amount of adhesive applied needs to be precisely controlled to prevent overflow onto the outside of the core groove 901. If overflow occurs, the adhesive can be removed by plasma cleaning. Optionally, during the mounting process, pressure and heat are applied to ensure that the magnetic core 1001 is tightly adhered to the bottom of the magnetic core groove 901 via the adhesive film 1005, thereby improving the bonding strength and reducing the warpage of the magnetic core 1001. Optionally, depending on the depth of the magnetic core groove 901 and the thickness of the magnetic core 1001 and the adhesive film 1005, multiple layers of magnetic core 1001 and adhesive film 1005 can be sequentially mounted using the above method. Multiple magnetic cores are beneficial for improving the performance of the inductor. In the above process, through structural design, material selection, laser cutting, and optimization of the magnetic core mounting process, it should be ensured that the difference between the total height of a single or multiple layers of magnetic core 1001 and the depth of the magnetic core groove 901 after mounting is less than ±10μm, the length and width dimensions of the magnetic core 1001 are 5-60μm smaller than the length and width of the magnetic core groove 901, and the overall warpage of the magnetic core 1001 is less than ±20μm.

[0050] S14, Backside organic layer filling. For example... Figure 15 As shown, a photosensitive organic adhesive film 1101 is pressed onto the back side using vacuum lamination technology to fill the gap between the magnetic core sheet 1001 and the magnetic core groove 901. Organic interconnect holes 1102 are then fabricated on the photosensitive organic adhesive film 1101 using photolithography.

[0051] S15, Etching of the back insulating layer. For example... Figure 16 As shown. Plasma etching is used to remove the back insulating layer 902 at the bottom of the organic interconnect 1102 to expose the copper material in the interconnect silicon via 104 and the copper winding via 203.

[0052] S16, Backside organic wiring and copper winding fabrication. For example... Figure 17 As shown, a semi-additive wiring process is used to fabricate the back interconnect wiring 1201 and the back copper winding 1202. The back interconnect wiring 1201 enables external electrical interconnection between the interconnect silicon via 104 and the copper winding via 203, or between the two. The back copper winding 1202 forms an electrical interconnection with the copper winding via 203, and together with the front copper winding 401, they form a winding solenoid coil penetrating the silicon substrate. Its structure includes, but is not limited to, rectangular, circular, and elongated shapes. Optionally, if the required thickness of the back interconnect wiring 1201 and the back copper winding 1202 is the same, it can be fabricated in one semi-additive wiring process; if the thicknesses are different, it can be fabricated in two separate processes, which can meet the requirements of a large-thickness back copper winding 1202, and is beneficial for reducing the DC resistance of the inductor and increasing the inductance value.

[0053] S17, Fabrication of back-side multilayer wiring and external interconnection structure. For example... Figure 18 As shown. Similar to S5-S7, a multilayer back-side interconnect wiring 1201 and a back-side organic layer 1301 are fabricated, followed by the fabrication of a back-side external interconnect structure 1302. Optionally, if only one layer of back-side interconnect wiring 1201 needs to be fabricated, and the back-side external interconnect structure 1302 is not located on the back-side copper winding 1202, and the back-side copper winding 1202 does not form electrical interconnections with other structures in subsequent applications, then the back-side organic layer 1301 may not be fabricated. Furthermore, to reduce oxidation of the back-side copper winding 1202, its surface can be electroless plated with nickel or gold. This exposed back-side copper winding 1202 is beneficial for heat dissipation of the inductor.

[0054] S18, Backside debonding, cleaning, and scrubbing. (Example) Figure 19 As shown. Subsequently, the wafer is debonded to remove the temporary bonding adhesive 801 and the temporary bonding substrate 802, and the wafer is cleaned and diced to obtain a single adapter board integrating a three-dimensional magnetic core inductor.

[0055] The silicon adapter board and its integrated three-dimensional magnetic core inductor proposed in this invention achieve high inductance, high quality factor, and high integration density inductors by using a three-dimensional winding and magnetic core with a large diameter coil and conductor cross-sectional area, all integrated within the adapter board. The adapter board surface also features high-density interconnect wiring and organic wiring oriented towards inductor integration, balancing the needs of high-density interconnection for chip integration, low-resistance interconnection for integrated inductors, and high-inductance-density magnetic core inductor integration. The integration of high-performance inductors into the silicon adapter board facilitates voltage regulation functions on the board, further reducing the overall power consumption of the integrated chip and minimizing product size.

[0056] Example 1: The adapter board with the integrated inductor proposed in this invention can be used in silicon-based voltage regulator components. For example... Figure 20 As shown, the power management chip 1401 and passive components 1402 (including resistors, capacitors, etc.) can be connected to the external interconnect structure 701 on the adapter board using techniques such as flip-chip bonding, surface mounting, and wire bonding. The silicon-based voltage regulator is then interconnected with a three-dimensional magnetic core inductor via multilayer wiring on the front side of the adapter board. Conversely, the silicon-based voltage regulator can be connected to the packaging substrate / PCB 1403 via interconnecting silicon vias 104 within the adapter board and the multilayer wiring and external interconnect structure 701 on the back side of the adapter board, forming the external interconnect of the silicon-based voltage regulator. This silicon-based voltage regulator has an extremely small size, making it suitable for integration into chip or package structures for high-efficiency voltage regulation close to the load.

[0057] Example 2: The adapter board proposed in this invention can directly integrate the 1401 power management chip, the 1402 passive device, and multiple functional chips 1501. For example... Figure 21 As shown. Multiple functional chips 1501 include, but are not limited to, processing chips, memory chips, RF chips, and optoelectronic chips. On one hand, the integration of inductors with the chips allows for direct local filtering, coordination, and stable DC output of the chip circuitry, eliminating the need for additional inductors soldered onto the adapter board. On the other hand, by combining with the power management chip 1401 and passive components 1402 to form a voltage regulator integrated on the adapter board, voltage regulation of the functional chip 1501 can be directly performed, achieving chip-level dynamic voltage management and reducing the overall power consumption of the integrated chip.

[0058] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A method for fabricating a silicon adapter plate integrating a three-dimensional magnetic core inductor, characterized in that, Includes the following steps: Interconnecting silicon vias (104) and copper winding vias (203) are formed in the silicon wafer (101). A front damascus wiring insulation layer (301) and front damascus wiring (302) are laid on the front side of the silicon wafer (101). After removing the wiring in the inductor area, a front copper winding (401) is laid. The front copper winding (401) is electrically connected to the copper winding via (203). An organic filler layer (501) is pressed onto the front copper winding (401) and the front damascus wiring (302), and organic interconnect vias (502) are formed. An organic wiring (601) is laid on the front organic filler layer (501), and the organic wiring (601) is electrically connected to the front copper winding (401) and the front damascus wiring (302) respectively. After laying the front external interconnect structure (701) on the organic wiring (601), the front side of the silicon wafer (101) is bonded to the temporary bonding substrate (802). The back side of the silicon wafer (101) is thinned and then etched to form a magnetic core groove (901). A back insulating layer (902) is deposited on the back side of the silicon wafer (101) and the sidewall of the magnetic core groove (901). The magnetic core (1001) is embedded in the magnetic core groove (901). A photosensitive organic adhesive film (1101) is pressed onto the magnetic core groove (901) and an organic interconnect hole (1102) is formed by photolithography. The back insulating layer (902) at the bottom of the organic interconnect hole (1102) is removed. A back copper winding (1202) and a back interconnect wiring (1201) are arranged on the photosensitive organic adhesive film (1101). The back copper winding (1202) is electrically connected to the copper winding through hole (203). The front copper winding (401), the copper winding through hole (203) and the back copper winding (1202) together form a three-dimensional winding surrounding the magnetic core (1001). A back organic layer (1301) is laid on the back copper winding (1202) and the back interconnect wiring (1201). A back external interconnect structure (1302) is laid on the back organic layer (1301). After debonding, cleaning and dicing, a silicon adapter board is obtained.

2. The method for fabricating the silicon adapter plate of the integrated three-dimensional magnetic core inductor according to claim 1, characterized in that, The formation of interconnect silicon vias (104) and copper winding vias (203) within the silicon wafer (101) specifically includes: Silicon blind vias (102) are etched on a silicon wafer (101). A through-silicon via insulating layer (103) is prepared on the surface of the silicon wafer (101) and the sidewalls and bottom of the silicon blind vias (102). A barrier layer and a copper electroplating seed layer are prepared sequentially on the through-silicon via insulating layer (103). Copper material is filled into the silicon blind vias (102) to form interconnect through-silicon vias (104). The surface of the filled silicon wafer (101) is chemically polished and cleaned to remove impurities on the front side of the silicon wafer (101). Copper winding blind vias (201) are etched on a silicon wafer (101). Copper winding through-hole insulation layers (202) are prepared on the surface of the silicon wafer (101) and the sidewalls and bottom of the copper winding blind vias (201). A barrier layer and a copper electroplating seed layer are prepared on the surface of the copper winding through-hole insulation layer (202), and copper filling material is electroplated to form copper winding through-holes (203). The diameter of the interconnect silicon via (104) is smaller than the diameter of the copper winding via (203). The interconnect silicon via (104) and the copper winding via (203) are prepared in steps. When the difference between the diameter of the interconnect silicon via (104) and the diameter of the copper winding via (203) is 0 to 5 μm, the two types of vias are simultaneously etched and simultaneously electroplated to fill.

3. The method for fabricating the silicon adapter plate of the integrated three-dimensional magnetic core inductor according to claim 1, characterized in that, The aforementioned arrangement of front-side damascus wiring (302) on the front side of the silicon wafer (101) specifically includes: The front damascus wiring insulation layer (301) and the front damascus wiring (302) are prepared using the damascus process. The wiring area of ​​the front damascus wiring (302) avoids the layout area of ​​the three-dimensional magnetic core inductor.

4. The method for fabricating the silicon adapter plate of the integrated three-dimensional magnetic core inductor according to claim 3, characterized in that, The process of laying the front copper winding (401) after removing the wiring in the inductor area is as follows: Plasma etching or chemical etching is used to remove the front damascus wiring insulation layer (301) of the inductor area, fully exposing the upper end of the copper winding through hole (203); the front copper winding (401) is prepared by a semi-additive method, and a buffer gap (402) is formed between the front copper winding (401) and the front damascus wiring insulation layer (301).

5. The method for fabricating a silicon adapter plate for an integrated three-dimensional magnetic core inductor according to claim 1, characterized in that, Specifically, the process of pressing a front-side filler organic layer (501) onto the front-side copper winding (401) and the front-side damascus wiring (302) and forming organic interconnect holes (502) involves: A front-side filled organic layer (501) is prepared using photolithography and photosensitive photoresist. The front-side filled organic layer (501) fills the gaps around the front-side copper winding (401) and the front-side damascus wiring (302). Organic interconnect holes (502) are formed in the front-side filled organic layer (501) using photolithography.

6. The method for fabricating a silicon adapter plate for an integrated three-dimensional magnetic core inductor according to claim 1, characterized in that, The bonding of the front side of the silicon wafer (101) to the temporary bonding substrate (802) specifically involves: Temporary bonding adhesive (801) is coated on both the front side of the silicon wafer (101) and the temporary bonding substrate (802), and then baked after bonding to eliminate air bubbles.

7. The method for fabricating a silicon adapter plate for an integrated three-dimensional magnetic core inductor according to claim 1, characterized in that, The process of thinning the back side of the silicon wafer (101) and then etching to form a magnetic core groove (901), and depositing a back insulating layer (902) on the back side of the silicon wafer (101) and the sidewall of the magnetic core groove (901), specifically involves: The back side of the silicon wafer (101) is thinned sequentially by mechanical thinning and plasma etching until the silicon through-hole insulating layer (103) and the copper winding through-hole insulating layer (202) are exposed; a magnetic core groove (901) is formed in the area surrounded by the copper winding through-hole (203) by photolithography combined with plasma etching. A back insulating layer (902) is deposited on the back side of the silicon wafer (101) and the sidewall of the magnetic core groove (901) using atomic layer deposition and chemical vapor deposition methods.

8. The method for fabricating a silicon adapter plate for an integrated three-dimensional magnetic core inductor according to claim 1, characterized in that, The process of embedding the magnetic core sheet (1001) into the magnetic core groove (901) specifically involves: A magnetic core adhesive film (1002) is attached to one side of a magnetic core sheet (1001). The magnetic core adhesive film (1002) includes a support film (1004) and an adhesive film (1005). The magnetic core sheet (1001) and the adhesive film (1005) are cut using a low-thermal-effect laser, while retaining the support film (1004). The magnetic core sheet (1001) carrying the adhesive film (1005) is removed from the support film (1004), and the side carrying the adhesive film (1005) is attached to the magnetic core groove (901). Multiple layers of magnetic core sheets (1001) and adhesive film (1005) are sequentially attached inside the magnetic core groove (901). The difference between the total height of the multiple layers of magnetic core sheets (1001) and the depth of the magnetic core groove (901) is less than ±10μm. The length and width of the magnetic core sheet (1001) are 5-60μm smaller than the length and width of the magnetic core groove (901). The warpage of the magnetic core sheet (1001) is less than ±20μm.

9. The method for fabricating a silicon adapter plate for an integrated three-dimensional magnetic core inductor according to claim 1, characterized in that, The specific steps of arranging the back copper winding (1202) and the back interconnect wiring (1201) on the photosensitive organic adhesive film (1101) are as follows: The back copper winding (1202) and the back interconnect wiring (1201) are prepared by a semi-additive wiring process. When the required thickness of the back interconnect wiring (1201) and the back copper winding (1202) is the same, they are prepared simultaneously by a single semi-additive wiring process. When the required thicknesses of the two are different, they are prepared in two separate processes.

10. A silicon adapter board integrating a three-dimensional magnetic core inductor, characterized in that, It includes a silicon layer (1) as a substrate, a silicon interconnect via (104) that penetrates the silicon layer (1) to achieve conductive connection between the front and back sides, a three-dimensional magnetic core inductor embedded in the silicon layer (1), a multilayer damask wiring (4) disposed on the front side of the silicon layer (1), multilayer organic wiring (2) disposed on the front and back sides of the silicon layer (1) respectively, and an external interconnect structure (701) formed on the surface of the multilayer organic wiring (2). The three-dimensional magnetic core inductor consists of an inductor core (5) and an inductor winding (3) that penetrates the silicon layer (1) and surrounds the inductor core (5); the multilayer damask wiring (4) is laid out in an area that avoids the three-dimensional magnetic core inductor and is used for electrical interconnection; the multilayer organic wiring (2) realizes the electrical connection between the inductor winding (3), the multilayer damask wiring (4), and the external interconnection structure (701); the external interconnection structure (701) is used for the adapter board to connect to the outside.

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