Electronic device

Abstract

An electronic device is provided. The electronic device includes a standoff structure, a first component, a second component, and an insert. The standoff structure defines a space. The first component is disposed within the space. The second component is disposed above the standoff structure. The insert is disposed between the second component and the standoff structure.

Description

Technical Field

[0001] This disclosure relates to an electronic device. Background Technology

[0002] Power management integrated circuits (PMICs) fully utilize system-in-package (SiP) technology, including double-sided molding and 2.5D / 3D ICs, to integrate multiple chips or components into a single package. However, to provide different types of power control and meet the demands of high-speed data communication, bulky passive components may be required. This can increase package size and potentially reduce layout design flexibility. Summary of the Invention

[0003] In some arrangements, an electronic device includes a support structure, a first component, a second component, and an insert. The support structure defines a space. The first component is disposed within the space. The second component is disposed above the support structure. The insert is disposed between the second component and the support structure.

[0004] In some arrangements, an electronic device includes a first electronic component, a first carrier, a second carrier, a second electronic component, and a first connector. The first electronic component is disposed above the first carrier. The second carrier is disposed below the first carrier. The second electronic component is disposed above the second carrier and configured to receive regulated power from the first electronic component. The first connector is configured to receive signals from an external device. The first connector is vertically spaced from the second carrier and laterally spaced from the first carrier.

[0005] In some arrangements, an electronic device includes a first electronic component, a second electronic component, a third electronic component, a first carrier, a second carrier, and a module. The first electronic component is disposed above the first carrier. The second carrier is disposed below the first carrier. The second electronic component is disposed above the second carrier and configured to receive regulated power from the first electronic component. The third electronic component is disposed above the second carrier. The module covers the third electronic component and is electrically connected between the second carrier and an external device. Attached Figure Description

[0006] Various aspects of the arrangements of this disclosure will be best understood from the following detailed description when read in conjunction with the accompanying drawings. It should be noted that the various structures may not be drawn to scale, and the dimensions of the various structures may be arbitrarily increased or decreased for clarity of explanation.

[0007] Figure 1A perspective view illustrating some arrangements of electronic devices according to this disclosure.

[0008] Figure 2A Description of some arrangements according to this disclosure Figure 1 The cross-sectional view of line A-A' of the electronic device shown.

[0009] Figure 2B Description of some arrangements according to this disclosure Figure 1 A cross-sectional view of line B-B' of the electronic device shown.

[0010] Figure 2C Description of some arrangements according to this disclosure Figure 1 The cross-sectional view of line C-C' of the electronic device shown.

[0011] Figure 3A Description of some arrangements according to this disclosure, such as Figure 1 A 3D view of the signal transmission module shown.

[0012] Figure 3B An exploded view illustrating some of the signal transmission modules arranged according to this disclosure.

[0013] Figure 4 A cross-sectional view illustrating some arrangements of an electronic device according to this disclosure.

[0014] Figure 5 A cross-sectional view illustrating some arrangements of an electronic device according to this disclosure.

[0015] Figure 6 A cross-sectional view illustrating some arrangements of an electronic device according to this disclosure.

[0016] Figure 7 A cross-sectional view illustrating some arrangements of an electronic device according to this disclosure.

[0017] Figure 8 A cross-sectional view illustrating some arrangements of an electronic device according to this disclosure. Detailed Implementation

[0018] The following disclosure provides numerous different arrangements or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, the formation of a first feature above or on a second feature may include arrangements where the first and second features are formed or disposed in direct contact, and may also include arrangements where additional features may be formed or disposed between the first and second features such that the first and second features may not be in direct contact. Furthermore, reference numerals and / or letters may be repeated in various instances of this disclosure. Such repetition is for the purpose of simplicity and clarity and does not, in itself, prescribe a relationship between the various arrangements and / or configurations discussed.

[0019] Unless otherwise specified, spatial descriptions such as “up,” “down,” “above,” “left,” “right,” “downward,” “top,” “bottom,” “vertical,” “horizontal,” “side,” “above,” “lower,” “upper,” “above,” and “below” are relative to the orientation shown in the drawings. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and actual embodiments of the structures described herein may be arranged in any spatial orientation or manner, provided that the advantages of the arrangement of this disclosure are not compromised by such arrangement.

[0020] Figure 1 and 2A -2C describes an electronic device 1a according to some arrangements of this disclosure. In some arrangements, the electronic device 1a may include carriers 11 and 12, electronic components 20, 32 and 34, circuit structure 40, heat dissipation structure 50, and signal transmitting module 60.

[0021] like Figure 1 and 2AAs shown, each of carriers 11 and 12 can be formed as a printed circuit board (PCB), a flexible printed circuit board (FPCB), a lead frame, a combination thereof, or other suitable circuit structure. Carriers 11 and 12 may be at different levels (or elevations) or heights along the Z-direction. Each of carriers 11 and 12 may comprise a plurality of metal layers separated from each other by dielectric material layers and interconnected by conductive vias. In some embodiments, each of carriers 11 and 12 may be formed of epoxy resin, glass fiber reinforced epoxy resin, epoxy resin with inorganic fillers, ceramic materials, or polymeric materials such as polyimide. Carrier 11 may have a surface 11s1 (or a lower surface) and a surface 11s2 (or an upper surface) opposite to surface 11s1. Carrier 12 may have a surface 12s1 (or a lower surface) and a surface 12s2 (or an upper surface) opposite to surface 12s1. Carrier 11 may be disposed above surface 12s2 of carrier 12. In some arrangements, carrier 11 may have a smaller dimension than carrier 12 (e.g., surface area along the XY plane). In some arrangements, a portion of the surface 12s2 of carrier 12 may be exposed through carrier 11.

[0022] Electronic component 20 may be disposed on or above surface 11s2 of carrier 11. In some arrangements, electronic component 20 may act as a first stage power module (or first power conversion stage, converter, or electrical converter). In some arrangements, electronic component 20 may be configured to convert a higher voltage (e.g., 48 V) to a lower voltage (e.g., 12 V). For example, electronic component 20 may be configured to receive a higher voltage from circuit structure 40 and transfer a lower voltage to electronic component 32 (or electronic component 34). In some arrangements, electronic component 20 may include at least one power module (or converter) comprising transistors, diodes, capacitors, inductors, and / or other suitable components. For example, electronic component 20 may include a circuit structure formed as a PCB, FPCB, or other suitable circuit structure. Active components (e.g., converters, controllers, and / or drivers) and passive components (e.g., capacitors and / or inductors) may be disposed on the circuit structure.

[0023] Electronic components 32 and 34 may be disposed on or above surface 12s2 of carrier 12. Each of electronic components 32 and 34 may act as a second-stage power module (or second-power conversion stage) or converter or electrical converter. In some arrangements, each of electronic components 32 and 34 may be configured to convert a higher voltage (e.g., 12 V) to a lower voltage (e.g., 8 V, 6 V, 4 V, 2 V or lower). In some arrangements, electronic components 32 and 34 may have different thicknesses along the Z-direction. Electronic components 32 and 34 may be electrically connected to carrier 11. Electronic components 32 and 34 may be electrically connected to carrier 12. Electronic components 32 and 34 may individually include a circuit structure (e.g., PCB) and multiple elements located on the circuit structure. For example, electronic components 32 and 34 may include transistors, controllers, and passive components. It should be noted that electronic device 1a may include more components between carriers 11 and 12. In some arrangements, each of the electronic components 32 and 34 may also be referred to as a voltage regulator or power block.

[0024] In some arrangements, electronic component 32 may be partially disposed within an opening 11o defined by carrier 11. In some arrangements, a portion of electronic component 32 may protrude from surface 11s2 of carrier 11. In some arrangements, the thickness of electronic component 32 (e.g., length along the Z direction) may be greater than the thickness of electronic component 20. Electronic component 34 may be disposed within the space defined by carriers 11 and 12. In some arrangements, electronic component 34 may have a thickness (e.g., length along the Z direction) less than the thickness of electronic component 20. In some arrangements, the thickness of electronic component 32 may be greater than or equal to 7 mm, such as 7 mm, 8 mm, 9 mm, 10 mm, or greater. In some arrangements, the thickness of electronic component 20 may be in the range between 3 mm and 7 mm, such as 3 mm, 4 mm, 5 mm, 6 mm, or 7 mm. The thickness of electronic component 34 may be in the range between about 1 mm and 5 mm, such as 1 mm, 2 mm, 3 mm, 4 mm, or 5 mm.

[0025] In some arrangements, the circuit structure 40 (or power delivery board) may be disposed on or above the surface 11s2 of the carrier 11. In some arrangements, the circuit structure 40 may be configured to provide a relatively large power (e.g., 48 V) to the electronic component 20. In some arrangements, the circuit structure 40 may be configured to transmit signals (e.g., non-power signals or data signals) to the carrier 12. In some arrangements, the circuit structure 40 may comprise a PCB, FPCB, or other suitable circuit structure. One or more electronic components (not shown) may be disposed on or above the circuit structure 40. For example, electronic device 1a may comprise a power management integrated circuit (PMIC) die on or within the circuit structure 40. In this disclosure, the circuit structure 40 may also be referred to as an external device.

[0026] In some arrangements, a heat dissipation structure 50 may be disposed between the electronic component 20 and the circuit structure 40. In some arrangements, the heat dissipation structure 50 may be thermally coupled to the electronic component 20. For example, the heat dissipation structure 50 may be configured to transfer heat from the electronic component 20. In some arrangements, the heat dissipation structure 50 may be thermally coupled to the circuit structure 40. For example, the heat dissipation structure 50 may be configured to transfer heat from the circuit structure 40. In some arrangements, the heat dissipation structure 50 may be in contact with the electronic component 20. In some arrangements, the heat dissipation structure 50 may be spaced from the electronic component 20 by a thermal interface material (TIM) or adhesive. The heat dissipation structure 50 may include a cold plate, which may include a vapor chamber, heat pipes, and / or other suitable elements. The heat dissipation structure 50 may include a thermally conductive material, such as aluminum (Al), copper (Cu), chromium (Cr), tin (Sn), gold (Au), silver (Ag), nickel (Ni), or stainless steel, or mixtures, alloys, or other combinations thereof.

[0027] In some arrangements, the electronic device 1a may include a block 52. The block 52 may be disposed on or above the surface 11s2 of the carrier 11. In some arrangements, the block 52 may act as a spacer configured to adjust the distance between the heat dissipation structure 50 and the carrier 11. In some arrangements, the block 52 may be configured to be thermally coupled to the electronic component 20. The block 52 may contain a thermally conductive material, such as aluminum (Al), copper (Cu), chromium (Cr), tin (Sn), gold (Au), silver (Ag), nickel (Ni), or stainless steel, or mixtures, alloys, or other combinations thereof.

[0028] In some arrangements, electronic device 1a may include an interconnect 54. In some arrangements, the interconnect 54 may be disposed on or above surface 12s2 of carrier 12. The interconnect 54 may be disposed in a peripheral region of carrier 12. For example, the interconnect 54 may surround electronic components 32 and 34. The interconnect 54 may be disposed between carriers 11 and 12. In some arrangements, the interconnect 54 may be configured to support carrier 11. In some arrangements, the interconnect 54 may electrically connect carriers 11 and 12. In some arrangements, the interconnect 54 may be configured to transmit power and / or signals. In some arrangements, the interconnect 54 may include a pogo pin, conductive post, or other suitable conductive element. In other arrangements, the interconnect 54 may be replaced by an interposer, which may include a substrate (e.g., a silicon substrate or other substrate) and conductive elements within the substrate (e.g., through-silicon vias, TSVs)). In other arrangements, interconnect 54 can be replaced with other conductive components, such as solder material.

[0029] like Figure 1 and 2B As shown, electronic device 1a may include a connector 56 and a conductive element 58. In some arrangements, connector 56 may be disposed on or above surface 11s2 of carrier 11. In some arrangements, connector 56 may be configured to connect, retain, or accommodate conductive element 58. For example, connector 56 may define a recess for accommodating a portion of conductive element 58. Connector 56 may be female, and conductive element 58 may be male. In some arrangements, conductive element 58 may connect carrier 11 and circuit structure 40. Conductive element 58 may be disposed on or above surface 11s2 of carrier 11. In some arrangements, conductive element 58 may be configured to transmit power (or power signal) between electronic component 20 and circuit structure 40. For example, conductive element 58 may be configured to transmit a relatively large amount of power (e.g., 48 V) from circuit structure 40 to electronic component 20. In some arrangements, conductive element 58 may penetrate heat dissipation structure 50. In some arrangements, conductive element 58 may include a spring pin, conductive post, or other suitable conductive element. For example... Figure 2BAs shown, circuit structure 40 can be configured to provide an electrical path (or power path) for conducting power P1 (e.g., 48 V) to electronic component 20 via conductive element 58 and carrier 11. In some arrangements, carriers 11 and 12 and interconnect 54 can be configured to provide an electrical path (or power path) for conducting power P2 (e.g., 12 V) from electronic component 20 to electronic component 34. Similarly, electronic component 32 can be configured to receive power (e.g., 12 V) from electronic component 20 via carriers 11 and 12 and interconnect 54.

[0030] like Figure 1 and 2C As shown, the signal transmission module 60 (or module) may be disposed on or above the surface 12s2 of the carrier 12. In some arrangements, the signal transmission module 60 may be configured to receive and / or transmit signals (or non-electrical signals). For example, the signal transmission module 60 may be configured to receive and / or transmit signals between the carrier 12 and the circuit structure 40. In some arrangements, the signal transmission module 60 may be exposed through the carrier 11. In some arrangements, the signal transmission module 60 may not overlap vertically with the carrier 11 or may not overlap with the carrier 11 along the Z-direction. In some arrangements, the signal transmission module 60 may include a support structure 62, an insert 64, a connector 66, and a conductive element 68.

[0031] In some arrangements, the support structure 62 may be disposed above or attached to the surface 12s2 of the carrier 12. In some arrangements, the support structure 62 may be configured to transmit signals (or non-electrical signals). In some arrangements, the support structure 62 may be configured to support the insert 64 and the connector 66. In some arrangements, the support structure 62 may act as a spacer and be configured to separate the connector 66 from the carrier 12. The support structure 62 may have a support portion 62a and a plate 62b supported by the support portion 62a. The support structure 62 may have surfaces 62s1 and 62s2 on two opposite sides of the plate 62b. In some arrangements, the support structure 62 may be configured to define a space 62e extending between the surface 62s1 of the support structure 62 and the surface 12s2 of the carrier 12.

[0032] Please refer to Figure 3A and 3B The support structure 62 may include a lead frame, which may include a conductive pattern 62c and an insulating portion 62d that encapsulates or defines the conductive pattern 62c.

[0033] Insert 64 may be disposed on or above surface 62s2 of support structure 62. Insert 64 may be electrically connected between support structure 62 and connector 66. In some cases, the profile of conductive pattern 62c is designed to have a supporting function and cannot match the pattern of connector 66 (or conductive element 68), and insert 64 may act as a pattern-matching structure configured to match support structure 62 and connector 66 with different conductive patterns and pattern densities (or terminal densities). For example, insert 64 may be designed to have a more complex pattern than the pattern of support structure 62 (or connector 66). Insert 64 may have surface 64s1 (or lower surface) facing support structure 62 and surface 64s2 (or upper surface) facing connector 66. In some arrangements, the conductive pattern on surface 64s1 may have a different pattern density than the conductive pattern on surface 64s2. In some arrangements, insert 64 may include a PCB, FPCB or other suitable circuit structure.

[0034] Connector 66 may be disposed on or above surface 64s2 of insert 64. In some arrangements, connector 66 may be configured to connect, retain, or receive conductive element 68. For example, connector 66 may define a recess for receiving a portion of conductive element 68. In some arrangements, connector 66 may have a level (or height) between carriers 11 and 12. In some arrangements, connector 66 (or its upper or lower surface) may have a level (or height) greater than the level of surface 11s2 of carrier 11 relative to surface 12s2 of carrier 12. In some arrangements, connector 66 may have a level (or height) less than the level of connector 56 relative to surface 12s2 of carrier 12. An end (or upper surface) of electronic assembly 32 may extend beyond connector 66.

[0035] Please return to the reference. Figure 2C A conductive element 68 may be connected between the carrier 12 and the circuit structure 40. The conductive element 68 may be disposed on or above the surface 12s2 of the carrier 12. In some arrangements, the conductive element 68 may be configured to transmit signals between the carrier 12 and the circuit structure 40. In some arrangements, the conductive element 68 may penetrate the heat dissipation structure 50. In some arrangements, the conductive element 68 may comprise a spring pin, a conductive post, or other suitable conductive element. Figure 2C As shown, the signal transmission module 60 can be configured to provide an electrical path (or signal path) for transmitting the signal S1 from the circuit structure 40 to the carrier 12.

[0036] In some cases, if the length of the conductive element 68 exceeds a certain threshold, the conductive element may tilt. To address this issue, a support structure 62 can be used to adjust the height of the connector 66, which effectively shortens the length of the conductive element 68. Therefore, this adjustment enhances the overall robustness of the electronic device 1a, thereby minimizing the risk of the conductive element 68 collapsing.

[0037] Figure 4 A cross-sectional view of an electronic device 1b arranged according to some of the present disclosure is shown. Electronic device 1b is similar to electronic device 1a, except as follows.

[0038] In some arrangements, the electronic device 1b may include an electronic component 35. The electronic component 35 may be disposed on or above the surface 12s2 of the carrier 12. In some arrangements, the electronic component 35 may be disposed within the space 62e of the support structure 62. In some arrangements, the electronic component 35 may have a dimension smaller than that of the electronic component 32 (e.g., thickness along the Z direction). In some arrangements, the electronic component 35 may have a dimension smaller than that of the electronic component 32. Figure 2B The dimensions of electronic component 34 shown are (e.g., thickness along the Z direction). In some arrangements, electronic component 35 may vertically overlap with or be covered by signal transmission module 60. For example, electronic component 35 may vertically overlap with or be covered by support structure 62. Electronic component 35 may vertically overlap with or be covered by connector 66. In some arrangements, electronic component 35 may not vertically overlap with carrier 11. In some arrangements, electronic component 35 may be laterally spaced from electronic component 32 by support structure 62, or spaced from electronic component 32 along the XY plane by support structure 62. In some arrangements, electronic component 35 may include a power monitor configured to monitor regulated power from electronic component 20 or from electronic component 32 (or electronic component 34). In some arrangements, electronic component 35 may be configured to receive signals through support structure 62, insert 64, and connector 66. In some arrangements, electronic component 35 may include a voltage regulator or converter configured to convert a higher voltage (e.g., 12 V) to a lower voltage (e.g., 8 V, 6 V, 4 V, 2 V, or lower). In some arrangements, electronic component 35 may include components with other functions. For example, electronic component 35 may be configured to turn electronic component 32 (or electronic component 34) on or off. In some arrangements, electronic component 35 may include a passive device (e.g., a capacitor) configured to regulate the power from electronic components 20, 34, and / or 32.

[0039] In the comparative example, the power transfer converter and connector can be directly mounted on the carrier. In this configuration, certain components, such as the power module and / or switches, will occupy additional space on the carrier. In this arrangement, electronic component 35 is positioned within space 62e, which is designed to accommodate components with relatively small dimensions. Therefore, compared to the comparative example, electronic component 35 and connector 66 together occupy a smaller area of ​​carrier 12 (e.g., surface area along the XY plane).

[0040] Figure 5 The illustration shows a cross-sectional view of an electronic device 1c arranged according to some of the present disclosure. Electronic device 1c is similar to electronic device 1a, but differs as follows.

[0041] In some arrangements, the electronic device 1c may include an electronic component 36. The electronic component 36 may be disposed on or below the surface 62s1 of the support structure 62. In some arrangements, the electronic component 36 may be disposed within the space 62e of the support structure 62. In some arrangements, the electronic component 36 may be spaced apart from the carrier 12. In some arrangements, the electronic component 36 may have a function similar to or the same as that of the electronic component 35. For example, the electronic component 36 may include a power monitor, voltage regulator, controller, or other suitable component.

[0042] In some arrangements, electronic component 36 may be electrically connected to support structure 62 via insert 65. In some arrangements, insert 65 may act as a pattern-matching structure configured to match electronic component 36 and support structure 62 with different conductive patterns and pattern densities (or terminal densities). In some arrangements, insert 65 may comprise a PCB, FPCB, or other suitable circuit structure.

[0043] In this arrangement, electronic components 36 can be housed within space 62e without occupying additional area, thereby reducing the surface area of ​​carrier 12 (e.g., the surface area along the XY plane).

[0044] Figure 6 The illustration shows a cross-sectional view of an electronic device 1d arranged according to some of the present disclosure. Electronic device 1d is similar to electronic device 1a, except as follows.

[0045] In some arrangements, two or more components may be disposed within space 62e and vertically overlap each other. For example, electronic device 1d may include electronic components 35 and 36. Electronic component 35 may vertically overlap with electronic component 36. In this arrangement, electronic components 35 and 36 can be disposed within space 62e without occupying additional area, thereby reducing the surface area of ​​carrier 12 (e.g., the surface area along the XY plane).

[0046] Figure 7A cross-sectional view of an electronic device 1e arranged according to some of the present disclosure is shown. Electronic device 1e is similar to electronic device 1a, except as follows.

[0047] In some arrangements, the electronic device 1e may include a support structure 70 and an insert 72. In some arrangements, the support structure 70 may be attached to the surface 11s2 of the carrier 11. In some arrangements, the support structure 70 may have a... Figure 2C The support structure 62 shown in the diagram has the same or similar structure. In some arrangements, the support structure 70 may be configured to transmit power (or power signals). In some arrangements, the support structure 70 may be configured to support the connector 56 and the conductive element 58. In some arrangements, the support structure 70 may be configured to separate the connector 56 from the carrier 11. In some arrangements, the support structure 70 may be configured to define a space 70e.

[0048] Insert 72 may be electrically connected between connector 56 and support structure 70. In some arrangements, insert 72 may serve as a pattern-matching structure configured to match connector 56 and support structure 70 with different conductive patterns and pattern densities (or terminal densities). In some arrangements, insert 72 may comprise a PCB, FPCB, or other suitable circuit structure.

[0049] In some arrangements, electronic device 1e may include electronic component 38. In some arrangements, electronic component 38 may be disposed within space 70e. For example, electronic component 38 may include a power monitor, voltage regulator, controller, passive device (e.g., capacitor) or other suitable component. In such an arrangement, electronic component 38 can be disposed within space 70e without occupying additional area, thereby reducing the surface area of ​​carriers 11 and / or 12 (e.g., surface area along the XY plane).

[0050] Figure 8 The illustration shows a cross-sectional view of an electronic device 1f arranged according to some of the present disclosure. Electronic device 1f is similar to electronic device 1a, but differs as follows.

[0051] In some arrangements, the electronic device 1f may include a carrier 13. In some arrangements, the carrier 13 may be formed as a printed circuit board, a flexible printed circuit board, or other suitable circuit structure. The carrier 13 may include a plurality of metal layers separated from each other by dielectric material layers and interconnected by conductive vias. In some embodiments, the carrier 13 may be formed of epoxy resin, glass fiber reinforced epoxy resin, epoxy resin with inorganic fillers, ceramic materials, or polymeric materials such as polyimide. The carrier 13 may have a surface 13s1 (or a lower surface) and a surface 13s2 (or an upper surface) opposite to the surface 13s1. The surface 13s2 of the carrier 13 may face the surface 12s1 of the carrier 12.

[0052] In some arrangements, the electronic device 1f may include a passive component 74. The passive component 74 may be disposed on or above the surface 13s2 of the carrier 13. In some arrangements, the passive component 74 may be disposed between the carriers 12 and 13. The passive component 74 may be electrically connected to the carrier 13. In some arrangements, the passive component 74 may be configured to regulate the power flowing from the electronic component 32 (or electronic component 34) to the operating module 80 (or computing module). In some arrangements, the passive component 74 may include a capacitor. In some arrangements, the passive component 74 may include an input capacitor (Cin) through which power flows before being delivered to the electronic component 32 (or electronic component 34). In some arrangements, the passive component 74 may include an output capacitor (Cout) through which power flows after being transferred from the electronic component 32 (or electronic component 34).

[0053] Electronic device 1f may include electrical connector 75. Electrical connector 75 may be located between carriers 12 and 13. Electrical connector 75 may be or include electrical contacts, such as solder balls (e.g., controlled collapse chip connection (C4) bumps, ball grid array (BGA), grid array package (LGA)), conductive bumps, etc. Electrical connector 75 may contain an alloy of gold and tin solder or an alloy of silver and tin solder, or other suitable materials.

[0054] Electronic device 1f may include a carrier 14 (or substrate). In some arrangements, carrier 14 may be disposed on or below surface 13s1 of carrier 13. In some arrangements, carrier 14 may include a semiconductor substrate, such as silicon, germanium, and other group III-V and group IV materials. Carrier 14 may include metal lines and through-holes, including, but not limited to, through-silicon vias (TSVs) for interconnection. In some arrangements, carrier 14 may include a wafer, a plate, or other suitable form. Carrier 14 may have a surface 14s1 (or a lower surface) and a surface 14s2 (or an upper surface) opposite surface 14s1.

[0055] Carrier 14 can be electrically connected to carrier 13 via electrical connector 76. Carrier 14 can be configured to support operating module 80. In some arrangements, electrical connector 76 may contain resolderable material. Electrical connector 76 may be or contain electrical contacts, such as solder balls (e.g., controlled collapse chip connection (C4) bumps, ball grid array (BGA), grid array package (LGA)), conductive bumps, etc. Electrical connector 76 may contain an alloy of gold and tin solder or an alloy of silver and tin solder, or other suitable materials.

[0056] In some arrangements, the operating module 80 may be disposed on or below the surface 14s1 of the carrier 14. In some arrangements, the operating module 80 may be configured to generate non-electrical signals, such as analog signals, digital signals, clock signals, or other electrical signals. The operating module 80 may include electronic components 81 and 82. In some arrangements, electronic components 81 and 82 may be disposed on or below the surface 14s1 of the carrier 14. In some arrangements, electronic component 81 may include a processor or other suitable component. In some arrangements, electronic component 81 may include an active device, such as a central processing unit (CPU), microprocessor unit (MPU), graphics processing unit (GPU), microcontroller unit (MCU), radio frequency integrated circuit (RFIC), application-specific IC (ASIC), field-programmable gate array (FPGA), or another type of IC. In some arrangements, electronic component 82 may include a data storage unit or other suitable component. Electronic component 82 can be electrically connected to electronic component 81 via carrier 14. Electronic component 82 may be disposed on or below surface 14s1 of carrier 14. In some arrangements, electronic component 82 may be configured to store signals from electronic component 81 and / or other devices. In some arrangements, electronic component 82 may include a high-band memory (HBM) die, a dynamic random access memory (DRAM) die, a static random access memory (SRAM) die, or other suitable memory devices. In some arrangements, operating module 80 may additionally include other components, such as input / output dies, configured to receive regulated power from electronic component 32 (or electronic component 34) and / or transmit processed signals to other devices (not shown). Electronic components 81 and 82 can be electrically connected to carrier 14 via electrical connector 77. In some arrangements, electrical connector 77 may contain resolderable material. Electrical connector 77 may be or include electrical contacts, such as solder balls (e.g., controlled collapse chip connection (C4) bumps, ball grid array (BGA), grid array package (LGA)), conductive bumps, etc. Electrical connector 77 may contain an alloy of gold and tin solder or an alloy of silver and tin solder, or other suitable materials.In other arrangements, electronic components 81 and 82 may be electrically connected to the carrier 14 via a hybrid bonding technique involving bonding between metallic materials (e.g., copper-to-copper bonding) and bonding between dielectric materials (e.g., oxide-to-oxide bonding).

[0057] The operating module 80 can be configured to receive power P3a and P3b (or regulated power) from electronic components 32 and 34, respectively. In some arrangements, carrier 12 can be configured to provide an electrical path (or power path) for conducting power P3a and P3b. In some arrangements, carrier 13 can be configured to provide an electrical path (or power path) for conducting power P3a and P3b. In some arrangements, carrier 14 can be configured to provide an electrical path (or power path) for conducting power P3a and P3b. In some arrangements, electronic components 32 and 34 can provide operating module 80 with different power levels (e.g., 8 V, 6 V, 4 V, 2 V, or less). For example, power P3a can be different from power P3b.

[0058] As used herein, unless the context clearly indicates otherwise, the singular terms “a / an” and “the” may include multiple indicators.

[0059] As used herein, the terms “conductive,” “electrically conductive,” and “conductivity” refer to the ability to conduct electric current. Conductive materials are generally those that exhibit little or no resistance to the flow of electric current. One measure of conductivity is Siemens per meter (S / m). Typically, conductive materials are those with a conductivity greater than about 10. 4 S / m (e.g., at least 10) 5 S / m or at least 10 6 A material with conductivity of S / m. The conductivity of the material may sometimes change with temperature. Unless otherwise specified, the conductivity of the material is measured at room temperature.

[0060] As used herein, the terms “approximately,” “substantially,” “basically,” and “about” are used to describe and consider minor variations. When used in conjunction with an event or situation, the terms may refer to instances where the event or situation occurred exactly or very approximately. For example, when used in conjunction with numerical values, the terms may refer to a range of variation less than or equal to ±10% of the numerical value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, if the difference between two values ​​is less than or equal to ±10% of the average of the values, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the two values ​​may be considered “substantially” the same or equal. For example, "essentially parallel" can refer to an angular variation of less than or equal to ±10° relative to 0°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°. Similarly, "essentially perpendicular" can refer to an angular variation of less than or equal to ±10° relative to 90°, such as less than or equal to ±5°, less than or equal to ±4°, less than or equal to ±3°, less than or equal to ±2°, less than or equal to ±1°, less than or equal to ±0.5°, less than or equal to ±0.1°, or less than or equal to ±0.05°.

[0061] In addition, quantities, ratios, and other numerical values ​​are sometimes presented in range format in this document. It should be understood that such range format is used for convenience and brevity, and should be flexibly interpreted to include not only the numerical values ​​explicitly specified as range limits, but also all individual numerical values ​​or subranges covered within the range, as if each numerical value and subrange were explicitly specified.

[0062] Although this disclosure has been described and illustrated with reference to specific arrangements, such descriptions and illustrations are not limiting of this disclosure. Those skilled in the art will understand that various changes and equivalents may be made without departing from the true spirit and scope of this disclosure as defined by the appended claims. The drawings may not be drawn to scale. Due to manufacturing processes and tolerances, there may be differences between the process reproduction in this disclosure and actual equipment. Other arrangements not specifically described may exist in this disclosure. The description and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are intended to fall within the scope of the appended claims. Although the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless specifically indicated herein, the order and grouping of the operations are not a limitation of this disclosure.

Claims

1. An electronic device comprising: Support structure, which defines the space; A first component, which is disposed within the space; The second component is disposed above the support structure; as well as An insert is disposed between the second component and the support structure.

2. The electronic device of claim 1, wherein the support structure is electrically connected to the second component via the insert.

3. The electronic device of claim 1, wherein the insert has a first pattern on a first surface facing the support structure and a second pattern on a second surface facing the second component, and the pattern density of the first pattern is different from the pattern density of the second pattern.

4. The electronic device of claim 1, wherein the second component is configured to receive a signal.

5. The electronic device of claim 4, wherein the second component is configured to receive the signal transmitted along a direction from the second component toward the first component.

6. The electronic device of claim 5, wherein the first component is configured to receive the signal via the support structure, the insert, and the second component.

7. The electronic device of claim 1, wherein the second component includes a connector configured to receive a conductive element for transmitting signals.

8. The electronic device according to claim 1, further comprising: A first carrier has a first region supporting the first component and a second region different from the first region; as well as The second carrier is disposed above the second region of the first carrier.

9. The electronic device according to claim 8, further comprising: A voltage regulator is disposed above the first region of the first carrier, wherein the end of the voltage regulator extends upward and beyond the second carrier.

10. An electronic device comprising: A first electronic component is disposed above a first carrier; The second carrier is disposed below the first carrier; A second electronic component is disposed above the second carrier and configured to receive regulated power from the first electronic component; as well as The first connector is configured to receive signals from an external device. The first connector is vertically spaced from the second carrier and horizontally spaced from the first carrier.

11. The electronic device of claim 10, further comprising: The support structure is electrically connected between the second carrier and the first connector.

12. The electronic device of claim 11, further comprising: A power monitor is mounted above the second carrier and covered by the support structure.

13. The electronic device of claim 12, wherein the power monitor is spaced apart from the second electronic component by the support structure.

14. The electronic device of claim 10, further comprising: A second connector is disposed above the first carrier and configured to transmit power to the first electronic component.

15. The electronic device of claim 14, wherein the height of the first connector is less than the height of the second connector relative to the second carrier.

16. An electronic device comprising: A first electronic component is disposed above a first carrier; The second carrier is disposed below the first carrier; A second electronic component is disposed above the second carrier and configured to receive regulated power from the first electronic component; A third electronic component is disposed above the second carrier and electrically connected to the second carrier; as well as The module covers the third electronic component and is electrically connected between the second carrier and the external device.

17. The electronic device of claim 16, wherein the module is configured to transmit and receive signals between the external device and the second carrier.

18. The electronic device of claim 16, wherein the module includes a support structure attached to the second carrier and covering the third electronic component.

19. The electronic device of claim 18, wherein the module includes a first connector configured to receive a conductive element for transmitting signals.

20. The electronic device of claim 19, wherein the module includes a pattern-matching structure electrically connected between the support structure and the first connector.

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