Substrate structure and method of making the same

Abstract

A substrate structure and a method of fabricating the same are provided. The substrate structure includes a core layer, an insulating layer, and a through-conducting element. The core layer includes a first surface, a second surface, and a via. The first surface has a first corner at an intersection with the via. The second surface has a second corner at an intersection with the via. The core layer has a first Young's modulus. The insulating layer includes a first insulating portion and a second insulating portion separated from each other and located on the first corner and the second corner, respectively. The insulating layer has a second Young's modulus, and the second Young's modulus is less than the first Young's modulus. The through-conducting element is disposed on the insulating layer and within the via.

Description

Technical Field

[0001] This invention relates to a substrate structure and its manufacturing method. Background Technology

[0002] In the substrate manufacturing process, a substrate is typically used as the core, and conductive vias are formed to connect circuit layers on the opposite surface of the substrate. However, stress concentration often occurs during the formation of these components, which can significantly affect product reliability. Summary of the Invention

[0003] This invention provides a substrate structure and its manufacturing method, which can effectively improve product reliability.

[0004] A substrate structure of the present invention includes a core layer, an insulating layer, and a through-conductive element. The core layer includes a first surface, a second surface, and a through-hole. A first angle is formed at the junction of the first surface and the through-hole. A second angle is formed at the junction of the second surface and the through-hole. The material of the core layer has a first Young's coefficient. The insulating layer includes a first insulating portion and a second insulating portion separated and located at the first and second angles, respectively. The material of the insulating layer has a second Young's coefficient, and the second Young's coefficient is smaller than the first Young's coefficient. The through-conductive element is disposed on the insulating layer and within the through-hole.

[0005] A method for fabricating a substrate structure according to the present invention includes at least the following steps: Providing a core layer comprising a first surface and a second surface opposite to each other, and a through-hole extending from the first surface to the second surface, wherein the material of the core layer has a first Young's coefficient. Forming an insulating layer on the core layer, wherein a first insulating portion of the insulating layer extends from the first surface into the through-hole, and a second insulating portion of the insulating layer extends from the second surface into the through-hole, the material of the insulating layer having a second Young's coefficient, and the second Young's coefficient being smaller than the first Young's coefficient. Forming a conductive element penetrating the through-hole and the insulating layer.

[0006] Based on the above, the substrate structure of the present invention, through the design of the relative Young's coefficient between the core layer and the insulating layer, and by positioning the insulating layer at the corner of the core layer, can effectively alleviate the stress generated at the corner of the core layer during the manufacturing process, thereby effectively improving product reliability.

[0007] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0008] Figures 1A to 1E This is a cross-sectional schematic diagram of a method for manufacturing a substrate structure according to an embodiment of the present invention;

[0009] Figure 2 , Figure 3 This is a cross-sectional schematic diagram of a substrate structure according to some embodiments of the present invention. Detailed Implementation

[0010] In the following detailed description, exemplary embodiments disclosing specific details are set forth for illustrative purposes and not for limitation, to provide a thorough understanding of the various principles of the invention. However, it will be apparent to those skilled in the art that the invention can be practiced in other embodiments departing from the specific details disclosed herein, thanks to this disclosure. Furthermore, descriptions of well-known apparatus, methods, and materials may be omitted to avoid obscuring the description of the various principles of the invention.

[0011] The invention is described more fully with reference to the accompanying drawings of this embodiment. However, the invention may be embodied in various different forms and should not be limited to the embodiments described herein. The thickness, dimensions, or size of layers or regions in the drawings are enlarged for clarity. The same or similar reference numerals denote the same or similar elements, which will not be repeated in the following paragraphs.

[0012] The foregoing and other technical contents, features, and effects of the present invention will be clearly presented in the following detailed description of the various embodiments with reference to the accompanying drawings. The directional terms mentioned in the following embodiments, such as "up," "down," "top," "bottom," "left," and "right," are only for reference to the directions in the accompanying drawings. Therefore, the directional terms used are for illustrative purposes and not for limiting the present invention.

[0013] In this embodiment, the manufacturing process of the substrate structure may include the following steps. Please refer to... Figure 1A First, a core layer 110 is provided, wherein the core layer 110 has a first surface 111 and a second surface 112 opposite to each other (e.g., are...). Figure 1AThe core layer 110 comprises an upper and lower surface and a plurality of through-holes 113 (two through-holes 113 are schematically shown) extending from the first surface 111 to the second surface 112. In one embodiment, the core layer 110 is, for example, an insulating substrate. In one embodiment, the insulating substrate may be, for example, an inorganic substrate, and the material of the inorganic substrate may be, for example, glass or ceramic. That is, when the material of the core layer 110 is glass, the through-holes 113 may be glass vias (TGV), and when the material of the core layer 110 is ceramic, the through-holes 113 may be ceramic vias (TCV), but the invention is not limited thereto. In one embodiment, the surface roughness (e.g., Sa) of the first surface 111 and the second surface 112 is less than 15 nanometers or any other suitable value, where Sa is the extension of Ra (arithmetic mean height of a line) to the surface, which represents the difference in height at each point compared to the arithmetic mean of the surface in absolute value. This parameter is generally used to evaluate surface roughness. In one embodiment, the thickness 110T of the core layer 110 is, for example, between 50 micrometers and 1000 micrometers or any other suitable range. In one embodiment, the diameter 113D of the via 113 is, for example, between 10 micrometers and 200 micrometers or any other suitable range.

[0014] Please refer to Figure 1B A conformally formed promoting layer 120 is formed on the core layer 110, such that the first surface 111, the second surface 112, and the inner wall 113S of the through-hole 113 are all covered by the promoting layer 120. In other words, the first surface 111, the second surface 112, and the inner wall 113S of the through-hole 113 are not exposed. In one embodiment, the promoting layer 120 is made of, for example, an oxide or a nitride, wherein the oxide is, for example, titanium oxide (TiO2). X (such as titanium monoxide (TiO) or titanium dioxide (TiO2)), silicon dioxide (SiO) X (e.g., silicon dioxide (SiO2)) or aluminum oxide (Al2O3), while nitrides are, for example, silicon nitride (SiN). X (e.g., silicon nitride (Si3N4)). In this embodiment, the promoting layer 120 is a dense film layer with a thickness of 120T formed by atomic layer deposition (ALD), vapor deposition, or the like, for example, between 0.01 nanometers and 100 nanometers, thus increasing the adhesion between the core layer 110 and the film layers subsequently formed thereon.

[0015] Please refer to Figure 1CAn insulating layer 130 is formed on the core layer 110, wherein a first insulating portion 131 of the insulating layer 130 extends from a first surface 111 into a through hole 113, and a second insulating portion 132 of the insulating layer 130 extends from a second surface 112 into a through hole 113. Thus, the insulating layer 130 may include a first insulating portion 131 and a second insulating portion 132 separated and located at a first corner 113a and a second corner 113b of the through hole 113, respectively. Furthermore, the Young's coefficient of the insulating layer 130 is smaller than that of the core layer 110. Accordingly, the substrate structure of this embodiment (e.g., ...) Figure 1E The substrate structure 100 is designed with a relative Young's coefficient between the core layer 110 and the insulating layer 130, and the insulating layer 130 is positioned at the corner of the core layer 110. This effectively alleviates the stress generated at the corner of the core layer 110 during the manufacturing process (such as high-temperature processes), thereby effectively improving product reliability (such as performance and stability). For example, the first corner 113a is the junction of the first surface 111 and the via 113, and the second corner 113b is the junction of the second surface 112 and the via 113. When the core layer 110 is made of glass, without the insulating layer 130, it will be in direct contact with subsequent circuitry. Therefore, stress will concentrate at the edge of the via 113 (such as the turning point between the hole wall and the surface), which can easily cause cracks in the glass and adversely affect product reliability. In this embodiment, an insulating layer 130 with a low Young's coefficient is formed at the aforementioned location where stress is prone to concentrate, thereby reducing stress concentration at the edge of the via 113. Furthermore, in this embodiment, the first insulating portion 131 and the second insulating portion 132 do not directly contact each other within the through hole 113. They form a gap 130G together when the insulating layer 130 is formed. In this way, the material of the insulating layer 130 is not limited by the predicament that some material cannot effectively fill the inner wall 113S when the aspect ratio is high. Therefore, the difficulty of the process can be greatly reduced and the flexibility of material selection can be improved. Furthermore, in this embodiment, the gap 130G is formed by the promoting layer 120, the first insulating portion 131, and the second insulating portion 132 together. Therefore, part of the surface of the promoting layer 120 is exposed by the first insulating portion 131 and the second insulating portion 132.

[0016] In one embodiment, the insulating layer 130 can be formed by a suitable process (such as sputtering) different from that of the promoting layer 120, and the material of the insulating layer 130 is different from that of the promoting layer 120. For example, the material of the insulating layer 130 includes organic materials, inorganic materials, or combinations thereof, such as photosensitive imaging dielectric materials (PID) or the like. In one embodiment, the Young's coefficient of the promoting layer 120 is greater than that of the insulating layer 130. In one embodiment, the thickness 130T of the insulating layer 130 is greater than the thickness 120T of the promoting layer 120. The thickness 130T of the insulating layer 130 is, for example, between 0.1 micrometers and 20 micrometers, but the invention is not limited thereto; the thickness 130T of the insulating layer 130 can also be equal to the thickness 120T of the promoting layer 120.

[0017] Please refer to Figure 1D and Figure 1E A through-hole 113 is formed by forming a conductive element 140 on the insulating layer 130, thus allowing the conductive element 140 to directly contact the promoting layer 120. The conductive element 140 may include a metal layer 141 and a conductive layer 142, and can be manufactured as described below. Further, as... Figure 1D As shown, the metal layer 141 can be filled into the gap 130G between the first insulating portion 131 and the second insulating portion 132 by a sputtering process. Thus, the metal layer 141 has a first metal portion 141a and a second metal portion 141b within the through-hole 113. The width of the first metal portion 141a is different from the width of the second metal portion 141b, for example, the width of the second metal portion 141b is greater than the width of the first metal portion 141a. In one embodiment, the metal layer 141 can be called a seed layer to improve the adhesion between the conductive layer 142 and other film layers. In one embodiment, the material of the metal layer 141 includes a titanium-copper alloy, electroless metal plating, or a combination thereof, wherein the electroless metal plating can be formed by an electroless plating process, and its material includes nickel-phosphorus, copper, silver, or a combination of the above materials. In one embodiment, the thickness of the metal layer 141 is, for example, less than 1 micrometer. Next, as... Figure 1E As shown, a conductive layer 142 is formed on the metal layer 141 and fills the via 113. A patterning process is then performed to remove portions of the metal layer 141 and the conductive layer 142. The metal layer 141 and the conductive layer 142 can be considered together as penetrating the conductive element 140. In this embodiment, the conductive layer 142 completely fills the via 113, but the invention is not limited to this. In embodiments not shown, the conductive layer 142 does not completely fill the via 113. In one embodiment, the Young's coefficient of the conductive layer 142 is greater than that of the insulating layer 130. The substrate structure 100 of this embodiment is roughly completed through the above manufacturing process.

[0018] It must be noted that the following embodiments use the component references and some contents of the above embodiments, wherein the same or similar references are used to represent the same or similar components, and the description of the same technical content is omitted. For the description of the omitted parts, please refer to the foregoing embodiments. The following embodiments will not repeat the description.

[0019] Please refer to Figure 2 Similar to Figure 1E The difference lies in that, in the substrate structure 100A of this embodiment, after forming the through conductive element 140, at least one augmentation structure (schematically showing a first augmentation structure 150a and a second augmentation structure 150b) electrically connected to the through conductive element 140 is formed on at least one of the first surface 111 and the second surface 112 of the core layer 110 (schematically formed on the first surface 111 and the second surface 112, respectively). The first augmentation structure 150a includes at least one dielectric layer (schematically showing one dielectric layer 151a), at least one conductive blind via (schematically showing two conductive blind vias 152a), and at least one line (schematically showing two lines 153a). The dielectric layer 151a is located on the first insulating portion 131 of the insulating layer 130, the line 153a is located on the dielectric layer 151a, and the conductive blind via 152a is located within the dielectric layer 151a and electrically connects the line 153a to the through conductive element 140. Similarly, the add-on structure 150b includes at least one dielectric layer (schematically shown as one dielectric layer 151b), at least one conductive blind via (schematically shown as two conductive blind vias 152b), and at least one circuit (schematically shown as two circuits 153b). The dielectric layer 151b is located on the second insulating portion 132 of the insulating layer 130, the circuit 153b is located on the dielectric layer 151b, and the conductive blind via 152b is located within the dielectric layer 151b and electrically connects the circuit 153b to the through conductive element 140. Through the arrangement of the add-on structures 150a and 150b, a fan-out structure can be formed, thereby increasing the applicability of the substrate structure 100A.

[0020] Please refer to Figure 3 Similar to Figure 2 The difference lies in that: in this embodiment, the through conductive element 140 of the substrate structure 100B is in direct contact with the core layer 110, that is, the promoting layer 120 is further omitted in this embodiment. Furthermore, in this embodiment, the gap 130G is formed by the core layer 110, the first insulating portion 131 and the second insulating portion 132 together, so a portion of the inner wall 110S of the core layer 110 is exposed by the first insulating portion 131 and the second insulating portion 132.

[0021] In summary, the substrate structure of the present invention, through the design of the relative Young's coefficient between the core layer and the insulating layer, and by positioning the insulating layer at the corner of the core layer, can effectively alleviate the stress generated at the corner of the core layer during the manufacturing process, thereby effectively improving product reliability.

[0022] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A substrate structure, characterized in that, include: The core layer includes a first surface and a second surface opposite to each other and a through hole extending from the first surface to the second surface, wherein the first surface and the through hole have a first angle at their junction, the second surface and the through hole have a second angle at their junction, and the material of the core layer has a first Young's coefficient. An insulating layer includes a first insulating portion and a second insulating portion separated and located at the first corner and the second corner respectively, wherein the material of the insulating layer has a second Young's coefficient, and the second Young's coefficient is smaller than the first Young's coefficient; as well as It penetrates the conductive element and is disposed on the insulating layer and inside the through hole.

2. The substrate structure according to claim 1, characterized in that, The first insulating part and the second insulating part are not in direct contact within the through hole.

3. The substrate structure according to claim 1, characterized in that, The insulating layer is made of a photosensitive imaging dielectric material.

4. The substrate structure according to claim 1, characterized in that, The core layer is made of materials including glass or ceramic.

5. The substrate structure according to claim 1, characterized in that, The surface roughness of the first surface and the second surface is less than 15 nanometers.

6. The substrate structure according to claim 1, characterized in that, The diameter of the through-hole is between 10 micrometers and 200 micrometers.

7. The substrate structure according to claim 1, characterized in that, The through-conductive element includes a metal layer disposed on the insulating layer and filled between the first insulating portion and the second insulating portion.

8. The substrate structure according to claim 7, characterized in that, The metal layer has a first metal portion and a second metal portion within the through hole, the width of the first metal portion being different from the width of the second metal portion.

9. The substrate structure according to claim 7, characterized in that, The material of the metal layer includes sputtered titanium-copper alloy, electroless metal plating, or a combination thereof.

10. The substrate structure according to claim 1, characterized in that, It also includes a promoting layer covering the first surface, the second surface, and the inner wall of the through hole.

11. The substrate structure according to claim 10, characterized in that, A gap is formed between the promoting layer, the first insulating portion, and the second insulating portion.

12. The substrate structure according to claim 10, characterized in that, The through-conductive element is in direct contact with the promoting layer.

13. The substrate structure according to claim 10, characterized in that, The material of the insulating layer is different from the material of the promoting layer.

14. The substrate structure according to claim 13, characterized in that, The material of the promoting layer includes oxides or nitrides.

15. The substrate structure according to claim 10, characterized in that, The thickness of the promoting layer is between 0.01 nanometers and 100 nanometers.

16. The substrate structure according to claim 1, characterized in that, The insulating layer is in direct contact with the core layer.

17. A method for manufacturing a substrate structure, characterized in that, include: A core layer is provided, including a first surface and a second surface opposite to each other and a through hole extending from the first surface to the second surface, wherein the material of the core layer has a first Young's coefficient; An insulating layer is formed on the core layer, wherein a first insulating portion of the insulating layer extends from the first surface into the through hole, and a second insulating portion of the insulating layer extends from the second surface into the through hole; the material of the insulating layer has a second Young's coefficient, and the second Young's coefficient is smaller than the first Young's coefficient. as well as A conductive element is formed through the through hole and the insulating layer.

18. The method for fabricating a substrate structure according to claim 17, characterized in that, The gap between the first insulating portion and the second insulating portion is formed together when the insulating layer is formed.

19. The method for fabricating a substrate structure according to claim 17, characterized in that, Before forming the insulating layer, a conformal formation promoting layer is also included on the core layer, such that the first surface, the second surface, and the inner wall of the through hole are all covered by the promoting layer.

20. The method for fabricating a substrate structure according to claim 19, characterized in that, The surface of part of the promoting layer is exposed by the first insulating portion and the second insulating portion.

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