A car chip safety packaging structure and a safety protection method

Abstract

The application discloses a kind of vehicle chip safety packaging structures and safety protection methods, belong to integrated circuit safety protection technical field.The application solves the problem that chip anti-disassembly packaging exists single detection dimension, higher false triggering probability, attack type is difficult to identify and data protection action is too rough.The application includes: packaging structure, set on vehicle chip, including inner package layer, fingerprint perception layer, insulating isolation layer and outer shielding layer;Fingerprint perception layer includes resistance perception branch, capacitance coupling branch and thermal response branch;Control unit is electrically connected with packaging structure, for collecting the protection data collected by packaging structure, and whether abnormal condition occurs according to protection data;Data protection execution unit is electrically connected with control unit, for executing different levels of chip data protection action according to abnormal condition.The application effectively improves attack type identification ability, and improves chip security and maintainability by differentiating data protection action.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit security protection technology, specifically relating to a secure packaging structure and security protection method for automotive-grade chips. Background Technology

[0002] As automotive electronic systems evolve towards intelligent, connected, and centralized electronic and electrical architectures, automotive-grade chips typically store startup keys, authentication parameters, vehicle communication keys, functional configuration data, and security policy data. If this data is physically obtained by an attacker, it could lead to unauthorized access to vehicle control units, firmware tampering, or bypassing of communication security mechanisms.

[0003] Existing physical protection methods for automotive-grade chips or security devices mainly include encapsulation with potting materials, metal shielding, tamper-proof wire detection, tamper-proof mesh detection, and locking or key erasure after disassembly. While these methods can detect disassembly to some extent, they still have the following shortcomings.

[0004] First, conventional wire detection solutions typically rely on the breakage of two or more wires to trigger an alarm, primarily detecting open casings, damaged encapsulation, or battery removal. These solutions can only determine if an open circuit has occurred and are unable to detect more covert attacks such as drilling, grinding, stripping, localized heating, or electromagnetic injection.

[0005] Second, although the ordinary conductor grid scheme can increase the coverage area, it still mainly relies on conductor open circuits, short circuits or impedance anomalies for judgment, and cannot accurately identify early attack states such as the encapsulation material being polished layer by layer, local dielectric constant changes, and the formation of internal cavities.

[0006] Third, existing solutions typically bind detection and response in a simple way, such as locking the device or erasing the key once an anomaly is detected. For automotive-grade chips, the long-term operating environment of a vehicle includes factors such as high and low temperature cycles, vibration and shock, damp heat aging, electromagnetic interference, and authorized maintenance. Overly sensitive tamper protection responses may cause false triggers, affecting vehicle maintenance and fault analysis.

[0007] Existing tamper protection packaging suffers from problems such as limited detection dimensions, high probability of false triggering, difficulty in identifying attack types, and overly crude data protection measures. Summary of the Invention

[0008] To address the problems of existing chip anti-tamper packaging technologies, such as limited detection dimensions, high probability of false triggering, difficulty in identifying attack types, and overly crude data protection measures, this invention provides a secure packaging structure and security protection method for automotive-grade chips.

[0009] The technical solution adopted in this invention is as follows:

[0010] A secure packaging structure for automotive-grade chips, comprising:

[0011] The encapsulation structure, mounted on an automotive-grade chip, sequentially includes an inner encapsulation layer, a fingerprint sensing layer, an insulating isolation layer, and an outer shielding layer. The fingerprint sensing layer includes a resistance sensing branch, a capacitive coupling branch, and a thermal response branch. The resistance sensing branch includes several relatively independent closed detection loops. The capacitive coupling branch includes several interdigitated electrodes, with the gaps between the interdigitated electrodes filled with the encapsulation layer. The thermal response branch includes a thin-film thermistor and a micro-heating system.

[0012] The control unit, electrically connected to the fingerprint sensing layer, is used to collect protection data acquired by the packaging structure and determine whether an abnormal situation has occurred based on the protection data.

[0013] The data protection execution unit is electrically connected to the control unit and is used to perform different levels of chip data protection actions according to abnormal conditions.

[0014] Preferably, each closed detection loop is formed by a conductor line that is non-equidistantly serpentine and coiled. The non-equidistantly serpentine conductor line is a serpentine conductor line in which the spacing between adjacent conductor lines in the same closed detection loop is not equal. The spacing between adjacent conductor lines is non-uniformly distributed or pseudo-randomly distributed along the routing direction. The line width of the non-equidistantly serpentine conductor line is 10μm to 80μm, the thickness is 1μm to 20μm, and the spacing between adjacent non-equidistantly serpentine conductor lines is 50μm to 300μm.

[0015] With this technical solution, the resistance sensing branch uses a non-equidistant wiring method, which increases the difficulty for attackers to predict the wire path. If an attacker damages the package structure through mechanical drilling, tool cutting, or local slotting, it can easily lead to at least one closed detection loop experiencing an open circuit, short circuit, or impedance change. The control unit determines whether mechanical damage has occurred by detecting the continuity state, equivalent impedance, and impedance change rate of the detection loop. Compared with ordinary dual-wire tamper protection structures, the resistance sensing branch can cover multiple areas such as the top, edge, and corner of the chip, and can determine the attack path through abnormal combinations of different areas. For example, if only the edge area is abnormal, the control unit determines it as a risk of edge capping or package peeling; if the top and edge areas are abnormal at the same time, the control unit determines it as a risk of deep damage.

[0016] Preferably, the closed detection loop covers the top region of the chip, the edge region of the chip, and the corner region of the chip, respectively. The spacing between adjacent non-equidistant serpentine conductor lines in the top region of the chip is smaller than that in the edge region of the chip, and the spacing between adjacent non-equidistant serpentine conductor lines in the top region of the chip is 30% to 70% of that in the edge region of the chip.

[0017] Preferably, the encapsulation layer is made of the same material as the inner encapsulation layer or is made of automotive-grade insulating material with a dielectric constant of 80% to 120% of that of the inner encapsulation layer.

[0018] Preferably, the system also includes an environmental data acquisition structure, which includes a temperature sensor and a vibration sensor. The control unit includes a fingerprint acquisition module, an environmental compensation module, an anomaly classification module, and a protection decision module. The environmental compensation module is used to acquire data from the environmental data acquisition structure.

[0019] Preferably, the inner encapsulation layer uses a high-temperature resistant and vibration-resistant insulating encapsulation material.

[0020] Preferably, the control unit is integrated into the internal security management module of the chip body, or it is set as an independent security control chip.

[0021] Preferably, the outer shielding layer adopts a thin metal layer, a conductive polymer layer, or a composite structure of the two. The outer shielding layer includes multiple partitioned grounding electrodes, each of which is connected to a control unit to assist in determining the area of ​​abnormal electromagnetic injection.

[0022] A method for protecting automotive-grade chips involves setting an automotive-grade chip security packaging structure on the automotive-grade chip. The security protection process is as follows:

[0023] Initialization data acquisition: The control unit acquires the initial impedance of the resistance sensing branch, the initial parasitic capacitance of the capacitive coupling branch, and the initial thermal response time constant of the thermal response branch to form the package fingerprint reference value.

[0024] Real-time data acquisition and analysis: The control unit acquires the parasitic capacitance of the capacitive coupling branch, the thermal response time constant of the thermal response branch, and the impedance of the resistive sensing branch in real time to obtain real-time detection parameters. The real-time detection parameters are compared with the package fingerprint reference value, and the comparison results are used to determine whether an abnormal situation has occurred.

[0025] Perform data protection actions: The data protection execution unit performs different levels of chip data protection actions according to abnormal conditions.

[0026] Preferably, during real-time data acquisition and analysis, the control unit identifies attacks such as encapsulation thinning by grinding, local heating, laser opening, or hot air softening based on changes in the thermal response time constant; identifies attacks such as encapsulation peeling or cavity formation based on changes in the parasitic capacitance; and identifies attacks such as cutting or drilling based on changes in the impedance. The attack type is cross-validated by combining the detection results from the resistance sensing branch, the capacitive coupling branch, and the thermal response branch.

[0027] As a preferred embodiment, during real-time data acquisition and analysis, the control unit periodically applies a low-amplitude detection signal to the fingerprint sensing layer to acquire real-time impedance, real-time parasitic capacitance, and real-time thermal response time constant, and performs compensation by combining temperature sensing signal and vibration sensing signal. Based on the deviation between the compensated real-time detection parameters and the packaged fingerprint reference value, the abnormal state of the package is identified.

[0028] When the resistance sensing branch is open-circuited and the change in the capacitive coupling branch is below the first threshold, the control unit determines it as a cutting or drilling abnormality; when the change in the capacitive coupling branch exceeds the first threshold and the resistance sensing branch is not open-circuited, the control unit determines it as a package peeling or cavity abnormality; when the change in the thermal response time constant exceeds the second threshold, the control unit determines it as a grinding and thinning or local heating abnormality.

[0029] As a preferred approach, when performing data protection actions, for low-level anomalies, the debug interface is closed and the storage is locked in read-only mode; for medium-level anomalies, the key area is erased; and for high-level anomalies, the secure storage area is cleared.

[0030] Preferably, it also includes maintenance identification, which is performed by a maintenance identification unit. The maintenance identification unit is used to receive an authorization authentication signal and output a maintenance enable identifier to the control unit after successful authentication. After receiving the maintenance enable identifier, the control unit reduces the response level for actions such as removing the external shielding layer or opening the outer shell within a preset maintenance window, but does not reduce the response level for actions such as damage to the fingerprint sensing layer.

[0031] Preferably, the packaged fingerprint reference value is stored in an unreadable secure storage area inside the chip body, and can only be accessed and compared within the control unit.

[0032] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0033] 1. This invention no longer relies on single wire breakage or ordinary mesh open circuit detection. Instead, it forms a package fingerprint using multiple physical parameters such as resistance, capacitance, and thermal response, enabling the detection of various attacks including cutting, drilling, peeling, grinding, localized heating, and electromagnetic injection. This invention generates a package fingerprint baseline value through factory calibration and performs real-time comparison during service, adapting to differences in packaging manufacturing and ensuring that different chips have corresponding detection benchmarks. This invention reduces the probability of false triggering of automotive-grade chips under high and low temperature cycling, vibration shock, and complex electromagnetic environments through temperature and vibration compensation mechanisms. This invention can perform differentiated protection actions based on anomaly type and severity, preventing minor anomalies from directly causing irreversible key erasure and improving the maintainability of automotive-grade chips. This invention distinguishes between authorized repair and unauthorized disassembly through a repair identification unit, ensuring security while also meeting the needs of production testing, after-sales maintenance, and fault analysis.

[0034] 2. The automotive-grade chip security packaging structure provided by this invention can be applied to automotive security chips, gateway controller security modules, domain controller security chips, automotive communication authentication chips, smart cockpit security chips, and power control security chips. This structure adds a fingerprint sensing layer, an insulating layer, and an outer shielding layer to existing chip packaging processes, and completes fingerprint acquisition, compensation, and graded response through a control unit, demonstrating good engineering feasibility and industrial application value. Compared to traditional tamper-proof wires or ordinary conductor meshes, this invention improves attack type identification capabilities through encapsulated fingerprint self-calibration and multi-physics anomaly recognition; reduces the probability of false triggering in automotive-grade environments through temperature and vibration compensation; and improves chip security and maintainability through differentiated data protection actions. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the automotive-grade chip security packaging structure in this invention;

[0036] Figure 2 This is a schematic diagram of the fingerprint sensing layer in this invention;

[0037] Figure 3 This is the control logic diagram for the control unit and the data protection execution unit;

[0038] Among them, 1-substrate, 2-chip, 3-inner encapsulation layer, 4-fingerprint sensing layer, 41-resistance sensing branch, 42-capacitive coupling branch, 43-thermal response branch, 5-insulation isolation layer, 6-outer shielding layer, 61-zone grounding electrode, 7-control unit, 8-data protection execution unit, 9-maintenance identification unit. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0040] In the description of the embodiments of this application, it should be noted that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In addition, the terms "first," "second," and "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0041] like Figure 1 and Figure 3 As shown, an automotive-grade chip security packaging structure includes:

[0042] The encapsulation structure is mounted on the automotive-grade chip 2, which is fixedly mounted on the substrate 1. The chip body 2 has a secure storage area inside, used to store startup keys, authentication parameters, vehicle communication keys, security configuration parameters, or vehicle control strategy data. The automotive-grade chip 2 is covered by an inner encapsulation layer 3, which is made of a high-temperature resistant, vibration-resistant insulating encapsulation material, such as epoxy resin composite material, ceramic filler-reinforced epoxy material, or other automotive-grade encapsulation materials.

[0043] The fingerprint sensing layer 4 is located outside the inner encapsulation layer 3. The fingerprint sensing layer 4 is composed of a resistance sensing branch 41, a capacitive coupling branch 42, and a thermal response branch 43, distinguishing it from a single tamper-evident wire or a typical conductor mesh. The resistance sensing branch 41 detects changes in conductor continuity and equivalent impedance; the capacitive coupling branch 42 detects changes in the package dielectric environment; and the thermal response branch 43 detects changes in the package's heat conduction path. These three types of branches together form the package fingerprint sensing structure.

[0044] The resistance sensing branch 41, capacitive coupling branch 42, and thermal response branch 43 are jointly analyzed and cross-validated by the control unit 7. The control unit 7 uses the combined results of the detection parameters from the three branches as the criterion, distinguishing attack types based on the order of anomalies appearing in each branch, the proportion of changes, and spatial correlation, thereby suppressing misjudgments caused by environmental disturbances in a single branch. The three branches verify the same package anomaly from mechanical, dielectric, and thermal dimensions. A disturbance in a single physical parameter is not directly identified as an attack; only when the deviations of detection parameters from multiple dimensions exhibit mutually corroborating combined characteristics is the control unit 7 identified as an attack of the corresponding type.

[0045] The resistance sensing branch 41, capacitive coupling branch 42, and thermal response branch 43 are arranged in layers or interleaved within the fingerprint sensing layer 4. In one arrangement, the non-equidistant serpentine conductor lines of the resistance sensing branch 41 form a basic detection network covering the top, edge, and corner areas of the chip; the interdigitated electrodes of the capacitive coupling branch 42 are distributed in the gaps between adjacent serpentine conductor lines; and the thin-film thermistors and micro-heating units of the thermal response branch 43 are positioned at key locations along the heat diffusion path, such as the top and edge areas of the chip. This arrangement allows the three branches to simultaneously detect mechanical, dielectric, and thermal changes in the same area within the same package space, facilitating spatial correlation analysis of the detection parameters of the three branches by the control unit 7.

[0046] An insulating isolation layer 5 is provided on the outside of the fingerprint sensing layer 4. The insulating isolation layer 5 is used to isolate the fingerprint sensing layer 4 and the outer shielding layer 6, preventing the outer shielding layer 6 from directly affecting the detection result of the fingerprint sensing layer 4 when it is grounded or subjected to electromagnetic interference. The outer shielding layer 6 is disposed outside the insulating isolation layer 5, and the outer shielding layer 6 can be a thin metal layer, a conductive polymer layer, or a composite structure of a thin metal layer and a conductive polymer layer. In this embodiment, the outer shielding layer 6 is grounded to reduce the impact of external electromagnetic injection, electrostatic discharge, and mechanical shock on the chip body 2. The thin metal layer is used to provide electromagnetic shielding capability, and the conductive polymer layer is used to buffer mechanical shock and adapt to thermal expansion and contraction. In other embodiments, the outer shielding layer 6 can also be provided with multiple partitioned grounding electrodes 61, each partitioned grounding electrode 61 being connected to the control unit 7.

[0047] When localized electromagnetic injection occurs externally, different partition grounding electrodes 61 may generate abnormal signals with different amplitudes or phases. The control unit 7 determines the electromagnetic injection area based on the abnormal combinations of partition grounding electrodes 61, and judges the attack risk in conjunction with the noise characteristics of the fingerprint sensing layer 4.

[0048] In a preferred embodiment, an insulating layer 5 is provided between the outer shielding layer 6 and the fingerprint sensing layer 4. The insulating layer 5 is made of automotive-grade high-temperature resistant insulating material, which is one or more of polyimide, benzocyclobutene, epoxy resin insulating layer, silicon oxide, silicon nitride, and alumina ceramic coating. Its continuous operating temperature is not lower than 125°C, and its short-term withstand temperature is not lower than 150°C. The insulating layer 5 can both isolate the ground potential of the shielding layer and provide a stable dielectric environment for the fingerprint sensing layer 4.

[0049] The control unit 7 is connected to the fingerprint sensing layer 4 and is used to collect detection parameters from each sensing branch, establish the encapsulated fingerprint baseline value, perform environmental compensation, determine the anomaly type, and output protection commands. The control unit 7 can be integrated into the safety management module inside the automotive-grade chip 2, or it can be set as an independent safety control chip.

[0050] The data protection execution unit 8 is connected to the control unit 7. The data protection execution unit 8 includes a debug interface shutdown module 81, a storage read-only locking module 82, a key erasure module 83, and a secure storage area clearing module 84. The control unit 7 invokes the corresponding module according to the anomaly level to execute different levels of data protection actions.

[0051] The maintenance identification unit 9 is used to receive authorization authentication signals. The maintenance identification unit 9 may include a near-field authentication module, a dedicated diagnostic interface authentication module, or an encrypted challenge-response module. After successful authentication, the maintenance identification unit 9 outputs a maintenance enable flag to the control unit 7, causing the control unit 7 to enter a preset maintenance window.

[0052] In this embodiment, as Figure 2 As shown, several closed detection loops are relatively independent and not interconnected. Each closed detection loop is formed by a conductor line that is non-equidistantly serpentine and coiled. The line width of the non-equidistant serpentine conductor line is 10μm to 80μm, the thickness is 1μm to 20μm, and the spacing between adjacent non-equidistant serpentine conductor lines is 50μm to 300μm. In this embodiment, the closed detection loops cover the top area of ​​the chip, the edge area of ​​the chip, and the corner area of ​​the chip, respectively. The resistance sensing branch 41 adopts a non-equidistant wiring method, which can increase the difficulty for attackers to predict the wire path. If an attacker damages the package structure by mechanical drilling, cutting with a tool, or partial slotting, it is easy to cause at least one closed detection loop to open circuit, short circuit, or impedance change. Resistance detection is realized by the resistance detection circuit built into the control unit 7. The circuit includes a constant current source, an analog switch matrix, a sampling resistor, a comparator, and an analog-to-digital converter. During detection, the analog switch matrix sequentially selects each closed detection loop, and a constant current source applies a low-amplitude detection current to the selected loop. A comparator is used to determine whether the loop is conducting, an analog-to-digital converter acquires the loop voltage, and the control unit calculates the equivalent impedance based on the acquired voltage and detection current, obtaining the trend or rate of change of the equivalent impedance through continuous sampling. Compared with ordinary two-wire tamper protection structures, the resistance sensing branch 41 can cover multiple areas such as the top, edge, and corner of the chip, and can determine the attack path through abnormal combinations of different areas. For example, when only the edge area is abnormal, the control unit 7 determines it as a risk of edge capping or package peeling; when the top and edge areas are abnormal at the same time, the control unit 7 determines it as a risk of deep damage.

[0053] In this embodiment, non-equidistant spacing refers to the fact that the spacing between adjacent serpentine conductor lines within the same closed detection loop is not equal, and the adjacent spacing is non-uniformly distributed or pseudo-randomly distributed along the routing direction. Figure 2This diagram is for illustrative purposes only and is intended to show the topological connections of serpentine wiring. It is not drawn to scale with actual spacing. Therefore, the wiring in the diagram may appear to be approximately equidistant. In actual wiring, the spacing between adjacent conductors is set according to the non-equidistant method described above. Using non-equidistant wiring increases the difficulty for attackers to deduce the overall conductor path based on local wiring.

[0054] As a further preferred embodiment, the linewidth of the non-equidistant serpentine conductor lines is preferably 20μm to 40μm, the thickness is preferably 3μm to 10μm, and the spacing between adjacent non-equidistant serpentine conductor lines is preferably 80μm to 200μm; wherein the spacing between adjacent non-equidistant serpentine conductor lines located in the top region of the chip is preferably 80μm to 150μm, and the spacing between adjacent non-equidistant serpentine conductor lines located in the edge region of the chip is preferably 150μm to 300μm, so that the top region of the chip obtains higher spatial detection resolution, while the edge region of the chip takes into account both detection coverage and wiring process margin.

[0055] In this embodiment, as Figure 2 As shown, the capacitive coupling branch 42 includes multiple interdigitated electrodes, with the spaces between adjacent interdigitated electrodes filled with a packaging material having the same or similar dielectric constant as the inner encapsulation layer 3. Under normal conditions, the capacitive coupling branch 42 has a stable parasitic capacitance. If the packaging material is peeled off, softened by solvent, or air gaps are formed after local polishing, or cavities are generated inside the package, the equivalent dielectric environment between the interdigitated electrodes changes, causing the parasitic capacitance to deviate from the initial reference value. The control unit 7 acquires the initial parasitic capacitance of the capacitive coupling branch 42 during the factory calibration phase, which is achieved through the capacitance detection circuit built into the control unit 7. This capacitance detection circuit includes a low-amplitude AC excitation source or pulse excitation source, an analog switch, a reference capacitor, a charge amplifier or integrator amplifier, a comparator, and an analog-to-digital converter. During service, the control unit 7 selects the interdigitated electrodes of the capacitive coupling branch 42 through the analog switch, applies a detection signal to the interdigitated electrodes, and calculates the real-time parasitic capacitance between the interdigitated electrodes based on the voltage signal output by the charge amplifier or integrator amplifier. When the deviation of the real-time parasitic capacitance from the initial parasitic capacitance exceeds the first capacitance threshold, and the resistance sensing branch 41 is not yet open-circuited, the control unit 7 determines that there may be encapsulation peeling, internal cavity formation, or early polishing behavior. This design can detect changes in the encapsulation structure before the conductor wire breaks, making up for the deficiency of ordinary wire breakage-type tamper protection structures that can only alarm after the physical wire is damaged.

[0056] The interdigitated electrodes of the capacitive coupling branch 42 are interlaced within the fingerprint sensing layer 4, and the gaps between adjacent interdigitated electrodes are filled with a packaging material with the same or similar dielectric constant as the inner encapsulation layer 3. In this embodiment, the area of ​​the interdigitated electrodes in the plane of the fingerprint sensing layer 4 accounts for 30% to 60%, so as to ensure the sensitivity of parasitic capacitance detection while reserving wiring space for the non-equidistant serpentine conductor lines of the resistance sensing branch 41. This avoids the interdigitated electrodes having too high an area, which would compress the coverage area of ​​the resistance sensing branch 41, or too low an area, which would reduce the detection sensitivity of the capacitive coupling branch 42 to changes in the package dielectric.

[0057] The reason for filling the spaces between the interdigitated electrodes with a packaging material having the same or similar dielectric constant as the inner encapsulation layer 3 is to ensure that the capacitive coupling branch 42 has a stable and repeatable initial parasitic capacitance under normal packaging conditions, thereby forming a reliable capacitance reference value. When the packaging material is peeled off, softened by solvent, or a cavity is formed, the dielectric constant within the gap deviates from the initial value, resulting in a detectable deviation in the parasitic capacitance. If the dielectric constant difference between the filling material and the inner encapsulation layer 3 is too large, additional dielectric inhomogeneity will be introduced at the edges of the interdigitated electrodes, increasing the dispersion of the initial parasitic capacitance and reducing the detection sensitivity to early packaging changes. Using a material with the same or similar dielectric constant can reduce this dispersion, improve the consistency of the reference value of the capacitive coupling branch 42, and enhance detection reliability.

[0058] In this embodiment, as Figure 2 As shown, the thermal response branch 43 includes a thin-film thermistor and a micro-heating unit. The thin-film thermistor can be made of a positive temperature coefficient material or a negative temperature coefficient material, and the micro-heating unit can be made of polysilicon resistor, metal thin-film heating electrode, or other miniature electric heating structure. During the detection process, the control unit 7 applies a short detection pulse to the micro-heating unit and acquires the temperature change curve of the thin-film thermistor to calculate the package thermal response time constant. Under normal packaging conditions, heat diffuses outward through the inner encapsulation layer 3, fingerprint sensing layer 4, insulating isolation layer 5, and outer shielding layer 6, and its thermal response time constant is within the reference range formed by factory calibration. If an attacker performs grinding and thinning, local heating, laser decapsulation, or hot air softening on the chip package, the local thickness, thermal conductivity, or heat capacity of the package will change, causing the thermal response time constant to deviate from the reference value. The control unit 7 identifies grinding and thinning or local heating anomalies accordingly. The thermal response branch 43 can detect package thickness changes that do not lead to open circuits in resistance or significant changes in capacitance, thus improving the early identification capability of progressive physical attacks.

[0059] In this embodiment, the micro-heating unit and the thin-film thermistor are arranged adjacent to each other in the same plane, or stacked one on top of the other, with a fixed distance between them. The thin-film thermistor is located on the heat diffusion path of the micro-heating unit. After the control unit 7 applies a short-duration detection pulse to the micro-heating unit, heat diffuses outward through the packaging structure and is sensed by the thin-film thermistor. The fixed relative position of the two ensures the repeatability of the thermal response time constant measurement, allowing the thermal response time constant collected during service to be effectively compared with the reference value formed by factory calibration. The thin-film thermistor and the micro-heating unit are paired and arranged at key locations on the heat diffusion path, such as the top and edge regions of the chip, to improve the detection sensitivity of local package thickness changes.

[0060] The control unit 7 includes a fingerprint acquisition module 71, an environmental compensation module 72, an anomaly classification module 73, and a protection decision module 74.

[0061] The fingerprint acquisition module 71 is used to acquire real-time parameters from the resistance sensing branch 41, the capacitive coupling branch 42, and the thermal response branch 43. The environmental compensation module 72 is connected to the temperature sensor and vibration sensor to receive temperature and vibration signals. The anomaly classification module 73 is used to determine the anomaly type based on the compensated parameter deviation. The protection decision module 74 is used to output control commands to the data protection execution unit 8 based on the anomaly type and level.

[0062] A temperature sensor is located inside the chip body 2 or inside the inner encapsulation layer 3 to collect the packaging temperature close to the chip body 2. A vibration sensor is located on the substrate 1 or the chip body 2 to collect mechanical vibration and impact signals acting on the packaging structure during vehicle operation. Both the temperature sensor and the vibration sensor are electrically connected to the environmental compensation module 72. The temperature sensor is located close to the chip body 2, so that the temperature it collects is closer to the actual temperature environment of the fingerprint sensing layer 4, which facilitates the environmental compensation module 72 to accurately correct the impedance threshold, capacitance threshold, and thermal response threshold. The vibration sensor is located on the substrate 1 or the chip body 2, so that it can directly sense the vibration and impact transmitted to the packaging structure, which helps the control unit 7 to distinguish between transient disturbances caused by mechanical impact and real physical attacks.

[0063] During the factory calibration phase, the control unit 7 performs at least one reference sampling on each sensing branch. Preferably, the control unit 7 samples at different temperature points to form temperature compensation curves, for example, acquiring impedance, capacitance, and thermal response time constant at -40℃, 25℃, and 125℃ respectively. The control unit 7 writes the acquisition results into an unreadable secure storage area inside the chip body 2 to form the package fingerprint reference value.

[0064] During service, the control unit 7 periodically collects real-time parameters. When the temperature sensor detects a large rate of temperature change, the environmental compensation module 72 corrects the impedance threshold, capacitance threshold, and thermal response threshold according to the temperature compensation curve. When the vibration sensor detects a short-term impact, the control unit 7 determines the duration of the abnormality and the continuity of the detection circuit. If the impact duration is shorter than a preset time and the resistance sensing branch 41 does not experience a continuous open circuit, the control unit 7 only records the abnormal event and does not trigger key erasure. This environmental compensation mechanism enables the chip to maintain a low probability of false triggering under automotive-grade high and low temperature cycling, vibration shock, and mechanical stress environments.

[0065] A method for protecting automotive-grade chips involves setting an automotive-grade chip security packaging structure on the automotive-grade chip. The security protection process is as follows:

[0066] Initial data acquisition: The control unit 7 acquires the initial impedance of the resistance sensing branch 41, the initial parasitic capacitance of the capacitive coupling branch 42, and the initial thermal response time constant of the thermal response branch 43 to form a package fingerprint reference value, and writes the package fingerprint reference value into the unreadable secure storage area inside the chip body 2.

[0067] Real-time data acquisition and analysis: The control unit 7 acquires the parasitic capacitance of the capacitive coupling branch 42, the thermal response time constant of the thermal response branch 43, and the impedance of the resistance sensing branch 41 in real time to obtain real-time detection parameters. These parameters are compared with the package fingerprint reference value, and the comparison results are used to determine if any abnormality has occurred. Simultaneously, the control unit 7 acquires environmental signals output from the temperature and vibration sensors and performs environmental compensation on the real-time detection parameters. When an attacker damages the package through drilling or cutting, the resistance sensing branch 41 is prone to open circuits or impedance abrupt changes, while the capacitive coupling branch 42 may only experience localized changes, and the thermal response branch 43 shows relatively small changes. The control unit 7 determines this as a drilling or cutting anomaly. When an attacker separates the package material using chemical solvents or mechanical peeling, the parasitic capacitance of the capacitive coupling branch 42 continuously decreases or fluctuates, while the resistance sensing branch 41 may not yet be open circuits. The control unit 7 determines this as a package peeling or cavity formation anomaly. When an attacker gradually thins the package thickness through grinding, the thermal response time constant of the thermal response branch 43 shortens, the capacitive coupling branch 42 may change slowly, and the resistance sensing branch 41 may not be open-circuited. The control unit 7 determines this as a grinding-thinning anomaly. When an attacker uses localized hot air, laser, or thermal probes to heat the package, the temperature change slope of the thermal response branch 43 is abnormal, and may be accompanied by dielectric changes in the capacitive coupling branch 42. The control unit 7 determines this as a localized heating anomaly. When an attacker attacks the chip using an abnormal electromagnetic injection method, the partitioned ground electrode 61 of the outer shielding layer 6 generates abnormal potential fluctuations, and the fingerprint sensing layer 4 may exhibit abnormal noise characteristics. The control unit 7 determines this as an abnormal electromagnetic injection.

[0068] Data protection actions are executed: Data protection execution unit 8 performs different levels of chip data protection actions based on abnormal conditions. When control unit 7 determines a low-level abnormality, such as a local abnormality in outer shielding layer 6, a single short-term noise interference, or suspected minor stripping, data protection execution unit 8 closes the debug interface and enables storage read-only locking. Storage read-only locking is implemented by setting write protection bits, partition access permission tables, or access control registers through the storage controller, making the target storage partition read-only and rejecting write, erase, and modification requests to the target storage partition.

[0069] When the control unit 7 determines a medium-level anomaly, such as a partial open circuit in the resistance sensing branch 41, a persistent anomaly in the capacitive coupling branch 42, or a significant deviation of the thermal response branch 43 from the reference value, the data protection execution unit 8 erases the key area. The key area erasure is achieved by the non-volatile memory controller performing an erase operation on the corresponding page, sector, or physical block of the key area, or by destroying the key area access key, making the data within the key area unrecoverable.

[0070] When the control unit 7 determines a high-level anomaly, such as simultaneous anomalies in the resistance sensing branches 41 of multiple areas, or an anomaly in the thermal response branch 43 accompanied by a high-frequency electromagnetic anomaly in the outer shielding layer 6, the data protection execution unit 8 clears the secure storage area. This clearing of the secure storage area is achieved by the secure storage controller performing block erasure, full erasure, or root key destruction operations on the secure storage area, making the data within the secure storage area unreadable and unrecoverable.

[0071] This tiered protection mechanism can prevent minor anomalies from directly triggering irreversible erasure, improve the feasibility of maintenance and fault analysis, and maintain a rapid response to deep intrusion attacks.

[0072] The control unit 7 classifies anomalies into three levels—low, medium, and high—based on the number of physical dimensions involved, the magnitude of the anomaly, and the spatial range of the anomaly. Low-level anomalies correspond to slight deviations in a single physical dimension, such as short-term potential fluctuations in the grounding electrode 61 of a specific section of the outer shielding layer 6, an impedance change rate within the first impedance threshold of a single closed detection loop, or a parasitic capacitance deviation within the first capacitance threshold of the capacitive coupling branch 42. The first impedance threshold is set to 5% of the baseline value, and the first capacitance threshold is set to 8% of the baseline value. Medium-level anomalies correspond to significant deviations in a single physical dimension or simultaneous deviations in two physical dimensions, such as a partial open circuit in the resistance sensing branch 41, a parasitic capacitance deviation in the capacitive coupling branch 42 exceeding the first capacitance threshold but falling below the second capacitance threshold, or a thermal response time constant deviation exceeding the first thermal threshold. The second capacitance threshold is set to 20% of the baseline value, and the first thermal threshold is set to 10% of the baseline value. High-level anomalies correspond to simultaneous anomalies in multiple regions or significant deviations in multiple physical dimensions. For example, multiple regions may experience simultaneous open circuits in the resistance sensing branch 41, the parasitic capacitance deviation of the capacitive coupling branch 42 may exceed the second capacitance threshold, or the thermal response time constant deviation may exceed the second thermal threshold accompanied by high-frequency electromagnetic anomalies in the outer shielding layer 6. The second thermal threshold is set to 25% of the reference value. The aforementioned thresholds are determined by combining the package fingerprint reference value formed by factory calibration with the temperature compensation curve, and are dynamically corrected based on the real-time signals from the temperature sensor and vibration sensor.

[0073] The relationship between the environmental signals output by the temperature and vibration sensors and the detection results of the fingerprint sensing layer 4 is as follows: the environmental signals are only used to compensate for and correct the detection parameters of the fingerprint sensing layer 4, and do not trigger data protection actions independently. When the vibration sensor signal indicates that the impact duration is less than the preset time, and the resistance sensing branch 41 does not experience a continuous open circuit, the control unit 7 determines the event as an environmental disturbance, records the abnormal event, and does not trigger key area erasure; only when the deviation of the detection parameters of the fingerprint sensing layer 4 after temperature and vibration compensation reaches the threshold of the corresponding level mentioned above, the control unit 7 outputs the corresponding level of protection command to the data protection execution unit 8 according to the above-mentioned grading standard. Thus, the environmental compensation stage is used to eliminate transient disturbances in the automotive-grade environment, and the graded protection stage is used to determine the protection action based on the actual anomaly of the fingerprint sensing layer 4. The two work together to reduce the probability of false triggering while ensuring response to real attacks.

[0074] The maintenance identification unit 9 is used to identify authorized maintenance scenarios. The maintenance identification unit 9 can employ a near-field authentication module, a dedicated diagnostic interface authentication module, or an encrypted challenge-response module. Authorized maintenance equipment sends an authentication request to the maintenance identification unit 9; upon successful authentication, the maintenance identification unit 9 outputs a maintenance enable flag to the control unit 7.

[0075] Upon receiving a maintenance enable flag, control unit 7 enters a preset maintenance window. Within this window, if only the removal of the outer shielding layer 6, opening of the outer casing, or disconnection of external connectors is detected, control unit 7 lowers the response level or delays the execution of a higher-level protection action and records the maintenance event. If damage to the fingerprint sensing layer 4, an open circuit in the resistance sensing branch 41, a persistent abnormality in the capacitive coupling branch 42, or a significant abnormality in the thermal response branch 43 is detected, control unit 7 does not lower the response level and still executes data protection actions according to the abnormality level.

[0076] The specific methods by which control unit 7 reduces the response level include: within a preset maintenance window, delaying the execution of protection actions corresponding to medium or high-level anomalies, and requiring repeated confirmation of the anomaly's persistence within the delay time; if the anomaly disappears within the delay time, the protection action is not executed; for anomalies caused solely by the removal of the outer shielding layer 6, opening of the outer casing, or disconnection of external connectors, lowering the response level by one level, for example, from medium to low, only executing debug interface closure and storage read-only locking, without executing key area erasure; simultaneously increasing the corresponding physical dimension's judgment threshold to prevent normal encapsulation disturbances caused by maintenance operations from triggering data protection actions. After the maintenance window ends, control unit 7 automatically restores the original response level and judgment threshold.

[0077] The embodiments described above merely illustrate specific implementation methods of this application, and while the descriptions are detailed and specific, they should not be construed as limiting the scope of protection of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the technical solution of this application, and these modifications and improvements all fall within the scope of protection of this application.

Claims

1. A secure packaging structure for automotive-grade chips, characterized in that: include: The encapsulation structure, set on the automotive-grade chip (2), includes an inner encapsulation layer (3), a fingerprint sensing layer (4), an insulating isolation layer (5), and an outer shielding layer (6) in sequence; the fingerprint sensing layer (4) includes a resistance sensing branch (41), a capacitive coupling branch (42), and a thermal response branch (43); the resistance sensing branch (41) includes several relatively independent closed detection loops; the capacitive coupling branch (42) includes several interdigitated electrodes, and the gaps between the interdigitated electrodes are filled with an encapsulation layer; the thermal response branch (43) includes a thin-film thermistor and a micro heating system; The control unit (7) is electrically connected to the fingerprint sensing layer (4) and is used to collect the protection data collected by the encapsulation structure and determine whether an abnormal situation has occurred based on the protection data. The data protection execution unit (8) is electrically connected to the control unit (7) and is used to perform different levels of chip data protection actions according to abnormal conditions.

2. The automotive-grade chip security packaging structure according to claim 1, characterized in that: Each closed detection loop is formed by a conductor line that is non-equidistantly serpentine and coiled. The non-equidistantly serpentine conductor line has a line width of 10 μm to 80 μm and a thickness of 1 μm to 20 μm. The spacing between adjacent non-equidistantly serpentine conductor lines is 50 μm to 300 μm.

3. The automotive-grade chip security packaging structure according to claim 2, characterized in that: The closed detection loops cover the top region of the chip, the edge region of the chip, and the corner region of the chip, respectively. The spacing between adjacent non-equidistant serpentine conductor lines in the top region of the chip is smaller than that in the edge region of the chip.

4. The automotive-grade chip security packaging structure according to claim 1, characterized in that: The material of the encapsulation layer is the same as that of the inner encapsulation layer (3) or is an automotive-grade insulating material with a dielectric constant of 80% to 120% of that of the inner encapsulation layer (3).

5. The automotive-grade chip security packaging structure according to claim 1, characterized in that: The micro-heating system includes a micro-heating unit, which employs a polycrystalline silicon resistor or a metal thin-film heating electrode. The micro-heating unit and the thin-film thermistor are arranged adjacent to each other in the same plane or stacked one on top of the other. The thin-film thermistor is located on the thermal diffusion path of the micro-heating unit.

6. A security packaging structure for automotive-grade chips according to any one of claims 1-5, characterized in that: It also includes an environmental data acquisition structure, which includes a temperature sensor and a vibration sensor. The control unit (7) includes a fingerprint acquisition module, an environmental compensation module, an anomaly classification module and a protection decision module. The environmental compensation module is used to acquire data from the environmental data acquisition structure.

7. A method for protecting automotive-grade chips, characterized in that: The automotive-grade chip safety packaging structure according to any one of claims 1-6 is set on the automotive-grade chip, and the safety protection process is as follows: Initialization data acquisition: The control unit (7) acquires the initial impedance of the resistance sensing branch (41), the initial parasitic capacitance of the capacitive coupling branch (42) and the initial thermal response time constant of the thermal response branch (43) to form the packaging fingerprint reference value. Real-time data acquisition and analysis: The control unit (7) acquires the parasitic capacitance of the capacitive coupling branch (42), the thermal response time constant of the thermal response branch (43), and the impedance of the resistance sensing branch (41) in real time to obtain real-time detection parameters. The real-time detection parameters are compared with the package fingerprint reference value, and the abnormal situation is determined based on the comparison result. Perform data protection actions: The data protection execution unit (8) performs different levels of chip data protection actions according to the abnormal situation.

8. The method for protecting automotive-grade chips according to claim 7, characterized in that: When performing real-time data acquisition and analysis, the control unit (7) periodically applies a low-amplitude detection signal to the fingerprint sensing layer (4), acquires real-time impedance, real-time parasitic capacitance and real-time thermal response time constant, and compensates for it by combining temperature sensing signal and vibration sensing signal. Based on the deviation between the compensated real-time detection parameters and the package fingerprint reference value, the abnormal state of the package is identified. When the resistance sensing branch (41) is open-circuited and the change in the capacitive coupling branch (42) is lower than the first threshold, the control unit (7) determines that the cutting or drilling is abnormal. When the change in the capacitive coupling branch (42) exceeds the first threshold and the resistance sensing branch (41) is not open, the control unit (7) determines that the package is peeled off or the cavity is abnormal; when the change in the thermal response time constant exceeds the second threshold, the control unit (7) determines that the grinding and thinning or local heating is abnormal.

9. A method for protecting automotive-grade chips according to claim 7, characterized in that: When performing data protection actions, for low-level anomalies, the debug interface is closed and the storage is locked in read-only mode; for medium-level anomalies, the key area is erased; and for high-level anomalies, the secure storage area is cleared.

10. A method for protecting automotive-grade chips according to claim 7, characterized in that: It also includes maintenance identification, which is performed by a maintenance identification unit. The maintenance identification unit is used to receive the authorization authentication signal and output a maintenance enable identifier to the control unit (7) after the authentication is passed. After receiving the maintenance enable identifier, the control unit (7) reduces the response level when removing the external shielding layer (6) or opening the outer shell within the preset maintenance window, but does not reduce the response level when damaging the fingerprint sensing layer (4).

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