Computing device

Abstract

The present disclosure relates to a computing device comprising a micro secure digital, microSD, card; and one or more field programmable gate arrays, FPGAs, mounted on the microSD card.

Description

Technical Field

[0001] This disclosure relates to a computing device and a data processing system. More particularly, this disclosure relates to a computing device for offloading computation via a data storage interface. Background Technology

[0002] Today, computers play a crucial role in data processing in virtually every aspect of life. The range of data processed by computers is vast, including but not limited to sensor readings, stock market data, and the output of quantum computers. The need for compatible and flexible computing systems in data processing cannot be overstated, as it profoundly impacts various key aspects, such as: interoperability, ensuring seamless integration between different systems; flexibility, allowing adaptation to evolving technological needs; scalability, facilitating adjustments to adapt to changing data processing requirements; cost efficiency, reducing financial overhead over time; and customization, enabling the provision of tailored solutions to specific requirements. Summary of the Invention

[0003] In view of the above, a computing device and a data processing system are provided.

[0004] The purpose of this disclosure is to enhance data processing capabilities without requiring any modifications on the host side.

[0005] The objective is achieved through the features of the independent claim. Preferred embodiments are defined in the dependent claims.

[0006] According to an independent aspect of this disclosure, a computing device is provided. The computing device includes a microSD card; and one or more field-programmable gate arrays (FPGAs) mounted (or assembled) on the microSD card.

[0007] The term "microSD card" (also known as a microSD memory card or microSD form factor memory card) refers to a removable flash memory storage device. The standard dimensions of a microSD card are approximately 15 mm in length, 11 mm in width, and 1 mm in height / thickness.

[0008] The term "Field-Programmable Gate Array" (FPGA) refers to a type of digital integrated circuit (IC) that can be programmed or reprogrammed after manufacturing to make it "field-programmable." An FPGA consists of an array of programmable logic blocks and a reconfigurable interconnect hierarchy that allows these blocks to interconnect. The logic blocks can be configured to perform complex combinational functions or simply execute simple logic gates such as AND and XOR. Furthermore, an FPGA may contain memory elements, which can be simple flip-flops or more complete blocks of memory.

[0009] The term "mounting" refers to the mechanical installation of electronic devices (such as FPGAs) onto or inside the surface or structure of a microSD card. This mounting process can employ various methods and techniques, chosen based on factors such as the specific characteristics of the device being mounted and the design of the microSD card.

[0010] According to some embodiments, which may be combined with other embodiments described herein, the computing device includes two or more, four or more, six or more, eight or more, or ten or more FPGAs mounted on a microSD card.

[0011] According to some embodiments, which may be combined with other embodiments described herein, the computing device includes two, three, four, five, six, seven, eight, nine, or ten FPGAs mounted on a microSD card.

[0012] According to some embodiments, which can be combined with other embodiments described herein, the computing device, particularly one or more FPGAs, is configured to be reprogrammable. For example, the computing device, particularly one or more FPGAs, may be configured to be reprogrammed via a bootloader and / or a dedicated connector.

[0013] According to some embodiments, which may be combined with other embodiments described herein, one or more FPGAs are configured to receive an FPGA design bitstream for configuring the one or more FPGAs. The FPGA design bitstream is essentially a binary file containing configuration data for programming the FPGA. The bitstream encodes information about how to configure the logic blocks, interconnects, and other resources of the FPGA to achieve the desired logic function. It specifies what each programmable element in the FPGA should do and how these elements should be interconnected.

[0014] According to some embodiments, which may be combined with other embodiments described herein, one or more FPGAs are configured to receive a custom FPGA design bitstream for configuring the one or more FPGAs. The custom FPGA design bitstream is a final binary profile created by an end user to configure the FPGA to perform a specific function or task. The custom FPGA design bitstream is not provided by the manufacturer of the computing device or any other entity involved in its distribution (such as a retailer or licensor).

[0015] According to some embodiments, which may be combined with other embodiments described herein, one or more FPGAs are initially in an unconfigured or pre-configured state and are configured to receive a custom FPGA design bitstream for their configuration.

[0016] According to some embodiments, which may be combined with other embodiments described herein, one or more FPGAs are configured to receive a custom FPGA design bitstream for configuring the one or more FPGAs via a bootloader. The bootloader may be a built-in bootloader, i.e., a feature of the computing device. A bootloader is generally understood as a dedicated program or code that initiates the startup process of a computer system. The bootloader typically performs tasks such as hardware initialization, checking system integrity, and loading the operating system into memory. It ensures a smooth transition from a power-down state of the hardware to a state where the operating system can take over and manage system resources.

[0017] According to some embodiments, which may be combined with other embodiments described herein, one or more FPGAs are configured to be ready to operate immediately. Specifically, the configuration of the one or more FPGAs may be done by the manufacturer of the computing device or another party involved in its distribution (such as a retailer or licensor), rather than by the end user.

[0018] According to some embodiments, which may be combined with other embodiments described herein, the computing device is configured to be removably inserted into an interface device of an external system, particularly to establish data communication with the external system.

[0019] As used throughout this disclosure, the term "removably attached" means a releasable mechanical connection between objects. It specifically refers to the ability or manner in which an object can be removed or detached without causing damage or permanent alteration. When an object is described as removably attached or connected, it indicates that the object can be detached or removed from its attachment point without causing damage or introducing changes to the object itself or its surroundings.

[0020] According to some embodiments, which may be combined with other embodiments described herein, the interface device of the external system is a slot, and the microSD card of the computing device is configured to be removably inserted into the slot of the external system.

[0021] According to some embodiments, which may be combined with other embodiments described herein, a microSD card includes a first portion and a second portion, wherein the first portion is configured to mate within an interface device of an external system.

[0022] According to some embodiments, which may be combined with other embodiments described herein, the first portion is the front portion of the microSD card and the second portion is the rear portion of the microSD card.

[0023] According to some embodiments, these embodiments may be combined with other embodiments described herein, wherein one or more FPGAs are disposed at or on the second portion of the microSD card.

[0024] According to some embodiments, which may be combined with other embodiments described herein, the first portion of the microSD card includes an enhancement portion.

[0025] According to some embodiments, which may be combined with other embodiments described herein, the enhancement portion is provided by the enhancement material applied to the first portion of the microSD card.

[0026] According to some embodiments, which may be combined with other embodiments described herein, the reinforcing material applied to the first portion of the microSD card includes or is an epoxy material.

[0027] According to some embodiments, these embodiments may be combined with other embodiments described herein, wherein the enhancement is provided by at least one structural feature of the first portion of the microSD card.

[0028] According to some embodiments, which may be combined with other embodiments described herein, the at least one structural feature of the first portion of the microSD card includes at least one of a rib and a protrusion.

[0029] According to some embodiments, which may be combined with other embodiments described herein, the computing device also includes encapsulation material on the first and / or second portions of the microSD card.

[0030] According to some embodiments, which may be combined with other embodiments described herein, the encapsulation material includes, or is a reinforcing material applied to the first portion of the microSD card, or is an encapsulation material provided in addition to the reinforcing material.

[0031] According to some embodiments, which may be combined with other embodiments described herein, the encapsulation material is disposed on the first and second portions of the microSD card. For example, the encapsulation material may cover substantially the entire microSD card.

[0032] According to some embodiments, these embodiments may be combined with other embodiments described herein, including optional reinforcements and the first portion of the encapsulation material having a height configured to fit within an interface device of an external system.

[0033] According to some embodiments, these embodiments may be combined with other embodiments described herein, including optional reinforcement portions and the first portion of the encapsulation material having a width configured to fit within an interface device of an external system.

[0034] According to some embodiments, which may be combined with other embodiments described herein, the first portion of the microSD card has a height of approximately 1 mm. In some embodiments, the first portion of the microSD card has a height of 0.7 mm ± 0.1 mm.

[0035] According to some embodiments, which may be combined with other embodiments described herein, the first portion of the microSD card has a width of approximately 11 mm. In some embodiments, the first portion of the microSD card has a width of 9.7 mm ± 0.1 mm.

[0036] According to some embodiments, which may be combined with other embodiments described herein, the computing device is configured to present an empty and / or unformatted SD storage device to external systems.

[0037] According to some embodiments, these embodiments may be combined with other embodiments described herein, and the external system includes or is a host computer. As used throughout this disclosure, the term "host" refers to a computer system or device that provides resources, services, and / or data to other connected devices, particularly the computing device. The host may interact and cooperate with the computing device to perform tasks.

[0038] According to some embodiments, these embodiments may be combined with other embodiments described herein, and the external system includes or is a carrier module.

[0039] According to some embodiments, which may be combined with other embodiments described herein, the carrier module is configured for testing and / or characterizing the computing device.

[0040] According to some embodiments, which can be combined with other embodiments described herein, the carrier module is configured for connection to the host computer. Therefore, the computing device can be connected to the host computer via the carrier module. This may also be referred to as a "peripheral configuration".

[0041] According to some embodiments, which may be combined with other embodiments described herein, the carrier module is configured to connect to the host computer via a cable connection and / or a wireless connection.

[0042] According to some embodiments, which can be combined with other embodiments described herein, the carrier module is a compact carrier module. A compact carrier module refers to a small-sized, densely packed electronic carrier module designed to minimize physical space while maximizing the integration of electronic components.

[0043] According to some embodiments, which can be combined with other embodiments described herein, the carrier module includes or is a carrier board. The carrier board may be a circuit board, such as a compact circuit board.

[0044] According to some embodiments, which can be combined with other embodiments described herein, the carrier plate has a plate profile of a mm × b mm. a and b may be substantially the same or may be different. In one example, a may be in the range of 40 mm to 70 mm, and b may be in the range of 40 mm to 70 mm. In another example, a may be in the range of 50 mm to 60 mm, and b may be in the range of 50 mm to 60 mm. In some embodiments, a and / or b may be about 57 mm.

[0045] According to some embodiments, these embodiments can be combined with other embodiments described herein, wherein the carrier module can be connected to the processor module to form a single-board computer. This may also be referred to as a “standalone configuration.” A single-board computer (SBC) is a complete computer built on a single circuit board, featuring a microprocessor, memory, input / output (I / O), and other features required for a functional computer.

[0046] According to some embodiments, which may be combined with other embodiments described herein, the carrier module includes at least one power port for supplying power to the carrier module, particularly the computing device.

[0047] According to some embodiments, which may be combined with other embodiments described herein, the computing device further includes an interface module configured for data communication with an external system.

[0048] According to some embodiments, which may be combined with other embodiments described herein, the interface module is configured to communicate with external systems based on the SD (Secure Digital) protocol, CXL (Compute Fast Link) protocol, PCIe (Peripheral Component Interconnect Fast) protocol, NVME (Non-Volatile Memory Fast) protocol, and / or USB (Universal Serial Bus) protocol.

[0049] According to some embodiments, which may be combined with other embodiments described herein, the computing device is configured to behave as a (functional) microSD device, enabling external systems to communicate with the computing device, for example, using the SD protocol or the SD-over-SPI protocol.

[0050] According to some embodiments, which may be combined with other embodiments described herein, the computing device includes one or more central processing units (CPUs). The one or more CPUs may be mounted on a microSD card.

[0051] According to some embodiments, these embodiments may be combined with other embodiments described herein, wherein the computing device is a computing device for uncertainty tracking.

[0052] According to some embodiments, which can be combined with other embodiments described herein, the computing device is configured to process uncertain information contained in input data. The input data may be received from the host computer or another external system via the interface module.

[0053] According to some embodiments, which may be combined with other embodiments described herein, the uncertainty information contained in the input data includes or relates to uncertainty distribution information and / or probability distributions. Probability distributions are generally understood as phenomena based on their sample space and event probabilities.

[0054] According to some embodiments, these embodiments may be combined with other embodiments described herein, wherein the input data is based on a set of empirical samples or analytical distributions or a set of sensor readings.

[0055] The computing device may be configured to process the uncertainty information by using an uncertainty tracking function. According to some embodiments, which may be combined with other embodiments described herein, the uncertainty tracking function includes one or more operations. Preferably, the one or more operations are performed on distributed values. Preferably, the one or more operations include arithmetic operations, more preferably addition, subtraction, multiplication, division, and / or exponentiation, or other such operations typically included in the instruction set of a microprocessor.

[0056] As used throughout this disclosure, the term "uncertainty tracking" (or uncertainty propagation) generally refers to the process of quantifying and managing uncertainty or variation associated with input data, and quantifying the uncertainty of the outcome of each operation (e.g., ADD, SUB, etc.) when the input data is processed by a computing device. The term "uncertainty tracking" (or uncertainty propagation) specifically refers to the process of monitoring how uncertainty in data affects the output of a sequence of arithmetic operations acting on that data. For a given data item, such as a measurement, the term uncertainty quantification (UQ) is generally used to refer to the process of quantifying the uncertainty of that individual data item. Uncertainty tracking aims to provide a more comprehensive understanding of the limitations and potential errors associated with computational results. It involves techniques and methods for representing, propagating, and in some cases mitigating uncertainty to enhance the reliability and robustness of computational results. This becomes particularly critical when dealing with real-world data, complex models, or situations where precise information is difficult to obtain. Non-limiting exemplary methods for handling uncertainty information are explained in WO2022248719.

[0057] According to some embodiments, which can be combined with other embodiments described herein, the computing device further includes at least one wireless communication module for transmitting data (e.g., the result of uncertainty tracking performed by the computing module) to one or more external entities. For example, the computing device may have WiFi or BLE capabilities to transmit data to nearby workstations or directly to a cloud computing engine via an HTTP API.

[0058] According to some embodiments, these embodiments may be combined with other embodiments described herein, wherein the one or more external entities include the host computer and / or the carrier module and / or the workstation and / or the cloud computing engine.

[0059] According to another independent aspect of this disclosure, a data processing system is provided. The data processing system includes a computing device according to embodiments of this disclosure and an external system, the external system including an interface means configured to receive from the computing device.

[0060] According to some embodiments, these embodiments may be combined with other embodiments described herein, and the external system may include the host computer and / or carrier module described above. According to some embodiments, which may be combined with other embodiments described herein, the carrier module is configured for testing and / or characterizing the computing device.

[0061] According to some embodiments, these embodiments may be combined with other embodiments described herein, and the carrier module can be connected to the processor module to form a single-board computer.

[0062] According to some embodiments, these embodiments may be combined with other embodiments described herein, and the data processing system is a data processing system for uncertainty tracking. Attached Figure Description

[0063] To gain a more detailed understanding of the features described above, reference can be made to embodiments of the present disclosure, which have been briefly summarized above. The accompanying drawings illustrate embodiments of the present disclosure and are described below: Figure 1 A schematic top view of a computing device according to an embodiment of the present disclosure is shown; Figure 2A A schematic top view of a computing device according to other embodiments of the present disclosure is shown; Figure 2B Show Figure 2A A schematic side view of a computing device; Figure 3 A schematic diagram of a data processing system according to an embodiment of the present disclosure is shown; and Figure 4A schematic diagram of a data processing system according to other embodiments of the present disclosure is shown. Detailed Implementation

[0064] Reference will now be made in detail to various embodiments of the present disclosure, one or more examples of which are illustrated in the accompanying drawings. In the following description of the drawings, the same reference numerals refer to the same components. Generally, only differences with respect to the various embodiments are described. Each example is provided by way of explanation of the present disclosure and is not intended to limit the disclosure. Furthermore, features shown or described as part of one embodiment may be used in other embodiments or in combination with other embodiments to produce yet another embodiment. It is intended that this description include such modifications and variations.

[0065] This document includes references to "one embodiment" or "an embodiment". The appearance of the phrase "in one embodiment" or "in an embodiment" does not necessarily refer to the same embodiment. Specific features, structures, or characteristics may be combined in any suitable manner consistent with this disclosure.

[0066] The term "comprising" is open-ended. As used in the appended claims, it does not exclude additional structures or steps.

[0067] Various units, circuits, or other components may be described or defined as "configured to" perform one or more tasks. In such a context, "configured to" is used to imply a structure by indicating that the unit / circuit / component includes a structure (e.g., a circuit) that performs those tasks during operation. Thus, even if the specified unit / circuit / component is not currently running (e.g., not turned on), it can be said that the unit / circuit / component is configured to perform a task. Units / circuits / components used with the language "configured to" include hardware such as circuits, memory storing program instructions that can be executed to perform the operation, etc. Additionally, "configured to" may include general-purpose structures manipulated by software and / or firmware (e.g., an FPGA or a general-purpose processor executing software) to operate in a manner capable of performing the task in question.

[0068] As used in this article, the terms “first,” “second,” etc., are used as labels for the nouns preceding them and do not imply any type of order (e.g., spatial, temporal, logical, etc.).

[0069] As used herein, the term "based on" is used to describe one or more factors that influence the determination. This term does not exclude additional factors that may influence the determination. That is, the determination may be based solely on those factors, or at least partially on those factors. Consider the phrase "A is determined based on B." While B is a factor influencing the determination of A in this case, such a phrase does not exclude that the determination of A is also based on C. In other cases, A may be determined solely on B.

[0070] Figure 1A schematic diagram of a computing device 100 according to an embodiment of the present disclosure is shown. The computing device 100 may be a computing device for uncertainty tracking, but is not limited thereto.

[0071] The computing device 100 includes a microSD card 110; and one or more field-programmable gate arrays (FPGAs) 120 mounted (or assembled) on the microSD card 110. The computing device 100 can be understood as a microSD card-shaped PCB on which one or more FPGAs are mounted for use as the entire system.

[0072] One or more FPGAs 120 may be configured to receive FPGA design bitstreams for configuring the one or more FPGAs 120.

[0073] The FPGA 120 may include 5280 logic cells, 128 Kbit (16 KB) dual-port block RAM, 1 Mbit (128 KB) single-port RAM, one PLL, two SPI and two I2C hard IPs, two internal oscillators (10 kHz and 48 MHz), eight DSPs (16x16 multiplication + 32-bit accumulation), and hard IP PWM (for on-board LEDs).

[0074] In some embodiments, the one or more FPGAs 120 are initially in an unconfigured or pre-configured state and are configured to receive an FPGA design bitstream for their configuration. This configuration process can be initiated by a bootloader, allowing for dynamic customization of FPGA functionality. The FPGA design bitstream can be a custom FPGA design bitstream. A custom FPGA design bitstream is a final binary profile created by the end user to configure the FPGA to perform a specific function or task. Custom FPGA design bitstreams are not provided by the manufacturer of the computing device or any other entity involved in its distribution (such as a retailer or licensor).

[0075] In other embodiments, the one or more FPGAs 120 may be configured to be operational immediately. Specifically, the configuration of the one or more FPGAs 120 may be done by the manufacturer of the computing device 100 or another party involved in its distribution (such as a retailer or licensor), rather than by the end user.

[0076] The computing device 100 may also include an interface module 130 configured to communicate with external systems (e.g., a host computer (Figure 2)) or a carrier module ( Figure 3The interface module 130 can be configured to communicate with external systems based on the SD (Secure Digital) protocol, CXL (Compute Fast Link) protocol, PCIe (Peripheral Component Interconnect Fast) protocol, NVME (Non-Volatile Memory Fast) protocol, and / or USB (Universal Serial Bus) protocol.

[0077] According to some embodiments, computing device 100 may include one or more additional electronic devices or components (not shown). The one or more additional electronic devices or components may include, but are not limited to, at least one CPU, at least one memory module, programmable I / O pins, and / or at least one wireless communication module (e.g., Wi-Fi, BLE).

[0078] The at least one CPU may include, or be an integrated RISC-V processor core. The RISC-V processor core may have an interface with applications running on the core using the SD protocol, support SD and SD-over-SPI communication modes, and / or explore uncertainty tracking technology in network edge systems.

[0079] The at least one memory module may include, or be an SPI flash memory. The SPI flash memory may have 128 Mbit (16 MB) of non-volatile memory, a typical operating frequency of 50 MHz, a maximum operating frequency of 133 MHz (fast read), and low power consumption.

[0080] The programmable I / O pins may include, but are not limited to, on-board LEDs (one red and one green) for status indication, programmable I / O pins from the microSD interface, and additional programmable pins on the test pads.

[0081] The computing device 100 may also have a built-in bootloader to load new FPGA bitstreams or RISC-V applications via an SD interface. Therefore, the computing device 100 can be configured to flash new firmware by writing to a specific offset address on the storage device (e.g., using custom tools or even the Unix dd utility).

[0082] The computing device 100 can be used for prototyping on a breadboard using a microSD adapter board. Alternatively, the computing device 100 can be integrated into new PCB designs by providing a dedicated microSD slot to house it. Furthermore, the computing device 100 can connect to existing platforms that support microSD cards, such as the Bee Data Logger or Adafruit Adalogger, where it can be used as a coprocessor.

[0083] Figure 2AA schematic top view of a computing device 200 according to other embodiments of the present disclosure is shown. Figure 2B Show Figure 2A A schematic side view of the computing device 200.

[0084] The microSD card 110 of the computing device 200 includes a first portion P1 and a second portion P2. The first portion P1 may be the front of the microSD card 110, and the second portion P2 may be the rear of the microSD card 110 (e.g., defined relative to the insertion orientation).

[0085] The first part P1 can be configured to fit into an interface device of an external system (such as a dedicated microSD slot) and can be configured to substantially completely fill the slot.

[0086] The one or more FPGAs 120 are located at or on the second portion P2 of the microSD card 110.

[0087] In some embodiments, the first portion P1 of the microSD card includes a reinforcement portion 240. The reinforcement portion 240 is configured to provide additional strength, stability, and durability. For example, reinforcing materials can provide additional strength and stability to thin PCB layouts.

[0088] In a non-limiting example, the reinforcement portion 240 may be provided by a reinforcement material (e.g., epoxy material) applied to the first portion P1 of the microSD card 110.

[0089] In another non-limiting example, the reinforcement portion 240 may be provided by at least one structural feature (e.g., at least one rib and / or at least one protrusion) of the first portion P1 of the microSD card 110.

[0090] In some embodiments, the computing device 200 further includes encapsulation material on a first portion P1 and / or a second portion P2 of the microSD card 110. For example, the encapsulation material may cover substantially the entire microSD card 110.

[0091] In some embodiments, the encapsulation material includes a reinforcing material applied to the first portion P1 of the microSD card 110, or a reinforcing material applied to the first portion P1 of the microSD card 110, or the encapsulation material is provided in addition to the reinforcing material.

[0092] The first portion P1, including the optional reinforcement portion 240 and the encapsulation material, has a height and width configured to fit within an interface device of an external system. For example, the first portion P1 of the microSD card 110 has a height of approximately 1 mm and a width of approximately 11 mm.

[0093] Figure 3 A schematic diagram of a data processing system 300 according to an embodiment of the present disclosure is shown. The data processing system 300 may be a data processing system for uncertainty tracking, but is not limited thereto.

[0094] The computing devices 100 and 200 are configured to be removably inserted into an interface device of an external system, particularly to establish data communication with the external system.

[0095] exist Figure 3 In the example, the external system is host computer 10. The interface device 12 of host computer 10 may be a slot, and the microSD card of computing devices 100, 200 may be configured to be removably inserted into the slot of host computer 10.

[0096] Interface device 12 may include at least one full-size SD slot for computing devices 100, 200 (via microSD to SD adapter) and / or for conventional SD memory cards. Interface device 12 may also include at least one microSD slot for computing devices 100, 200 and / or conventional microSD memory cards.

[0097] When plugged into host computer 10, computing devices 100 and 200 appear as empty and unformatted SD storage devices. Custom FPGA design bitstreams can be loaded from host computer 10 via the SD interface into computing devices 100 and 200. Alternatively, computing devices 100 and 200 may have a built-in C0 RISC-V processor core, which can be used to run custom applications. In this operating mode, host computer 10 can use the SD protocol to exchange data with applications running on computing devices 100 and 200, for example, by creating custom applications that run on host computer 10 and access computing devices 100 and 200, or by using Unix tools such as dd.

[0098] Figure 4 A schematic diagram of a data processing system 400 according to other embodiments of the present disclosure is shown. The data processing system 400 may be a data processing system for uncertainty tracking, but is not limited thereto.

[0099] exist Figure 4 In the example, the external system is carrier module 20. The interface device 22 of carrier module 20 may be a slot, and the microSD card of computing devices 100, 200 may be configured to be removably inserted into the slot of carrier module 20.

[0100] Interface device 22 may include at least one full-size SD slot for computing devices 100, 200 (via microSD to SD adapter) and / or for conventional SD memory cards. Interface device 22 may also include at least one microSD slot for computing devices 100, 200 and / or conventional microSD memory cards. Interface device 22 may also have SD card detection, programmable power cycling, and power measurement capabilities.

[0101] The carrier module 20 may include multiple I / O ports. Examples include, but are not limited to, at least one USB-C downstream port, at least one USB-C upstream port, at least one USB-C powered-only upstream port, at least one mini HDMI port, and JST connectors and GPIO connectors for SPI and I²C peripherals.

[0102] The carrier module 20 can be a compact carrier board and development system for testing and characterizing computing devices 100 and 200.

[0103] The carrier plate may have a plate profile of a mm × b mm. a and b may be substantially the same or may be different. In one example, a may be in the range of 40 mm to 70 mm, and b may be in the range of 40 mm to 70 mm. In another example, a may be in the range of 50 mm to 60 mm, and b may be in the range of 50 mm to 60 mm. In some embodiments, a and / or b may be about 57 mm.

[0104] In some embodiments, the carrier module 20 can be used to connect the carrier module 20 to a host computer (“peripheral configuration”: the carrier module 20 can act as a USB to SD adapter).

[0105] In other embodiments, carrier module 20 may be combined with a processor module (e.g., a Raspberry Pi CM4) to create a compact single-board computer with a hot-swappable FPGA module or uncertainty tracking capability, implemented via inserted computing devices 100, 200 (“Standalone Configuration”: carrier module 20 may act as a Raspberry Pi CM4 motherboard). This standalone configuration also allows for the measurement of power consumption of any computing device 100, 200 inserted with carrier module 20 with microampere-level accuracy.

[0106] The methods described herein may be implemented in software, hardware, or a combination thereof in various embodiments. Various modifications and changes that will be apparent to those skilled in the art are possible with the benefit of this disclosure. The various embodiments described herein are intended to be illustrative and not restrictive. Many variations, modifications, additions, and improvements are possible. Thus, components described herein as a single instance may provide multiple instances. The boundaries between various components, operations, and data storage are somewhat arbitrary, and specific operations are shown in the context of a particular illustrative configuration. Other functional assignments are contemplated and may fall within the scope of the appended claims. Finally, structures and functions presented as discrete components in the example configuration may be implemented as combined structures or components. These and other variations, modifications, additions, and improvements may fall within the scope of the embodiments as defined by the appended claims.

Claims

1. A computing device, comprising: - Micro Secure Digital microSD Card; as well as - One or more Field Programmable Gate Arrays (FPGAs) mounted on a microSD card.

2. The computing device according to claim 1, wherein: - One or more FPGAs are configured to receive a custom FPGA design bitstream for configuring the one or more FPGAs, particularly via a bootloader; and / or - The one or more FPGAs are initially in an unconfigured or pre-configured state and are configured to receive a custom FPGA design bitstream for their configuration; and / or - The one or more FPGAs are configured to be operational immediately.

3. The computing device according to claim 1 or 2, wherein, The computing device is configured to be removably inserted into an interface device of an external system, particularly wherein: - The external system is a host computer, or - A carrier module configured for testing and / or characterizing the computing device.

4. The computing device according to claim 3, wherein, The interface device of the external system is a slot, and the microSD card of the computing device is configured to be removably inserted into the slot of the external system.

5. The computing device according to claim 3 or 4, wherein, The microSD card includes a first part and a second part, wherein the first part is configured to fit within an interface device of the external system, and in particular, the first part is the front portion of the microSD card, and the second part is the rear portion of the microSD card.

6. The computing device according to claim 5, wherein, The one or more FPGAs are disposed at or on the second portion of the microSD card.

7. The computing device according to claim 5 or 6, wherein, The first portion of the microSD card includes a reinforcement portion, particularly wherein the reinforcement portion is provided by a reinforcing material applied to the first portion of the microSD card and / or by at least one structural feature of the first portion of the microSD card.

8. The computing device according to any one of claims 5 to 7, further comprising encapsulation material on the first portion and / or the second portion of the microSD card.

9. The computing device according to claim 8, wherein: - The encapsulation material covers the one or more FPGAs, and / or - The encapsulation material is epoxy material, and / or - The encapsulation material includes a reinforcing material applied to the first portion of the microSD card, or is a reinforcing material applied to the first portion of the microSD card, or the encapsulation material is provided in addition to the reinforcing material.

10. The computing device according to any one of claims 3 to 9, wherein, The computing device is configured to present itself as an empty and / or unformatted SD storage device to external systems.

11. The computing device according to any one of claims 3 to 10, further comprising an interface module configured for data communication with an external system, particularly wherein the interface module is configured for data communication with an external system based on the SD protocol, SD-over-SPI protocol, CXL protocol, PCIe protocol, NVME protocol or USB protocol.

12. The computing device according to any one of claims 1 to 11, wherein, The computing module is configured to process the uncertainty information contained in the input data.

13. A data processing system, comprising: - A computing device according to any one of claims 1 to 12; as well as - An external system, including an interface device configured to receive the computing device.

14. The data processing system according to claim 13, wherein, The external system is - Host computer, or - Carrier modules, especially carrier boards.

15. The data processing system according to claim 13 or 14, wherein, The carrier module can be connected to the processor module to form a single-board computer.

Images