Alternative design selection in integrated circuit generation

Abstract

Alternative design selection in integrated circuit generation includes generating an integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between using the first set of components or using the second set of components. Based on the integrated circuit design, an integrated circuit is caused to be generated.

Description

Background Technology

[0001] This invention relates to methods, apparatus, and products for selecting alternative designs in integrated circuit manufacturing. Summary of the Invention

[0002] According to embodiments of the present invention, various methods, apparatuses, and products for selecting alternative designs in integrated circuit generation are described herein. In some aspects, selecting alternative designs in integrated circuit generation includes generating an integrated circuit design comprising a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components. Based on this integrated circuit design, an integrated circuit is generated. Attached Figure Description

[0003] Figure 1 An example computing environment according to various aspects of the present invention is shown.

[0004] Figure 2 A block diagram of an integrated circuit having a selector component for selecting alternative designs is shown according to various aspects of the present invention.

[0005] Figure 3 A block diagram of an integrated circuit having multiple selector components for selecting alternative designs is shown according to various aspects of the present invention.

[0006] Figure 4 A block diagram of an integrated circuit having a selector component for selecting alternative designs is shown according to other aspects of the present invention.

[0007] Figure 5 A flowchart is shown as an example method for performing alternative design selection in integrated circuit generation according to various aspects of the present invention.

[0008] Figure 6 A flowchart illustrating an example method for performing alternative design selection in integrated circuit generation, according to other aspects of the present invention, is shown. Detailed Implementation

[0009] The creation of integrated circuits (i.e., chips) involves multiple stages, including logic design, physical synthesis, routing, and manufacturing. Each of these stages can include multiple processes that can be performed iteratively. Logic design provides a register-transfer-level (RTL) description. The physical synthesis stage involves identifying and placing components (such as gate logic) to implement the logic design. After optimizing timing and clocking, a netlist can be generated to indicate the interconnections between components. In the routing stage, the placement of wires connecting gates and other components in the netlist is defined. In the manufacturing stage, the finalized design is provided for the physical implementation of the chip. Chips can be designed according to a layered design methodology, which divides the chip into functional circuit components or elements. Logic design and component placement result in a physical implementation that meets the chip's design and performance requirements.

[0010] Design for Manufacturing (DFM) refers to the various "design rules" implemented during the design phase of an integrated circuit (IC) to improve its manufacturability. More specifically, design rules are rules designed to ensure that ICs can be manufactured with economical yield and that they have sufficient reliability during operation. Design rules are typically set by semiconductor manufacturers (i.e., "foundries") based on manufacturing process constraints. Specifically, the trend towards increasingly smaller nodes challenges foundries to overcome limitations in the accuracy and precision of feature sizes and positioning caused by various lithography, chemical, and mechanical processes. For example, diffraction effects, as well as variations in mask placement, depth of focus, and light intensity, can affect the accuracy and precision with which shapes (i.e., IC components) can be patterned on the wafer. IC designs that do not account for such effects may result in higher manufacturing defect rates (e.g., defects due to component compression, breakage, or short circuits). To improve yield and reliability, foundries typically specify design rules controlling various dimensional parameters of the IC design before accepting it for manufacturing by enforcing minimum pitch checks, minimum width checks, minimum area overlap checks, and minimum area variability checks. As process nodes become smaller, foundries typically implement increasingly complex design rules.

[0011] Components in an integrated circuit design can be selected to provide any other best match for optimal yield or metrics. However, as the chip is built, variations can occur in the process and design behavior, and there is no precise way to predict the optimal solution before hardware implementation. One might design what is considered the best possible design, but that design could still result in poor metrics (e.g., poor yield or above-acceptable power). Design decisions to optimize reliability or yield are made during the chip design phase, not after hardware implementation, and hardware feedback is not included in the optimization of reliability (or power or temperature) without another iteration of the design.

[0012] Some examples disclosed herein relate to a method for optimizing reliability for yield by using post-build selectable components. Some examples disclosed herein provide more than one optimal design in the hardware, which can be selected only when needed based on yield (or based on reliability or any other metric). Circuits or circuit components can be selected post-build based on reliability and / or one or more other metrics. This is particularly useful in designs that vary during the manufacturing process. Optimal design options can be selected based on design goals, while, for example, tradeoffs in reliability versus yield, temperature, power, timing, etc. Yield versus reliability (or other tradeoffs) are designed into the integrated circuits to, for example, ultimately obtain a product with better yield. The selection of individual integrated circuits can be implemented during manufacturing after test results are obtained.

[0013] Some examples disclosed in this paper postpone certain design decisions until a single chip has been manufactured and its physical parameters are known. Selection devices can be placed within the application-specific integrated circuit (ASIC) logic, allowing selection, for example, between internal and external reference circuits. The external circuitry can be used only if measurements of a specific instance of the chip indicate its necessity. The unselected circuitry can be used as a backup, with a failover mechanism to switch to the backup circuitry if the selected circuitry fails in the field. Selection decisions can be made after manufacturing (post-hardware) based on hardware testing results, rather than during product design (when manufacturing variations are unknown), and yield optimization does not require estimation based on pre-manufacturing layout.

[0014] In some examples, a balance has been struck between yield and reliability. ASIC manufacturing variability can trigger design decisions between using a larger guard band (which reduces yield) or external structures (which reduces reliability). The ASIC can be manufactured with a larger guard band, but with a loss of yield. Yield losses can be recovered by enabling device selection and adding external components. Yield can be protected by using external devices. Reliability can be protected by limiting external devices to chips that fail to meet tighter guard bands.

[0015] In some examples, minimum chip power may be desired for reasons such as yield, reliability, and sustainability. ASIC manufacturing variability can prevent the optimal design from being known before the chip is built. In such examples, the ASIC can be manufactured and tested with alternative power regulation designs to determine which is optimal for that particular chip instance, and the best-performing regulation can be selected. External components may only be installed if measurements for a specific instance of the chip indicate a need.

[0016] One example of the present invention relates to a method for performing alternative design selection in integrated circuit generation, comprising generating an integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components. The method includes generating the integrated circuit based on the integrated circuit design.

[0017] The method may further include selecting one of a first set of components or a second set of components for use in the integrated circuit based on integrated circuit testing of the first selection component. In some examples of the method, the first metric is yield, and the second metric is reliability. In some examples of the method, the first set of components is an internal set of components, and the second set of components is an external set of components. In some examples of the method, the first set of components is an internal reference voltage circuit and the first metric is reliability, and the second set of components is an external reference voltage circuit and the second metric is yield.

[0018] In some examples of the method, the first selection component is configured to select between using a first set of components in a first part of the integrated circuit or using a second set of components in a first part of the integrated circuit, and the integrated circuit design includes a second selection component configured to select between using the first set of components in a second part of the integrated circuit or using a second set of components in a second part of the integrated circuit.

[0019] In some examples of this method, the first set of components is an on-chip voltage regulator module, and the second set of components is an off-chip voltage regulator module. In some examples of this method, the first set of components is a primary regulated power supply, and the second set of components is a backup regulated power supply.

[0020] Another example of the invention relates to an apparatus including a processing device. The apparatus includes a memory operatively coupled to the processing device, wherein the memory stores computer program instructions that, when executed, cause the processing device to: generate an integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components; and generate an integrated circuit based on the integrated circuit design.

[0021] In some examples of this device, the memory stores computer program instructions that, when executed, also cause the processing device to: cause a first selection component to select one of a first set of components or a second set of components for use in the integrated circuit based on tests of the integrated circuit. In some examples of this device, the first metric is yield, and the second metric is reliability. In some examples of this device, the first set of components is an internal set of components, and the second set of components is an external set of components. In some examples of this device, the first set of components is an internal reference voltage circuit and the first metric is reliability, and the second set of components is an external reference voltage circuit and the second metric is yield.

[0022] In some examples of the device, the first selection component is configured to select between using a first set of components in a first part of the integrated circuit or using a second set of components in a first part of the integrated circuit, and the integrated circuit design includes a second selection component configured to select between using the first set of components in a second part of the integrated circuit or using a second set of components in a second part of the integrated circuit.

[0023] In some examples of this device, the first set of components is an on-chip voltage regulator module, and the second set of components is an off-chip voltage regulator module. In some examples of this device, the first set of components is a primary regulated power supply, and the second set of components is a backup regulated power supply.

[0024] Another example of the invention relates to a computer program product comprising a computer-readable storage medium, wherein the computer-readable storage medium includes computer program instructions that, when executed,: generate an integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components; and generate an integrated circuit based on the integrated circuit design.

[0025] In some examples of this computer program product, the computer-readable storage medium includes computer program instructions that, when executed, cause a first selection component to select either a first set of components or a second set of components for use in the integrated circuit based on tests of the integrated circuit. In some examples of this computer program product, the first metric is yield, and the second metric is reliability. In some examples of this computer program product, the first set of components is an internal set of components, and the second set of components is an external set of components.

[0026] One technical challenge in integrated circuit design and fabrication is that process and design behaviors can differ when building chips, and there may not be an accurate way to predict the optimal solution before hardware implementation. Design decisions for optimizing reliability or yield are made during the chip design phase, not after hardware implementation, and hardware feedback is not included in optimizations for reliability (or power or temperature) without another iteration of the design.

[0027] Examples of the present invention facilitate technical solutions to the technical challenges described above without the drawbacks of existing solutions. Some of the examples disclosed herein provide more than one optimal design in hardware, which can be selected only when needed based on yield (or reliability or any other metric). This is particularly useful in designs where variations exist during the manufacturing process. Optimal design options can be selected based on design goals, while, for example, trade-offs are made between reliability and yield, temperature, power, timing, etc. Yield and reliability trade-offs (or other trade-offs) are designed into integrated circuits to, for example, ultimately result in products with better yields. Examples of the present invention improve the design and manufacture of integrated circuit chips and provide improvements to computing technology. Therefore, examples of the present invention provide practical applications to the technical challenges described herein in the field of computing technology, and particularly in the field of circuits used in computing devices.

[0028] Figure 1 An example computing environment according to various aspects of the present invention is illustrated. The computing environment 100 includes an example of an environment for executing at least some of the computer code (such as integrated circuit design code 107) involved in the various methods described herein. In addition to integrated circuit design code 107, the computing environment 100 includes, for example, a computer 101, a wide area network (WAN) 102, an end-user device (EUD) 103, a remote server 104, a public cloud 105, and a private cloud 106. In this embodiment, the computer 101 includes a processor set 110 (including processing circuitry 120 and a cache 121), a communication infrastructure 111, volatile memory 112, persistent storage 113 (including an operating system 122 and integrated circuit design code 107 as identified above), a peripheral device set 114 (including a user interface (UI) device set 123, a storage device 124, and an Internet of Things (IoT) sensor set 125), and a network module 115. The remote server 104 includes a remote database 130. Public cloud 105 includes gateway 140, cloud orchestration module 141, host physical machine set 142, virtual machine set 143, and container set 144.

[0029] Computer 101 can take the form of a desktop computer, laptop computer, tablet computer, smartphone, smartwatch or other wearable computer, mainframe computer, quantum computer, or any other form of computer or mobile device known now or to be developed in the future capable of running programs, accessing networks, or querying databases (such as remote database 130). As is well known in the field of computer technology, and depending on the technology, the execution of computer-implemented methods can be distributed across multiple computers and / or multiple locations. On the other hand, in this presentation of computing environment 100, the detailed discussion focuses on a single computer (specifically computer 101) to keep the presentation as simple as possible. Computer 101 can reside in the cloud, even... Figure 1 It is not shown in the cloud. On the other hand, unless explicitly stated otherwise, computer 101 is not required to be located in the cloud.

[0030] Processor assembly 110 includes one or more computer processors of any type now known or to be developed in the future. Processing circuitry 120 may be distributed across multiple packages, for example, multiple cooperating integrated circuit chips. Processing circuitry 120 may implement multiple processor threads and / or multiple processor cores. Cache 121 is memory located within the processor chip package(s) and is typically used for data or code that should be quickly accessed by the threads or cores running on processor assembly 110. Cache memory is typically organized into multiple tiers based on its relative proximity to the processing circuitry. Alternatively, some or all of the caches for the processor assembly may be located “off-chip.” In some computing environments, processor assembly 110 may be designed to work in conjunction with qubits and perform quantum computing.

[0031] Computer-readable program instructions are typically loaded onto computer 101 to cause the processor set 110 of computer 101 to perform a series of operational steps to implement a computer-implemented method, such that the instructions, when executed, instantiate the method specified in the flowcharts and / or descriptive descriptions of the computer-implemented method included in this document. These computer-readable program instructions are stored in various types of computer-readable storage media, such as cache 121 and other storage media discussed below. The processor set 110 accesses the program instructions and associated data to control and direct the execution of the computer-implemented method. In computing environment 100, at least some of the instructions for performing the computer-implemented method may be stored in integrated circuit design code 107 in persistent storage device 113.

[0032] Communication structure 111 is a signal transmission path that allows various components of computer 101 to communicate with each other. Typically, this structure consists of switches and conductive paths, such as switches and conductive paths that form buses, bridges, physical input / output ports, etc. Other types of signal communication paths can be used, such as fiber optic communication paths and / or wireless communication paths.

[0033] Volatile memory 112 is any type of volatile memory now known or to be developed in the future. Examples include dynamic random access memory (RAM) or static RAM. Typically, volatile memory 112 is characterized by random access, but this is not required unless explicitly stated otherwise. In computer 101, volatile memory 112 is located in a single package and inside computer 101; however, alternatively or additionally, volatile memory may be distributed across multiple packages and / or located outside computer 101.

[0034] The persistent storage device 113 is any form of non-volatile storage device for a computer that is now known or to be developed in the future. The non-volatility of this storage device means that the stored data is retained regardless of whether the computer 101 is powered or not, or whether the persistent storage device 113 is directly powered. The persistent storage device 113 may be a read-only memory (ROM), but typically at least a portion of the persistent storage device allows data to be written, deleted, and rewritten. Some common forms of persistent storage devices include hard disks and solid-state storage devices. The operating system 122 can take many forms, such as various known proprietary operating systems or open-source portable operating system interface-type operating systems employing a kernel. The code included in the integrated circuit design code 107 typically includes at least some of the computer code involved in performing the computer implementation methods described herein.

[0035] Peripheral device set 114 includes a set of peripheral devices for computer 101. Data communication connections between peripheral devices and other components of computer 101 can be implemented in various ways, such as Bluetooth connectivity, near field communication (NFC) connectivity, connections established via cables (such as Universal Serial Bus (USB) type cables), plug-in connections (e.g., Secure Digital (SD) cards), connections established via local area communication networks, and even connections established via wide area networks (such as the Internet). In various embodiments, UI device set 123 may include components such as displays, speakers, microphones, wearable devices (such as goggles and smartwatches), keyboards, mice, printers, touchpads, game controllers, and haptic devices. Storage device 124 is an external storage device (such as an external hard drive) or a pluggable storage device (such as an SD card). Storage device 124 may be persistent and / or volatile. In some embodiments, storage device 124 may take the form of a quantum computing storage device for storing data in the form of qubits. In embodiments where computer 101 requires a large amount of storage (e.g., where computer 101 locally stores and manages a large database), this storage can be provided by peripheral storage devices designed to store very large amounts of data, such as a storage area network (SAN) shared by multiple geographically distributed computers. The IoT sensor set 125 consists of sensors that can be used for Internet of Things (IoT) applications. For example, one sensor could be a thermometer, and another sensor could be a motion detector.

[0036] Network module 115 is a collection of computer software, hardware, and firmware that allows computer 101 to communicate with other computers via WAN 102. Network module 115 may include hardware (such as a modem or Wi-Fi transceiver), software for packetizing and / or depacketizing data for transmission over the communication network, and / or web browser software for communicating data over the Internet. In some embodiments, the network control and network forwarding functions of network module 115 are executed on the same physical hardware device. In other embodiments (e.g., embodiments utilizing software-defined networking (SDN), the control and forwarding functions of network module 115 are executed on physically separate devices, such that the control function manages several different network hardware devices. Computer-readable program instructions for performing computer-implemented methods can typically be downloaded to computer 101 from an external computer or external storage device via a network adapter card or network interface included in network module 115.

[0037] WAN 102 is any wide area network (e.g., the Internet) capable of communicating computer data over non-local distances using any technology (now known or to be developed in the future) for communicating computer data. In some embodiments, WAN 102 can be replaced and / or supplemented by a local area network (LAN) designed for communicating data between devices located within a local area (such as a Wi-Fi network). WANs and / or LANs typically include computer hardware such as copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and edge servers.

[0038] End User Equipment (EUD) 103 is any computer system used and controlled by an end user (e.g., a customer of the enterprise operating computer 101) and can take any of the forms discussed above in conjunction with computer 101. EUD 103 typically receives useful and beneficial data from the operation of computer 101. For example, assuming computer 101 is designed to provide recommendations to the end user, these recommendations are typically transmitted from computer 101's network module 115 to EUD 103 via WAN 102. In this way, EUD 103 can display or otherwise present the recommendations to the end user. In some embodiments, EUD 103 can be a client device, such as a thin client, a thick client, a mainframe computer, a desktop computer, etc.

[0039] Remote server 104 is any computer system that provides at least some data and / or functionality to computer 101. Remote server 104 can be controlled and used by the same entity operating computer 101. Remote server 104 represents multiple machines that collect and store useful and beneficial data for use by other computers, such as computer 101. For example, in cases where computer 101 is designed and programmed to provide recommendations based on historical data, this historical data can be provided to computer 101 from a remote database 130 of remote server 104.

[0040] Public cloud 105 is any computer system available to multiple entities, providing on-demand availability of computer system resources and / or other computing capabilities (especially data storage (cloud storage) and computing power) without direct active management by users. Cloud computing typically leverages resource sharing to achieve consistency and economies of scale. Direct active management of the computing resources of public cloud 105 is performed by the computer hardware and / or software of cloud orchestration module 141. The computing resources provided by public cloud 105 are typically implemented through virtual computing environments running on various computers constituting the host physical machine set 142, which is the entirety of physical computers in and / or available to public cloud 105. Virtual computing environments (VCEs) typically take the form of virtual machines from virtual machine set 143 and / or containers from container set 144. It should be understood that these VCEs can be stored as images and can be transferred as images between and among various physical machine hosts or after VCE instantiation. The cloud orchestration module 141 manages the delivery and storage of images, deploys new instantiations of VCE, and manages active instantiations of VCE deployments. Gateway 140 is a collection of computer software, hardware, and firmware that allows the public cloud 105 to communicate via WAN 102.

[0041] We will now provide further explanation of Virtualized Computing Environments (VCEs). A VCE can be stored as an "image." New active instances of a VCE can be instantiated from an image. Two common types of VCEs are virtual machines and containers. A container is a VCE that uses operating system-level virtualization. This refers to an operating system feature where the kernel allows multiple isolated user-space instances (called containers) to exist. From the perspective of the programs running within them, these isolated user-space instances typically appear as real computers. Computer programs running on a regular operating system can utilize all the resources of that computer, such as connected devices, files and folders, network shares, CPU power, and quantifiable hardware capabilities. However, programs running within a container can only use the contents of that container and the devices allocated to that container; this characteristic is called containerization.

[0042] Private cloud 106 is similar to public cloud 105, except that the computing resources are available only to a single enterprise. While private cloud 106 is depicted as communicating with WAN 102, in other embodiments, private cloud may be completely disconnected from the internet and accessible only via a local / private network. A hybrid cloud is a combination of multiple clouds of different types (e.g., private, community, or public cloud types), typically implemented by different vendors. Each of the multiple clouds remains an independent and discrete entity, but the larger hybrid cloud architecture is bound together by standardized or proprietary technologies that enable orchestration, management, and / or data / application portability between the multiple component clouds. In this embodiment, public cloud 105 and private cloud 106 are both parts of a larger hybrid cloud.

[0043] Figure 2 A block diagram of an integrated circuit 200 having a selector component for selecting alternative designs is shown according to various aspects of the present invention. The integrated circuit 200 can utilize integrated circuit design code 107 (…). Figure 1 The integrated circuit 200 is designed to be compatible with various circuitry. In some examples, the integrated circuit 200 is an ASIC. In some examples, the integrated circuit 200 may include internal circuitry, such as SRAM, that uses a reference voltage Vref. The integrated circuit 200 includes a selector component 206 having inputs 202 and 204, an output 208, and a control signal input 210. The selector component 206 may be a scan-only latch, an electronic fuse, or another type of component for selecting among multiple inputs. Input 202 of the selector component 206 is configured to be coupled to a Vref_int reference voltage, which is an internally (on-chip) generated reference voltage that offers high reliability but limits yield. Input 204 of the selector component 206 is configured to be coupled to a Vref_ext reference voltage, which is an externally (off-chip) generated reference voltage that does not limit yield, but its external components and connectors reduce reliability.

[0044] Selector component 206 also includes a control signal input 210 for receiving a select signal indicating which of the two inputs 202 and 204 will be output from selector component 206. The selected input is output as a reference voltage Vref via output 208 of selector component 206. The selection of the optimal solution (e.g., internal or external reference voltage) may not be known until data from chip manufacturing is available. This data may be unknown during chip design and may change with the wafer. The examples disclosed herein enable the selection of the optimal solution post-silicon after chip data is available. In some examples, most chips will use internal circuitry, and overall reliability will not be significantly affected by a few chips using external components.

[0045] Figure 3 A block diagram of an integrated circuit 300 having multiple selector components for selecting alternative designs is shown according to various aspects of the present invention. The integrated circuit 300 can utilize integrated circuit design code 107 (…). Figure 1 The design is based on the principle of ASIC design. In some examples, integrated circuit 300 is an ASIC. Some parts of the chip may require higher voltages to achieve the same performance level as the rest of the chip. This problem can be solved by using dedicated on-chip regulators for each chiplet. These regulators may be more reliable than off-chip voltage regulator module (VRM) components, but may suffer yield losses due to accuracy issues. Integrated circuit 300 solves this problem by providing the ability to select between on-chip (more reliable) and off-chip (less reliable) voltage regulator modules. This selection can be made individually for specific chiplets after the design is complete and yield data is obtained.

[0046] Integrated circuit 300 includes selector components 304 and 312 with common inputs 306 and 308. Selector component 304 includes an output 302 and a control signal input 310. Selector component 312 includes an output 314 and a control signal input 316. Selector components 304 and 312 may be scan-only latches, eFuses, or another type of component for selecting among multiple inputs. Input 306 of selector components 304 and 312 is configured to couple to an on-chip voltage regulator module located inside integrated circuit 300, offering high reliability but limiting yield. Input 308 of selector components 304 and 312 is configured to couple to an off-chip voltage regulator module located outside integrated circuit 300, not limiting yield, but its external components and connectors reduce reliability.

[0047] Selector component 304 includes a control signal input 310 for receiving a select 1 signal indicating which of the two inputs 306 and 308 will be output from selector component 304. The selected input is output as voltage VDD1 via output 302 of selector component 304. Selector component 312 includes a control signal input 316 for receiving a select 2 signal indicating which of the two inputs 306 and 308 will be output from selector component 312. The selected input is output as voltage VDD2 via output 314 of selector component 312. The selection of the optimal solution (e.g., on-chip VRM or off-chip VRM) may not be known until data from chip manufacturing is available. This data may be unknown during chip design and may change with the wafer. The examples disclosed herein enable the selection of the optimal solution after silicon availability. In some examples, most chips will use on-chip VRMs, and overall reliability will not be significantly affected by a small number of chips using off-chip VRMs.

[0048] Figure 4 A block diagram of an integrated circuit 400 having a selector component for selecting alternative designs is shown according to other aspects of the present invention. The integrated circuit 400 can utilize integrated circuit design code 107 (…). Figure 1 The integrated circuit 400 is designed to be compatible with various circuits. In some examples, the integrated circuit 400 is an ASIC. Some chips may be power-limited, and higher power may reduce chip reliability over time. The integrated circuit 400 addresses this issue by providing the ability to select an alternative regulated power supply as a low-power option for the chip instead of using the main regulated power supply. The integrated circuit 400 includes a selector component 406 having inputs 402 and 404, an output 408, and a control signal input 410. The selector component 406 may be a scan latch, an eFuse, or another type of component for selecting among multiple inputs. Input 402 of the selector component 406 is configured to be coupled to the main regulated power supply. Input 404 of the selector component 406 is configured to be coupled to an alternative regulated power supply.

[0049] The selector component 406 also includes a control signal input 410 for receiving a selection signal indicating which of the two inputs 402 and 404 will be output from the selector component 406. The selected input is output as a voltage VDD via an output 408 of the selector component 406. The selection of the optimal solution (e.g., primary or alternative regulated power supply) may not be known until data from chip manufacturing is available. This data may be unknown during chip design and may change with the wafer. The examples disclosed herein enable the selection of the optimal solution after silicon, once chip data is available. In some examples, most chips will use the primary regulated power supply, and hardware-post-selection using an alternative regulated power supply may only be made for chips exceeding the power budget, thus limiting the use of the alternative regulated power supply while improving system reliability.

[0050] Figure 5 A flowchart of an example method 500 for performing alternative design selection in integrated circuit generation according to various aspects of the present invention is shown. In a particular embodiment, method 500 utilizes integrated circuit design code 107 ( Figure 1 Method 500 includes designing an integrated circuit 502 with selectable modes. In some examples, the modes include a first mode corresponding to a first design selection and using one or more higher yield and lower reliability circuit components, and a second mode corresponding to a second design selection and using one or more lower yield (e.g., lower than the first mode) and higher reliability (e.g., higher than the first mode) circuit components. Method 500 also includes building an integrated circuit 504 with multiple selectable components into a system. In some examples, each of the multiple selectable components corresponds to one of the selectable modes. Method 500 also includes testing the system 506 according to predefined yield specifications.

[0051] At 508, method 500 includes determining whether the system meets yield metrics. If it is determined at 508 that the system does not meet yield metrics, then method 500 moves to 510 to select a higher yield and lower reliability circuit component. In some examples, the higher yield and lower reliability circuit component is external to the integrated circuit. If it is determined at 508 that the system does not meet yield metrics, then method 500 moves to 512 to select a lower yield and higher reliability circuit component. In some examples, the lower yield and higher reliability circuit component is internal to the integrated circuit. In some examples of method 500, net reliability is higher because, in most cases, a higher reliability component is selected unless it affects yield.

[0052] Figure 6A flowchart is shown illustrating an example method 600 for performing alternative design selection in integrated circuit generation according to other aspects of the invention. In a particular embodiment, method 600 utilizes integrated circuit design code 107 ( Figure 1 The method 600 includes generating an integrated circuit design 602, the integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components. The method 600 also includes generating an integrated circuit 604 based on the integrated circuit design.

[0053] Various aspects of the present invention are described by narrative text, flowcharts, block diagrams of computer systems, and / or block diagrams of machine logic included in embodiments of a computer program product (CPP). For any flowchart, depending on the art involved, operations may be performed in a different order than that shown in the given flowchart. For example, also according to the art involved, two operations shown in consecutive flowchart frames may be performed in reverse order, as a single integrated step, simultaneously, or in a manner that at least partially overlaps in time.

[0054] Computer program product embodiment (“CPP embodiment” or “CPP”) is a term used in this disclosure to describe any collection of one or more storage media (also referred to as “media”) collectively included in one or more sets of storage devices that collectively comprise machine-readable code corresponding to instructions and / or data for performing the computer operations specified in a given CPP claim. A “storage device” is any tangible device capable of holding and storing instructions for use by a computer processor. Without limitation, a computer-readable storage medium can be an electronic storage medium, a magnetic storage medium, an optical storage medium, an electromagnetic storage medium, a semiconductor storage medium, a mechanical storage medium, or any suitable combination of the foregoing. Some known types of storage devices that include these media include: disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), static random access memory (SRAM), optical disc read-only memory (CD-ROM), digital versatile optical disc (DVD), memory sticks, floppy disks, mechanical encoding devices (such as punched cards or pits / grooves formed on the main surface of the disk), or any suitable combination of the foregoing. The term "computer-readable storage medium" as used in this disclosure should not be construed as a storage device that is itself a transient signal, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through waveguides, optical pulses transmitted through fiber optic cables, electrical signals transmitted through wires, and / or other transmission media. As those skilled in the art will understand, during normal operation of a storage device, data is typically moved at certain incidental points in time (such as during access, defragmentation, or garbage collection), but this does not make the storage device transient, because the data is not transient when it is stored.

[0055] The description of various embodiments of the invention is presented for illustrative purposes and is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope of the described embodiments. The terminology used herein is intended to best explain the principles of the embodiments, their practical application or improvement relative to technologies found on the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A method for performing alternative design selection during integrated circuit generation, comprising: Generate an integrated circuit design, the integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components; as well as The integrated circuit is generated based on the integrated circuit design.

2. The method according to claim 1, further comprising: The first selection component selects either the first set of components or the second set of components for use in the integrated circuit based on tests of the integrated circuit.

3. The method of claim 1, wherein the first indicator is yield and the second indicator is reliability.

4. The method according to claim 1, wherein the first set of components is an internal set of components, and the second set of components is an external set of components.

5. The method of claim 1, wherein the first component set is an internal reference voltage circuit and the first metric is reliability, and wherein the second component set is an external reference voltage circuit and the second metric is yield.

6. The method of claim 1, wherein the first selection component is configured to select between using a first set of components in a first portion of the integrated circuit or using a second set of components in a first portion of the integrated circuit, and wherein the integrated circuit design includes a second selection component, the second selection component being configured to select between using the first set of components in a second portion of the integrated circuit or using the second set of components in a second portion of the integrated circuit.

7. The method of claim 6, wherein the first set of components is an on-chip voltage regulator module and the second set of components is an off-chip voltage regulator module.

8. The method of claim 1, wherein the first set of components is a primary regulating power supply and the second set of components is a secondary regulating power supply.

9. An apparatus comprising: Processing equipment; as well as A memory operatively coupled to the processing device, wherein the memory stores computer program instructions that, when executed, cause the processing device to: Generate an integrated circuit design, the integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components; as well as The integrated circuit is generated based on the integrated circuit design.

10. The apparatus of claim 9, wherein the memory stores computer program instructions, which, when executed, further cause the processing device to: The first selection component selects whether to use the first set of components or the second set of components in the integrated circuit based on tests of the integrated circuit.

11. The apparatus of claim 9, wherein the first metric is yield and the second metric is reliability.

12. The apparatus of claim 9, wherein the first set of components is an internal set of components and the second set of components is an external set of components.

13. The apparatus of claim 9, wherein the first component set is an internal reference voltage circuit and the first metric is reliability, and wherein the second component set is an external reference voltage circuit and the second metric is yield.

14. The apparatus of claim 9, wherein the first selection component is configured to select between using the first set of components or using the second set of components in a first portion of the integrated circuit, and wherein the integrated circuit design includes a second selection component configured to select between using the first set of components or using the second set of components in a second portion of the integrated circuit.

15. The apparatus of claim 14, wherein the first set of components is an on-chip voltage regulator module and the second set of components is an off-chip voltage regulator module.

16. The apparatus of claim 9, wherein the first set of components is a main regulating power supply and the second set of components is an alternative regulating power supply.

17. A computer program product comprising a computer-readable storage medium, wherein the computer-readable storage medium includes computer program instructions that, when executed: Generate an integrated circuit design, the integrated circuit design including a first set of components configured to optimize a first metric, a second set of components configured to optimize a second metric different from the first metric, and a first selection component configured to select between the use of the first set of components or the use of the second set of components; and The integrated circuit is generated based on the integrated circuit design.

18. The computer program product of claim 17, wherein the computer-readable storage medium comprises computer program instructions that, when executed: The first selection component selects whether to use the first set of components or the second set of components in the integrated circuit based on the testing of the integrated circuit.

19. The computer program product of claim 17, wherein the first metric is yield and the second metric is reliability.

20. The computer program product of claim 17, wherein the first set of components is an internal set of components and the second set of components is an external set of components.

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