Integrated battery and method of manufacturing the same

Abstract

An integrated battery is provided in an embodiment. The integrated battery includes a substrate having a plurality of holes, a plurality of patterns disposed within the plurality of holes of the substrate and having a polarity opposite to a polarity of the substrate, a plurality of energy source patterns configured to emit beta rays to the substrate and the plurality of patterns, a plurality of first patterns surrounded by the plurality of energy source patterns, and a plurality of second patterns surrounded by the plurality of first patterns.

Description

Technical Field

[0001] This disclosure relates to an integrated battery and a method for manufacturing the same. This application claims priority based on Korean Patent Application No. 10-2024-0128699, filed September 24, 2024, and Korean Patent Application No. 10-2025-0136613, filed September 22, 2025, the entire contents of which are incorporated herein by reference. Background Technology

[0002] A beta cell (or beta radioactive cell) is a radioactive battery that generates electricity using the beta decay of a radioactive isotope. Typically, beta cells utilize a radioactive isotope that emits beta rays and a semiconductor material to produce electricity. Beta cells operate by directly converting the energy emitted during radioactive decay into electrical energy.

[0003] Beta batteries can continuously generate energy during the half-life of a radioactive isotope, resulting in an extremely long lifespan. Furthermore, beta batteries can provide power continuously regardless of environmental conditions, allowing for stable operation even in extreme environments. Summary of the Invention

[0004] Technical issues

[0005] This disclosure relates to an integrated battery and a method for manufacturing the same.

[0006] Technical solution

[0007] Embodiments of this disclosure provide an integrated battery. The integrated battery includes a substrate having a plurality of holes, a plurality of patterns disposed within the plurality of holes of the substrate and having a polarity opposite to that of the substrate, a plurality of energy source patterns configured to emit beta rays toward the substrate and the plurality of patterns, a plurality of first patterns surrounded by the plurality of energy source patterns, and a plurality of second patterns surrounded by the plurality of first patterns.

[0008] Multiple energy source patterns can each be located between one of the corresponding patterns in the multiple first patterns and one of the corresponding patterns in the multiple patterns.

[0009] Multiple first patterns may each have the same conductivity type as the substrate, and multiple second patterns may each have the same conductivity type as each of the multiple patterns.

[0010] Multiple first patterns may each have the same conductivity type as each of the multiple patterns, and multiple second patterns may each have the same conductivity type as the substrate.

[0011] The lower surfaces of the multiple patterns, the lower surfaces of the multiple energy source patterns, the lower surfaces of the multiple first patterns, and the lower surfaces of the multiple second patterns can be coplanar with the lower surface of the substrate.

[0012] The lower surfaces of the multiple patterns, the lower surfaces of the multiple energy source patterns, and the lower surfaces of the multiple first patterns can be coplanar with the lower surface of the substrate, and the multiple first patterns can each have a cup shape.

[0013] The lower surfaces of the multiple energy source patterns can be coplanar with the lower surface of the substrate, and each of the multiple energy source patterns can have a cup shape.

[0014] The lower surfaces of each of the multiple patterns can be coplanar with the lower surface of the substrate, and each of the multiple patterns can have a cup shape.

[0015] An integrated battery is provided in this embodiment. The integrated battery includes: a substrate having a plurality of holes; a plurality of patterns disposed in the plurality of holes of the substrate and having a polarity opposite to that of the substrate; a plurality of energy source patterns located in the plurality of holes; a plurality of first patterns disposed in the plurality of holes and spaced apart from the plurality of patterns; and a plurality of second patterns located in the plurality of holes.

[0016] Multiple energy source patterns can each be freely surrounded by one of the corresponding patterns.

[0017] Multiple first patterns can each be freely surrounded by one of the multiple energy source patterns.

[0018] Multiple second patterns can each freely surround one of the multiple first patterns.

[0019] An integrated battery is provided in this embodiment. The integrated battery includes a substrate having multiple recesses, a layer on the substrate, an energy source layer on the layer, a first layer on the energy source layer, and a second layer on the first layer.

[0020] The layer may have a conductivity type opposite to that of the substrate, and the first layer may have a conductivity type opposite to that of the second layer.

[0021] The first layer can have the same conductivity type as the substrate, and the second layer can have the same conductivity type as the layer.

[0022] The first layer may have the same conductivity type as the layer, and the second layer may have the same conductivity type as the substrate.

[0023] The substrate may include an electrical region having multiple recesses and a contact region spaced apart from the multiple recesses, wherein the substrate, the layer, the energy source layer, the first layer and the second layer may form a stepped structure in the contact region.

[0024] In the contact area, the substrate can protrude horizontally relative to the layer.

[0025] In the contact area, this layer can protrude horizontally relative to the first layer.

[0026] In the contact area, the first layer can protrude horizontally relative to the second layer.

[0027] The first unit, which includes a substrate and layers, can be connected in series with the second unit, which includes a first layer and a second layer.

[0028] The first unit, which includes a substrate and layers, can be connected in parallel with the second unit, which includes a first layer and a second layer.

[0029] The integrated battery may also include a first through-hole on the substrate, a second through-hole on the layer, a third through-hole on the first layer, and a fourth through-hole on the second layer.

[0030] The first through-hole to the fourth through-hole may each include a passivation layer and a conductive layer surrounded by the passivation layer.

[0031] The first through hole can penetrate the layer, the first layer, and the second layer.

[0032] The second through hole can penetrate through both the first and second layers.

[0033] The third through hole can penetrate the second layer.

[0034] The substrate may include an electrical region having multiple recesses, and a first contact region and a second contact region spaced apart from each other, the electrical region being located between the first contact region and the second contact region, a first through-hole and a third through-hole being located on the first contact region, and a second through-hole and a fourth through-hole being located on the second contact region.

[0035] The integrated battery may also include wires connected to the second and fourth through holes.

[0036] The substrate may include an electrical region having multiple recesses, and a first contact region and a second contact region spaced apart from each other, the electrical region being located between the first contact region and the second contact region, a second through-hole and a third through-hole being located on the first contact region, and a first through-hole and a fourth through-hole being located on the second contact region.

[0037] The integrated battery may also include a first wire connected to the second and third through holes, and a second wire connected to the first and fourth through holes.

[0038] Beneficial effects

[0039] The integrated battery of this disclosure includes an energy source having a uniform thickness and conformal shape, thereby reducing the amount of energy source material used to manufacture the integrated battery and lowering the manufacturing cost of the integrated battery. A pn ​​junction and a depletion region are formed on opposite sides of the energy source, thereby improving the energy efficiency of the integrated battery.

[0040] The effects achievable by the embodiments of this disclosure are not limited to those described above, and those skilled in the art to which the embodiments of this disclosure pertain will clearly derive and understand from the following description other effects not described herein. In other words, those skilled in the art can derive from the embodiments of this disclosure unintended effects that can be achieved by implementing the embodiments of this disclosure. Attached Figure Description

[0041] Figure 1 This is a flowchart of a method for manufacturing an integrated battery according to an embodiment.

[0042] Figure 2 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0043] Figure 3 It is along Figure 2 The cross-sectional view taken from 2I-2I'.

[0044] Figure 4 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0045] Figure 5 It is along Figure 4 The cross-sectional view taken from 4I-4I'.

[0046] Figure 6 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0047] Figure 7 It is along Figure 6 The cross-sectional view taken from 6I-6I'.

[0048] Figure 8 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0049] Figure 9 It is along Figure 8 The cross-sectional view taken from 8I-8I'.

[0050] Figure 10 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0051] Figure 11 It is along Figure 10 The cross-sectional view taken from 10I-10I'.

[0052] Figure 12 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0053] Figure 13 It is along Figure 12 The cross-sectional view taken from 12I-12I'.

[0054] Figure 14 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0055] Figure 15 It is along Figure 14 The cross-sectional view taken from 14I-14I'.

[0056] Figure 16 This is a cross-sectional view illustrating a method for manufacturing an integrated battery according to an embodiment. More specifically, Figure 16 It shows the corresponding Figure 15 Components.

[0057] Figure 17 This is a diagram used to describe an integrated battery according to other embodiments.

[0058] Figure 18 This is a diagram used to describe an integrated battery according to other embodiments.

[0059] Figure 19 This is a diagram used to describe an integrated battery according to other embodiments.

[0060] Figure 20 This is a diagram used to describe an integrated battery according to other embodiments.

[0061] Figure 21 This is a plan view of an integrated battery according to an embodiment.

[0062] Figure 22 It is along Figure 21 The cross-sectional view taken from 21I-21I'.

[0063] Figure 23 This is a plan view of an integrated battery according to an embodiment.

[0064] Figure 24 It is along Figure 23 The cross-sectional view taken from 23I-23I'.

[0065] Figure 25 This is a plan view of an integrated battery according to an embodiment.

[0066] Figure 26 It is along Figure 25 The cross-sectional view taken from 25I-25I'.

[0067] Figure 27 This is a plan view of an integrated battery according to an embodiment.

[0068] Figure 28 It is along Figure 27 The cross-sectional view taken from 27I-27I'.

[0069] Figure 29 This is a flowchart of a method for manufacturing an integrated battery according to an embodiment.

[0070] Figure 30 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0071] Figure 31 It is along Figure 30 The cross-sectional view taken from 30I-30I'.

[0072] Figure 32 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0073] Figure 33 It is along Figure 32 The cross-sectional view taken from 32I-32I'.

[0074] Figure 34 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0075] Figure 35 along Figure 34 The cross-sectional view taken from 34I-34I'.

[0076] Figure 36 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0077] Figure 37 It is along Figure 36 The cross-sectional view taken from 36I-36I'.

[0078] Figure 38 This is a cross-sectional view of the integrated battery in the implementation method.

[0079] Figure 39 This is a cross-sectional view of the integrated battery in the implementation method.

[0080] Figure 40 This is a plan view of an integrated battery according to an embodiment.

[0081] Figure 41 It is along Figure 40 The cross-sectional view taken from 40I-40I'.

[0082] Figure 42 This is a cross-sectional view of the integrated battery in the implementation method.

[0083] Figure 43 This is a cross-sectional view of the integrated battery in the implementation method.

[0084] Figure 44 This is a cross-sectional view of the integrated battery in the implementation method.

[0085] Figure 45 This is a cross-sectional view of the integrated battery in the implementation method.

[0086] Figure 46 This is a flowchart of a method for manufacturing an integrated battery according to other embodiments.

[0087] Figures 47 to 53 This is a cross-sectional view used to illustrate a method for manufacturing an integrated battery according to other embodiments. Detailed Implementation

[0088] In the following, embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Before describing embodiments of the present disclosure, the terms or expressions used in this specification and claims should not be construed as limited to their commonly understood or defined meanings in common dictionaries, but should be understood according to the meanings and concepts corresponding to the present disclosure, based on the principle that the inventors of this application can appropriately define the terms or expressions to best interpret the present disclosure.

[0089] Therefore, the embodiments described herein and the structures shown in the accompanying drawings are merely examples of this disclosure and do not reflect all the technical ideas of this disclosure. It should be understood that various equivalent forms and variations of the above structures may exist as of the filing date of this application.

[0090] Where it is determined that well-known configurations or functions related to the description of this disclosure would obscure the subject matter of this disclosure due to unnecessary detail, they will not be described in detail.

[0091] Because the embodiments of this disclosure are provided to explain this disclosure more fully to those skilled in the art, the shapes, dimensions, etc. of the components shown in the accompanying drawings may be enlarged, omitted, or schematically illustrated for clarity. Therefore, it should not be construed that the dimensions or proportions of the components completely reflect their actual dimensions or proportions.

[0092] (First Embodiment and Second Embodiment)

[0093] Figure 1 This is a flowchart of the manufacturing method for integrated batteries.

[0094] Figure 2 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0095] Figure 3 It is along Figure 2 The cross-sectional view taken from 2I-2I'.

[0096] Figure 4 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0097] Figure 5It is along Figure 4 The cross-sectional view taken from 4I-4I'.

[0098] Figure 6 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0099] Figure 7 It is along Figure 6 The cross-sectional view taken from 6I-6I'.

[0100] Figure 8 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0101] Figure 9 It is along Figure 8 The cross-sectional view taken from 8I-8I'.

[0102] Figure 10 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0103] Figure 11 It is along Figure 10 The cross-sectional view taken from 10I-10I'.

[0104] Figure 12 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0105] Figure 13 It is along Figure 12 The cross-sectional view taken from 12I-12I'.

[0106] Figure 14 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0107] Figure 15 It is along Figure 14 The cross-sectional view taken from 14I-14I'.

[0108] Figure 16 This is a cross-sectional view illustrating a method for manufacturing an integrated battery according to an embodiment. More specifically, Figure 16 It shows the relationship with Figure 15 Corresponding components.

[0109] Reference Figures 1 to 3 At P110, a substrate 110 may be provided. According to embodiments, the substrate 110 may include a diamond substrate, a SiC substrate, a GaN substrate, a Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / GeO2 substrate, a Sm2O3 / Bi2O3 / B2O3 substrate, a Sm2O3 / Bi2O3 / GeO2 / B2O3 substrate, or a sapphire substrate.

[0110] The substrate 110 may be treated by ion implantation or ion diffusion. The substrate 110 may be doped with a first conductivity type dopant. The first conductivity type dopant may be a p-type dopant or an n-type dopant.

[0111] The p-type dopant may include at least one of boron (B), aluminum (Al), gallium (Ga), or indium (In). The n-type dopant may include at least one of nitrogen (N), phosphorus (P), arsenic (As), or antimony (Sb).

[0112] The substrate 110 may include a metal oxide having a bandgap energy of 2.7 eV or more. In some embodiments, the substrate 110 may include a material represented by AMO3 (here, A represents at least one material selected from the group consisting of La, Ba, Sr, and K, and M represents at least one material selected from the group consisting of Al, In, Ga, Ti, Sn, Hf, Ta, and Zr).

[0113] For example, the substrate 110 may include BaSnO3, BaHfO3, BaZrO3, BaHf 1-x Ti x O3 (here, 0<x<1), Ba 1- x La x SnO3 (here, 0<x<1), Bi4Ge3O 12 , Al2O3, Y2O3, La2O3, Ga2O3, Bi2O3, ZrO2, HfO2, Ta2O5, TiO2, LaInO3, LaGaO3, SrZrO3, SrHfO3, SrTaO7, LaIn 1-x Ga x O3 (here, 0<x<1), LaGaO3, SrTiO3, KTaO3, HfSiO4, Ta3Ti2O x (here, 0<x<1) or at least one of LaAlO3.

[0114] Next, referring to Figure 1 , Figure 4 and Figure 5 , at P120, the substrate 110 may be patterned. The substrate 110 may be patterned by reactive ion etching (RIE) including low-temperature etching or ion beam etching. The substrate 110 may be patterned by a laser beam. The substrate 110 may be patterned by anisotropic wet etching.

[0115] Before patterning the substrate 110, a mask pattern can be formed on the substrate 110. The mask pattern can be formed by photolithography. The mask pattern can expose the portion of the substrate 110 to be etched (i.e., the portion where multiple recesses 110R will be formed) and cover the non-etched portion of the substrate 110 (i.e., the portion between the multiple recesses 110R). A hard mask can be further disposed between the mask pattern and the substrate 110.

[0116] A plurality of recesses 110R can be formed by patterning the substrate 110. According to an embodiment, when viewed from above, the plurality of recesses 110R may have a circular shape. When viewed from above, the plurality of recesses 110R may have a circular shape, or they may have a circular planar shape.

[0117] Two directions substantially parallel to the upper surface 110U of the substrate 110 are defined as the X-axis and Y-axis directions, respectively, and a direction substantially perpendicular to the X-axis and Y-axis directions is defined as the Z-axis direction. The X-axis, Y-axis, and Z-axis directions can be substantially perpendicular to each other.

[0118] According to the embodiment, the plurality of recesses 110R can be arranged in a honeycomb structure. It can be understood that when the plurality of recesses 110R are arranged in a honeycomb structure, the center 110RC of the plurality of recesses 110R is located at the vertices and center of a plurality of regular hexagons of the same size and filled with planes.

[0119] The plurality of recesses 110R may each have a variable width along the Z-axis direction (e.g., a horizontal width, such as width in the X-axis direction and width in the Y-axis direction). The plurality of recesses 110R may each have a tapered shape along the Z-axis direction. The plurality of recesses 110R may each extend from the upper surface 110U along the Z-axis direction, and the width of each of the plurality of recesses 110R may decrease as the distance between the plurality of recesses 110R and the upper surface 110U increases. The width of each of the plurality of recesses 110R at a first depth from the upper surface 110U may be less than the width of each of the plurality of recesses 110R at a second depth from the upper surface 110U, the second depth being less than the first depth.

[0120] Next, refer to Figure 1 , Figure 6 and Figure 7 At P130, layer 120L can be formed. Layer 120L can have a uniform thickness and therefore a conformal shape. It can be understood that when layer 120L has a conformal shape, the shape of the structure prior to the formation of layer 120L (i.e., substrate 110 and multiple recesses 110R) is transferred to the shape of layer 120L.

[0121] Layer 120L may be formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD), but is not limited thereto. Layer 120L may be formed by subjecting a metal layer formed by metal CVD to an oxidation process.

[0122] Layer 120L may include a metal oxide having a band gap energy of 2.7 eV or more. In some embodiments, layer 120L may include a material represented by AMO3 (where A represents at least one material selected from the group consisting of La, Ba, Sr and K, and M represents at least one material selected from the group consisting of Al, In, Ga, Ti, Sn, Hf, Ta and Zr).

[0123] For example, layer 120L may include BaSnO3, BaHfO3, BaZrO3, BaHf 1-x Ti x O3 (where 0<x<1), Ba 1- x La x SnO3 (where 0<x<1), Bi4Ge3O 12 , Al2O3, Y2O3, La2O3, Ga2O3, Bi2O3, ZrO2, HfO2, Ta2O5, TiO2, LaInO3, LaGaO3, SrZrO3, SrHfO3, SrTaO7, LaIn 1-x Ga x O3 (where 0<x<1), LaGaO3, SrTiO3, KTaO3, HfSiO4, Ta3Ti2O x (where 0<x<1) or at least one of LaAlO3.

[0124] Layer 120L is stable even in high-temperature and high-humidity environments, and has high carrier mobility. Carriers do not undergo inelastic collisions when moving in layer 120L. Therefore, an integrated battery fabricated based on layer 120L can have high energy efficiency and excellent heat dissipation characteristics.

[0125] According to an embodiment, the carrier mobility in layer 120L may be about 45 cm 2 / (V·s) or more. According to an embodiment, the carrier mobility in layer 120L may be about 80 cm 2 / (V·s) or more. According to an embodiment, the carrier mobility in layer 120L may be about 120 cm 2 / (V·s) or more. According to an embodiment, the carrier mobility in layer 120L may be about 300 cm 2 / (Vs) or more. Layer 120L may include doped semiconductor materials, compound semiconductors, oxide semiconductors, or metal alloys. According to an embodiment, layer 120L may include one of the following: silicon (Si) doped with boron (B), silicon (Si) doped with phosphorus (P) or arsenic (As), gallium arsenide (GaAs) doped with zinc (Zn), gallium arsenide (GaAs) doped with silicon (Si) or tellurium (Te), germanium (Ge) doped with boron (B), germanium (Ge) doped with phosphorus (P) or antimony (Sb), gallium nitride (GaN) doped with magnesium (Mg), gallium nitride (GaN) doped with silicon (Si), silicon carbide (SiC) doped with aluminum (Al) or boron (B), silicon carbide (SiC) doped with nitrogen (N) or phosphorus (P), indium phosphide (InP) doped with zinc (Zn), indium phosphide (InP) doped with sulfur (S) or silicon (Si), cadmium telluride (CdTe), cadmium sulfide (CdS), tin oxide (SnO), and zinc oxide (ZnO).

[0126] Layer 120L may be doped with a second conductivity type dopant, which is opposite to the first conductivity type dopant. For example, when the first conductivity type dopant is a p-type dopant, the second conductivity type dopant may be an n-type dopant, and vice versa. Therefore, a pn junction and a depletion region formed by the pn junction can be formed between the substrate 110 and layer 120L.

[0127] Next, refer to Figure 1 , Figure 8 and Figure 9 In P140, an energy source layer 130L can be formed. The energy source layer 130L can be formed by evaporation, sputtering, CVD, electroplating, or electroless plating. The energy source layer 130L can have a uniform thickness and therefore a conformal shape. When the energy source layer 130L is formed by electroplating or electroless plating, a seed layer can be formed between the energy source layer 130L and layer 120L.

[0128] The energy source layer 130L may include a radioactive isotope. The energy source layer 130L can be configured to emit radiation. The energy source layer 130L may include, for example, a radioactive isotope that emits beta rays. The energy source layer 130L may include tritium (…). 3 H), Calcium-45 ( 45 Ca), Nickel-63 ( 63 Ni), Copper-67 ( 67 Cu), Strontium-90 ( 90 Sr), Promethium-147 147 Pm), Osmium-194 194 Os), Thulium-171 171 Tm), Tantalum-179 (179 Ta), Cadmium-109 109 Cd), germanium-68( 68 Ge), Cerium-159 159 Ce) or tungsten-181 181 At least one of (W). The radioactive isotope may emit only beta rays or may further emit radiation other than beta rays, such as alpha rays or gamma rays.

[0129] Next, refer to Figure 1 , Figure 10 and Figure 11 At P150, a first layer 140L can be formed. The first layer 140L can be formed by CVD or epitaxial growth. The first layer 140L can be doped with a first dopant. The first dopant can be introduced into the first layer 140L during its growth, or it can be doped into the first layer 140L after its formation by ion implantation and diffusion. The first layer 140L can have a uniform thickness and therefore a conformal shape.

[0130] According to an embodiment, the first layer 140L may be separated from the layer 120L by an energy source layer 130L located between them. The energy source layer 130L may be disposed between the first layer 140L and the layer 120L.

[0131] Next, refer to Figure 1 , Figure 12 and Figure 13 At P160, a second layer 150L can be formed. The second layer 150L can be formed by CVD or epitaxial growth. The second layer 150L can be doped with a first dopant. The first dopant can be introduced into the second layer 150L during its growth, or it can be doped into the second layer 150L after its formation by ion implantation and diffusion. The second layer 150L can be sufficiently formed to fill the recess 110R. The first layer 140L and the second layer 150L can each comprise a doped semiconductor material, a compound semiconductor, an oxide semiconductor, or a metal alloy.

[0132] The second layer 150L can be doped with a second dopant with a polarity opposite to that of the first dopant. Therefore, the polarity of the second layer 150L can be opposite to that of the first layer 140L, and a pn junction and depletion region can be formed at the interface between the second layer 150L and the first layer 140L.

[0133] According to an embodiment, the first layer 140L may include silicon (Si) doped with boron (B), and the second layer 150L may include silicon (Si) doped with phosphorus (P) or arsenic (As).

[0134] According to an embodiment, the first layer 140L may include silicon (Si) doped with phosphorus (P) or arsenic (As), and the second layer 150L may include silicon (Si) doped with boron (B).

[0135] According to an embodiment, the first layer 140L may include gallium arsenide (GaAs) doped with zinc (Zn), and the second layer 150L may include gallium arsenide (GaAs) doped with silicon (Si) or tellurium (Te).

[0136] According to an embodiment, the first layer 140L may include gallium arsenide (GaAs) doped with silicon (Si) or tellurium (Te), and the second layer 150L may include gallium arsenide (GaAs) doped with zinc (Zn).

[0137] According to an embodiment, the first layer 140L may include germanium (Ge) doped with boron (B), and the second layer 150L may include germanium (Ge) doped with phosphorus (P) or antimony (Sb).

[0138] According to an embodiment, the first layer 140L may include germanium (Ge) doped with phosphorus (P) or antimony (Sb), and the second layer 150L may include germanium (Ge) doped with boron (B).

[0139] According to an embodiment, the first layer 140L may include gallium nitride (GaN) doped with magnesium (Mg), and the second layer 150L may include gallium nitride (GaN) doped with silicon (Si).

[0140] According to an embodiment, the first layer 140L may include gallium nitride (GaN) doped with silicon (Si), and the second layer 150L may include gallium nitride (GaN) doped with magnesium (Mg).

[0141] According to an embodiment, the first layer 140L may include silicon carbide (SiC) doped with aluminum (Al) or boron (B), and the second layer 150L may include silicon carbide (SiC) doped with nitrogen (N) or phosphorus (P).

[0142] According to an embodiment, the first layer 140L may include silicon carbide (SiC) doped with nitrogen (N) or phosphorus (P), and the second layer 150L may include silicon carbide (SiC) doped with aluminum (Al) or boron (B).

[0143] According to an embodiment, the first layer 140L may include indium phosphide (InP) doped with zinc (Zn), and the second layer 150L may include indium phosphide (InP) doped with sulfur (S) or silicon (Si).

[0144] According to an embodiment, the first layer 140L may include indium phosphide (InP) doped with sulfur (S) or silicon (Si), and the second layer 150L may include indium phosphide (InP) doped with zinc (Zn).

[0145] According to an embodiment, the first layer 140L may include cadmium telluride (CdTe), and the second layer 150L may include cadmium sulfide (CdS).

[0146] According to an embodiment, the first layer 140L may include cadmium sulfide (CdS), and the second layer 150L may include cadmium telluride (CdTe).

[0147] According to the embodiment, the first layer 140L may include tin oxide (SnO), and the second layer 150L may include zinc oxide (ZnO).

[0148] According to the embodiment, the first layer 140L may include zinc oxide (ZnO), and the second layer 150L may include tin oxide (SnO).

[0149] According to the embodiment, the first layer 140L may have the same conductivity type as the substrate 110, and the second layer 150L may have the same conductivity type as the layer 120L. For example, the first layer 140L and the substrate 110 may be doped with an n-type dopant, and the second layer 150L and the layer 120L may be doped with a p-type dopant. As another example, the first layer 140L and the substrate 110 may be doped with a p-type dopant, and the second layer 150L and the layer 120L may be doped with an n-type dopant.

[0150] According to other embodiments, the first layer 140L may have the same conductivity type as layer 120L, and the second layer 150L may have the same conductivity type as substrate 110. For example, the first layer 140L and layer 120L may be doped with n-type dopant, and the second layer 150L and substrate 110 may be doped with p-type dopant. As another example, the first layer 140L and layer 120L may be doped with p-type dopant, and the second layer 150L and substrate 110 may be doped with n-type dopant.

[0151] Next, refer to Figure 1 and 13 Up to 15, at P170, a first chemical mechanical polishing (CMP) process can be performed. The upper surface 110U of the substrate 110 can be the endpoint of the first CMP process. The endpoint of the CMP process can be determined by changes in reflectivity within the CMP chamber or by changes in the concentration of specific chemical components.

[0152] The first CMP process can divide layer 120L into multiple patterns 120. The first CMP process can divide energy source layer 130L into multiple energy source patterns 130. The first CMP process can divide first layer 140L into multiple first patterns 140. The first CMP process can divide second layer 150L into multiple second patterns 150. The upper surfaces of each of the multiple patterns 120, the multiple energy source patterns 130, the multiple first patterns 140, and the multiple second patterns 150 can be coplanar with the upper surface 110U of substrate 110.

[0153] Subsequently, refer to Figure 1 , Figure 15 and Figure 16 At P180, a second CMP process can be performed. Multiple second patterns 150 can be the endpoint of the second CMP process. Through the second CMP process, an integrated cell 100 including a substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140, and multiple second patterns 150 can be provided.

[0154] By performing operation P180, the plurality of recesses 110R can become a plurality of holes 110H extending to the new lower surface 110L' of the substrate 110. The plurality of holes 110H can each penetrate the substrate 110. The lower surfaces of the plurality of patterns 120, the plurality of energy source patterns 130, the plurality of first patterns 140, and the plurality of second patterns 150 can be coplanar with the lower surface 110L' of the substrate 110.

[0155] According to an embodiment, the substrate 110 may include a plurality of holes 110H having a tapered shape. Each of the plurality of holes 110H may extend along a Z-axis direction perpendicular to the upper surface 110U of the substrate 110. Each of the plurality of holes 110H may penetrate the substrate 110.

[0156] Multiple patterns 120 may each contact the substrate 110. Multiple patterns 120 may have a polarity opposite to that of the substrate 110. Multiple patterns 120 may each be located between the substrate 110 and a corresponding one of the multiple energy source patterns 130. Each of the multiple patterns 120 may have a uniform thickness.

[0157] Multiple energy source patterns 130 can each be located within a corresponding one of the multiple holes 110H. Multiple energy source patterns 130 can each be located between a corresponding one of the multiple patterns 120 and a corresponding one of the multiple first patterns 140. Multiple energy source patterns 130 can each have a uniform thickness. Multiple energy source patterns 130 can each surround a corresponding one of the multiple patterns 120.

[0158] Multiple first patterns 140 may each be located within a corresponding one of the multiple holes 110H. Multiple first patterns 140 may each be located between a corresponding one of the multiple energy source patterns 130 and a corresponding one of the multiple second patterns 150. Multiple first patterns 140 may each have a uniform thickness. Multiple first patterns 140 may each be surrounded by a corresponding one of the multiple energy source patterns 130. Multiple first patterns 140 may each be spaced apart from a corresponding one of the multiple patterns 120 by a corresponding one of the multiple energy source patterns 130.

[0159] The plurality of second patterns 150 may each be located within a corresponding one of the plurality of holes 110H. The plurality of second patterns 150 may each have a tapered shape. The plurality of second patterns 150 may each be surrounded by a corresponding one of the plurality of first patterns 140.

[0160] Multiple energy source patterns 130 can each be configured to emit beta rays. A beta-ray-irradiated depletion region located between the substrate 110 and the multiple patterns 120 can be configured to generate electron-hole pairs, thereby generating an electromotive force. A beta-ray-irradiated depletion region located between multiple first patterns 140 and multiple second patterns 150 can be configured to generate electron-hole pairs, thereby generating an electromotive force.

[0161] According to the embodiment, a plurality of energy source patterns 130 that partially fill the plurality of holes 110H are provided to reduce the amount of material used to form the plurality of energy source patterns 130, thereby reducing the manufacturing cost of the integrated battery 100. Furthermore, pn junctions and depletion regions are formed on both the outer and inner sides of the plurality of energy source patterns 130, thereby improving the utilization rate of β particles emitted from the plurality of energy source patterns 130, and thus improving the energy efficiency of the integrated battery 100.

[0162] According to an embodiment, each energy source pattern 130 may include a first surface and a second surface. The first surface may be opposite to the second surface. The first surface of each energy source pattern 130 may face the substrate 110. The first surface of each energy source pattern 130 may contain a doped diamond substrate, a doped SiC substrate, a doped GaN substrate, a doped Bi2O3 / GeO2 substrate, a doped Sm2O3 / Bi2O3 / GeO2 substrate, a doped Sm2O3 / Bi2O3 / B2O3 substrate, a doped Sm2O3 / Bi2O3 / GeO2 / B2O3 substrate, or a doped sapphire substrate.

[0163] A member containing a metal oxide with a bandgap energy of 2.7 eV or more may be present on the first surface of each energy source pattern 130. A material represented by AMO3 (where A denotes at least one material selected from the group consisting of La, Ba, Sr and K, and M denotes at least one material selected from the group consisting of Al, In, Ga, Ti, Sn, Hf, Ta and Zr) may be present on the first surface of each energy source pattern 130. Each energy source pattern may comprise: BaSnO3, BaHfO3, BaZrO3, BaHf 1- x Ti x O3 (where 0<x<1), Ba 1-x La x SnO3 (where 0<x<1), Bi4Ge3O 12 , Al2O3, Y2O3, La2O3, Ga2O3, Bi2O3, ZrO2, HfO2, Ta2O5, TiO2, LaInO3, LaGaO3, SrZrO3, SrHfO3, SrTaO7, LaIn 1-x Ga x O3 (where 0<x<1), LaGaO3, SrTiO3, KTaO3, HfSiO4, Ta3Ti2O x (where 0<x<1) or LaAlO3.

[0164] On the second surface of each energy source pattern 130, a member containing at least one of boron (B)-doped silicon (Si), phosphorus (P) or arsenic (As)-doped silicon (Si), zinc (Zn)-doped gallium arsenide (GaAs), silicon (Si) or tellurium (Te)-doped gallium arsenide (GaAs), boron (B)-doped germanium (Ge), phosphorus (P) or antimony (Sb)-doped germanium (Ge), magnesium (Mg)-doped gallium nitride (GaN), silicon (Si)-doped gallium nitride (GaN), aluminum (Al) or boron (B)-doped silicon carbide (SiC), nitrogen (N) or phosphorus (P)-doped silicon carbide (SiC), zinc (Zn)-doped indium phosphide (InP), sulfur (S) or silicon (Si)-doped indium phosphide (InP), cadmium telluride (CdTe), cadmium sulfide (CdS), tin oxide (SnO), or zinc oxide (ZnO) may be present.

[0165] (Third Embodiment)

[0166] Figure 17 is a diagram showing an integrated battery 101 according to another embodiment.

[0167] refer to Figure 17The integrated battery 101 may include a substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150.

[0168] Figure 17 The integrated battery 101 can be manufactured using a second CMP process on P180 (see...). Figure 1 In this process, the lower surfaces of the plurality of first patterns 140 are each set as endpoints. The lower surfaces of the plurality of patterns 120, the plurality of energy source patterns 130, and the plurality of first patterns 140 may be coplanar with the lower surface 110L' of the substrate 110. The lower surfaces of the plurality of second patterns 150 may be spaced apart from the lower surface 110L' of the substrate 110. The plurality of first patterns 140 may each have a cup shape.

[0169] (Fourth Implementation)

[0170] Figure 18 This is a diagram showing an integrated battery 102 according to other embodiments.

[0171] Reference Figure 18 The integrated battery 102 may include a substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150.

[0172] Figure 18 The integrated battery 102 can be manufactured using a second CMP process at P180 (see...). Figure 1 In this process, the lower surfaces of multiple energy source patterns 130 are each set as endpoints. The lower surfaces of the multiple patterns 120 and the multiple energy source patterns 130 may be coplanar with the lower surface 110L' of the substrate 110. The lower surfaces of the multiple second patterns 150 may be spaced apart from the lower surface 110L' of the substrate 110. The lower surfaces of the multiple first patterns 140 may be spaced apart from the lower surface 110L' of the substrate 110.

[0173] Multiple energy source patterns 130 can each have a cup shape. Multiple first patterns 140 can each have a cup shape.

[0174] (Fifth Implementation)

[0175] Figure 19 This is a diagram showing an integrated battery 103 according to other embodiments.

[0176] Reference Figure 19 The integrated battery 103 may include a substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150.

[0177] Figure 19 The integrated battery 103 can be connected to the P180 (see...) Figure 1 In the second CMP process, multiple patterns 120 are formed by setting their respective lower surfaces as endpoints. The lower surfaces of each of the multiple patterns 120 may be coplanar with the lower surface 110L' of the substrate 110. The lower surfaces of each of the multiple second patterns 150 may be spaced apart from the lower surface 110L' of the substrate 110. The lower surfaces of each of the multiple first patterns 140 may be spaced apart from the lower surface 110L' of the substrate 110. The lower surfaces of each of the multiple energy source patterns 130 may be spaced apart from the lower surface 110L' of the substrate 110.

[0178] Multiple patterns 120 can each have a cup shape. Multiple energy source patterns 130 can each have a cup shape. Multiple first patterns 140 can each have a cup shape.

[0179] (Sixth Implementation Method)

[0180] Figure 20 This is a diagram showing an integrated battery 104 according to other embodiments.

[0181] Reference Figure 20 The integrated battery 104 may include a substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150.

[0182] Figure 20 The integrated battery 104 can be manufactured using a second CMP process on P180 (see...). Figure 1 In this process, positions spaced apart from the lower surfaces of the plurality of patterns 120 are defined as endpoints. For example, the endpoint of the second CMP process may include removing a target thickness from the substrate 110. The lower surfaces of the plurality of second patterns 150 may be spaced apart from the lower surface 110L' of the substrate 110. The lower surfaces of the plurality of first patterns 140 may be spaced apart from the lower surface 110L' of the substrate 110. The lower surfaces of the plurality of energy source patterns 130 may be spaced apart from the lower surface 110L' of the substrate 110. The lower surfaces of the plurality of patterns 120 may be spaced apart from the lower surface 110L' of the substrate 110.

[0183] Multiple patterns 120 can each have a cup shape. Multiple energy source patterns 130 can each have a cup shape. Multiple first patterns 140 can each have a cup shape.

[0184] (Ninth Implementation)

[0185] Figure 21 This is a plan view of an integrated battery 100a according to other embodiments.

[0186] Figure 22 It is along Figure 21The cross-sectional view taken from 21I-21I'.

[0187] refer to Figure 21 and Figure 22 The integrated battery 100a may include a substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150.

[0188] In addition to the arrangement of multiple holes 110H, the substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140, and multiple second patterns 150 are the same as those referenced above. Figures 1 to 16 The descriptions are essentially the same, therefore, repeated descriptions of them are omitted here.

[0189] In this example, with Figure 16 Unlike a honeycomb structure, multiple holes 110H can be arranged in a non-honeycomb structure. At least some of the centers of the multiple holes 110H can be offset relative to the location forming the honeycomb structure. When each column of the multiple holes 110H aligned along the Y-axis is defined as a hole array HAR, adjacent hole array HARs can be staggered. The multiple holes 110H can be arranged in a zigzag pattern along the X-axis.

[0190] Multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150 together fill multiple holes 110H. Therefore, the above description of the arrangement of multiple holes 110H can also be applied to multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150.

[0191] (Tenth Implementation)

[0192] Figure 23 This is a plan view of the integrated battery 100b according to other embodiments.

[0193] Figure 24 It is along Figure 23 The cross-sectional view taken from 23I-23I'.

[0194] refer to Figure 23 and Figure 24 The integrated battery 100b may include a substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140, and multiple second patterns 150. Except for the arrangement of the multiple holes 110H, the substrate 110, multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140, and multiple second patterns 150 are similar to those referenced above. Figures 1 to 16 The descriptions are essentially the same, therefore, repeated descriptions of them are omitted here.

[0195] In this example, with Figure 16 Unlike the multiple holes 110H arranged in a honeycomb structure, the multiple holes 110H can be arranged in a matrix. The multiple holes 110H can be aligned along the X-axis. The multiple holes 110H can be aligned along the Y-axis.

[0196] Multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150 together fill multiple holes 110H. Therefore, the above description of the arrangement of multiple holes 110H can also be applied to multiple patterns 120, multiple energy source patterns 130, multiple first patterns 140 and multiple second patterns 150.

[0197] (Eleventh Implementation Method)

[0198] Figure 25 This is a plan view of an integrated battery 100c according to other embodiments.

[0199] Figure 26 It is along Figure 25 The cross-sectional view taken from 25I-25I'.

[0200] refer to Figure 25 and Figure 26 The integrated battery 100c may include a substrate 110, multiple patterns 120', multiple energy source patterns 130', multiple first patterns 140', and multiple second patterns 150'. Except for variations in the shape of the multiple holes 110H', the substrate 110, multiple patterns 120', multiple energy source patterns 130', multiple first patterns 140', and multiple second patterns 150' are similar to those referenced above. Figures 1 to 16 The descriptions are essentially the same, therefore, repeated descriptions are omitted here.

[0201] In this example, with Figure 16 The multiple holes 110H shown have different circular shapes, and the multiple holes 110H' can have a linear shape. The multiple holes 110H' can form a line-spaced structure. The multiple holes 110H' can each extend along the X-axis direction. The multiple holes 110H' can be spaced apart from each other in the Y-axis direction.

[0202] Multiple patterns 120' can each be located on the sidewall of a corresponding hole among multiple holes 110H'. Multiple patterns 120' can each extend along the X-axis direction. Multiple patterns 120' can each have a uniform thickness.

[0203] Multiple energy source patterns 130' can be located on multiple patterns 120'. Each of the multiple energy source patterns 130' can extend along the X-axis. Each of the multiple energy source patterns 130' can have a uniform thickness.

[0204] Multiple first patterns 140' can be located on multiple energy source patterns 130'. Each of the multiple first patterns 140' can extend along the X-axis. Each of the multiple first patterns 140' can have a uniform thickness.

[0205] Multiple second patterns 150' can be located on multiple first patterns 140'. Each of the multiple second patterns 150' can extend along the X-axis. Each of the multiple second patterns 150' can have a linear shape. Each of the multiple second patterns 150' can have a tapered shape in the Z-axis direction.

[0206] (Twelfth Implementation)

[0207] Figure 27 This is a plan view of an integrated battery 100d according to other embodiments.

[0208] Figure 28 It is along Figure 27 The cross-sectional view taken from 27I-27I'.

[0209] refer to Figure 27 and Figure 28 The integrated battery 100d may include a substrate 110, multiple patterns 120", multiple energy source patterns 130", multiple first patterns 140", and multiple second patterns 150". Except for variations in the shape of the multiple holes 110H", the substrate 110, multiple patterns 120", multiple energy source patterns 130", multiple first patterns 140", and multiple second patterns 150" are similar to those referenced above. Figures 1 to 16 The descriptions are essentially the same, therefore, repeated descriptions of them are omitted here.

[0210] According to the embodiment, in forming a material layer (e.g., layer 120L, see [link]) for forming a plurality of patterns 120", Figure 7 Prior to this, an additional etching process can be performed to roughen the multiple holes 110H". The additional etching process can be, for example, a wet etching process.

[0211] According to one embodiment, when viewed from above, each of the plurality of holes 110H" may have a rough circular shape. According to one embodiment, when viewed from above, each of the plurality of holes 110H" may have a star shape.

[0212] According to the embodiment, each pattern 120" may have a rough ring shape when viewed from above. Each pattern 120" may also have a hollow star shape when viewed from above.

[0213] According to one embodiment, when viewed from above, the plurality of energy source patterns 130" may each have a rough annular shape. According to one embodiment, when viewed from above, the plurality of energy source patterns 130" may each have a hollow star shape.

[0214] According to one embodiment, when viewed from above, each of the plurality of first patterns 140" may have a rough annular shape. According to one embodiment, when viewed from above, each of the plurality of first patterns 140" may have a hollow star shape.

[0215] According to one embodiment, when viewed from above, each of the plurality of second patterns 150" may have a rough circular shape. According to one embodiment, when viewed from above, each of the plurality of second patterns 150" may have a star shape.

[0216] According to an embodiment, the interface between the substrate 110 and the plurality of patterns 120" can be roughened. According to an embodiment, the interface between the plurality of patterns 120" and the plurality of energy source patterns 130" can be roughened. According to an embodiment, the interface between the plurality of energy source patterns 130" and the plurality of first patterns 140" can be roughened. According to an embodiment, the interface between the plurality of first patterns 140" and the plurality of second patterns 150" can be roughened.

[0217] (Thirteenth and Fourteenth Embodiments)

[0218] Figure 29 This is a flowchart of a method for manufacturing an integrated battery according to other embodiments.

[0219] Figure 30 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0220] Figure 31 It is along Figure 30 The cross-sectional view taken from 30I-30I'.

[0221] Figure 32 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0222] Figure 33 It is along Figure 32 The cross-sectional view taken from 32I-32I'.

[0223] Figure 34 This is a plan view illustrating a method for manufacturing an integrated battery according to an embodiment.

[0224] Figure 35 along Figure 34 The cross-sectional view taken from 34I-34I'.

[0225] For ease of description, this article omits... Figures 29 to 35 The above reference Figures 1 to 16 The parts described are the same, and the emphasis will be on Figures 29 to 35 In and above Figures 1 to 16 Describe the differences between them.

[0226] refer to Figure 29 and Figure 31 The operations performed on pages 110 to 160 are the same as those described above. Figures 1 to 16 The operations described are essentially the same, but substrate 110 may include an electrical region VR and a contact region CR. In the electrical region VR, substrate 110 may, as follows: Figure 3 The substrate 110 is patterned and may include multiple recesses 110R. In the contact area CR, the substrate 110 may not be patterned and may not include the multiple recesses 110R. In the contact area CR, the substrate 110 may be spaced apart from the multiple recesses 110R.

[0227] Next, a CMP process can be performed at P171. By performing the CMP process at P171, the upper part of the second layer 150L can be partially removed, and the upper surface of the second layer 150L can be planarized. During the CMP process at P171, layer 120L, the energy source layer 130L, the first layer 140L, and the second layer 150L do not need to be separated. P171 can be omitted.

[0228] Next, refer to Figure 29 , Figure 32 and Figure 33 At P191, a stepped structure SS can be formed. The stepped structure SS can be formed by repeated photolithography and etching. The stepped structure SS may include a first layer 140L protruding horizontally (e.g., Y-axis direction) relative to the second layer 150L, ​​a layer 120L protruding horizontally (e.g., Y-axis direction) relative to the first layer 140L, and a substrate 110 protruding horizontally (e.g., Y-axis direction) relative to the layer 120L. Therefore, in the contact region CR, the upper surface of the first layer 140L, the upper surface of the layer 120L, and the upper surface 110U of the substrate 110 can be exposed.

[0229] Subsequently, refer to Figure 29 , Figure 34 and Figure 35 In P193, vias V11, V12, V13, and V14 can be formed. The formation of vias V11, V12, V13, and V14 may include: depositing an insulating material to form an insulating material layer; etching the insulating material layer to form an insulating layer IL1, the insulating layer IL1 including vias exposing the upper surface 110U of the substrate 110, vias exposing the upper surface of the layer 120L, vias exposing the upper surface of the first layer 140L, and vias exposing the upper surface of the second layer 150L; providing a conductive material layer to fill the vias; and dividing the conductive material layer into vias V11, V12, V13, and V14 by a planarization process.

[0230] Each via V11 can be located on the substrate 110. Each via V11 can contact the substrate 110. Each via V11 can extend along the Z-axis direction. Each via V11 can penetrate the insulating layer IL1. The vias V11 can be arranged along the X-axis direction. Because the vias V11 are arranged along the X-axis direction, voltage drop in the X-axis direction of the substrate 110 can be prevented.

[0231] Each via V12 can be located on layer 120L. Each via V12 can contact layer 120L. Each via V12 can extend along the Z-axis. Each via V12 can penetrate the insulating layer IL1. The vias V12 can be arranged along the X-axis. Because the vias V12 are arranged along the X-axis, voltage drop in layer 120L in the X-axis direction can be prevented.

[0232] Each via V13 can be located on the first layer 140L. Each via V13 can contact the first layer 140L. Each via V13 can extend along the Z-axis. Each via V13 can penetrate the insulating layer IL1. The vias V13 can be arranged along the X-axis. Because the vias V13 are arranged along the X-axis, voltage drop in the first layer 140L in the X-axis direction can be prevented.

[0233] Each via V14 can be located on the second layer 150L. Each via V14 can contact the second layer 150L. Each via V14 can extend along the Z-axis. Each via V14 can penetrate the insulating layer IL1. The vias V14 can be arranged along the X-axis. Because the vias V14 are arranged along the X-axis, voltage drop in the second layer 150L in the X-axis direction can be prevented.

[0234] Next, refer to Figure 29 , Figure 36 and Figure 37 In P200, wires M11, M12, M13, and M14 can be formed. By forming wires M11, M12, M13, and M14, an integrated battery 105a can be provided. The integrated battery 105a includes a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1 and IL2, through holes V11, V12, V13, and V14, and wires M11, M12, M13, and M14.

[0235] The formation of conductors M11, M12, M13, and M14 may include forming an insulating layer IL2 on the insulating layer IL1, patterning the insulating layer IL2 to expose vias V11, V12, V13, and V14, depositing conductive material in contact with the vias V11, V12, V13, and V14, and performing CMP. Figures 34 to 37Unlike other methods, through holes V11, V12, V13 and V14, as well as wires M11, M12, M13 and M14, can be formed using a double damascene process.

[0236] Wire M11 can extend along the X-axis. Wire M11 can contact each through hole V11. Wire M12 can extend along the X-axis. Wire M12 can contact each through hole V12. Wire M13 can extend along the X-axis. Wire M13 can contact each through hole V13. Wire M14 can extend along the X-axis. Wire M14 can contact each through hole V14.

[0237] The insulating layers IL1 and IL2 may each comprise at least one of silicates (e.g., TEOS), silicon nitride (SiN), hafnium oxide, hafnium silicon oxide, hafnium aluminum oxide, lanthanum oxide, lanthanum aluminum oxide, zirconium oxide, zirconium silicon oxide, tantalum oxide, titanium oxide, barium strontium titanium oxide, barium titanium oxide, strontium titanium oxide, yttrium oxide, or aluminum oxide.

[0238] Through holes V11, V12, V13 and V14 and wires M11, M12, M13 and M14 may each include at least one of aluminum (Al), copper (Cu), tungsten (W) or titanium (Ti).

[0239] According to an embodiment, the through-hole V11 and the wire M11 can form the first output terminal of the unit including the substrate 110 and the layer 120L.

[0240] According to an embodiment, the through-hole V12 and the wire M12 can form a second output terminal of a unit including a substrate 110 and a layer 120L.

[0241] According to an embodiment, the through hole V13 and the wire M13 can form a first output terminal of a unit including a first layer 140L and a second layer 150L.

[0242] According to the embodiment, the through hole V14 and the wire M14 can form a second output terminal comprising a unit including a first layer 140L and a second layer 150L.

[0243] According to the embodiment, by forming a contact area CR that is horizontally separated from the electrical area VR, a wiring structure connected to the first layer 140L and the second layer 150L formed with a relatively narrow spacing can be easily formed.

[0244] (Fifteenth Implementation)

[0245] Figure 38 This is a cross-sectional view of the integrated battery 105b according to the embodiment.

[0246] Reference Figure 38The integrated battery 105b includes a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1, IL2, IL3 and IL4, through holes V11, V12, V13 and V14, wires M11, M123 and M14, through hole V2 and wire M2.

[0247] Substrate 110, layer 120L, power source layer 130L, first layer 140L, second layer 150L, ​​insulating layers IL1 and IL2, vias V11, V12, V13 and V14, and wires M11 and M14 are referenced above. Figures 29 to 37 The descriptions are essentially the same, so I will omit any further details here.

[0248] Insulating layer IL3 may be located on insulating layer IL2. Insulating layer IL4 may be located on insulating layer IL3. Insulating layers IL3 and IL4 may include the materials described above for insulating layers IL1 and IL2.

[0249] The conductor M123 can extend along the X-axis. The conductor M123 can contact each through hole V12. The conductor M123 can contact each through hole V13. Therefore, layer 120L can be connected to the first layer 140L through through holes V12, conductor M123, and through holes V13.

[0250] Through-hole V2 can penetrate the insulating layer IL3. Some through-holes V2 can be located on conductor M11. Some through-holes V2 can contact conductor M11. Some through-holes V2 can be located on conductor M14. Some through-holes V2 can contact conductor M14. Conductor M2 can contact each through-hole V2. Conductor M2 and through-hole V2 can each comprise at least one of aluminum (Al), copper (Cu), tungsten (W), or titanium (Ti).

[0251] According to the embodiment, the substrate 110 can be connected to the second layer 150L through through-hole V11, wire M11, through-hole V2, wire M2, through-hole V2, wire M14 and through-hole V14.

[0252] Therefore, when the second layer 150L and the substrate 110 have the same conductivity type and the first layer 140L and the layer 120L have the same conductivity type, the unit containing the substrate 110 and the layer 120L can be connected in parallel with the unit containing the first layer 140L and the second layer 150L.

[0253] (Sixteenth Implementation)

[0254] Figure 39 This is a cross-sectional view of the integrated battery 105c according to the embodiment.

[0255] Reference Figure 39The integrated battery 105c includes a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1, IL2, IL3 and IL4, through holes V11, V12, V13 and V14, wires M11, M12, M13 and M14, through hole V2 and wire M2.

[0256] In addition to the connection layout, the substrate 110, layer 120L, power source layer 130L, first layer 140L, second layer 150L, ​​insulating layers IL1, IL2, IL3 and IL4, vias V11, V12, V13 and V14, wires M11, M12, M13 and M14, via V2 and wire M2 are the same as those referenced above. Figures 29 to 38 The descriptions are essentially the same, therefore, repeated descriptions of them are omitted here.

[0257] Some through holes V2 can be located on wire M11. Some through holes V2 can contact wire M11. Some through holes V2 can be located on wire M12. Some through holes V2 can contact wire M12. Some through holes V2 can be located on wire M14. Some through holes V2 can contact wire M14.

[0258] One of the wires M2 can contact the through holes V2 located on wire M11. One of the other wires M2 can contact the through holes V2 located on wire M12 and wire M14.

[0259] According to the embodiment, layer 120L can be connected to the second layer 150L through through hole V12, wire M12, through hole V2, wire M2, through hole V2, wire M14 and through hole V14.

[0260] According to one embodiment, the through-hole V11, wire M11, through-hole V2, and wire M2 connected to the substrate 110 can form a first output terminal of the integrated battery 105c. According to one embodiment, the through-hole V13 and wire M13 connected to the first layer 140L can form a second output terminal of the integrated battery 105c.

[0261] According to the embodiment, when the second layer 150L and the substrate 110 are p-type and the first layer 140L and the layer 120L are n-type, the unit containing the substrate 110 and the layer 120L can be connected in series with the unit containing the first layer 140L and the second layer 150L.

[0262] (Seventeenth Implementation)

[0263] Figure 40 This is a plan view of an integrated battery according to an embodiment.

[0264] Figure 41 It is along Figure 40The cross-sectional view taken from 40I-40I'.

[0265] refer to Figure 40 and Figure 41 The integrated battery 106 may include a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1 and IL2, through holes V11, V12, V13 and V14, and wires M11, M12, M13 and M14.

[0266] The substrate 110 may include an electrical region VR and contact regions CR1 and CR2. Within the electrical region VR, the substrate 110 may be as follows: Figure 3 The pattern shown can include multiple recesses 110R.

[0267] In contact regions CR1 and CR2, substrate 110 may not be patterned and may not include multiple recesses 110R. In contact regions CR1 and CR2, substrate 110 may be spaced apart from the multiple recesses 110R. Electrical region VR may be located between contact regions CR1 and CR2. Contact regions CR1 and CR2 may be spaced apart from each other in the Y-axis direction.

[0268] A stepped structure SS1 may be present on the contact area CR1. The stepped structure SS1 may include a layer 120L that protrudes in a horizontal direction (e.g., the Y-axis direction) relative to the first layer 140L and the second layer 150L, ​​and a substrate 110 that protrudes in a horizontal direction (e.g., the Y-axis direction) relative to the layer 120L.

[0269] A stepped structure SS2 may be present on the contact area CR2. The stepped structure SS2 may include a first layer 140L that protrudes horizontally (e.g., in the Y-axis direction) relative to the second layer 150L.

[0270] According to the embodiment, through holes V11 and V12 and wires M11 and M12 can be located in contact area CR1, and through holes V13 and V14 and wires M11 and M12 can be located in contact area CR2. Therefore, interference between wires can be prevented, and the freedom of wiring design can be improved.

[0271] (Eighteenth Implementation)

[0272] Figure 42 This is a cross-sectional view of the integrated battery 107a according to the embodiment.

[0273] refer to Figure 42The integrated battery 107a may include a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1 and IL2, through holes V11', V12', V13' and V14', and wires M11, M12, M13 and M14.

[0274] Except that the integrated battery 107a includes through holes V11', V12', V13', and V14' instead of through holes V11, V12, V13, and V14, the integrated battery 107a and Figure 41 The integrated battery 106 is basically the same.

[0275] Through-holes V11', V12', V13', and V14' may each include a passivation layer VI and a conductive layer VC. The passivation layer VI may include an insulating material. The foaming agent may include a carbonate material. The conductive layer VC may be surrounded by the passivation layer VI.

[0276] The passivation layer VI can be located on the inner wall of the via. The passivation layer VI can prevent unwanted short circuits between the conductive layers VC of the vias V11', V12', V13', and V14'. The passivation layer VI of each via V11' can prevent short circuits between the conductive layer VC and layer 120L, the power source layer 130L, the first layer 140L, and the second layer 150L.

[0277] The conductive layer VC of each via V11' may be separated from layer 120L, energy source layer 130L, first layer 140L and second layer 150L by a passivation layer VI intervening therebetween. The conductive layer VC of each via V11' may be in contact with substrate 110. The vias V11' may be configured to be electrically connected to the substrate 110 on which they are located.

[0278] The passivation layer VI of each via V12' can prevent short circuits between the conductive layer VC and the power source layer 130L, the first layer 140L and the second layer 150L.

[0279] The conductive layer VC of each via V12' can be separated from the energy source layer 130L, the first layer 140L, and the second layer 150L by a passivation layer VI intervening therebetween. The conductive layer VC of each via V12' can be in contact with layer 120L. The vias V12' can be configured to be electrically connected to the layer 120L in which they are located.

[0280] The passivation layer VI of each via V13' prevents a short circuit between the conductive layer VC and the second layer 150L. The conductive layer VC of each via V13' can be separated from the second layer 150L by a passivation layer therebetween. The conductive layer VC of each via V12' can contact the first layer 140L. The vias V12' can be configured to be electrically connected to the first layer 140L in which they are located.

[0281] Wire M11 can contact the conductive layer VC of each through hole V11'. Wire M12 can contact the conductive layer VC of each through hole V12'. Wire M13 can contact the conductive layer VC of each through hole V13'. Wire M14 can contact the conductive layer VC of each through hole V14'.

[0282] According to the embodiment, each of the through holes V11', V12', V13' and V14' includes a passivation layer VI, so the process of forming a stepped structure can be omitted, thereby increasing the yield of the integrated cell 107a and reducing the manufacturing cost.

[0283] (Nineteenth Implementation)

[0284] Figure 43 This is a cross-sectional view of the integrated battery 107b according to the embodiment.

[0285] refer to Figure 43 The integrated battery 107b may include a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1 and IL2, through holes V11', V12', V13' and V14', and wires M11, M124 and M13.

[0286] Apart from the connections and arrangement of through holes V11', V12', V13', and V14', and wires M11, M124, and M13, the integrated battery 107b and Figure 42 The integrated battery 107a is basically the same.

[0287] In this example, vias V11' and V13' can be located on contact area CR1, and vias V12' and V14' can be located on contact area CR2. The electrical region VR can be located between vias V11' and V13' and vias V12' and V14'.

[0288] Wire M11 can be the first output terminal of integrated battery 107b. Wire M13 can be the second output terminal of integrated battery 107b.

[0289] Conductor M124 can extend along the X-axis. Conductor M124 can contact the conductive layer VC of each via V12'. Conductor M124 can contact the conductive layer VC of each via V14'. Layer 120L can be electrically connected to the second layer 150L through via V12', conductor M124, and via V14'.

[0290] According to the embodiment, when the second layer 150L and the substrate 110 are p-type and the first layer 140L and the layer 120L are n-type, the unit containing the substrate 110 and the layer 120L can be connected in series with the unit containing the first layer 140L and the second layer 150L.

[0291] According to the embodiment, contact regions CR1 and CR2 can be separated, thereby achieving series connection through a single via layer and a single wiring layer, thereby improving the integration density of the integrated cell 107b. Furthermore, vias V11', V12', V13', and V14', each containing a passivation layer CI, are provided, thereby increasing the yield of the integrated cell 107b and reducing manufacturing costs.

[0292] (Twentieth Implementation)

[0293] Figure 44 This is a cross-sectional view of the integrated battery 107c according to the embodiment.

[0294] refer to Figure 44 The integrated battery 107c may include a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1 and IL2, through holes V11', V12', V13' and V14', and wires M114 and M123.

[0295] Apart from the connection and arrangement of through holes V11', V12', V13', and V14', and wires M114 and M123, the integrated battery 107c and Figure 43 The integrated battery 107a is basically the same.

[0296] In this example, vias V12' and V13' can be located on contact area CR1, and vias V11' and V14' can be located on contact area CR2. The electrical region VR can be located between vias V12' and V13' and vias V11' and V14'.

[0297] The conductor M114 can extend along the X-axis. The conductor M114 can contact the conductive layer VC of each via V11'. The conductor M114 can contact the conductive layer VC of each via V14'. The substrate 110 can be connected to the second layer 150L through the via V11', the conductor M114, and the via V14'.

[0298] Wire M123 can extend along the X-axis. Wire M123 can contact the conductive layer VC of each through-hole V12'. Wire M123 can contact the conductive layer VC of each through-hole V13'. Layer 120L can be connected to the first layer 140L through through-hole V12', wire M123, and through-hole V13'.

[0299] According to the embodiment, when the second layer 150L and the substrate 110 are p-type and the first layer 140L and the layer 120L are n-type, the unit containing the substrate 110 and the layer 120L can be connected in parallel with the unit containing the first layer 140L and the second layer 150L.

[0300] According to the embodiment, contact regions CR1 and CR2 can be separated, thereby achieving parallel connection through a single via layer and a single wiring layer, thus improving the integration density of the integrated battery 107c. Furthermore, vias V11', V12', V13', and V14', each containing a passivation layer CI, are provided, thereby increasing the yield of the integrated battery 107c and reducing manufacturing costs.

[0301] (Twenty-first implementation method)

[0302] Figure 45 This is a cross-sectional view of the integrated battery 107d according to the embodiment.

[0303] refer to Figure 45 The integrated battery 107d may include a substrate 110, a layer 120L, an energy source layer 130L, a first layer 140L, a second layer 150L, ​​insulating layers IL1 and IL2, through holes V11', V12', V13' and V14', wires M11, M124 and M13, an intermediate insulating layer ILI, an intermediate through hole VIL, a third layer 210L, a fourth layer 220L, an energy source layer 230L, a fifth layer 240L, a sixth layer 250L, insulating layers IL5 and IL6, through holes V31', V32', V33' and V34', and wires M31, M324 and M33.

[0304] Substrate 110, layer 120L, power source layer 130L, first layer 140L, second layer 150L, ​​insulating layers IL1 and IL2, vias V11', V12', V13' and V14', and wires M11, M124 and M13 are referenced above. Figure 43 The descriptions of the integrated battery 107b are essentially the same, so redundant descriptions of it are omitted here.

[0305] The structure and shape of the third layer 210L are substantially the same as those of the substrate 110. The third layer 210L may include one or more of the materials described above with respect to the second layer 150L.

[0306] The structure and shape of the fourth layer 220L are basically the same as those of layer 120L. The fourth layer 220L may include one or more of the materials described above for the first layer 140L.

[0307] The structure, shape, and composition of the energy source layer 230L are basically the same as those of the energy source layer 130L. The structure, shape, and composition of the fifth layer 240L are basically the same as those of the first layer 140L. The structure, shape, and composition of the sixth layer 250L are basically the same as those of the second layer 150L.

[0308] The intermediate insulating layer ILI can be located between the third layer 210L and the insulating layer IL2. The intermediate insulating layer ILI can include the materials described above for insulating layers IL1 and IL2.

[0309] The intermediate via (VIL) can penetrate the intermediate insulating layer (ILI). Each intermediate via (VIL) can be located on the conductor M13. Each intermediate via (VIL) can contact the conductor M13. Each intermediate via (VIL) can contact the third layer 210L. A unit containing the third layer 210L and the fourth layer 220L can be connected in series with a unit containing the first layer 140L and the second layer 150L through the intermediate via (VIL).

[0310] The structure, shape and composition of each insulating layer IL5 and IL6 are basically the same as those of each insulating layer IL1 and IL2.

[0311] Vias V31', V32', V33', and V34' may each contain a passivation layer VI and a conductive layer VC. Vias V31' and V33' may be located on contact region CR1, and vias V32' and V34' may be located on contact region CR2. The electrical region VR may be located between vias V31' and V33' and vias V32' and V34'.

[0312] Each via V31' can penetrate the intermediate insulating layer ILI, the third layer 210L, the fourth layer 220L, the power source layer 230L, the fifth layer 240L, the sixth layer 250L, and the insulating layer IL5. The conductive layer VC of each via V31' can be separated from the third layer 210L, the fourth layer 220L, the power source layer 230L, the fifth layer 240L, and the sixth layer 250L by a passivation layer VI in between.

[0313] Each via V31' can be located on the conductor M11. The conductive layer VC of each via V31' can contact the conductor M11. Vias V12' can be configured to be electrically connected to the conductor M11 to which they are located.

[0314] The wire M31 can extend along the X-axis. The wire M31 can contact the conductive layer VC of each through-hole V31'. The wire M31 can be the first output terminal of the integrated battery 107d.

[0315] Each via V32' can penetrate the power source layer 230L, the fifth layer 240L, the sixth layer 250L, and the insulating layer IL5. The conductive layer VC of each via V32' can be separated from the power source layer 230L, the fifth layer 240L, and the sixth layer 250L by a passivation layer VI in between.

[0316] Each via V32' can be located on the fourth layer 220L. The conductive layer VC in each via V32' can be in contact with the fourth layer 220L. The conductive layer VC of each via V32' can be configured to be electrically connected to the fourth layer 220L.

[0317] Each via V33' can penetrate the sixth layer 250L and the insulating layer IL5. The conductive layer VC of each via V32' can be separated from the sixth layer 250L by a passivation layer VI in between.

[0318] Each via V33' can be located on the fifth layer 240L. The conductive layer VC of each via V33' can contact the fifth layer 240L. The conductive layer VC of each via V33' can be configured to be electrically connected to the fifth layer 240L.

[0319] The wire M33 can extend along the X-axis. The wire M33 can contact the conductive layer VC of each through-hole V33'. The wire M33 can be the second output terminal of the integrated battery 107d.

[0320] Each via V34' can penetrate the insulating layer IL5. Each via V34' can be located on the sixth layer 250L. The conductive layer VC of each via V34' can contact the sixth layer 250L. The conductive layer VC of each via V34' can be configured to be electrically connected to the sixth layer 250L.

[0321] Conductor M324 can extend along the X-axis. Conductor M324 can contact the conductive layer VC of each through-hole V32'. Conductor M324 can contact the conductive layer VC of each through-hole V34'. The fourth layer 220L can be electrically connected to the sixth layer 250L through through-hole V12', conductor M124, and through-hole V14'.

[0322] According to an embodiment, when the third layer 210L and the sixth layer 250L are p-type and the fourth layer 220L and the fifth layer 240L are n-type, the cell containing the third layer 210L and the fourth layer 220L can be connected in series with the cell containing the fifth layer 240L and the sixth layer 250L. The integrated battery 107d of this embodiment includes a structure with four pn junctions connected in series, thus it can have high integration and high output.

[0323] (Implementation Method 22 and 23)

[0324] Figure 46 This is a flowchart of a method for manufacturing an integrated battery according to other embodiments.

[0325] Figures 47 to 53 This is a cross-sectional view used to illustrate a method for manufacturing an integrated battery according to other embodiments.

[0326] refer to Figure 46 and47 A substrate 110 is provided at P110, the substrate 110 is patterned at P120, and a layer 120L is formed at P130, as described above. Figures 1 to 7 The descriptions are largely the same.

[0327] Next, at P141, a first scintillation layer 160L can be formed. The first scintillation layer 160L can be formed by a deposition process such as CVD. The first scintillation layer 160L can have a uniform thickness. The first scintillation layer 160L can have a conformal shape. The first scintillation layer 160L can be configured to emit photons in response to high-energy radiation such as alpha rays. The first scintillation layer 160L can include, but is not limited to, at least one of Ba2Ca(BO3)2, BaHfO3, BaI2:Ce, BeO, BaF2, BaMgF4, Cs2LiLuCl6:Ce, K2YF5, KCaF3, or YI3:Ce. Various examples of the first scintillation layer 160L are disclosed at https: / / scintillator.lbl.gov / inorganic-scintillator-library / .

[0328] Then, refer to Figure 46 and Figure 48 At P143, an energy source layer 170L can be formed. The energy source layer 170L can have a uniform thickness. The energy source layer 170L can have a conformal shape. The energy source layer 170L can be formed by evaporation, sputtering, CVD, electroplating, or electroless plating. When the energy source layer 170L is formed by electroplating or electroless plating, a seed layer can be formed between the energy source layer 170L and the first scintillation layer 160L.

[0329] The energy source layer 170L may emit only alpha rays, or may include a radioactive isotope that emits radiation other than alpha rays (such as beta rays or gamma rays). The energy source layer 170L may include at least one of the following: neodymium-144 (… 144 Nd), Samarium-147 147 Sm), Terbium-158 158 Tb), Tellurium-104 ( 104 Te), Bismuth-212 ( 212 Bi), astatine-210( 210 At), astatine-211( 211 At), Radon-222 222 Rn), Francium-223 223 Fr), Radium-224 224 Ra), Radium-226 226 Ra), Actinium-225 225 Ac), Actinium-227 ( 227Ac), Thorium-228 228 Th), Thorium-230 230 Th), Thorium-232 232 Th), Protactinium-231 231 Pa), uranium-234 234 U), uranium-235( 235 U), uranium-238( 238 U), neptunium-237( 237 Np), Plutonium-238 238 Pu), Plutonium-239 239 Pu), Plutonium-240 240 Pu), Plutonium-241 241 Pu), Americium-241 241 Am), Americium-243 243 Am), Curium-242 ( 242 Cm), Curium-243 ( 243 Cm), Curium-244 ( 244 Cm), Curium-245 ( 245 Cm), Berkel-247 ( 247 Bk), Berkel-249 ( 249 Bk), Californium-249 ( 249 Cf), Californium-250 ( 250 Cf), Californium-251 ( 251 Cf), Californium-252 ( 252 Cf), Einium-252 ( 252 Es), Eindene-253 ( 253 Es), Fe-257 ( 257 Fm), Menthol-258 ( 258 Md), Nobium-255 255 No), lanium-260( 260 Lr), polonium-208( 208 Po), Polonium-210 210 Po) or polonium-212 212 Po).

[0330] Next, refer to Figure 46 and Figure 49 At P145, a second scintillation layer 180L can be formed. The second scintillation layer 180L can be formed by a deposition process such as CVD. The second scintillation layer 180L can have a uniform thickness. The second scintillation layer 180L can have a conformal shape. The second scintillation layer 180L can be configured to emit photons in response to high-energy radiation. The second scintillation layer 180L can include the material exemplified above with respect to the first scintillation layer 160L.

[0331] Next, refer to Figure 46 and Figure 50 At P150, the first 140L layer can be formed. The formation method of the first 140L layer is as described in the reference above. Figure 1 , Figure 10 and Figure 11 As stated above.

[0332] Next, refer to Figure 46 and Figure 51 At P160, a second 150L layer can be formed. The formation method of the second 150L layer is as described in the reference above. Figure 1 , 12 and 13.

[0333] Next, refer to Figure 46 , Figure 51 and Figure 52 At P170, a first CMP process can be performed. Through the first CMP process, layer 120L can be divided into multiple patterns 120. Through the first CMP process, the first scintillation layer 160L can be divided into multiple first scintillation patterns 160. Through the first CMP process, the energy source layer 170L can be divided into multiple energy source patterns 170. Through the first CMP process, the second scintillation layer 180L can be divided into multiple second scintillation patterns 180. Through the first CMP process, the first layer 140L can be divided into multiple first patterns 140. Through the first CMP process, the second layer 150L can be divided into multiple second patterns 150.

[0334] The upper surfaces of the plurality of patterns 120, the plurality of first flashing patterns 160, the plurality of energy source patterns 170, the plurality of second flashing patterns 180, the plurality of first patterns 140, and the plurality of second patterns 150 may be coplanar with the upper surface 110U of the substrate 110.

[0335] Subsequently, refer to Figure 46 , Figure 52 and Figure 53 At P180, a second CMP process can be performed. Multiple second patterns 150 can be the endpoint of the second CMP process. An integrated cell 108 including a substrate 110, multiple patterns 120, multiple first scintillation patterns 160, multiple energy source patterns 170, multiple second scintillation patterns 180, multiple first patterns 140, and multiple second patterns 150 can be provided through the second CMP process.

[0336] By performing operation P180, the plurality of recesses 110R can be transformed into a plurality of holes 110H extending to the new lower surface 110L' of the substrate 110. Each of the plurality of holes 110H can penetrate the substrate 110. The lower surfaces of the plurality of patterns 120, the plurality of first flashing patterns 160, the plurality of energy source patterns 170, the plurality of second flashing patterns 180, the plurality of first patterns 140, and the plurality of second patterns 150 can be coplanar with the lower surface 110L' of the substrate 110.

[0337] Multiple first flashing patterns 160 can each be located in one of the multiple holes 110H. Multiple first flashing patterns 160 can each be located between one of the multiple patterns 120 and one of the multiple energy source patterns 170. Multiple first flashing patterns 160 can each have a uniform thickness. Multiple first flashing patterns 160 can each surround one of the multiple patterns 120.

[0338] Multiple energy source patterns 170 may each be located within a corresponding one of the multiple apertures 110H. Multiple energy source patterns 170 may each be located between a corresponding one of the multiple first flashing patterns 160 and a corresponding one of the multiple second flashing patterns 180. Multiple energy source patterns 170 may each have a uniform thickness. Multiple energy source patterns 170 may each be surrounded by a corresponding one of the multiple first flashing patterns 160.

[0339] Multiple second scintillation patterns 180 may each be located in one of the multiple apertures 110H. Multiple second scintillation patterns 180 may each be located between one of the multiple energy source patterns 170 and one of the multiple first patterns 140. Multiple second scintillation patterns 180 may each have a uniform thickness. Multiple second scintillation patterns 180 may each surround one of the multiple energy source patterns 170.

[0340] The plurality of first patterns 140 may each be located between a corresponding one of the plurality of second flashing patterns 180 and a corresponding one of the plurality of second patterns 150. The plurality of first patterns 140 may each be freely surrounding a corresponding one of the plurality of second flashing patterns 180.

[0341] Multiple energy source patterns 170 can each be configured to emit alpha rays. Multiple first scintillation patterns 160 and multiple second scintillation patterns 180 can be configured to emit photons when exposed to alpha rays.

[0342] The depletion region located between the substrate 110 and the plurality of patterns 120, illuminated by photons emitted from the plurality of first scintillation patterns 160, can be configured to generate electron-hole pairs, thereby generating an electromotive force. The depletion region located between the plurality of first patterns 140 and the plurality of second patterns 150, illuminated by photons emitted from the plurality of second scintillation patterns 180, can be configured to generate electron-hole pairs, thereby generating an electromotive force.

[0343] The present disclosure has been described in more detail above with reference to the accompanying drawings and embodiments. However, the configurations shown in the drawings or embodiments described in this specification are merely examples of the present disclosure and do not reflect all the technical ideas of the present disclosure. Therefore, it should be understood that, as of the filing date of this application, there may be various equivalent forms and modifications that can replace the above-described structures.

Claims

1. An integrated battery comprising: A substrate containing multiple holes; Multiple patterns are disposed within multiple holes in the substrate and have a polarity opposite to that of the substrate. Multiple energy source patterns configured to emit β-rays to the substrate and the multiple patterns; Multiple first patterns surrounded by the multiple energy source patterns; as well as Multiple second patterns surrounded by the multiple first patterns.

2. The integrated battery according to claim 1, wherein, Each of the plurality of energy source patterns is located between a corresponding one of the plurality of first patterns and a corresponding one of the plurality of patterns.

3. The integrated battery according to claim 1, wherein, Each of the plurality of first patterns has the same conductivity type as the substrate, and Each of the plurality of second patterns has the same conductivity type as each of the plurality of patterns.

4. The integrated battery according to claim 1, wherein, Each of the plurality of first patterns has the same conductivity type as each of the plurality of patterns, and Each of the plurality of second patterns has the same conductivity type as the substrate.

5. The integrated battery according to claim 1, wherein, The lower surfaces of the plurality of patterns, the lower surfaces of the plurality of energy source patterns, the lower surfaces of the plurality of first patterns, and the lower surfaces of the plurality of second patterns are coplanar with the lower surface of the substrate.

6. The integrated battery according to claim 1, wherein, The lower surfaces of each of the plurality of patterns, the lower surfaces of each of the plurality of energy source patterns, and the lower surfaces of each of the plurality of first patterns are coplanar with the lower surface of the substrate, and Each of the plurality of first patterns has a cup shape.

7. The integrated battery according to claim 1, wherein, The lower surfaces of each of the plurality of energy source patterns are coplanar with the lower surface of the substrate, and Each of the multiple energy source patterns has a cup shape.

8. The integrated battery according to claim 1, wherein, The lower surfaces of each of the plurality of patterns are coplanar with the lower surface of the substrate, and Each of the multiple patterns has a cup shape.

9. An integrated battery comprising: A substrate containing multiple holes; Multiple patterns are disposed within multiple holes in the substrate and have a polarity opposite to that of the substrate. Multiple energy source patterns located within the plurality of holes; A plurality of first patterns disposed within the plurality of holes and spaced apart from the plurality of patterns; as well as Multiple second patterns located within the plurality of holes.

10. The integrated battery according to claim 9, wherein, Each of the plurality of energy source patterns is surrounded by a corresponding pattern from among the plurality of patterns.

11. The integrated battery according to claim 9, wherein, Each of the plurality of first patterns is surrounded by a corresponding one of the plurality of energy source patterns.

12. The integrated battery according to claim 9, wherein, Each of the plurality of second patterns is surrounded by a corresponding one of the plurality of first patterns.

13. An integrated battery comprising: A substrate containing multiple recesses; Layer located on the substrate; The energy source layer located on the aforementioned layer; The first layer located on the energy source layer; and The second layer is located above the first layer.

14. The integrated battery according to claim 13, wherein, The layer has a conductivity type opposite to that of the substrate, and The conductivity type of the first layer is opposite to that of the second layer.

15. The integrated battery according to claim 13, wherein, The first layer has the same conductivity type as the substrate, and The second layer has the same conductivity type as the first layer.

16. The integrated battery according to claim 13, wherein, The first layer has the same conductivity type as the said layer, and The second layer has the same conductivity type as the substrate.

17. The integrated battery according to claim 13, wherein, The substrate includes an electrical region having the plurality of recesses and a contact region spaced apart from the plurality of recesses. In the contact area, the substrate, the layer, the energy source layer, the first layer, and the second layer form a stepped structure.

18. The integrated battery according to claim 17, wherein, In the contact area, the substrate protrudes horizontally relative to the layer.

19. The integrated battery according to claim 17, wherein, In the contact area, the layer protrudes horizontally relative to the first layer.

20. The integrated battery according to claim 17, wherein, In the contact area, the first layer protrudes horizontally relative to the second layer.

21. The integrated battery according to claim 13, wherein, The first unit, which includes the substrate and the layer, is connected in series with the second unit, which includes the first layer and the second layer.

22. The integrated battery according to claim 13, wherein, The first unit, which includes the substrate and the layer, is connected in parallel with the second unit, which includes the first layer and the second layer.

23. The integrated battery according to claim 13, further comprising: The first through hole is located on the substrate; The second through-hole is located on the layer; The third through hole is located on the first layer; as well as The fourth through hole is located on the second layer.

24. The integrated battery according to claim 23, wherein, Each of the first through-hole to the fourth through-hole includes a passivation layer and a conductive layer surrounded by the passivation layer.

25. The integrated battery according to claim 24, wherein, The first through-hole penetrates the layer, the first layer, and the second layer.

26. The integrated battery according to claim 24, wherein, The second through-hole penetrates both the first layer and the second layer.

27. The integrated battery according to claim 24, wherein, The third through hole penetrates the second layer.

28. The integrated battery according to claim 23, wherein, The substrate includes an electrical region having the plurality of recesses, and a first contact region and a second contact region spaced apart from each other, the electrical region being located between the first contact region and the second contact region. The first through hole and the third through hole are located on the first contact area, and The second through hole and the fourth through hole are located on the second contact area.

29. The integrated battery according to claim 28, wherein the integrated battery further comprises a wire connected to the second through hole and the fourth through hole.

30. The integrated battery according to claim 23, wherein, The substrate includes an electrical region having the plurality of recesses, and a first contact region and a second contact region spaced apart from each other, the electrical region being located between the first contact region and the second contact region. Wherein, the second through hole and the third through hole are located on the first contact area, and The first through hole and the fourth through hole are located on the second contact area.

31. The integrated battery according to claim 23, further comprising: A first wire connected to the second through hole and the third through hole; as well as A second wire connected to the first through hole and the fourth through hole.

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