Display substrate, driving method thereof, and tiled display device
Patent Information
- Application Number
- CN202580000222.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-02-26
- Publication Date
- 2026-10-27
AI Technical Summary
OLED video walls suffer from uniformity and lifespan issues in indoor or semi-outdoor applications. Especially in demanding application scenarios, existing technologies struggle to effectively improve the seams and image retention phenomena of video walls.
By designing alternating first and second sub-pixels on the OLED display substrate, and using independent or shared pixel driving circuits, combined with multiplexers and light-emitting control lines, the alternating illumination of odd and even columns can be achieved, extending the lifespan and maintaining the display resolution.
It effectively extends the lifespan of OLED video walls to twice the original lifespan, while improving the splicing seams and image retention issues, and maintaining the same display resolution.
Smart Images

Figure CN122996834A_ABST
Abstract
Description
Display substrate, its driving method and splicing display device Technical Field
[0001] This disclosure relates to the field of display technology, and in particular to a display substrate, its driving method, and a splicing display device. Background Technology
[0002] Organic light-emitting diodes (OLEDs) are gradually attracting more attention as a new type of flat panel display. Due to their excellent characteristics such as active light emission, high brightness, high resolution, wide viewing angle, fast response speed, small thickness, low power consumption, flexibility, wide operating temperature range, and relatively simple structure and manufacturing process, OLED displays have broad application prospects, such as wearable, foldable, automotive, and outdoor displays, and the market share of OLED display products is increasing. Summary of the Invention
[0003] The display substrate, its driving method, and the splicing display device disclosed herein are specifically designed as follows:
[0004] In one aspect, embodiments of this disclosure provide a display substrate, including:
[0005] Substrate;
[0006] Multiple sub-pixels are arranged in an array on the substrate. The multiple sub-pixels include a first sub-pixel and a second sub-pixel that are alternately arranged along the row direction. The first sub-pixel and the second sub-pixel are configured to be alternately lit under the control of a data signal.
[0007] In some embodiments, the display substrate provided in this disclosure further includes multiple data lines, with the sub-pixels in different columns electrically connected to different data lines.
[0008] In some embodiments, the display substrate provided in the present disclosure further includes a plurality of multiplexers, an adjacent first sub-pixel and a second sub-pixel form a pixel group, and the data lines electrically connected to the pixel groups in the same column are electrically connected to the same multiplexer.
[0009] In some embodiments, in the display substrate provided in the present disclosure, the sub-pixel includes a pixel driving circuit, and the pixel driving circuit of the first sub-pixel is independent of the pixel driving circuit of the second sub-pixel.
[0010] In some embodiments, the display substrate provided in the present disclosure further includes multiple data lines, an adjacent first sub-pixel and a second sub-pixel form a pixel group, and the first sub-pixel and the second sub-pixel in the same column of the pixel group are electrically connected to the same data line.
[0011] In some embodiments, in the display substrate provided in the present disclosure, the sub-pixel includes a pixel driving circuit, and the first sub-pixel and the second sub-pixel of a pixel group share the same pixel driving circuit.
[0012] In some embodiments, the display substrate provided in this disclosure further includes multiple first light-emitting control lines and multiple second light-emitting control lines. The pixel driving circuits of the first sub-pixels in different rows are electrically connected to different first light-emitting control lines, and the pixel driving circuits of the second sub-pixels in different rows are electrically connected to different second light-emitting control lines.
[0013] In some embodiments, in the display substrate provided in this disclosure, the first sub-pixel includes a first light-emitting device, the second sub-pixel includes a second light-emitting device, and the pixel driving circuit includes a first light-emitting control transistor and a second light-emitting control transistor; wherein...
[0014] The gate of the first light-emitting control transistor is electrically connected to the first light-emitting control line, the first electrode of the first light-emitting control transistor is electrically connected to the first electrode of the second light-emitting control transistor, and the second electrode of the first light-emitting control transistor is electrically connected to the anode of the first light-emitting device; the gate of the second light-emitting control transistor is electrically connected to the second light-emitting control line, and the second electrode of the second light-emitting control transistor is electrically connected to the anode of the second light-emitting device.
[0015] In some embodiments, the display substrate provided in this disclosure further includes a reset signal line and an initialization signal line, the second sub-pixel includes a second light-emitting device, and the pixel driving circuit includes a reset transistor; wherein...
[0016] The gate of the reset transistor is electrically connected to the reset signal line, the first terminal of the reset transistor is electrically connected to the initialization signal line, and the second terminal of the reset transistor is electrically connected to the anode of the second light-emitting device.
[0017] On the other hand, this disclosure provides a splicing display device, including a plurality of display substrates provided in this disclosure.
[0018] On the other hand, embodiments of this disclosure provide a driving method for the above-mentioned display substrate, including:
[0019] Obtain the image data to be displayed;
[0020] The first sub-pixel and the second sub-pixel are alternately lit according to the image data to be displayed.
[0021] In some embodiments, in the driving method provided in this disclosure, the image data to be displayed consists of m*n elements, where m is the number of columns of the first sub-pixel or the second sub-pixel, and n is the number of rows of the sub-pixel. Alternatingly lighting the first sub-pixel and the second sub-pixel according to the image data to be displayed specifically includes:
[0022] During the first half of the scanning time of each line in a frame, the image data to be displayed is provided to the data line electrically connected to the first sub-pixel through a multiplexer to illuminate the first sub-pixel of that line; and during the second half of the scanning time of each line in a frame, the image data to be displayed is provided to the data line electrically connected to the second sub-pixel through a multiplexer to illuminate the second sub-pixel of that line; or the image data to be displayed is written to the first sub-pixel and the second sub-pixel, and the first sub-pixel and the second sub-pixel are alternately illuminated through the first light-emitting control line and the second light-emitting control line.
[0023] Alternatively, the image data to be displayed consists of 2m*n elements, where 2m is the number of columns of the sub-pixels and n is the number of rows of the sub-pixels. The first sub-pixel and the second sub-pixel are alternately illuminated according to the image data to be displayed, specifically including:
[0024] Within one frame of two adjacent frames, the even-numbered columns of the image data to be displayed are made black to illuminate the first sub-pixel; within another frame of two adjacent frames, the odd-numbered columns of the image data to be displayed are made black to illuminate the second sub-pixel. Attached Figure Description
[0025] Figure 1 is a schematic diagram of a display substrate provided in an embodiment of this disclosure;
[0026] Figure 2 is a schematic diagram of the improved image retention provided by an embodiment of this disclosure;
[0027] Figure 3 is a schematic diagram of another structure of the display substrate provided in the embodiments of this disclosure;
[0028] Figure 4 is a schematic diagram of another structure of the display substrate provided in the embodiments of this disclosure;
[0029] Figure 5 shows a pixel driving circuit provided in an embodiment of this disclosure;
[0030] Figure 6a is a timing diagram of one operation of the pixel driving circuit shown in Figure 5;
[0031] Figure 6b is another timing diagram of the pixel driving circuit shown in Figure 5.
[0032] Figure 7 is a flowchart of the driving method for the display substrate provided in an embodiment of this disclosure. Detailed Implementation
[0033] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. It should be noted that, for clarity, the thickness of layers, films, panels, regions, etc., is enlarged in the drawings. Exemplary embodiments are described in this disclosure with reference to cross-sectional views as schematic diagrams of idealized embodiments. Thus, deviations from the shape of the figures will be expected as a result of, for example, manufacturing techniques and / or tolerances. Therefore, the embodiments described in this disclosure should not be construed as limited to the specific shape of the regions shown in this disclosure, but rather include deviations in shape caused, for example, by manufacturing processes. For example, a region illustrated or described as flat may typically have rough and / or non-linear characteristics; a sharp corner illustrated may be rounded, etc. Therefore, the regions shown in the figures are schematic in nature, and their dimensions and shapes are not intended to illustrate the precise shape of the regions or reflect true proportions; their purpose is merely to illustrate the content of this disclosure. And throughout, the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions. To keep the following description of the embodiments of this disclosure clear and concise, detailed descriptions of known functions and known components are omitted.
[0034] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure and the claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that the element or object preceding the word covers the element or object listed following the word and its equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as “inner,” “outer,” “upper,” and “lower” are used only to indicate relative positional relationships, and these relative positional relationships may change accordingly when the absolute position of the described object changes.
[0035] In the following description, when an element or layer is referred to as "on" or "connected to" another element or layer, the element or layer may be directly on or directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. When an element or layer is referred to as "located on one side of" another element or layer, the element or layer may be directly on or directly connected to the other element or layer, or there may be intermediate elements or intermediate layers. However, when an element or layer is referred to as "directly on" or "directly connected to" another element or layer, no intermediate elements or intermediate layers are present. The term "and / or" includes any and all combinations of one or more of the related listed items.
[0036] Compared to mini LED video walls, OLED video walls offer advantages such as better uniformity, lower power consumption, and better heat dissipation. Their display advantages are more pronounced in indoor or semi-outdoor applications, but their lifespan specifications are also more stringent.
[0037] To address the aforementioned technical problems, this disclosure provides a display substrate. Figure 1 is a schematic diagram of a structure of the display substrate provided in this disclosure. As shown in Figure 1, the display substrate provided in this disclosure includes:
[0038] The substrate ST may optionally be made of a material such as polyimide.
[0039] Multiple sub-pixels SP are arranged in an array on a substrate ST. Optionally, the sub-pixels SP include red sub-pixels R, green sub-pixels G, blue sub-pixels B, etc., wherein a red sub-pixel R, a green sub-pixel G, and a blue sub-pixel B can be arranged in sequence to form a white dot pixel, or a red sub-pixel R, a green sub-pixel G, a blue sub-pixel B, and a green sub-pixel G can be arranged in sequence to form a white dot pixel. This disclosure does not limit the scope of the invention.
[0040] In some embodiments, the plurality of sub-pixels SP may include a first sub-pixel SP1 and a second sub-pixel SP2 alternately arranged along the row direction X, and the first sub-pixel SP1 and the second sub-pixel SP2 are configured to be alternately lit under the control of a data signal. In some embodiments, an adjacent first sub-pixel SP1 and a second sub-pixel SP2 may be equivalent to a sub-pixel of a low-resolution product (e.g., an outdoor advertising screen). For example, this disclosure uses 2m*n sub-pixels, while the low-resolution product uses m*n sub-pixels. The sub-pixel of the low-resolution product can be divided into two as the first sub-pixel SP1 and the second sub-pixel SP2 of this disclosure. The design of dividing the pixel into two can shorten the spacing between pixels, which theoretically improves the reduction of the splicing seam of the splicing screen. In other embodiments, the pixel spacing in the row direction X and column direction Y of the low-resolution product (e.g., an outdoor advertising screen) can be kept unchanged (referred to as the original pixel spacing), and a pixel of the same size can be inserted into the original pixel spacing in the row direction X. The original pixel is used as the first sub-pixel SP1 of this disclosure, and the pixel inserted into the original pixel spacing in the row direction X is used as the second sub-pixel SP2 of this disclosure. Since the ratio of the seam gap to the original pixel spacing can remain unchanged, the seam gap compensation effect will not be affected.
[0041] In the array substrate provided in the embodiments of this disclosure, when the sub-pixels of the low-resolution product are divided into two parts as the first sub-pixel SP1 and the second sub-pixel SP2, the first sub-pixel SP1 and the second sub-pixel SP2 are alternately lit. This is equivalent to only half of the sub-pixels of the low-resolution product being lit. Under the condition of inputting the same data signal, the pixel lifespan will theoretically become twice the original. When the original pixel is used as the first sub-pixel SP1 and the inserted pixel is used as the second sub-pixel SP2, the lifespan of the first sub-pixel SP1 and the second sub-pixel SP2 is the same as the lifespan of the original pixel. The two are alternately lit, which theoretically can extend the lifespan of the OLED splicing screen to twice the original lifespan. Furthermore, the alternating lighting of the first sub-pixel SP1 and the second sub-pixel SP2 in this disclosure can also achieve the effective display resolution without affecting the display quality. For example, if the actual resolution of this disclosure is 200RGB*100, then it contains a white dot pixel structure of 200*100. Since the odd or even column of pixels is selected to light up each time, the effective display resolution of the OLED splicing screen is 100RGB*100, that is, 100*100 white dot pixels are lit up, which is consistent with the display resolution of low-resolution products (such as outdoor advertising screens).
[0042] Furthermore, as requirements for OLED display products become increasingly stringent, the level of image retention is becoming increasingly important. Relevant short-term image retention tests typically involve a black-and-white grid test. The grid is displayed at L255 and L0, then switched to L48, and the duration of the black-and-white grid indicates the image retention level. The image retention mechanism is due to the hysteresis effect of the driving transistor DTFT in the pixel driving circuit, causing the Id-Vg curves of different displayed images to not coincide. This results in different brightness levels for the same grayscale image, thus causing image retention. For example, the Ids of the driving transistor DTFT differ when switching from L255 to L48 and from L0 to L48, leading to differences in display brightness and resulting in image retention. In this disclosure, because the first sub-pixel SP1 and the second sub-pixel SP2 are lit alternately, only half a row of pixels (e.g., the first sub-pixel SP1) is lit at any given time, while the brightness of the other half row of pixels (e.g., the second sub-pixel SP2) is L0. Therefore, for the screen switching from L255 to L48 and from L0 to L48, each row of pixels is from L0 to L48 (as shown in Figure 2). This means that there will be no situation where the Id-Vg curves do not overlap, and thus there will be no related image retention defects.
[0043] In some embodiments, FIG3 shows another structural schematic diagram of the display substrate provided in the present disclosure. As shown in FIG1 and FIG3, the display substrate of the present disclosure may further include multiple data lines DL, and sub-pixels SP in different columns are electrically connected to different data lines DL. Compared with the low-resolution products described above, the number of data lines DL in the present disclosure is doubled. In some embodiments, sub-pixels SP include a pixel driving circuit and an OLED light-emitting device. The pixel driving circuit may be the same as that in related technologies, such as a 2T1C pixel driving circuit. Optionally, the pixel driving circuit of the first sub-pixel SP1 and the pixel driving circuit of the second sub-pixel SP2 are independent of each other, so that the OLED light-emitting devices of the first sub-pixel SP1 and the OLED light-emitting devices of the second sub-pixel SP2 can be driven independently. Optionally, a data line DL may be electrically connected to a column of pixel driving circuits of the first sub-pixel SP1 or to a column of pixel driving circuits of the second sub-pixel SP2.
[0044] Since each sub-pixel SP has its own independent pixel driver circuit, during display, it is necessary to separately control the first sub-pixel SP1 in odd-numbered columns or the second sub-pixel SP2 in even-numbered columns to be lit. However, most of the relevant source driver ICs can only control continuous data lines DL and cannot control them separately for odd and even numbers. Therefore, adding a set of control signals to illuminate odd or even columns in the timing is not feasible. Ultimately, it is necessary to process the image data to be displayed at the system or FPGA end. For example, the system or FPGA can process the 200RGB*100 image data to be displayed by rendering it black in every other column before sending it to the source driver IC. The source driver IC then drives one of the first sub-pixels SP1 and the second sub-pixel SP2 in all sub-pixels SP to display the image while the other displays a black image, thus maintaining the effective display resolution at 100RGB*100.
[0045] In some embodiments, as shown in FIG1, an adjacent first sub-pixel SP1 and a second sub-pixel SP2 can be considered as a pixel group P, and the data line DL electrically connected to the same column pixel group P can be electrically connected to the same multiplexer MUX. This allows the multiplexer MUX to provide the image data to be displayed to the first sub-pixel SP1 or the second sub-pixel SP2 in a time-division multiplexing manner, thereby alternately illuminating the first sub-pixel SP1 and the second sub-pixel SP2. In this case, the number of rows of image data displayed per frame is equal to the number of rows of sub-pixels SP1, and the number of columns of image data displayed per frame is the same as the number of columns of the first sub-pixel SP1 or the second sub-pixel SP2. In some embodiments, the two small boxes of the multiplexer MUX in FIG1 can each represent a transistor, which is turned on in a time-division multiplexing manner to alternately illuminate the first sub-pixel SP1 and the second sub-pixel SP2. Of course, in some embodiments, the multiplexer MUX of this disclosure can also be other structures known to those skilled in the art, and is not limited here.
[0046] In some embodiments, FIG4 shows another structural schematic diagram of the display substrate provided in this disclosure. As shown in FIG4, an adjacent first sub-pixel SP1 and a second sub-pixel SP2 constitute a pixel group P. The first sub-pixel SP1 and the second sub-pixel SP2 in the same column of pixel group P are electrically connected to the same data line DL, and the first sub-pixel SP1 and the second sub-pixel SP2 of a pixel group P share the same pixel driving circuit. Compared with the low-resolution product mentioned above, the number of data lines DL does not need to be doubled. That is, the actual resolution of the panel is 100RGB*100, which includes 100*100 white dot pixel structures. The effective display resolution of the OLED splicing screen is 100RGB*100, that is, 100*100 white dot pixels are lit, which is consistent with the display resolution of the low-resolution product mentioned above. In this case, the number of rows of the displayed image data in each frame is equal to the number of rows of the sub-pixel SP, and the number of columns of the displayed image data in each frame is the same as the number of columns of the first sub-pixel SP1 or the second sub-pixel SP2.
[0047] Since the first sub-pixel SP1 and the second sub-pixel SP2 of a pixel group P in Figure 4 share a single pixel driving circuit, the first sub-pixel SP1 or the second sub-pixel SP2 needs to be illuminated via timing control during display. For example, different light-emitting control signal lines can be used to control the illumination of the first sub-pixel SP1 or the second sub-pixel SP2. Based on this, as shown in Figure 4, this disclosure also provides multiple first light-emitting control lines EM1 and multiple second light-emitting control lines EM2. The pixel driving circuits of the first sub-pixels SP1 in different rows are electrically connected to different first light-emitting control lines EM1, and the pixel driving circuits of the second sub-pixels SP1 in different rows are electrically connected to different second light-emitting control lines EM2. In other words, the first sub-pixels SP1 in the same row are electrically connected to the same first light-emitting control line EM1, and the second sub-pixels SP2 in the same row are electrically connected to the same second light-emitting control line EM2. Optionally, to avoid short-circuiting the first light-emitting control line EM1 and the second light-emitting control line EM2, the first light-emitting control line EM1 and the second light-emitting control line EM2 can be set to be on different layers, for example, one is located in the gate metal layer and the other is located in the source drain metal layer; or, the first light-emitting control line EM1 and the second light-emitting control line EM2 can be set to be on the same layer (for example, both are located in the gate metal layer or the source drain metal layer), and one of them (for example, the first light-emitting control line EM1 in Figure 4) is connected to the corresponding sub-pixel SP through other conductive layers (for example, pixel electrode layer).
[0048] In some embodiments, FIG5 shows a schematic diagram of a shared pixel driving circuit for a first sub-pixel SP1 and a second sub-pixel SP2. As shown in FIG5, the pixel driving circuit includes a data writing transistor STFT, a driving transistor DTFT, a first light-emitting control transistor ETFT1, a second light-emitting control transistor ETFT2, a reset transistor RTFT, and a capacitor Cst. The gate of the data writing transistor STFT is electrically connected to the gate line GL, the first terminal of the data writing transistor STFT is electrically connected to the data line DL, the second terminal of the data writing transistor STFT is electrically connected to the gate of the driving transistor DTFT, the first terminal of the driving transistor DTFT is electrically connected to the high-level power supply line VDD, the second terminal of the driving transistor DTFT is electrically connected to the first terminal of the first light-emitting control transistor ETFT1 and the first terminal of the second light-emitting control transistor ETFT2, the gate of the first light-emitting control transistor ETFT1 is electrically connected to the first light-emitting control line EM1, and the first light-emitting control transistor ETFT2 is electrically connected to the first light-emitting control line EM1. The second electrode of FT1 is electrically connected to the anode of the first light-emitting device OLED1 in the first sub-pixel SP1. The gate of the second light-emitting control transistor ETFT2 is electrically connected to the second light-emitting control line EM2. The second electrode of the second light-emitting control transistor ETFT2 is electrically connected to the anode of the second light-emitting device OLED2 in the second sub-pixel SP2. The gate of the reset transistor RTFT is electrically connected to the reset signal line RL. The first electrode of the reset transistor RTFT is electrically connected to the initialization signal line VL. The second electrode of the reset transistor RTFT is electrically connected to the anode of the second light-emitting device OLED2 in the second sub-pixel SP2. The capacitor Cst is connected between the gate and the first electrode of the driving transistor DTFT. The cathodes of the first light-emitting device OLED1 in the first sub-pixel SP1 and the second light-emitting device OLED2 in the second sub-pixel SP2 are both electrically connected to the low-level power supply line VSS.
[0049] In some embodiments, to simplify wiring, the reset transistor RTFT of the second sub-pixel SP2 in the same row can be electrically connected to the same reset signal line RL, and the reset transistor RTFT of the second sub-pixel SP2 in the same column can be electrically connected to the same initialization signal line VL. The first light-emitting device OLED1 and the second light-emitting device OLED1 of the sub-pixel SP in the same row are electrically connected to the same low-level power supply line VSS, and the driving transistor DTFT of the sub-pixel SP in the same row is electrically connected to the same high-level power supply line VDD. Optionally, the reset signal line RL, the low-level power supply line VSS, and the high-level power supply line VDD are disposed on the gate metal layer, and the initialization signal line VL is disposed on the source-drain metal layer.
[0050] Figures 6a and 6b are timing diagrams of the pixel driving circuit shown in Figure 5, which time-divisionally drives the first light-emitting device OLED1 of the first sub-pixel SP1 and the second light-emitting device OLED2 of the second sub-pixel SP2. As can be seen from Figures 5, 6a, and 6b, in this disclosure, in the first stage, the reset transistor RTFT resets the OLED light-emitting device of the second sub-pixel SP2; in the second stage, the gate line GL controls the data writing transistor STFT to turn on, and data signals are written; in the third stage, the first light-emitting control line EM1 controls the first light-emitting control transistor ETFT1 to turn on, thereby illuminating the OLED light-emitting device of the first sub-pixel SP1, or the second light-emitting control line EM2 controls the second light-emitting control transistor ETFT2 to turn on, thereby illuminating the OLED light-emitting device of the second sub-pixel SP2. Thus, through the cooperation of the first light-emitting control line EM1 and the second light-emitting control line EM2, the OLED light-emitting devices of the first sub-pixel SP1 and the second sub-pixel SP2 are controlled to alternately illuminate, thereby achieving alternating illumination of odd and even columns and extending the lifespan of the OLED splicing screen.
[0051] It should be noted that in the display substrates shown in Figures 1 and 3, the first sub-pixel SP1 and the second sub-pixel SP2 have independent pixel driving circuits. These pixel driving circuits may include light-emitting control transistors (LEDs). For example, the second LED LED (ETFT2) and the reset transistor (RTFT) in Figure 5 can be removed to obtain the pixel driving circuits in Figures 1 and 3. In some embodiments, the pixel driving circuits for the first sub-pixel SP1 and the second sub-pixel SP2 in Figures 1 and 3 may also not include LEDs. For example, the first LED LED (TFT1), the second LED LED (ETFT2), and the reset transistor (RTFT) in Figure 5 can be removed to obtain the pixel driving circuits in Figures 1 and 3. Of course, the pixel driving circuits for the first sub-pixel SP1 and the second sub-pixel SP2 in Figures 1 and 3 can also be other pixel driving circuits in the related art. The shared pixel driving circuit for the first sub-pixel SP1 and the second sub-pixel SP2 in Figure 4 can be based on the relevant pixel driving circuits by adding the first LED LED (TFT1), the second LED LED (ETFT2), and the reset transistor (RTFT).
[0052] Based on the same inventive concept, this disclosure provides a splicing display device, including multiple display substrates provided in the embodiments of this disclosure. Since the principle by which this splicing display device solves the problem is similar to the principle by which the display substrates solve the problem, the implementation of the splicing display device provided in this disclosure can refer to the implementation of the display substrates provided in the embodiments of this disclosure, and repeated details will not be described again.
[0053] In some embodiments, the splicing display device provided in this disclosure can be any product or component with display function, such as an outdoor advertising screen, a vehicle-mounted display screen, or a television set. The display device includes, but is not limited to, components such as a radio frequency unit, a network module, an audio output & input unit, a sensor, a display unit, a user input unit, an interface unit, and a control circuit. Optionally, the control circuit can be a central processing unit, a digital signal processor, or a system-on-a-chip (SoC). For example, the control circuit may also include a memory and a power module, and power supply and signal input / output functions are achieved through additional wires and signal lines. For example, the control circuit may also include hardware circuits and computer-executable code. The hardware circuit may include conventional very-large-scale integrated circuits (VLSI) or gate arrays, as well as existing semiconductors or other discrete components such as logic circuits and transistors; the hardware circuit may also include field-programmable gate arrays, programmable array logic, programmable logic devices, etc. Furthermore, those skilled in the art will understand that the above structure does not constitute a limitation on the display device provided in this disclosure. In other words, the display device provided in this disclosure may include more or fewer of the above components, or combine certain components, or arrange different components.
[0054] Based on the same inventive concept, this disclosure provides a driving method for the above-mentioned display substrate. Since the principle of this driving method in solving the problem is similar to that of the above-mentioned display substrate in solving the problem, the implementation of the driving method provided in this disclosure can refer to the implementation of the above-mentioned display substrate provided in this disclosure, and repeated details will not be described again.
[0055] In some embodiments, FIG7 shows a flowchart of the driving method for the display substrate provided in the present disclosure. As shown in FIG7, the driving method of the present disclosure may include the following steps:
[0056] S701, Obtain the image data to be displayed;
[0057] S702, Alternately illuminate the first sub-pixel and the second sub-pixel according to the image data to be displayed.
[0058] In some embodiments, in the driving method provided in this disclosure, the image data to be displayed consists of m*n elements, where m is the column number of the first or second sub-pixel and n is the row number of the sub-pixel. Step S702, alternately lighting the first and second sub-pixels according to the image data to be displayed, can be implemented in the following two ways:
[0059] The first implementation is as follows: during the first half of the scanning time of each line in a frame, the image data to be displayed is provided to the data line electrically connected to the first sub-pixel through a multiplexer to light up the first sub-pixel of the line; and during the second half of the scanning time of each line in a frame, the image data to be displayed is provided to the data line electrically connected to the second sub-pixel through a multiplexer to light up the second sub-pixel of the line.
[0060] The second implementation method is as follows: the image data to be displayed is written into the first sub-pixel and the second sub-pixel, and the first sub-pixel and the second sub-pixel are controlled to light up alternately through the first light-emitting control line and the second light-emitting control line. In some embodiments, the first sub-pixel can be controlled to light up in the first half of the frame time and the second sub-pixel can be controlled to light up alternately in the second half of the frame time; or the first sub-pixel can be controlled to light up in one frame time and the second sub-pixel can be controlled to light up in the other frame time. This disclosure does not make specific limitations.
[0061] In some embodiments, in the driving method provided in the present disclosure, the image data to be displayed is 2m*n, where 2m is the number of columns of sub-pixels and n is the number of rows of sub-pixels. In step S702, the first sub-pixel and the second sub-pixel are alternately lit according to the image data to be displayed. Specifically, in one frame between two adjacent frames, the even-numbered columns of the image data to be displayed are made black to light up the first sub-pixel; in another frame between two adjacent frames, the odd-numbered columns of the image data to be displayed are made black to light up the second sub-pixel.
[0062] In some embodiments, in the driving method described above provided in the present disclosure, in order to avoid flickering, the other sub-pixel may be lit up after one of the first sub-pixel and the second sub-pixel has been lit up for a preset time.
[0063] Those skilled in the art will understand that the driving method embodiments of this disclosure can be provided as a method, system, or computer program product. Therefore, this disclosure can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this disclosure can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0064] This disclosure is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this disclosure. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in one or more flowchart illustrations and / or one or more block diagrams.
[0065] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means that implement the functions specified in one or more flowcharts and / or one or more block diagrams.
[0066] These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process, such that the instructions, which execute on the computer or other programmable apparatus, provide steps for implementing the functions specified in one or more flowcharts and / or one or more block diagrams.
[0067] Although preferred embodiments of this disclosure have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this disclosure.
[0068] Obviously, those skilled in the art can make various modifications and variations to the embodiments of this disclosure without departing from the spirit and scope of the embodiments of this disclosure. Therefore, if these modifications and variations to the embodiments of this disclosure fall within the scope of the claims of this disclosure and their equivalents, this disclosure is also intended to include these modifications and variations.
Claims
1. A display substrate, wherein, include: Substrate; Multiple sub-pixels are arranged in an array on the substrate. The multiple sub-pixels include a first sub-pixel and a second sub-pixel that are alternately arranged along the row direction. The first sub-pixel and the second sub-pixel are configured to be alternately lit under the control of a data signal.
2. The display substrate as claimed in claim 1, wherein, It also includes multiple data lines, with the sub-pixels in different columns electrically connected to different data lines.
3. The display substrate as described in claim 2, wherein, It also includes multiple multiplexers, with an adjacent first sub-pixel and a second sub-pixel forming a pixel group, and the data lines electrically connected to the pixel groups in the same column being electrically connected to the same multiplexer.
4. The display substrate as described in claim 2 or 3, wherein, The sub-pixel includes a pixel driving circuit, and the pixel driving circuit of the first sub-pixel is independent of the pixel driving circuit of the second sub-pixel.
5. The display substrate as claimed in claim 1, wherein, It also includes multiple data lines, with an adjacent first sub-pixel and a second sub-pixel forming a pixel group, and the first sub-pixel and the second sub-pixel in the same column of the pixel group being electrically connected to the same data line.
6. The display substrate as claimed in claim 5, wherein, The sub-pixel includes a pixel driving circuit, and the first sub-pixel and the second sub-pixel of a pixel group share the same pixel driving circuit.
7. The display substrate as claimed in claim 6, wherein, It also includes multiple first light-emitting control lines and multiple second light-emitting control lines. The pixel driving circuits of the first sub-pixels in different rows are electrically connected to different first light-emitting control lines, and the pixel driving circuits of the second sub-pixels in different rows are electrically connected to different second light-emitting control lines.
8. The display substrate as claimed in claim 7, wherein, The first sub-pixel includes a first light-emitting device, the second sub-pixel includes a second light-emitting device, and the pixel driving circuit includes a first light-emitting control transistor and a second light-emitting control transistor; wherein... The gate of the first light-emitting control transistor is electrically connected to the first light-emitting control line, the first electrode of the first light-emitting control transistor is electrically connected to the first electrode of the second light-emitting control transistor, and the second electrode of the first light-emitting control transistor is electrically connected to the anode of the first light-emitting device; the gate of the second light-emitting control transistor is electrically connected to the second light-emitting control line, and the second electrode of the second light-emitting control transistor is electrically connected to the anode of the second light-emitting device.
9. The display substrate as claimed in claim 7 or 8, wherein, It also includes a reset signal line and an initialization signal line. The second sub-pixel includes a second light-emitting device. The pixel driving circuit includes a reset transistor. The gate of the reset transistor is electrically connected to the reset signal line. The first electrode of the reset transistor is electrically connected to the initialization signal line. The second electrode of the reset transistor is electrically connected to the anode of the second light-emitting device.
10. A splicing display device, wherein, It includes multiple display substrates as described in any one of claims 1 to 9.
11. A driving method for a display substrate as described in any one of claims 1 to 9, wherein, include: Obtain the image data to be displayed; The first sub-pixel and the second sub-pixel are alternately lit according to the image data to be displayed.
12. The driving method as described in claim 11, wherein, The image data to be displayed consists of m*n elements, where m is the column number of the first or second sub-pixel, and n is the row number of the sub-pixel. The first and second sub-pixels are alternately illuminated according to the image data to be displayed, specifically including: During the first half of the scanning time of each line in a frame, the image data to be displayed is provided to the data line electrically connected to the first sub-pixel through a multiplexer to illuminate the first sub-pixel of that line; and during the second half of the scanning time of each line in a frame, the image data to be displayed is provided to the data line electrically connected to the second sub-pixel through a multiplexer to illuminate the second sub-pixel of that line; or the image data to be displayed is written to the first sub-pixel and the second sub-pixel, and the first sub-pixel and the second sub-pixel are alternately illuminated through the first light-emitting control line and the second light-emitting control line. Alternatively, the image data to be displayed consists of 2m*n elements, where 2m is the number of columns of the sub-pixels and n is the number of rows of the sub-pixels. The first sub-pixel and the second sub-pixel are alternately illuminated according to the image data to be displayed, specifically including: Within one frame of two adjacent frames, the even-numbered columns of the image data to be displayed are made black to illuminate the first sub-pixel; within another frame of two adjacent frames, the odd-numbered columns of the image data to be displayed are made black to illuminate the second sub-pixel.