Attached substrate, semiconductor element, and method for manufacturing semiconductor element
Patent Information
- Application Number
- CN202480084063.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-19
- Publication Date
- 2026-10-27
AI Technical Summary
[0018]根据本发明的实施方式,能够提供耐热性优异的贴合基板。
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Figure CN122996847A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to a bonding substrate, a semiconductor element, and a method for manufacturing a semiconductor element. Background Technology
[0002] Group III nitrides are being actively developed as semiconductor materials, for example. As a substrate used in semiconductor devices using group III nitrides, for example, as described in Patent Document 1, a laminated substrate is proposed by bonding a group III nitride crystalline layer and a substrate with a different coefficient of thermal expansion than the group III nitride crystalline layer.
[0003] Existing technical documents
[0004] Patent documents
[0005] Patent Document 1: Japanese Patent No. 4458116 Summary of the Invention
[0006] However, the heat resistance of the aforementioned bonding substrate is sometimes insufficient. For example, cracking sometimes occurs in the bonding substrate during the manufacture of semiconductor devices.
[0007] In view of the above, the main objective of the present invention is to provide a bonding substrate with excellent heat resistance.
[0008] 1. The bonding substrate involved in the embodiments of the present invention is a bonding substrate consisting of a group III element nitride crystal substrate and a support substrate made of a material different from the material constituting the group III element nitride crystal substrate, characterized in that the support substrate is composed of a crystal having a hexagonal crystal structure, and the minimum value of the angle formed by the m-plane of the group III element nitride crystal substrate and the m-plane of the support substrate when viewed from above is 1° or more.
[0009] 2. In the bonding substrate described in 1 above, when viewed from above, the minimum angle between the m-plane of the group III element nitride crystal substrate and the m-plane of the supporting substrate can be 15° or less.
[0010] 3. In the bonding substrate described in 1 or 2 above, when viewed from above, the minimum angle between the m-plane of the group III element nitride crystal substrate and the m-plane of the supporting substrate can be 3° or more.
[0011] 4. In any one of the bonding substrates described in 1 to 3 above, the thickness of the group III element nitride crystal substrate may be 0.5 μm or more and 10 μm or less.
[0012] 5. In any one of the bonding substrates described in 1 to 4 above, the thickness of the supporting substrate may be 100 μm or more and 1000 μm or less.
[0013] 6. In any one of the bonding substrates described in 1 to 5 above, the coefficient of thermal expansion of the group III element nitride crystal substrate may be greater than the coefficient of thermal expansion of the supporting substrate.
[0014] 7. In any one of the bonding substrates described in 1 to 6 above, the supporting substrate may comprise silicon carbide.
[0015] 8. A semiconductor element according to another embodiment of the present invention comprises: a bonding substrate as described in any one of 1 to 7 above; and a device layer disposed on the bonding substrate.
[0016] 9. A method for manufacturing a semiconductor element according to another embodiment of the present invention includes forming a device layer on a bonding substrate described in any one of 1 to 7 above at a temperature of 1000°C or higher.
[0017] Invention Effects
[0018] According to embodiments of the present invention, a bonding substrate with excellent heat resistance can be provided. Attached Figure Description
[0019] Figure 1 This is a simplified cross-sectional view showing the general structure of a bonding substrate according to one embodiment of the present invention.
[0020] Figure 2 This is an illustration of the crystal planes of a hexagonal crystal system.
[0021] Figure 3A This is a diagram illustrating an example of the manufacturing process of a group III element nitride crystalline substrate.
[0022] Figure 3B It was immediately afterwards Figure 3A The image.
[0023] Figure 3C It was immediately afterwards Figure 3B The image.
[0024] Figure 4A This is a diagram illustrating the manufacturing process of a bonding substrate according to one embodiment of the present invention.
[0025] Figure 4B It was immediately afterwards Figure 4A The image.
[0026] Figure 5 This diagram illustrates an example of a method for adjusting the angle formed by the crystal plane.
[0027] Figure 6 This is a simplified cross-sectional view showing the general configuration of a semiconductor element according to one embodiment of the present invention. Detailed Implementation
[0028] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings; however, the present invention is not limited to these embodiments. The drawings make the description clearer, and therefore, the width, thickness, shape, etc., of each part are sometimes shown schematically compared to the embodiments; however, this is merely an example and does not limit the interpretation of the present invention. Furthermore, regarding the drawings, the same or equivalent elements are labeled with the same reference numerals, and repeated descriptions are sometimes omitted.
[0029] A. Laminating substrate
[0030] Figure 1 This is a simplified cross-sectional view showing the general configuration of a bonding substrate according to one embodiment of the present invention. The bonding substrate 100 includes a support substrate 10 and a group III nitride crystal substrate 20. The bonding substrate 100 comprises: a group III nitride crystal substrate 20 having a first main surface 21 and a second main surface 22 facing each other, and a support substrate 10 disposed on the second main surface 22 side of the group III nitride crystal substrate 20. For example, the bonding substrate 100 can be obtained by bonding the group III nitride crystal substrate 20 and the support substrate 10.
[0031] Although not illustrated, the bonding substrate 100 may further have any layers. The type, function, number, combination, and arrangement of such layers can be appropriately set according to the purpose. For example, the bonding substrate 100 may have a device layer formed on the group III nitride crystal substrate 20. Alternatively, the bonding substrate 100 may have a bonding layer disposed between the support substrate 10 and the group III nitride crystal substrate 20.
[0032] The bonding substrate 100 can be manufactured in any suitable shape. In one embodiment, it can be manufactured in the form of a so-called wafer. The dimensions of the bonding substrate 100 can be appropriately set according to the purpose. For example, the diameter of the wafer is 50 mm to 200 mm. The bonding substrate 100 exhibits a crystal orientation (e.g., the crystal orientation of a wafer), therefore, orientation planes or notches can be formed on a portion thereof.
[0033] The group III nitride crystal substrate 20 is composed of group III nitride crystals. Group III elements constituting the group III nitrides include, for example, aluminum (Al), gallium (Ga), and indium (In). These elements can be used alone or in combination of two or more. Specific examples of group III nitrides include aluminum nitride (Al... x N), gallium nitride (Ga) y N), Indium nitride (In) z N), aluminum gallium nitride (Al) x Ga yN), gallium indium nitride (GaN) y In z N), aluminum indium nitride (Al) x In z N), aluminum gallium indium nitride (Al) x Ga y In z N). It should be noted that, representatively, in each chemical formula within parentheses, x + y + z = 1.
[0034] The Group III nitride constituting the Group III nitride crystal substrate 20 may be doped with elements other than Group III elements. Specifically, the Group III nitride constituting the Group III nitride crystal substrate 20 may contain elements other than Group III elements as dopants. By doping with elements other than Group III elements, the Group III nitride crystal substrate 20 can be semi-insulating. In this case, the resistivity of the Group III nitride crystal substrate 20 is, for example, 1 × 10⁻⁶. 5 Ω·cm or more and 1×10 14 Below Ω·cm, preferably 1×10 6 Ω·cm or higher, more preferably 1×10 7 Ω·cm or higher.
[0035] Resistivity can be calculated, for example, from the change in charge over time. Specifically, the object to be measured is inserted into a capacitor consisting of a probe and a stage, a pulsed voltage is applied, and the change in charge on the object over time is measured. The resistivity is then calculated from the measured value. Since the probe does not contact the object, the resistivity can be determined without forming ohmic contact electrodes. It should be noted that the spatial resolution of the probe can be approximately 1 mm to 10 mm. Methods for calculating resistivity are described, for example, in the non-patent literature *R. Stibal et al., “Contactless evaluation of semi-insulating GaAs wafer resistivity using the time-dependent charge measurement” Semiconductor Science and Technology 6 p995 (1991)*.
[0036] Transition elements such as zinc (Zn), iron (Fe), manganese (Mn), vanadium (V), chromium (Cr), cobalt (Co), and nickel (Ni) can be used as dopants. Additionally, carbon (C) can also be used as a dopant. These dopants can be used alone or in combination of two or more.
[0037] The aforementioned Group III nitride crystals typically exhibit a wurtzite-type crystal structure belonging to the hexagonal crystal system. In Group III nitride crystals, typically, the <0001> direction is the c-axis direction, the <1-100> direction is the m-axis direction, and the <11-20> direction is the a-axis direction. Furthermore, the crystal plane orthogonal to the c-axis is the c-plane, the crystal plane orthogonal to the m-axis is the m-plane, and the crystal plane orthogonal to the a-axis is the a-plane. In one embodiment, the thickness direction of the Group III nitride crystal substrate 20 is parallel or substantially parallel to the c-axis, the first principal surface 21 is a Group III element polar surface on the (0001) plane side, and the second principal surface 22 is a nitrogen polar surface on the (000-1) plane side. The first principal surface 21 may be parallel to the (0001) plane or inclined relative to the (0001) plane. The tilt angle of the first principal surface 21 relative to the (0001) surface is, for example, less than 10°, less than 5°, less than 2°, or less than 1°. The second principal surface 22 may be parallel to the (000-1) surface or tilted relative to the (000-1) surface. The tilt angle of the second principal surface 22 relative to the (000-1) surface is, for example, less than 10°, less than 5°, less than 2°, or less than 1°.
[0038] The thickness of the group III nitride crystal substrate 20 is, for example, 0.5 μm or more, preferably 1 μm or more. On the other hand, the thickness of the group III nitride crystal substrate 20 is, for example, 10 μm or less, preferably 5 μm or less.
[0039] The support substrate 10 can be made of a material different from the material constituting the group III nitride crystal substrate 20 (hereinafter sometimes referred to as a dissimilar material). By employing such a configuration, for example, it is possible to obtain a bonding substrate 100 that satisfies properties (e.g., high heat dissipation) that cannot be achieved solely in the group III nitride crystal substrate 20. The support substrate 10 can be made of a crystal having a hexagonal crystal structure. Specific examples of materials constituting the support substrate 10 include silicon carbide, aluminum nitride, gallium nitride, and sapphire. In one embodiment, the support substrate 10 is preferably made of silicon carbide or aluminum nitride. These materials enable semiconductor devices with high thermal conductivity, such as excellent heat dissipation.
[0040] On the other hand, the coefficients of thermal expansion of the support substrate 10 and the group III nitride crystal substrate 20, which are made of dissimilar materials, can be different. Specifically, the coefficients of thermal expansion of the constituent materials of the group III nitride crystal substrate 20 and the support substrate 10 can be different. The absolute value of the difference between the coefficients of thermal expansion of the support substrate 10 and the group III nitride crystal substrate 20 is, for example, 0.5 × 10⁻⁶. -6 / K~3.5×10 -6 / K can be 2.5×10-6 / K or higher. The coefficient of thermal expansion of the group III nitride crystal substrate 20 can be greater than or less than that of the support substrate 10. For example, if the support substrate 10 is made of silicon carbide or aluminum nitride and the group III nitride crystal substrate 20 is made of gallium nitride, the coefficient of thermal expansion of the group III nitride crystal substrate 20 is greater than that of the support substrate 10.
[0041] The thickness of the support substrate 10 is, for example, 100 μm or more, preferably 200 μm or more. On the other hand, the thickness of the support substrate 10 is, for example, 1000 μm or less.
[0042] In the bonding substrate 100, the crystal orientation of the group III nitride crystal substrate 20 and the crystal orientation of the support substrate 10 can be any suitable configuration. Figure 2 This is an illustration of the crystal planes of a hexagonal crystal system. Specifically, when viewed from the c-plane, the m-plane orthogonal to the m-axis and the a-plane orthogonal to the a-axis can be considered as... Figure 2 The configuration shown indicates that the m-face has a tendency to split easily.
[0043] In the bonding substrate 100, the support substrate 10 is preferably configured such that its crystalline surfaces (e.g., surface a and / or surface m) form a predetermined angle with respect to surface m of the group III nitride crystalline substrate 20 when viewed from above. This configuration provides excellent heat resistance for the bonding substrate 100. At high temperatures, stress may occur between two substrates in the bonding substrate 100 with different coefficients of thermal expansion. This stress increases with higher ambient temperatures, and its effect becomes significant at temperatures, for example, above 1000°C. Specifically, tensile stress occurs in the substrate with the smaller coefficient of thermal expansion, and compressive stress occurs in the substrate with the larger coefficient of thermal expansion. Furthermore, cracking is more likely to occur in the substrate where tensile stress occurs. If the substrate has a cleaving property, cracking is more likely to occur along the cleaving surface. In the bonding substrate, if cracking occurs in one substrate, cracking may sometimes occur in the other substrate in a manner similar to that substrate. By adopting the configuration described above, the two substrates can have resistance to splitting, and the heat resistance of the bonding substrate can be excellent, for example, even when placed in a high-temperature environment, cracking and fissures can be suppressed.
[0044] For example, the minimum value of the angle θ between the m-plane of the group III nitride crystal substrate 20 and the m-plane of the support substrate 10 is 1° or more, preferably 2° or more, and more preferably 3° or more. The minimum value of the angle θ between the m-plane of the group III nitride crystal substrate 20 and the m-plane of the support substrate 10 can be 30° or less, preferably 29° or less, more preferably 28° or less, and even more preferably 27° or less. In this case, the minimum value of the angle between the m-plane of the group III nitride crystal substrate 20 and the a-plane of the support substrate 10 can be 0° or more, preferably 1° or more, more preferably 2° or more, and even more preferably 3° or more. It should be noted that the a-plane tends to split easily after the m-plane.
[0045] In one embodiment, the minimum value of the angle θ between the m-plane of the group III nitride crystal substrate 20 and the m-plane of the support substrate 10 is preferably 15° or less. In this case, the minimum value of the angle between the m-plane of the group III nitride crystal substrate 20 and the a-plane of the support substrate 10 is preferably 15° or more. With such a configuration, the resistance of the two substrates to splitting can be well maintained, thereby improving the heat resistance of the bonding substrate 100.
[0046] B. Manufacturing Method
[0047] As described above, the bonding substrate 100 can be obtained, for example, by bonding a group III nitride crystal substrate 20 and a support substrate 10.
[0048] <Group III Element Nitride Crystal Substrate>
[0049] The group III nitride crystal substrate 20 can be a substrate manufactured using any suitable method. In one embodiment, regarding the group III nitride crystal substrate 20, group III nitride crystals can be grown on the seed film of a seed substrate having a base substrate and a seed film, and the grown group III nitride crystals can be used as the group III nitride crystal substrate 20 (typically a self-standing substrate).
[0050] Figures 3A to 3C This is a diagram illustrating an example of the manufacturing process of a group III element nitride crystalline substrate. Figure 3A The diagram shows the state in which a seed film 32 is formed on the upper surface 31a of a substrate 31 having an upper surface 31a and a lower surface 31b that are opposite to each other, thereby completing the seed substrate 33.
[0051] As the substrate 31, for example, a substrate having a shape and size capable of manufacturing a group III element nitride crystal substrate with a desired shape and size is used. Typically, the substrate 31 is configured as a disk shape with a diameter of 50 mm to 200 mm. The thickness of the substrate 31 is, for example, 200 μm to 2000 μm. Any suitable substrate can be used as the substrate 31. The substrate 31 is typically composed of a single crystal. Examples of materials constituting the substrate 31 include, for example, sapphire, crystalline oriented alumina, silicon, gallium oxide, aluminum gallium nitride, gallium arsenide, and silicon carbide.
[0052] The thickness of the seed film 32 is, for example, 0.2 μm or more. From the viewpoint of preventing melting and disappearance during the crystallization and cultivation of group III nitrides, the thickness of the seed film 32 is preferably 1 μm or more, more preferably 2 μm or more. On the other hand, from the viewpoint of productivity, the thickness of the seed film 32 is preferably 10 μm or less, more preferably 5 μm or less. As the material constituting the seed film 32, group III nitrides are typically used. Details of group III nitrides are as described above.
[0053] The method for forming the seed film 32 is typically a vapor phase growth method. Specific examples of vapor phase growth methods include: Metal-Organic Chemical Vapor Deposition (MOCVD), Hydride Vapor Phase Growth (HVPE), Pulse Excitation Deposition (PXD), Molecular Beam Epitaxy (MBE), Evaporation, and Sublimation. Among these, MOCVD is preferred.
[0054] The formation of the seed film 32 based on the above-described MOCVD method includes, for example, a first formation step and a second formation step. Specifically, in the first formation step, a first layer (not shown) (a low-temperature growth buffer layer) is formed on a substrate at a temperature T1 (e.g., 450°C to 550°C). In the second formation step, a second layer (not shown) is formed at a temperature T2 (e.g., 1000°C to 1200°C), which is higher than temperature T1. The thickness of the first layer is, for example, 20 nm to 50 nm. The thickness of the second layer is, for example, 1 μm to 5 μm.
[0055] Next, group III nitride crystals are grown on the seed film 32 of the seed substrate 33 to form a group III nitride crystal layer 34, such as... Figure 3BAs shown, a multilayer substrate 35 is obtained. The degree of growth of the group III nitride crystals (the thickness of the group III nitride crystal layer 34) can be adjusted according to the desired thickness of the group III nitride crystal substrate 20. The growth direction of the group III nitride crystals can be any suitable direction selected according to the application, purpose, etc. Specific examples include: the normal directions of the c-plane, a-plane, and m-plane, and the normal direction of a plane inclined relative to the c-plane, a-plane, and m-plane.
[0056] Group III nitride crystals can be cultivated using any suitable method. There are no particular limitations on the cultivation method for Group III nitride crystals, as long as it achieves a crystal orientation that roughly mimics the crystal orientation of the seed film. Specific examples of cultivation methods for Group III nitride crystals include: metal-organic chemical vapor deposition (MOCVD), hydride vapor deposition (HVPE), pulsed excitation deposition (PXD), molecular beam epitaxy (MBE), sublimation, and other vapor phase growth methods; and flux methods, ammonothermal methods, hydrothermal methods, sol-gel methods, and other liquid phase growth methods. These methods can be used individually or in combination.
[0057] Preferably, a flux method (e.g., the Na flux method) is used as the cultivation method for group III nitride crystals. Details of such cultivation methods are described, for example, in Japanese Patent No. 5451085, and the various conditions of the described cultivation method can be appropriately adjusted. Specifically, the cultivation of group III nitride crystals can be carried out using a crystallization apparatus with adjusted conditions, comprising: a pressure vessel capable of supplying high-pressure nitrogen gas; a rotating stage capable of rotating within the pressure vessel; and an outer container placed on the rotating stage.
[0058] The crystallization of Group III nitrides based on the flux method is typically carried out using a crucible as the cultivation vessel. Specifically, the aforementioned seed substrate is placed at a predetermined position within the crucible, and then the raw material is filled. The crucible containing the seed substrate is typically placed with its lid on under a nitrogen-containing atmosphere at a predetermined pressure and temperature for cultivation.
[0059] The aforementioned raw materials are, for example, a molten composition comprising a flux, a group III element, and, if necessary, a dopant. The flux preferably comprises at least one of an alkali metal and an alkaline earth metal, and more preferably, metallic sodium. Typically, the flux and the metallic raw material are used in combination. As the metallic raw material, elemental metals, alloys, metal compounds, etc., can be used; however, from an operational point of view, elemental metals are preferred.
[0060] The aforementioned crucible (including the lid) can be formed from any suitable material that can be used in the flux process. Examples of crucible materials include alumina, yttrium oxide, and YAG (yttrium aluminum garnet). Furthermore, the crucible material can be single-crystal or polycrystalline (ceramic). The ceramic material can be a substance with increased relative density, such as through HIP treatment, that exhibits so-called light transmittance.
[0061] The cultivation can be carried out in a nitrogen-containing atmosphere as described above. In addition to nitrogen, the cultivation atmosphere may also contain other gases. Preferably, inert gases such as argon, helium, and neon are used as other gases.
[0062] The pressure of the atmosphere during cultivation can be set to any appropriate pressure. From the viewpoint of preventing flux evaporation, the pressure of the atmosphere during cultivation can be, for example, 1 MPa or more, 2 MPa or more, or 3 MPa or more. On the other hand, from the viewpoint of preventing the manufacturing apparatus from becoming too large-scale, the pressure of the atmosphere during cultivation can be, for example, 50 MPa or less, or 10 MPa or less.
[0063] The temperature of the atmosphere during cultivation can be set to any suitable temperature. The preferred temperature for the atmosphere during cultivation is 700℃ to 1000℃, and more preferably 800℃ to 900℃.
[0064] For example, from the viewpoint of promoting the dissolution of high-pressure nitrogen in the above-mentioned molten composition, it is preferable to perform cultivation while rotating the substrate (crucible). For example, the lidded crucible is placed in the outer container of the above-mentioned crystallization manufacturing apparatus and placed on a rotating table, and the rotating table is rotated (e.g., rotated on its own axis) in this state, thereby rotating the crucible.
[0065] After culturing the crystallization of group III nitrides, such as Figure 3C As shown, the substrate 31 is removed from the group III nitride crystallization (group III nitride crystallization layer 34) to obtain the self-standing substrate 36. Typically, as shown, the self-standing substrate 36 may include the group III nitride crystallization layer 34 and a seed film 32. For example, the group III nitride crystallization layer 34 is separated from the substrate 31 to obtain the self-standing substrate 36. The group III nitride crystallization can be separated from the substrate using any suitable method. Examples of methods for separating the group III nitride crystallization include: spontaneous separation from the substrate by utilizing the thermal shrinkage difference between the crystallization layer and the substrate during the cooling process after cultivation; separation by chemical etching; and laser ablation based on laser irradiation. Alternatively, the self-standing substrate can be obtained by grinding the substrate 31 or by slicing it using a wire saw or similar method.
[0066] Although the self-standing substrate 36 can be directly used as a group III element nitride crystal substrate 20, it can be representatively processed by any appropriate means to obtain a group III element nitride crystal substrate 20.
[0067] As an example of processing performed on the self-supporting substrate 36, grinding of the peripheral portion (e.g., grinding using a diamond grinding stone) can be cited. Typically, grinding is used to process the substrate into the desired shape and size (e.g., a disk shape with a desired diameter).
[0068] Another example of processing the self-standing substrate 36 can be exemplified by grinding and lapping (e.g., chemical mechanical polishing (CMP), lap polishing) of the main surfaces (upper and lower surfaces). Typically, grinding and lapping are used to achieve a desired thickness for thinning and planarization. In one embodiment, by processing the main surfaces, the seed film 32 is removed, and the group III nitride crystal substrate 20 can be configured to have only a group III nitride crystal layer 34 (only a single crystal growth layer).
[0069] Other examples of processing performed on the self-standing substrate 36 include: chamfering of the outer peripheral edge, removal of the processing-deteriorated layer generated on the surface due to grinding or polishing, and removal of residual stress that may be caused by the processing-deteriorated layer.
[0070] <Joining>
[0071] In one implementation, such as Figure 4A As shown, a support substrate 10 and a group III element nitride crystal substrate 20 are prepared and directly bonded together. Thus, as... Figure 4B As shown, a bonding body 101 (bonded substrate 100) is obtained, which is a support substrate 10 and a group III element nitride crystal substrate 20.
[0072] The substrates are bonded together at the angle specified above, with the crystalline surfaces of each substrate forming an angle with each other. Figure 5 This diagram illustrates an example of a method for adjusting the angle formed by the crystal planes. On the support substrate 10, an orientation plane 10a is formed along the crystal plane (e.g., the m-plane). On the Group III nitride crystal substrate 20, an orientation plane 20a is also formed along the crystal plane (e.g., the m-plane). Furthermore, viewed from above, the substrate is positioned such that the orientation plane 10a of the support substrate 10 and the orientation plane 20a of the Group III nitride crystal substrate 20 form a predetermined angle θ. An example of angle θ is described above. In this way, a bond (adhesive substrate 100) can be obtained in which the crystal orientation of the Group III nitride crystal substrate 20 and the crystal orientation of the support substrate 10 are configured in a predetermined arrangement.
[0073] In the above-mentioned direct bonding, the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the group III element nitride crystal substrate 20 are preferably activated by any appropriate activation treatment.
[0074] Typically, the activation process described above is performed by irradiating a neutralization beam. Preferably, an apparatus similar to that described in Japanese Patent Application Publication No. 2014-086400 is used to generate a neutralization beam, which is then used to irradiate the activation process. Specifically, a saddle-type high-speed atomic beam (FAB) source is used as the beam source, and inert gases such as argon or xenon are introduced into the chamber. A high voltage is applied to the electrodes from a DC power supply. Electrons move due to the saddle-type electric field generated between the electrodes (positive electrode) and the casing (negative electrode), generating a beam of atoms and ions originating from the inert gas. In the beam reaching the grid, the ion beam is neutralized at the grid, and thus, a beam of neutral atoms is emitted from the high-speed atomic beam source. The voltage used for activation by beam irradiation is preferably 0.5 kV to 2.0 kV, and the current used for activation by beam irradiation is preferably 50 mA to 200 mA.
[0075] After activation treatment, the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the group III nitride crystal substrate 20 can be brought into contact and pressure applied, thereby achieving direct bonding. The contact and pressure application of the bonding surfaces are preferably performed under a vacuum atmosphere. The temperature at this time is typically room temperature. Specifically, it is preferably 20°C or higher and 40°C or lower, more preferably 25°C or higher and 30°C or lower. The applied pressure is preferably 100N to 20000N.
[0076] During bonding, the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the group III nitride crystal substrate 20 are preferably flat surfaces. Specifically, the arithmetic mean roughness Ra of the bonding surface 10b of the support substrate 10 and the bonding surface 20b of the group III nitride crystal substrate 20 is preferably 1 nm or less, more preferably 0.7 nm or less, even more preferably 0.5 nm or less, and particularly preferably 0.3 nm or less. As a method for planarizing the surfaces of each substrate, examples include mirror polishing using chemical mechanical polishing (CMP), fine polishing (lap), etc.
[0077] During bonding, for example, to remove abrasive residue, the bonding surfaces are preferably cleaned. Examples of cleaning methods include wet washing, dry cleaning, and scrubbing. Among these, scrubbing is preferred for its ease of use and efficiency. A specific example of scrubbing is a method of cleaning with a scrubbing machine after using a cleaning agent (e.g., Lion's Sun Wash series) and a solvent (e.g., a mixture of acetone and isopropanol (IPA)).
[0078] The bonding body 101 can be subjected to any appropriate processing to obtain the bonding substrate 100. For example, after bonding with the support substrate 10, the group III nitride crystal substrate 20 can be thinned by grinding or the like.
[0079] C. Uses
[0080] The aforementioned bonding substrate can be applied to any suitable semiconductor device. Specifically, any suitable device layer can be formed on the bonding substrate.
[0081] Figure 6 This is a simplified cross-sectional view illustrating the general configuration of a semiconductor device according to one embodiment of the present invention, using a high electron mobility transistor (HEMT) as an example. The HEMT device 200 includes: a bonding substrate 100; a device layer 53 comprising a channel layer 51 and a barrier layer 52 in the following order; and a source electrode 61, a drain electrode 62, and a gate electrode 63 disposed on the device layer 53. These electrodes can be metal electrodes having a thickness of approximately tens of nm to hundreds of tens of nm, respectively.
[0082] Device layer 53 is typically composed of group III nitrides and can be formed by epitaxial growth of crystals over a group III nitride crystalline substrate 20. The thickness of channel layer 51 is, for example, 50 nm to 5 μm. The thickness of barrier layer 52 is, for example, 2 nm to 40 nm.
[0083] In one embodiment, the group III nitride crystal substrate 20 may be composed of gallium nitride doped with elements other than group III elements. In this case, the channel layer 51 is preferably composed of gallium nitride. Furthermore, the barrier layer 52 is preferably composed of at least one selected from aluminum gallium nitride, aluminum indium nitride, and aluminum indium gallium nitride. The channel layer 51 and the barrier layer 52 may be formed using any suitable method.
[0084] As a method for forming (growing) the device layer, vapor phase growth is a representative method. Specific examples of vapor phase growth methods include: Metal-Organic Chemical Vapor Deposition (MOCVD), Hydride Vapor Phase Growth (HVPE), Pulse Excitation Deposition (PXD), Molecular Beam Epitaxy (MBE), Evaporation, and Sublimation. Among these, MOCVD is preferred. The device layer formation temperature (growth temperature) is, for example, 800°C or higher and 1200°C or lower, preferably 1000°C or higher. As described above, the bonding substrate according to the embodiments of the present invention exhibits excellent heat resistance, thus enabling the manufacture of semiconductor devices with good results. Specifically, during device layer formation, cracking or fissures are prevented in the bonding substrate, enabling the manufacture of semiconductor devices with good yield.
[0085] Example
[0086] The present invention will now be specifically described by way of examples; however, the present invention is not limited to these examples. It should be noted that the resistivity and arithmetic mean roughness Ra are values obtained using the measurement methods described below.
[0087] <Resistivity>
[0088] The resistivity of a substrate surface is measured using a non-contact method based on the time-varying charge. Specifically, the substrate is placed on a stage, and a probe (with a 1mm to 2mm gap) is brought close to the substrate to form a capacitor. A pulse voltage with a pulse width of 100ns is applied, and the time-varying charge on the substrate is measured for 1 second at room temperature (25°C). The resistivity is then calculated.
[0089] Arithmetic mean roughness Ra
[0090] The arithmetic mean roughness Ra of the substrate was measured using an atomic force microscope (AFM5400L, manufactured by Hitachi High Technology Co., Ltd.) with a field of view of 10 μm × 10 μm.
[0091] [Example 1]
[0092] (Fabrication of gallium nitride substrate)
[0093] Prepare a 4-inch diameter c-plane sapphire substrate. On this sapphire substrate, form a 2μm thick gallium nitride film using the MOCVD method to create a seed substrate.
[0094] Gallium nitride crystals are grown toward a seed substrate using a crystallization apparatus comprising: a pressure vessel capable of supplying high-pressure nitrogen gas; a rotating stage capable of rotating within the pressure vessel; an outer container placed on the rotating stage; and a crystallization furnace for placing the outer container at a desired temperature.
[0095] The obtained seed substrate was placed in an alumina crucible within a glove box under a nitrogen atmosphere. Next, 40g of metallic gallium, 80g of metallic sodium, and manganese as a dopant were melted separately in the glove box and filled into the crucible. The amount of manganese added was adjusted to within the range of 1mg to 1g. The seed substrate was then immersed in the flux melt and covered with an alumina plate. In this state, the crucible was placed into a stainless steel inner container, and then into a stainless steel outer container capable of housing the inner container. The outer container was closed with a lid equipped with a nitrogen inlet tube. In this state, the outer container was placed on a rotating stage within the crystallization apparatus, and the pressure vessel of the crystallization apparatus was sealed with a lid.
[0096] Next, the heating section is operated to uniformly heat the crystal growth furnace within the crystallization fabrication apparatus to 850°C. Simultaneously, nitrogen gas is introduced from the nitrogen cylinder into the pressure vessel to a pressure of 4 MPa, causing the outer vessel to rotate horizontally. This state is maintained for 35 hours to allow gallium nitride crystals to grow.
[0097] Afterward, allow it to cool naturally to room temperature and depressurize to atmospheric pressure. Then, open the lid of the pressure vessel and remove the crucible. Remove the solidified metallic sodium from the crucible and recover the seed substrate with gallium nitride crystals grown on it.
[0098] Next, at room temperature, an ultraviolet laser is irradiated onto the sapphire substrate side of the seed substrate on which gallium nitride crystals have grown, decomposing the gallium nitride film on the seed substrate and causing the grown gallium nitride crystals to separate from the sapphire substrate. This yields a gallium nitride crystal with a diameter of 4 inches and a thickness of 1 mm.
[0099] Subsequently, the separation surface of the gallium nitride crystal from the sapphire substrate and its opposite side were ground and polished to obtain a surface with a diameter of 4 inches, a thickness of 0.5 mm, and a resistivity of 1×10⁻⁶. 6 A semi-insulating gallium nitride substrate with a roughness of Ω·cm or higher. It should be noted that the surface (junction surface) of the obtained gallium nitride substrate is mirror-finished, and its arithmetic mean roughness Ra is 0.2 nm.
[0100] The crystal orientation of the obtained gallium nitride substrate was determined using an automated X-ray single crystal orientation measuring device (“FSAS III” manufactured by Rigaku Corporation), and an orientation plane was formed on the gallium nitride substrate along the m-plane determined according to the measured crystal orientation.
[0101] (Jointing with the support substrate)
[0102] A silicon carbide substrate (a heat dissipation semi-insulating SiC substrate (Class D) manufactured by SICC) with an orientation plane on the m-side, a diameter of 4 inches and a thickness of 500 μm, was mirror-finished on the surface (bonding surface) and its arithmetic mean roughness Ra was set to 0.2 nm. This substrate was then used as a support substrate.
[0103] Next, the gallium nitride substrate and the support substrate are directly bonded. Specifically, after cleaning the bonding surfaces of the gallium nitride substrate and the support substrate, the two substrates are placed in a vacuum chamber and evacuated to 10 °C. -6 After approximately 1000 N, the bonding surfaces of the two substrates are irradiated with a high-speed atomic beam (accelerating voltage 1 kV, Ar flow rate 27 sccm) for 120 seconds. After irradiation, the irradiated surfaces of the two substrates are aligned, and a pressure of 10000 N is applied for 2 minutes to bond the two substrates together. The two substrates are aligned such that the angle θ between the orientation planes of each substrate, viewed from above, reaches 1°.
[0104] The resulting gallium nitride substrate was then ground and polished to a thickness of 5 μm, changing the thickness from 0.5 mm to 5 μm, to obtain the bonding substrate.
[0105] [Examples 2 to 9]
[0106] When bonding the gallium nitride substrate and the support substrate, the two substrates are overlapped such that the angle θ between the orientation planes of each substrate when viewed from above reaches 2°, 3°, 6°, 9°, 12°, 15°, 18° and 30°. Otherwise, the bonding substrate is obtained in the same manner as in Example 1.
[0107] [Comparative Example 1]
[0108] When bonding the gallium nitride substrate and the support substrate, the two substrates are overlapped in such a way that the orientation planes of each substrate are aligned (angle θ: 0°) when viewed from above. Otherwise, the bonding substrate is obtained in the same manner as in Example 1.
[0109] <Evaluation>
[0110] The heat resistance of the bonding substrates obtained in the examples and comparative examples was evaluated. Specifically, the obtained bonding substrates were placed in a heating furnace, and the furnace was heated from room temperature to 1000°C over 30 minutes, and the temperature was maintained for 10 minutes. After that, the furnace was cooled down for 30 minutes, and the bonding substrates were removed from the furnace. Cracks and fissures were observed on the bonding substrates (gallium nitride substrate and / or support substrate). The determinations are as follows, and the evaluation results are summarized in Table 1.
[0111] (determination)
[0112] ◎: Excellent, no cracks or fissures were detected.
[0113] 0: Good, no open cracks detected, but minute cracks were detected.
[0114] △: Slightly better, no open cracks were confirmed, but fine lines were found.
[0115] ×: Defective, cracks confirmed.
[0116] Table 1
[0117]
[0118] Industrial availability
[0119] The bonding substrate involved in the embodiments of the present invention can be applied, for example, to semiconductor devices.
[0120] Explanation of reference numerals in the attached figures
[0121] 10 Support substrate, 20 Group III nitride crystal substrate, 21 First main surface, 22 Second main surface, 31 Base substrate, 31a Upper surface, 31b Lower surface, 32 Seed film, 33 Seed substrate, 34 Group III nitride crystal layer, 35 Stacked substrate, 36 Self-standing substrate, 51 Channel layer, 52 Barrier layer, 53 Device layer, 61 Source electrode, 62 Drain electrode, 63 Gate electrode, 100 Bonding substrate, 101 Bonding assembly, 200 HEMT device.
Claims
1. A bonding substrate comprising a group III nitride crystal substrate and a support substrate made of a material different from that constituting the group III nitride crystal substrate, characterized in that, The supporting substrate is composed of crystals with a hexagonal crystal structure. Viewed from above, the minimum angle between the m-plane of the group III nitride crystal substrate and the m-plane of the supporting substrate is 1° or more.
2. The bonding substrate according to claim 1, characterized in that, Viewed from above, the minimum angle between the m-plane of the group III nitride crystal substrate and the m-plane of the supporting substrate is less than 15°.
3. The bonding substrate according to claim 1, characterized in that, Viewed from above, the minimum angle between the m-plane of the group III nitride crystal substrate and the m-plane of the supporting substrate is 3° or more.
4. The bonding substrate according to claim 1, characterized in that, The thickness of the group III element nitride crystal substrate is 0.5 μm or more and 10 μm or less.
5. The bonding substrate according to claim 1, characterized in that, The thickness of the supporting substrate is more than 100 μm and less than 1000 μm.
6. The bonding substrate according to claim 1, characterized in that, The coefficient of thermal expansion of the group III nitride crystal substrate is greater than that of the supporting substrate.
7. The bonding substrate according to claim 1, characterized in that, The support substrate comprises silicon carbide.
8. A semiconductor element, characterized in that, have: The bonding substrate according to any one of claims 1 to 7; and A device layer is disposed on the bonding substrate.
9. A method for manufacturing a semiconductor device, characterized in that, include: A device layer is formed on the bonding substrate according to any one of claims 1 to 7 at a temperature of 1000°C or higher.
Citation Information
Patent Citations
High speed atom beam source and normal temperature bonding device including the same
JP2014086400A