Method for processing a substrate having a surface made of a semiconductor material

Abstract

The invention relates to a method for treating a substrate having a free surface made of a semiconductor material, in particular a single-crystal semiconductor material, said method comprising a process for stabilizing said surface against the formation of steps and / or beads, said process comprising: • forming a glassy carbon layer (30) by a gas-phase carbon reaction on said surface at a temperature (T1) higher than 700°C, preferably higher than 800°C, and strictly lower than 1000°C, preferably lower than 950°C, more preferably lower than 900°C; and • after having stabilized said surface, subjecting said substrate to a heat treatment, wherein said glassy carbon layer (30) limits the reorganization of the surface made of semiconductor material into steps, the deposition of the carbon layer (30) and the heat treatment being carried out in the same furnace.

Description

Technical Field

[0001] This invention relates to a method for processing a substrate having a surface made of a semiconductor material (especially a single-crystal semiconductor material). The processing method includes a surface stabilization step and a heat treatment step. The invention also relates to a method for manufacturing a semiconductor structure, the method including a step of stabilizing the surface of a semiconductor material (especially a single-crystal semiconductor material) and a step of heat treating the surface. Background Technology

[0002] Semiconductor materials, particularly silicon carbide (SiC), are widely used in the manufacture of electronic power components or radio frequency components. In some applications, bulk single-crystal SiC substrates, substrates including single-crystal SiC surface layers, or substrates containing other semiconductor materials (such as aluminum nitride (AlN), gallium nitride (GaN), alloys of these nitrides, indium phosphide (InP), or gallium arsenide (GaAs)) are used. In some cases, the semiconductor substrate or layer is polycrystalline.

[0003] Substrates used in electronic applications typically require heat treatment (such as annealing) during their fabrication to eliminate lattice defects introduced during ion species implantation or to alter the substrate's crystal structure. These processes are usually performed at temperatures up to 2000°C.

[0004] However, the surface of the semiconductor material under consideration is prone to instability under high temperatures. This instability may manifest as surface degradation, especially changes in its morphology and / or composition.

[0005] In particular, such as Figure 1 As shown, smooth SiC surfaces are sensitive to processing at high temperatures (typically above approximately 1300°C). Without adequate protection, the morphology reorganizes to minimize surface energy, forming steps. This phenomenon is known as "step aggregation." The reorganization of surface 222 is due to the diffusion of surface atoms when exposed to high temperatures. This also depends on the atmospheric environment and pressure to which the surface is exposed. It also depends on the orientation deviation angle of the surface relative to the high symmetry axis of the semiconductor crystal. This orientation deviation facilitates control of the 4H polymorphism of SiC during subsequent single-crystal SiC epitaxial growth and avoids polymorphic transformations during single-crystal SiC growth. A 4° angle is typically chosen for this type of epitaxial process. However, the larger the tilt angle, the higher the steps between the steps.

[0006] Such orientation deviations can also occur spontaneously on polycrystalline SiC surfaces, where the orientation of grains is random.

[0007] Other semiconductor materials can have surfaces with the same type of steps. On GaN-containing surfaces, gallium beads can be observed when exposed to high temperatures.

[0008] Therefore, in order to obtain a smooth surface, steps should be avoided as much as possible, or removed in subsequent steps, and gallium beads or beads of other materials should be avoided where appropriate.

[0009] For example, mechanical polishing or chemical mechanical polishing (CMP) can be performed after heat treatment. However, if the resulting step height is too large (e.g., greater than 80 nm between two consecutive plates), the thickness that needs to be removed is too large, which means the process will be lengthy and laborious. In addition, the remaining thickness is often too thin for the intended application.

[0010] J. Bao et al.'s article proposed using extremely fast annealing rates to limit the formation of stair steps. This method requires the temperature to rise extremely rapidly at approximately 400°C per minute, making it unsuitable for industrial furnaces.

[0011] Alternatively, a silane overpressure can be applied to limit the sublimation of silicon in SiC, thereby preventing the formation of staircases. This method is described in an article by R. Zhang et al. However, this requires the introduction of SiH4 gas and the provision of equipment to generate the overpressure. Furthermore, silicon droplets can be observed on the SiC surface at temperatures above 1600°C.

[0012] Another possible method to avoid the formation of staircases is to use a protective layer, typically a carbon film about 1 µm thick. This technique adds extra steps to the molding process, such as resin deposition, carbonization of the resin at temperatures between 600°C and 1000°C, and the use of additional equipment, while also posing a risk of resin contamination of the substrate and furnace. Furthermore, resin deposition and removal of the micron-sized carbon layer are time-consuming and costly steps.

[0013] In some cases, the protective layer can also be formed of aluminum nitride (AlN). However, this material is difficult to remove, especially after high-temperature heat treatment.

[0014] The presence of oxygen in the furnace atmosphere can limit the formation of stair steps, but it also poses a risk of pitting on the surface, which is detrimental to the recovery of epitaxial growth. Furthermore, high-temperature furnaces typically include graphite elements, which are sensitive to the presence of oxygen during annealing. Summary of the Invention

[0015] One object of the present invention is to provide a method for processing a substrate having a surface made of a semiconductor material, the method comprising a step of stabilizing the surface and a heat treatment step. The method aims to avoid the formation of staircases and / or beads during heat treatment through easily operable steps. The stabilization step must be easily integrated into the method for manufacturing a substrate comprising a surface made of a semiconductor material and must not pose any risk of contaminating the substrate.

[0016] Therefore, the present invention proposes a method for processing a substrate having a free surface made of a semiconductor material (especially a single-crystal semiconductor material), the method comprising a process for stabilizing the surface to prevent the formation of steps and / or beads, the process comprising: At a temperature above 700°C, preferably above 800°C, and strictly below 1000°C, preferably below 950°C, more preferably below 900°C, a glassy carbon layer is formed on the surface by vapor phase formation. After stabilizing the surface, the substrate is heat-treated, wherein the glassy carbon layer restricts the surface recombination into a stepped semiconductor material. The carbon deposition layer and heat treatment are carried out in the same furnace.

[0017] Forming a carbon layer at temperatures between 700°C and 1000°C results in a significantly lower surface roughness for the semiconductor material compared to stabilization treatments performed at higher temperatures. Furthermore, under these conditions, the density and size of the carbon particles formed on the semiconductor surface during carbon layer growth and subsequent annealing processes may be reduced.

[0018] Preferably, the glassy carbon layer is formed at a pressure between 0.1 kPa and 100 kPa.

[0019] Advantageously, the carbon layer is formed in a gas stream containing a carbon-based gas and a carrier gas, preferably argon.

[0020] Advantageously, the carbon-based gas is propane.

[0021] Preferably, the glassy carbon layer is formed when the partial pressure of the carbon-based gas is between 0.1 kPa and 1 kPa.

[0022] Semiconductor materials can be silicon carbide.

[0023] Advantageously, the thickness of the carbon layer is less than or equal to 100 nm.

[0024] In some embodiments, the furnace includes an inner wall and a support element configured to fix at least one substrate, and the inner wall, the support element, and the gas inside the furnace have the same temperature.

[0025] Advantageously, the furnace has at least one carbon inner wall.

[0026] The furnace may include multiple substrates, each substrate comprising the surface of the semiconductor material, the substrates being vertically stacked, with a vertical gap between two adjacent substrates, and a carbon layer being formed on the surface of the semiconductor material of each substrate.

[0027] At least part of the heat treatment can be carried out at temperatures above 1500°C.

[0028] Preferably, after heat treatment, the method further includes the step of removing the carbon layer by chemical mechanical polishing and / or reactive ion etching and / or plasma etching.

[0029] The present invention also relates to a method for manufacturing a semiconductor structure, the method comprising the following steps: The embrittlement region is formed by implanting ion species into a donor substrate made of semiconductor material (especially single-crystal semiconductor material). o Combine the donor substrate with the support substrate, The donor substrate is peeled off along the embrittlement region, thereby transferring the semiconductor material layer onto the support substrate. o Perform the processing method described above to repair defects generated in the semiconductor material layer during ion species implantation, wherein a carbon layer is formed on the free surface of the semiconductor material layer transferred to the support substrate. Attached Figure Description

[0030] Figure 1 The diagram shows a step formed on one surface of a single-crystal semiconductor material.

[0031] Figure 2 The substrate shown includes a portion made of single-crystal semiconductor material on the front side.

[0032] Figure 3 It shows Figure 2 The state of the substrate after the carbon layer has been deposited.

[0033] Figure 4 It shows Figure 3 The state of the substrate after carbon layer ablation.

[0034] Figures 5A to 5C The fabrication of a substrate, including a portion made of single-crystal semiconductor material on the front side, is shown.

[0035] Figure 6A An example of a thermal profile used in a first embodiment of the method according to the invention is shown.

[0036] Figure 6B An example of the thermal profile used in a second embodiment of the method according to the invention is shown.

[0037] Figure 7A This is an atomic force microscope (AFM) image showing the surface roughness of a substrate after heat treatment at 1500°C without the application of a carbon layer, caused by the steps.

[0038] Figure 7B The image is an atomic force microscope image showing the surface roughness of a substrate heat-treated at 1500°C with a glassy carbon layer according to the invention.

[0039] Figure 8A The image is an AFM image showing the surface roughness of a carbon layer obtained after annealing at 1700°C and depositing it at 900°C for 10 minutes.

[0040] Figure 8B The image is an AFM image showing the surface roughness of a carbon layer obtained after annealing at 1700°C and depositing it at 1000°C for 10 minutes.

[0041] Figure 9 An annealing furnace suitable for forming a carbon layer according to a preferred embodiment of the invention is shown. Detailed Implementation

[0042] Figure 2 A substrate 10 is shown, including a support substrate 11 and a portion 20 made of a single-crystal or polycrystalline semiconductor material on the front side. The support substrate 11 can be any type of support substrate suitable for depositing or transferring the portion 20 made of a single-crystal or polycrystalline semiconductor material, such as a support substrate made of a polycrystalline semiconductor material.

[0043] Alternatively, substrate 10 may be a bulk substrate made of single-crystal or polycrystalline semiconductor material, i.e., support substrate 11 and portion 20 together constitute a single part made of bulk single-crystal or polycrystalline semiconductor material.

[0044] Preferably, the portion 20 on the front side of the substrate is made of a single-crystal semiconductor material. However, the semiconductor material forming the front side of the substrate 10 (which thus constitutes portion 20 in the case of the substrate 10 including the supporting substrate 11 and portion 20) or the substrate 10 (in the case of a bulk substrate) is also likely to be a polycrystalline material.

[0045] In the following description, since the case of substrate 10, including support substrate 11 and single-crystal portion 20, is described in detail, the material constituting portion 20 will be referred to as "single-crystal semiconductor material" to distinguish it from the material constituting support substrate 11. However, the process described below also applies to the case of polycrystalline semiconductor material, so each grain can be considered as a single crystal.

[0046] According to the preferred embodiment, the single-crystal semiconductor material is silicon carbide.

[0047] According to other implementation schemes, the single-crystal semiconductor material is selected from: aluminum nitride (AlN), gallium nitride (GaN), and alloys of these nitrides, such as Al. x Ga (1-x) N (where x is a number between 0 and 1), indium phosphide (InP), or gallium arsenide (GaAs).

[0048] Typically, the surface 200 of the portion 20 made of single-crystal semiconductor material, or, where appropriate, the surface 200 of the substrate made of bulk single-crystal semiconductor material, will be slightly offset. For example, if the semiconductor material is SiC, the surface can be offset relative to the SiC crystal structure to facilitate control of the 4H polytype during growth.

[0049] In the case of polycrystalline semiconductor materials, some grains may exhibit this offset relative to the SiC crystal structure. For example, after cutting or polishing the substrate 10 to expose a specific face of the substrate 10, grains that are randomly oriented relative to that face will be offset.

[0050] Formation of protective layer Subsequently, referring to Figure 3 A glassy carbon layer 30 is formed on the surface 200 of portion 20 of the single-crystal semiconductor material. The glassy carbon layer is continuous and covers the entire surface to be protected (i.e., the front side of the single-crystal material). Typically, the glassy carbon layer 30 is deposited on the entire free surface of the substrate, thus simultaneously covering both the front and back sides of the substrate. This protects the back side from the formation of staircases while also preventing the volatilization of silicon during heat treatment (in the case of silicon carbide substrates).

[0051] The carbon layer protects the substrate surface from the formation of staircases when heated to high temperatures, thus stabilizing the surface crystal structure. After the high-temperature processing is complete, the carbon layer is removed to obtain a clean single-crystal semiconductor material surface with good crystal quality. The thickness of the carbon layer is preferably less than 100 nm so that it can be easily removed at the end of the high-temperature process.

[0052] The glassy state of the carbon layer originates from carbon layers a few nanometers thick; for thinner layers, the carbon exists as one or two graphene monolayers. When the thickness is sufficient to form glassy carbon, the protective layer possesses a long-range, disordered three-dimensional structure that is stable across the entire temperature range exposed during the fabrication process and completely covers the substrate surface. Within the substrate surface, the uniformity of the glassy carbon layer is more easily controlled.

[0053] Advantageously, the formation of the glassy carbon layer takes place in a furnace, which will be described later. The carbon layer is formed in the gas phase, meaning that the carbon exists in gaseous form within the furnace. The substrate is heated within the furnace to the temperature at which the protective layer is deposited, and the gaseous carbon is converted into solid carbon through a reaction with the hot surface of the substrate.

[0054] The furnace temperature and pressure are selected to avoid degradation of the surface to be protected during carbon layer deposition. During carbon layer formation, the furnace temperature is above 700°C and strictly below 1000°C, advantageously below 950°C. Preferably, the temperature is between 800°C and 900°C during carbon layer formation to effectively protect the substrate surface.

[0055] Temperatures below 800°C slow down the process. At temperatures below 700°C, the slowdown can significantly impact process efficiency.

[0056] During the formation of the carbon layer and subsequent heat treatment, carbon particles often appear on the substrate surface. When the carbon layer formation temperature is strictly below 1000°C, and more advantageously below 900°C, the density and size of these carbon particles decrease significantly. Higher temperatures, especially above 1000°C, result in the formation of large particles, with sizes reaching approximately 60 nm. These particles form on the substrate surface during the carbon layer formation and subsequent heat treatment. Therefore, when the carbon layer formation temperature is 1000°C or higher, the surface roughness of the substrate increases.

[0057] When the number and size of such particles are reduced, polishing steps (such as chemical mechanical polishing) to remove the carbon layer are easier to perform, and the risk of scratching the surface is also lower.

[0058] Furthermore, reducing the density and size of carbon particles on the surface can reduce the risk of these particles contaminating other substrates or components, such as in electronic component manufacturing environments.

[0059] The reduction in surface roughness also makes it easier to control the thickness of the deposited carbon layer.

[0060] Therefore, the temperature range between 700°C and 950°C (preferably between 800°C and 900°C) allows for easy control of the thickness of the deposited carbon layer through efficient processes, thereby avoiding the generation of carbon particles that are too large and dense to manufacture power components and radio frequency electronic components.

[0061] Advantageously, the carbon source is a carbon-based gas, such as propane (C3H8). Alternatively, the carrier gas can be methane (CH4) or ethane (C2H6). When using propane as the carrier gas, the carbon layer can form more quickly because the C-C bonds of carbon atoms are more easily broken than the CH bonds in methane and ethane.

[0062] Carbon-based gas is mixed with a carrier gas (e.g., argon or a mixture of argon and hydrogen). The carrier gas is neutral and does not participate in the chemical reactions that form the layer. Typically, the gas mixture is generated within the furnace chamber at the deposition temperature. The gas flow rate can be easily controlled and adjusted to the deposition conditions of the carbon layer.

[0063] Typically, carbon layers are deposited at pressures between 0.1 kPa and 100 kPa (between 1 mbar and 1 bar), pressures easily maintained in industrial furnaces. The partial pressure of the carbon-based gas is usually adjusted to a value between 0.1 kPa and 1 kPa (between 1 mbar and 10 mbar). This concentration prevents furnace atmosphere saturation, thus allowing for better control over the thickness of the deposited carbon layer.

[0064] Advantageously, the thickness of the protective carbon layer is less than 100 nm, for example, between 50 nm and 100 nm. The time required to produce such a layer depends on the temperature and the partial pressure of the carbon-based gas, typically between two seconds and two hours. The thickness of the deposited carbon layer can be adjusted by controlling the temperature, pressure and type of the carbon-based gas, and the duration of this step during layer formation.

[0065] The carbon layer can be characterized using surface analysis techniques such as atomic force microscopy (AFM), X-ray reflectance (XRR), Raman spectroscopy, or low-energy electron microscopy (LEEM).

[0066] The carbon layer remains stable at temperatures of at least 2000°C, thus limiting step formation when the substrate is exposed to temperatures above the step formation temperature.

[0067] High-temperature steps requiring a protective layer After the carbon layer is formed, subsequent steps can be performed on the substrate at temperatures above the step formation temperature. These steps include, for example, annealing to repair defects in the lattice generated during ion species implantation, altering the crystal structure of the substrate, or activating dopants. In these steps, the surface of the single-crystal semiconductor material is protected by the carbon layer, thus preventing the formation of steps on said surface. The annealing step is performed at temperatures between 1300°C and 1900°C (typically above 1500°C).

[0068] The carbon layer formation and heat treatment are carried out in the same furnace, which is advantageously a furnace traditionally used for batch annealing of substrates.

[0069] Furnaces capable of reaching temperatures above 1500°C typically include graphite components because this material exhibits good stability at high temperatures. In any case, the formation of a carbon layer within such a furnace will only result in a very thin carbon layer, without affecting the normal operation of components made from the same material as that layer.

[0070] Removal of protective layer At the end of the annealing step, the temperature is lowered to a temperature below the step formation temperature, i.e., below 1300°C.

[0071] In some embodiments, the removal can be performed in the same furnace used for the protective carbon layer formation step and / or the high-temperature step. In this case, the temperature is reduced to the temperature required to ablate the carbon layer, for example, about 900°C. Because the temperature is low enough, no steps form on the surface of the semiconductor material, thus allowing the carbon layer to be removed. The thinness of the carbon layer facilitates rapid and residue-free removal from the substrate.

[0072] The removal of the carbon layer can be carried out by reactive plasma (e.g., oxygen plasma) according to the following reaction: C (solid) + O2 (gas) CO2 (gas) In other embodiments, the substrate is cooled after the heat treatment step and transferred to another chamber or apparatus for removing the carbon layer. This transfer is necessary, for example, if a portion of the furnace is made of unprotected graphite or other materials that may be damaged by contact with reactive plasma, and if the removal of the carbon layer is performed via plasma.

[0073] Alternatively, the carbon layer can be removed by reactive ion etching (RIE), for example, by using oxygen ions or a mixture of oxygen and sulfur hexafluoride after transfer to a suitable chamber.

[0074] To remove any carbon residue and / or ensure good surface quality of the single-crystal semiconductor material, an appropriate chemical mechanical polishing step may be performed after removing the carbon layer.

[0075] In some cases, the carbon layer may be removed during finishing steps after the substrate leaves the furnace (e.g., during chemical mechanical polishing or mechanical polishing).

[0076] At the end of the removal step, refer to Figure 4 Substrate 11 has been completed, and the carbon layer has been removed. Now, the free surfaces of substrate 11 and the single-crystal semiconductor material can be used to epitaxially grow single-crystal semiconductor material layers (which may be the same as or different from substrate 11), and / or to fabricate power devices or radio frequency electronic components.

[0077] In some cases, the carbon layer on the back side of the substrate is removed along with the layer on the front side. In other embodiments, the glassy carbon layer disposed on the back side of the substrate is retained in this step and during the fabrication of electronics on the front side to protect the back side during these steps. In this case, the carbon layer on the back side is removed before or during the substrate thinning step, for example, by grinding.

[0078] Methods for manufacturing semiconductor structures A method for fabricating semiconductor structures with a single-crystal silicon carbide surface suitable for electronic applications will now be described.

[0079] A donor substrate 220, preferably made of single-crystal silicon carbide, is provided, wherein a single-crystal silicon carbide surface layer is formed. (Refer to...) Figure 5A As indicated by the arrows, ion species (e.g., hydrogen and / or helium) are implanted to form an embrittlement region 21 in the donor substrate 220. The embrittlement region 21 defines the single-crystal silicon carbide layer 20 to be transferred.

[0080] Reference Figure 5B The donor substrate 220 injected therefrom is then bonded to the substrate 11. The donor substrate can be as follows: Figure 5B It can be bonded directly to the substrate or bonded through one or more intermediate layers that may be applied to the donor substrate and / or the substrate (not shown) prior to bonding.

[0081] Reference Figure 5C Subsequently, the donor substrate 220 is peeled off along the embrittlement region 21, allowing the single-crystal silicon carbide layer to transfer onto the substrate 11, thereby forming a structure as shown in the figure. Figure 2 The support substrate 10 is shown. The stripping portion 221 of the donor substrate can be used to transfer other single-crystal silicon carbide layers onto other substrates.

[0082] The substrate 10 is then processed, the process comprising: a step of stabilizing the surface by forming a protective glassy carbon layer; a high-temperature annealing step aimed at repairing defects generated in the single-crystal silicon carbide layer during ion species implantation; and a subsequent step of removing the protective carbon layer.

[0083] The processes, including carbon layer formation and heat treatment, are performed within the same furnace. This avoids transferring the substrate from the deposition chamber used for depositing the protective layer to the annealing furnace, resulting in a simpler, faster process and minimizing the risk of substrate contamination.

[0084] Figure 6A The temperature profile of one embodiment of the process over time is shown. The process can be divided into three main steps, corresponding to the formation of the protective carbon layer (S1), high-temperature (i.e., above the temperature at which the step formation begins) annealing (S2), and the removal of the protective layer (S3).

[0085] Throughout the entire process, the gas injected into the furnace top is discharged through the furnace bottom along with the carrier gas flow.

[0086] The first step, S1, begins at time t0. The substrate is at room temperature (typically around 20°C), or at a temperature below the step formation temperature. The substrate is introduced into the deposition chamber. The substrate is heated to the glassy carbon layer deposition temperature T1. The deposition temperature T1 is greater than 700°C and strictly less than 1000°C. Therefore, T1 is below the temperature at which step formation begins (approximately 1300°C at a pressure of 101 kPa (1 atm), and even less than approximately 1200°C or 1100°C at lower pressures). Temperature T1 is also below approximately 1000°C, which can lead to increased surface roughness.

[0087] Starting at time t1, a gas stream consisting of carbon-based gas and carrier gas is injected into the furnace.

[0088] Carbon deposition begins at time t1. The formation of the carbon layer typically lasts between 2 seconds and 2 hours until time t2. During this period, the deposition temperature T1 remains constant. The furnace pressure is maintained between 0.1 kPa and 100 kPa (between 1 mbar and 1 bar).

[0089] The injection gas flow rate depends on the chamber volume and is controlled to maintain the partial pressure of the carbon-based gas between 0.1 kPa and 1 kPa (between 1 mbar and 10 mbar). Adjustable deposition temperature T1 and carbon-based gas flow rate allow for the acquisition of a carbon layer with the desired thickness and uniformity within a sufficiently short time, providing optimal protection for subsequent processes and thus optimizing the process in terms of both time and cost.

[0090] At the end of process S1, the supply of carbon-based gas is stopped. The carbon-based gas residue is discharged under the flow of carrier gas.

[0091] When the carbon layer deposition is completed at time t2, a second process S2 is performed. The second process S2 includes heating from the deposition temperature T1 to the annealing temperature T2, and a temperature plateau lasting for, for example, between 30 and 120 minutes. The annealing temperature T2 and the processing time are selected based on the state of the substrate prior to the current process and the expected crystal structure of the substrate. Typically, annealing is performed at a temperature T2 above 1500°C (e.g., between 1600°C and 1900°C).

[0092] The heat treatment in the second process is carried out in the same furnace as the one in the first process where the carbon layer is formed.

[0093] At the end of process S2, the substrate is cooled to preserve the crystallinity acquired during annealing. At time t3, the substrate reaches a third temperature T3 of 900°C.

[0094] In some implementation schemes, refer to Figure 6AThe process proceeds directly to the third step, S3, in which the protective carbon layer is removed by oxidation, as described previously. In this step, oxygen may be injected into the furnace to generate reactive plasma.

[0095] In this step, the temperature T3 = 900°C is kept constant. With a stripping rate of approximately 100 nm per minute, the removal time is typically between 10 and 120 seconds. The total duration of process S3 also includes furnace stabilization, typically between five minutes and one hour. Once the carbon layer is completely removed at time t4, the furnace is cooled to allow the substrate to be removed.

[0096] Figure 6B A temperature profile of one embodiment is shown, in which the carbon layer removal step is performed outside the furnace. Steps S1 and S2 are performed as described above. At the end of step S2, the substrate is cooled to a temperature close to room temperature so that the furnace can be opened and the substrate removed. During step S3', the carbon layer is removed outside the furnace. In this case, at time t3, a step of transferring from the annealing furnace to a chamber for removing the protective layer or a polishing apparatus is performed. When the substrate processing includes a transfer step, the individual steps can be performed separately over time. Depending on the technique used to ablate the glass carbon layer, step S3 may include heating to a temperature below the step formation temperature, or it may be performed at room temperature.

[0097] The influence of protective layer on step formation Figure 7A and Figure 7B Two substrates, each with a single-crystal silicon carbide surface, are in a 30×30 µm area. 2 Atomic force microscopy (AFM) images of the area.

[0098] Figure 7A This is an AFM image of a substrate heat-treated at 1500°C without the application of a carbon layer. Steps are formed on the substrate surface, visible as vertical straight lines in the AFM image. The root mean square (RMS) value of the surface roughness caused by the steps is approximately 16 nm.

[0099] Figure 7B These are AFM images showing the surface roughness of a similar substrate, which also underwent a 1500°C heat treatment. Figure 7B The substrate is protected by a glassy carbon layer, which is formed by treating at 900°C and a pressure of less than 5 kPa (50 mbar) for 10 minutes. The carbon layer is formed in an atmosphere comprising argon as a carrier gas and propane as a carbon-based gas. The propane content in the mixture is less than 30%.

[0100] The image of the protected substrate does not show parallel line structures indicating the presence of steps. The root mean square value of the surface roughness is approximately 0.2 nm. Therefore, the roughness of the substrate protected by the carbon layer is much lower than that of the substrate without the protective layer.

[0101] The effect of temperature during carbon layer formation Figure 8A and Figure 8B Two substrates, each with a single-crystal silicon carbide surface, are in a 5×5 µm area. 2 AFM images of the area. Each substrate includes a protective carbon layer. The carbon layers were deposited at different temperatures. Each substrate was heat-treated separately at 1500°C under the same conditions.

[0102] Figure 8A The substrate is protected by a carbon layer deposited at 900°C for 10 minutes, consistent with a preferred embodiment of the invention. The curve below the AFM image shows the height profile of the magnified portion of the image over a length l of 100 nm. In this region, the height h of the largest particle on the surface is approximately 1.5 nm.

[0103] Figure 8B The substrate is protected by a carbon layer deposited at 1000°C for 10 minutes, i.e., under conditions not covered by this invention. Figure 8A Compared to the image in the previous one, this image shows more granular structure, indicating a greater surface roughness. Below the AFM image, a height profile of the surface is shown over a length l of 500 nm. This profile reveals larger particles with a height h up to approximately 15 nm.

[0104] Therefore, the roughness of a carbon layer formed at 900°C is significantly lower than that formed at 1000°C. Since the roughness of a carbon layer increases with increasing formation temperature, it must be formed at a temperature strictly below 1000°C.

[0105] Introduction to the furnace To make the method for processing multiple substrates fast and efficient, it is preferable to use an annealing furnace that can process the maximum number of substrates simultaneously under the same conditions. In the field of microelectronics, such a furnace is often referred to as a batch annealing furnace.

[0106] Figure 9 A furnace suitable for accommodating 120 to 150 substrates in an annealing chamber is shown. The substrates 10 are placed horizontally and stacked vertically within the furnace to process as many substrates as possible in the same hot gas flow 73. Free space is maintained between each substrate 10 and adjacent substrates 10 to optimize gas flow and promote carbon layer formation. Typically, the vertical distance between two adjacent substrates is between 2 mm and 20 mm.

[0107] This type of furnace uses a "top-inlet" structure, meaning the gas flow enters the furnace from the top 71, passes through the furnace body, and exits through the outlet 79 at the bottom. Typically, the carrier gas flow delivers a carbon-based gas (usually propane) to form a carbon layer. In some cases, other gases, such as catalyst gases, are added to the furnace to promote the decomposition of the carbon-based gas.

[0108] All components of the furnace annealing chamber—the inner wall 75, the substrate support for holding the substrates in horizontal and vertical stacked positions, and the gas contained within the annealing chamber—are at the same temperature during furnace use, except for external components such as the outer wall 76 and the gas inlet pipe ends. The term "same temperature" means that the temperature difference between the furnace top 74 and the furnace bottom 78 is extremely small, typically only a few degrees Celsius, for example, less than 3 degrees when the furnace temperature is between 800°C and 1200°C.

[0109] The substrate is heated primarily through heat conduction from the furnace walls. The injection temperature of the gas stream is the same as the furnace temperature.

[0110] Annealing furnaces are not used for depositing layers, but rather for heat-treating substrates placed within them. Therefore, while these furnaces are optimized for high temperature uniformity of the substrates they contain, they are not optimized for material deposition, particularly for ensuring uniform gas flow across the substrate surface. The stacked placement of substrates significantly hinders this uniformity, as it is more difficult for gas to reach the center of the substrate than the edges. However, this type of furnace is still suitable for depositing carbon layers to protect the semiconductor surface from stair formation, primarily because the uniformity of the carbon layer thickness is not a decisive factor as long as all surfaces to be protected are covered. Temporary use of carbon layers does not require improved uniformity. However, the thickness must be controlled to ensure sufficient thickness across the entire surface of all substrates contained within the furnace. The use of graphite elements within the furnace is compatible with carbon layer deposition because both are made of the same material, and the thickness of the deposited layer is relatively small compared to the size of the element.

[0111] Unlike epitaxial chambers, this furnace, with its vertically stacked arrangement, can process a large number of substrates simultaneously. Furthermore, this furnace allows carbon layer deposition and annealing steps to be performed within the same chamber, thus avoiding the risk of contamination during transfer between two different chambers. Eliminating the transfer step between the carbon layer deposition chamber and the annealing furnace avoids cooling between steps, eliminates the need for manual transfer, and prevents losses in time and efficiency.

[0112] References R. Zhang et al., "Growth of large Domains of Epitaxial Graphene on the C-face of SiC", J. of App. Phys. 2012, 112 (10); doi: 10.1063 / 1.4765666.

[0113] J. Bao et al., "Sequential Control of Step-Bunching During Graphene Growth on SiC (0001)", App. Phys. Lett. 2016, 109(8); doi: 10.1063 / 1.4961630.

Claims

1. A method for processing a substrate having a free surface made of a semiconductor material, particularly a single-crystal semiconductor material, the method comprising a process for stabilizing the surface to prevent the formation of steps and / or beads, the process comprising: At a temperature (T1) above 700°C, preferably above 800°C, and strictly below 1000°C, preferably below 950°C, more preferably below 900°C, a glassy carbon layer (30) is formed on the surface by a gas-phase carbon reaction. After stabilizing the surface, the substrate is heat-treated, wherein the glassy carbon layer (30) restricts the surface recombination into a stepped semiconductor material. The deposition of the carbon layer (30) and the heat treatment are carried out in the same furnace.

2. The processing method according to the preceding claim, wherein, The glassy carbon layer (30) was formed at a pressure between 0.1 kPa and 100 kPa (between 1 mbar and 1 bar).

3. The processing method according to any one of the preceding claims, wherein, The carbon layer is formed in a gas stream containing a carbon-based gas and a carrier gas, preferably argon.

4. The processing method according to claim 3, wherein, The carbon-based gas is propane.

5. The processing method according to any one of claims 3 and 4, together with claim 2, wherein, The glassy carbon layer (30) is formed when the partial pressure of the carbon-based gas is between 0.1 kPa and 1 kPa (between 1 mbar and 10 mbar).

6. The processing method according to any one of the preceding claims, wherein, The semiconductor material is silicon carbide.

7. The processing method according to any one of the preceding claims, wherein, The thickness of the carbon layer (30) is less than or equal to 100 nm.

8. The processing method according to any one of the preceding claims, wherein, The furnace (70) includes an inner wall (75) and a support element configured to fix at least one substrate (10). The inner wall (75), the support element, and the gas inside the furnace (70) have the same temperature.

9. The processing method according to any one of the preceding claims, wherein, The furnace (70) has at least one inner wall (75) made of carbon.

10. The processing method according to any one of the preceding claims, wherein, The furnace (70) includes a plurality of substrates, each substrate including the surface of the semiconductor material, the substrates being stacked vertically, with a vertical gap between two adjacent substrates, and a carbon layer (30) being formed on the surface of the semiconductor material of each substrate.

11. The processing method according to any one of the preceding claims, wherein, At least part of the heat treatment is carried out at a temperature above 1500°C.

12. The processing method according to any one of the preceding claims, after heat treatment, further comprises the step of removing the carbon layer (30) by chemical mechanical polishing (CMP) and / or reactive ion etching and / or plasma etching.

13. A method for manufacturing a semiconductor structure, the method comprising the following steps: o The embrittlement region (21) is formed by implanting ion species into a donor substrate (220) made of semiconductor material, especially single-crystal semiconductor material. o Combine the donor substrate (220) with the support substrate (11), The donor substrate (220) is peeled off along the embrittlement region (21), thereby transferring the semiconductor material layer (20) onto the support substrate (11). o The processing method according to any one of claims 1 to 12 is used to repair defects generated in the semiconductor material layer (20) during ion species implantation, wherein, A carbon layer (30) is formed on the free surface (200) of the semiconductor material layer (20) transferred to the support substrate.

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