Pre-acquisition front-end signal processing circuit, method and chip for stimulating artifact control

Abstract

The application provides a kind of for stimulating artifact control acquisition front-end signal processing circuit, method and chip, the circuit includes: low noise amplifier, low pass filter and first switch group and second switch group are set for each acquisition channel;The first switch group is arranged between low noise amplifier and acquisition electrode, and the second switch group is arranged between the differential input end of low noise amplifier and common-mode reference voltage or ground;In acquisition state, the first switch group is closed and the second switch group is disconnected, so that the neural signal is output to analog-to-digital converter after being acquired through acquisition electrode, first switch group, low noise amplifier and low pass filter;In stimulation protection state, the first switch group is disconnected and the second switch group is closed to block the electric stimulation signal from being transmitted into low noise amplifier through acquisition electrode.The application can effectively solve the technical problems of breakdown risk, amplifier saturation and long recovery time of the acquisition front-end under high-voltage stimulation pulse in the prior art.

Description

Technical Field

[0001] This application belongs to the field of neural interface integrated circuit technology, and relates to a signal processing circuit, method and chip for acquisition front-end for stimulus artifact control. Background Technology

[0002] In neuromodulation systems that integrate acquisition and stimulation, such as brain-spinal interfaces, deep brain stimulation, or pacemakers, the acquisition front end may need to simultaneously handle high-voltage stimulation pulses (typically several to tens of volts) and weak physiological signals (typically in the microvolt to millivolt range). When the stimulation pulse is coupled to the acquisition front end via electrodes, the resulting high-voltage stimulation pulse can generate significant stimulation artifacts, posing a risk of circuit breakdown in the acquisition front end or causing amplifier output saturation. This can lead to the amplifier taking a long time to recover from saturation to normal operating conditions, causing a shift in the amplifier's DC operating point, resulting in signal quality degradation or even severe signal acquisition interruptions.

[0003] Therefore, a signal processing scheme for the acquisition front end that combines stimulus artifact control is needed. Based on the original acquisition link, the front end amplifier is protected from the stimulus pulse by a time-division method through a coordinated switch, so that it can be quickly resumed after the stimulus ends. Summary of the Invention

[0004] This application provides a signal processing circuit, method, and chip for acquisition front-end for stimulus artifact control, in order to solve the technical problems of the acquisition front-end in the prior art, such as the risk of breakdown, amplifier saturation, and long recovery time under high voltage stimulus pulses.

[0005] In a first aspect, this application provides a front-end signal processing circuit for stimulation artifact control, comprising: a low-noise amplifier, a low-pass filter, and a first switch group and a second switch group for each acquisition channel; the first switch group is disposed between the low-noise amplifier and the acquisition electrode, and the second switch group is disposed between the differential input terminal of the low-noise amplifier and a common-mode reference voltage or ground; the front-end signal processing circuit has an acquisition state and a stimulation protection state: in the acquisition state, the first switch group is closed and the second switch group is open, so that the neural signal is output to the analog-to-digital converter after passing through the acquisition electrode, the first switch group, the low-noise amplifier, and the low-pass filter; in the stimulation protection state, the first switch group is open and the second switch group is closed to block the electrical stimulation signal from being transmitted to the low-noise amplifier through the acquisition electrode, and the input terminal of the low-noise amplifier is short-circuited to the common-mode reference voltage or ground through the second switch group to block crosstalk between the acquisition front-end channels.

[0006] In one implementation of the first aspect, the first switch group includes: four series disconnect switches, respectively disposed between the differential input terminal of the low-noise amplifier and the acquisition electrode, for disconnecting under the stimulation protection state to physically isolate the high-voltage stimulation pulse.

[0007] In one implementation of the first aspect, the second switch group includes: two parallel short-circuit switches disposed between the differential input terminal of the low-noise amplifier and the common-mode reference voltage or ground, for closing in the stimulated protection state to short-circuit the input terminal of the low-noise amplifier to a low impedance potential, dissipating residual charge on the electrodes and preventing the input terminal from being left floating.

[0008] In one implementation of the first aspect, the acquisition front end further includes two reset switches, disposed between the output terminal and the inverting input terminal of the low-noise amplifier, for closing in the stimulation protection state to short-circuit the output terminal and the inverting input terminal of the low-noise amplifier, forcing the low-noise amplifier to switch to unity-gain buffer mode to avoid deep saturation of the internal nodes of the low-noise amplifier due to overdrive voltage; and opening in the acquisition state to allow the low-noise amplifier to operate in normal amplification mode.

[0009] In one implementation of the first aspect, the acquisition front end further includes: an adjustable gain amplifier connected to the output of the low noise amplifier, used to adjust the gain of the signal output by the low noise amplifier.

[0010] In one implementation of the first aspect, the acquisition front end further includes: an interstage isolation switch, disposed between the output terminal of the low-noise amplifier and the input terminal of the adjustable gain amplifier, for disconnecting in the stimulation protection state to block the residual influence of the high-voltage stimulation pulse from being transmitted to the adjustable gain amplifier; and closing in the acquisition state to allow the signal output by the low-noise amplifier to be transmitted to the adjustable gain amplifier.

[0011] In one implementation of the first aspect, the adjustable gain amplifier is a capacitively coupled programmable gain amplifier; a pseudo-resistor is connected between the input terminal of the capacitively coupled programmable gain amplifier and the common-mode voltage to provide a stable DC bias path for the adjustable gain amplifier when the interstage isolation switch is open.

[0012] In one implementation of the first aspect, the low-pass filter is connected between the output of the adjustable gain amplifier and the input of the analog-to-digital converter, and is used to filter the signal amplified by the adjustable gain amplifier.

[0013] Secondly, this application provides a signal processing method for the acquisition front end for stimulation artifact control, applied to the circuit described above. The method includes: in the acquisition state, controlling the first switch group to close and the second switch group to open, so that the physiological signal is output to the analog-to-digital converter after passing through the acquisition electrode, the first switch group, the low-noise amplifier, and the low-pass filter; in the stimulation protection state, controlling the first switch group to open and the second switch group to close, so as to block the electrical stimulation signal from being transmitted to the low-noise amplifier through the acquisition electrode, and shorting the differential input terminal of the low-noise amplifier to the common-mode reference voltage or ground through the second switch group, so as to discharge the residual charge of the electrode and prevent the input terminal from being floating.

[0014] Thirdly, this application provides a chip, including: the aforementioned acquisition front-end signal processing circuit for controlling stimulus artifacts.

[0015] As described above, the acquisition front-end signal processing circuit, method, and chip for stimulus artifact control described in this application have the following beneficial effects:

[0016] 1. This application addresses the issue of high-voltage stimulation pulses by placing a first switch group between a low-noise amplifier and the acquisition electrode, and a second switch group between the differential input of the low-noise amplifier and the common-mode reference voltage or ground. The two switch groups are controlled to switch complementaryly in a time-division manner between acquisition and stimulation protection states. In stimulation protection state, the first switch group is disconnected to physically isolate the high-voltage stimulation pulse, while the second switch group is closed to short-circuit the differential input of the low-noise amplifier to the common-mode reference voltage or ground. Compared to existing solutions using protection diodes or single switches, this application, through the coordinated operation of series and parallel switches at the input stage, effectively isolates stimulation pulses up to tens of volts, ensuring that low-voltage components are not damaged. It also prevents the amplifier from entering deep saturation due to overdrive voltage, significantly reducing the setup time of the acquisition front-end after stimulation from tens to hundreds of milliseconds in traditional solutions to milliseconds. This enables rapid recovery of acquisition after stimulation, ensuring the continuity and integrity of physiological signal sampling in the stimulation-acquisition alternating mode, greatly improving system reliability, and effectively solving the technical problems of breakdown risk, amplifier saturation, and long recovery time of the acquisition front-end under high-voltage stimulation pulses in existing technologies.

[0017] 2. In this application, the series disconnect switch physically cuts off the high voltage intrusion path, the parallel short-circuit switch clamps the input terminal to a low impedance potential to discharge residual charge and prevent floating, and the reset switch forces the low noise amplifier to switch to unity-gain buffer mode to avoid deep saturation of internal nodes. The three work together to enable the amplifier to immediately resume normal amplification at the correct DC operating point after the stimulation ends, further shortening the recovery time and improving the reliability of signal acquisition.

[0018] 3. This application sets a stage interval between the output of the low-noise amplifier and the input of the adjustable gain amplifier, and sets a pseudo-resistor between the input of the capacitively coupled programmable gain amplifier and the common-mode voltage. This ensures that a stable DC bias path can still be provided for the adjustable gain amplifier when the interstage isolation switch is open. This ensures that the DC operating point of the subsequent signal chain does not float or drift due to fluctuations in the previous stage. It also avoids the problem in traditional schemes where the DC operating point of the subsequent amplifier shifts due to the disconnection of the interstage signal path and the need to re-establish the bias. This further ensures the rapid recovery of the acquired signal and the signal quality after the stimulation ends. Attached Figure Description

[0019] Figure 1 The diagram shown is a schematic diagram of the signal processing circuit for stimuli artifact control at the acquisition front end, as described in an embodiment of this application.

[0020] Figure 2 The diagram shown is a schematic diagram of the principle structure of the acquisition front-end signal processing circuit for stimulus artifact control described in this application embodiment when it is in the acquisition state.

[0021] Figure 3 The diagram shown is a schematic diagram of the principle structure of the acquisition front-end signal processing circuit for stimulus artifact control described in this application embodiment when it is in the stimulus protection state.

[0022] Figure 4 The diagram shown is a schematic of the single-channel acquisition front-end switch closed state in the acquisition front-end signal processing circuit for stimulus artifact control as described in the embodiments of this application.

[0023] Figure 5 The diagram shown is a schematic of the single-channel acquisition front-end switch closed state in the acquisition front-end signal processing circuit for stimulus artifact control as described in the embodiments of this application, under stimulus protection mode.

[0024] Figure 6 The diagram shows the connection of the reset switch in the acquisition front-end signal processing circuit for stimulus artifact control as described in an embodiment of this application.

[0025] Figure 7 The diagram shown is a preferred schematic diagram of the acquisition front-end signal processing circuit for stimulus artifact control as described in an embodiment of this application.

[0026] Figure 8 The diagram shown is a schematic diagram of another preferred principle structure of the acquisition front-end signal processing circuit for stimulus artifact control as described in the embodiments of this application.

[0027] Figure 9 The diagram shown is a schematic flowchart of the signal processing method for acquisition front-end for stimulus artifact control as described in the embodiments of this application.

[0028] Component designation explanation

[0029] 1 Signal processing circuit for acquisition front-end for stimulus artifact control 11 Low noise amplifier 12 low-pass filter 13 First switch group 14 Second switch group 15 Adjustable gain amplifier 16 Interstage disconnect switch S10~S20 step Detailed Implementation

[0030] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0031] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. Therefore, the illustrations only show the components related to this application and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0032] To address the technical problem in existing neuromodulation systems that integrate acquisition and stimulation, where the acquisition front end needs to simultaneously handle high-voltage stimulation pulses (several volts to tens of volts) and weak physiological signals (microvolts to millivolts), and where the high-voltage stimulation pulses are easily coupled to the acquisition front end via electrodes, resulting in large stimulation artifacts, leading to circuit breakdown, amplifier output saturation, and a long recovery time from saturation, which in turn causes DC operating point shift and signal quality degradation, this paper provides a signal processing circuit, method, and chip for acquisition front end to control stimulation artifacts.

[0033] The signal processing circuit at the acquisition front end of this embodiment mainly consists of a low-noise amplifier, an adjustable gain amplifier, and a low-pass filter. In its basic architecture, a series isolating switch and a parallel short-circuit switch are respectively set at the differential input terminals of the low-noise amplifier. When a stimulus arrives, the series switch is preferentially opened to physically isolate high voltage, while the parallel switch closes, shorting the input terminal of the low-noise amplifier to a low-impedance common-mode reference voltage or ground to discharge residual charge on the electrodes and prevent the input terminal from floating. Additionally, a reset switch is set between the output terminal and the inverting input terminal of the low-noise amplifier. During stimulation, this switch is closed to force the low-noise amplifier to switch to a unity-gain buffered mode, preventing deep saturation of internal nodes due to overdrive voltage. Finally, an interstage isolating switch is set between the output terminal of the low-noise amplifier and the input terminal of the adjustable gain amplifier. In this embodiment, the adjustable gain amplifier is a capacitively coupled programmable gain amplifier. In this architecture, this embodiment uses a pseudo-resistor between the input of the adjustable gain amplifier and the common-mode voltage. Therefore, when the interstage isolation switch is open, a stable DC bias path is provided to the input of the adjustable gain amplifier, ensuring that the DC operating point of the subsequent signal chain does not float or drift due to fluctuations in the preceding stage.

[0034] By using the aforementioned switch-coordinated control, the technical problems of circuit breakdown, amplifier saturation, and long settling time caused by high-voltage stimulation pulse coupling to the acquisition front end can be solved, thereby significantly improving system reliability and shortening the signal recovery time after stimulation ends.

[0035] The following will refer to the embodiments of this application. Figures 1 to 9 The technical solutions in the embodiments of this application will be described in detail.

[0036] Example 1

[0037] This embodiment provides a front-end signal processing circuit for stimulus artifact control. Figure 1 The diagram shown is a schematic representation of the signal processing circuit for stimulus artifact control at the acquisition front end, as described in an embodiment of this application. Figure 1 As shown, the acquisition front-end signal processing circuit 1 for stimulus artifact control provided in this embodiment includes: a low-noise amplifier 11, a low-pass filter 12, a first switch group 13, and a second switch group 14 for each acquisition channel.

[0038] The first switch group 13 is disposed between the low-noise amplifier 11 and the acquisition electrode, and the second switch group 14 is disposed between the differential input terminal of the low-noise amplifier 11 and the common-mode reference voltage or ground; the acquisition front-end signal processing circuit has an acquisition state and a stimulation protection state.

[0039] like Figure 2As shown, in the acquisition state, the first switch group 13 is closed and the second switch group 14 is open, so that the neural signal is output to the analog-to-digital converter after passing through the acquisition electrode, the first switch group 13, the low-noise amplifier 11 and the low-pass filter 12.

[0040] like Figure 3 As shown, in the stimulation protection state, the first switch group 13 is open and the second switch group 14 is closed to block the electrical stimulation signal from being transmitted to the low noise amplifier 11 through the acquisition electrode, and the input terminal of the low noise amplifier 11 is short-circuited to the common mode reference voltage or ground through the second switch group 14 to block crosstalk between the acquisition front-end channels.

[0041] This embodiment sets up a first switch group 13 and a second switch group 14 at the acquisition front end. In the acquisition state, the signal path is connected to ensure effective transmission of EEG signals. In the stimulation protection state, the first switch group 13 is disconnected to block the transmission of high current stimulation signals to the acquisition front end. The second switch group 14 is closed to short-circuit the input terminals of adjacent channels to block crosstalk between channels. The dual protection further improves the safety and signal quality of the acquisition front end.

[0042] In one implementation of this embodiment, the first switch group 13 includes four series disconnect switches respectively disposed between the differential input terminal of the low noise amplifier 11 and the acquisition electrode, for disconnecting under the stimulation protection state to physically isolate the high voltage stimulation pulse.

[0043] Specifically, the low-noise amplifier 11 has a differential signal processing architecture, which includes a positive input terminal and a negative input terminal. The acquisition electrode includes an acquisition electrode and a reference electrode, which are respectively connected to the positive input terminal and the negative input terminal of the low-noise amplifier 11, and are used to provide physiological signals in differential form to the low-noise amplifier 11.

[0044] In this embodiment, the series capacitor at the input of the low-noise amplifier 11 serves as a DC blocking capacitor, used to block the DC offset voltage introduced by the acquisition electrodes, preventing DC current from flowing through the human body, while providing high input impedance to ensure efficient coupling of weak physiological signals; the parallel resistor at the input provides a clear DC bias path for the low-noise amplifier 11, preventing uncertain noise from being introduced due to the differential input being floating; in the feedback network of the low-noise amplifier 11, the resistor and capacitor are connected in parallel, where the resistor determines the intermediate frequency gain of the amplifier, and the capacitor is used to increase the AC input impedance and, together with the resistor, set the high-pass cutoff frequency to filter out ultra-low frequency noise or DC components, ensuring that the amplifier operates in the best noise matching state; the series resistor at the output is used to isolate the capacitive load of the subsequent stage, prevent the amplifier from oscillating, and limit transient current.

[0045] In this embodiment, the low-pass filter 12 adopts an RC filter structure. Its series resistor and parallel capacitor together form a first-order low-pass filter network. By setting the resistance and capacitance values, the cutoff frequency is determined, allowing useful physiological signals below the cutoff frequency to pass smoothly, while high-frequency noise and out-of-band interference above the cutoff frequency are effectively attenuated, thereby achieving anti-aliasing filtering and preventing high-frequency noise from folding back into the useful signal frequency band during the analog-to-digital converter sampling process and affecting signal quality. At the same time, the series resistor also plays a current-limiting protection role, providing additional fault isolation protection for the subsequent analog-to-digital converter.

[0046] Among them, series isolation switch S1 is set on the signal path between the acquisition electrode and the positive input terminal of low noise amplifier 11; series isolation switch S2 is set on the signal path between the reference electrode and the negative input terminal of low noise amplifier 11; one end of series isolation switch S3 is connected to the node between S1 and the positive input terminal of low noise amplifier 11, and the other end is connected to the common mode reference voltage or ground; one end of series isolation switch S4 is connected to the node between S2 and the negative input terminal of low noise amplifier 11, and the other end is connected to the common mode reference voltage or ground.

[0047] like Figure 4 As shown, when the acquisition front-end is in acquisition mode, the series isolation switches S1, S2, S3, and S4 are all closed. The weak physiological signals picked up by the acquisition electrode and the reference electrode enter the positive and negative input terminals of the low-noise amplifier 11 via S1 and S2, respectively. After being pre-amplified by the low-noise amplifier 11, they are output to the subsequent circuit. In this state, although S3 and S4 are closed, since they are connected to the common-mode reference voltage or ground, their impedance is much higher than the signal path impedance, and they will not have a substantial impact on the normal transmission of the differential signal.

[0048] like Figure 5 As shown, when the acquisition front end is operating in the stimulation protection state, the series disconnect switches S1, S2, S3, and S4 are all disconnected. S1 and S2 physically disconnect the electrical connection between the acquisition electrode / reference electrode and the low-noise amplifier 11 from the differential signal path, blocking the high-voltage stimulation pulse of several volts to tens of volts from being coupled into the low-noise amplifier 11 through the electrodes, thereby preventing the low-voltage range components inside the low-noise amplifier 11 from being broken down by high voltage; S3 and S4 disconnect the connection between the positive and negative input terminals of the low-noise amplifier 11 and the common-mode reference voltage or ground, so that the differential input terminal of the low-noise amplifier 11 is no longer connected to a low-impedance potential after S1 and S2 are disconnected, but remains in a high-impedance state.

[0049] By closing and conducting the four series disconnect switches in the acquisition state and disconnecting them all in the stimulation protection state, the normal establishment of the acquisition signal path and the physical isolation of the high-voltage stimulation pulse are realized, ensuring that the low-noise amplifier 11 is protected from high-voltage impact in the stimulation protection state and can quickly return to the normal acquisition state after the stimulation ends.

[0050] Specifically, the low-noise amplifier 11 has a differential signal processing architecture, which includes a positive input terminal and a negative input terminal. One end of the parallel short-circuit switch S5 is connected to the positive input terminal of the low-noise amplifier 11, and the other end is connected to the common-mode reference voltage or ground; one end of the parallel short-circuit switch S6 is connected to the negative input terminal of the low-noise amplifier 11, and the other end is connected to the common-mode reference voltage or ground. S5 and S6 are respectively disposed between the two differential input signal lines and the common-mode reference voltage or ground, forming two parallel low-impedance discharge branches.

[0051] like Figure 4 As shown, when the acquisition front end is in the acquisition state, the parallel short-circuit switches S5 and S6 are both open, and the low-impedance discharge branch between the positive and negative input terminals of the low-noise amplifier 11 and the common-mode reference voltage or ground is cut off. The differential signal path maintains a high input impedance, ensuring that the weak physiological signal picked up by the acquisition electrodes can be completely amplified by the low-noise amplifier 11 and will not be attenuated or lost due to the closing of the parallel short-circuit switches.

[0052] like Figure 5 As shown, when the acquisition front end is in stimulation protection mode, both parallel short-circuit switches S5 and S6 are closed. The positive and negative input terminals of the low-noise amplifier 11 are shorted to the common-mode reference voltage or ground via S5 and S6, respectively. On the one hand, the residual polarization charge accumulated on the acquisition electrodes due to the high-voltage stimulation pulse is quickly discharged through the low-impedance path formed by S5 and S6, preventing the residual charge from continuously affecting the accuracy of subsequent acquisition signals after stimulation. On the other hand, after the series isolation switch is opened, the differential input terminal of the low-noise amplifier 11 is clamped to the low-impedance common-mode reference voltage or ground via S5 and S6, effectively preventing the input terminal from being in an uncertain floating state, avoiding coupling of external interference noise due to floating, and ensuring that the low-noise amplifier 11 can resume normal amplification from a known stable potential after stimulation.

[0053] By opening the two parallel short-circuit switches in the acquisition state and closing them in the stimulation protection state, the normal high-impedance transmission of the differential signal path and the low-impedance clamping of the input terminal in the stimulation state are switched. This ensures the attenuation-free transmission of weak physiological signals in the acquisition state and enables the rapid discharge of residual charge on the electrodes and reliable prevention of the input terminal being left floating in the stimulation protection state.

[0054] As can be seen from the above, when the acquisition front end is in the acquisition state, switches S1-S4 in the first switch group 13 are closed, and switches S5-S6 in the second switch group 14 are open. In this state, the weak EEG signals picked up by the acquisition electrodes enter the differential input terminal of the amplifier via S1 and S2. After being amplified by the amplifier, they pass through S3 and S4 to enter the low-pass filter 12 for filtering processing, and are finally sent to the analog-to-digital converter for sampling from the output terminal. In this signal path, S1-S4 act as selection switches for the signal transmission channel, ensuring that the EEG signals can be transmitted to the subsequent processing circuit completely and with low loss; S5-S6 are in the open state, avoiding signal coupling or shunting between adjacent channels due to short circuits at the input terminals, thereby ensuring the independence and accuracy of signal acquisition for each channel.

[0055] When the acquisition front end is operating in the stimulation protection state, switches S1-S4 in the first switch group 13 are open, and switches S5-S6 in the second switch group 14 are closed. In this state, S1 and S2 are open, cutting off the physical path of the stimulation current from the acquisition electrodes to the amplifier input terminal; S3 and S4 are open, cutting off the signal path from the amplifier output terminal to the low-pass filter 12 and the analog-to-digital converter, preventing the front end circuit from being damaged by the large voltage swing that occurs during stimulation. At the same time, S5 and S6 are closed, shorting the differential input terminals of the amplifier to the common-mode potential, thereby making the amplifier input terminals of each channel in an equipotential state, effectively blocking the path of inter-channel crosstalk signals caused by the potential difference between electrodes during stimulation to enter the amplifier, further improving the acquisition front end's ability to suppress residual interference signals in the stimulation state.

[0056] In one implementation of this embodiment, the acquisition front end further includes two reset switches, disposed between the output terminal and the inverting input terminal of the low-noise amplifier 11. These switches are used to close in the stimulation protection state, short-circuiting the output terminal and the inverting input terminal of the low-noise amplifier 11, forcing the low-noise amplifier 11 to switch to unity-gain buffer mode to prevent the internal nodes of the low-noise amplifier 11 from being deeply saturated due to overdrive voltage; and to open in the acquisition state, allowing the low-noise amplifier 11 to operate in normal amplification mode.

[0057] Specifically, such as Figure 6As shown, the low-noise amplifier 11 has a differential signal processing architecture, including a non-inverting output terminal and an inverting output terminal. The reset switches include a first reset switch S7 and a second reset switch S8. One end of the first reset switch S7 is connected to the non-inverting output terminal of the low-noise amplifier 11, and the other end is connected to the inverting input terminal of the low-noise amplifier 11. One end of the second reset switch S8 is connected to the inverting output terminal of the low-noise amplifier 11, and the other end is connected to the non-inverting input terminal of the low-noise amplifier 11. The two reset switches S7 and S8 are respectively disposed between the two differential output terminals and the corresponding inverting input terminals of the low-noise amplifier 11, forming two feedback short-circuit branches, used to change the feedback network structure of the amplifier when closed, switching the amplifier to unity-gain buffer mode.

[0058] When the acquisition front end is in the acquisition state, both the first reset switch S7 and the second reset switch S8 are open. The feedback network of the low noise amplifier 11 is determined by its external feedback resistor / capacitor network. The low noise amplifier 11 operates in normal amplification mode, and after amplifying the weak physiological signal at the differential input terminal with the set gain, it is output to the subsequent circuit.

[0059] When the acquisition front end is in stimulation protection mode, both the first reset switch S7 and the second reset switch S8 are closed. Short circuits are formed between the non-inverting output terminal and the inverting input terminal, and between the inverting output terminal and the non-inverting input terminal, respectively. After closure, the feedback capacitor of the low-noise amplifier 11 is short-circuited, completely discharging the accumulated charge on the capacitor. At this time, the negative feedback depth of the amplifier reaches its maximum, and the gain is forcibly reduced to 1 (i.e., unity-gain buffer mode), with the output signal following the input signal. In this mode, the operating swing of each amplification stage inside the low-noise amplifier 11 is limited to a small range, preventing the amplifier output from saturating due to excessive stimulation pulses and avoiding overdrive voltage due to high-voltage pulse coupling at the input terminal. This prevents internal high-gain nodes from entering deep saturation due to overvoltage charging, thus preventing severe charge storage effects.

[0060] By opening the two reset switches in the acquisition state and closing them in the stimulation protection state, the low-noise amplifier 11 can switch between normal amplification mode and unity-gain buffer mode. This effectively prevents the low-noise amplifier 11 from entering deep saturation due to high-voltage pulse coupling in the stimulation protection state, ensuring that the low-noise amplifier 11 can immediately return to normal amplification at the correct DC operating point after stimulation ends, thus shortening the system recovery time.

[0061] In one implementation of this embodiment, such as Figure 7 As shown, the acquisition front end also includes an adjustable gain amplifier 15, which is connected to the output terminal of the low noise amplifier 11 and is used to adjust the gain of the signal output by the low noise amplifier 11.

[0062] Specifically, the output of the low-noise amplifier 11 is connected to the input of the adjustable gain amplifier 15. The low-noise amplifier 11 pre-amplifies the weak physiological signal picked up at the differential input and outputs it to the adjustable gain amplifier 15. The adjustable gain amplifier 15 further adjusts the gain of the received signal according to the system configuration to meet the requirements of the subsequent analog-to-digital converter for the amplitude range of the input signal.

[0063] In one implementation of this embodiment, the low-pass filter 12 is connected between the output of the adjustable gain amplifier 15 and the input of the analog-to-digital converter, and is used to filter the signal amplified by the adjustable gain amplifier 15.

[0064] Specifically, the output of the adjustable gain amplifier 15 is connected to the input of the low-pass filter 12, and the output of the low-pass filter 12 is connected to the input of the analog-to-digital converter. The signal amplified by the adjustable gain amplifier 15 enters the low-pass filter 12, which filters it to remove high-frequency noise and out-of-band interference. The filtered signal is then output to the analog-to-digital converter for sampling and quantization, completing the digital acquisition of physiological signals.

[0065] In one implementation of this embodiment, the adjustable gain amplifier 15 is a capacitively coupled programmable gain amplifier; a pseudo-resistor is connected between the input terminal of the capacitively coupled programmable gain amplifier and the common-mode voltage to provide a stable DC bias path for the adjustable gain amplifier 15.

[0066] In this embodiment, the input terminal of the capacitively coupled programmable gain amplifier receives the signal from the preceding stage through a coupling capacitor, and a pseudo-resistor is connected between the input terminal and the common-mode voltage. On the one hand, the capacitive coupling effectively isolates the DC offset voltage introduced by the preceding stage circuit, avoiding output saturation and ensuring that the analog-to-digital converter obtains the maximum input dynamic range. On the other hand, the pseudo-resistor continuously provides a stable DC bias path for the input terminal of the adjustable gain amplifier 15 during the period when the inter-stage isolation switch is open, avoiding the DC operating point drift caused by the input terminal being floating, ensuring that the DC operating point of the subsequent signal chain always remains stable, further shortening the overall recovery time of the acquisition front end after the stimulation ends. At the same time, it can achieve precise control of the low-frequency cutoff frequency without the need for a large-value physical resistor, saving chip area and facilitating multi-channel integration.

[0067] In one implementation of this embodiment, such as Figure 8As shown, the acquisition front end also includes: an interstage isolation switch 16, which is disposed between the output terminal of the low-noise amplifier 11 and the input terminal of the adjustable gain amplifier 15, for disconnecting in the stimulation protection state to block the residual influence of the high-voltage stimulation pulse from being transmitted to the adjustable gain amplifier 15; and closing in the acquisition state to allow the signal output by the low-noise amplifier 11 to be transmitted to the adjustable gain amplifier 15.

[0068] The interstage isolation switch 16 can prevent residual high voltage from being transmitted to the subsequent programmable gain amplifier, thus solving the technical problems of saturation and DC operating point drift of the subsequent amplifier, thereby protecting the subsequent link and speeding up the recovery.

[0069] It should be noted that the dummy resistor is used to provide a stable DC bias path to the input of the adjustable gain amplifier 15 when the interstage isolation switch 16 is open, ensuring that the DC operating point of each amplification stage inside the adjustable gain amplifier 15 does not float or drift due to the disconnection of the preceding stage signal path. When the interstage isolation switch 16 is open, the signal path between the input of the adjustable gain amplifier 15 and the preceding low-noise amplifier 11 is cut off. Without a DC bias path, the input of the adjustable gain amplifier 15 will be in a floating state, and its internal DC operating point will drift due to charge leakage on the coupling capacitor or external interference, resulting in DC offset or saturation at the output of the adjustable gain amplifier 15, affecting the recovery speed and accuracy of the acquired signal after the stimulus ends. The dummy resistor solves the above problem by continuously providing bias to the input of the adjustable gain amplifier 15 during the period when the interstage isolation switch 16 is open, so that the DC operating point of the subsequent signal chain remains stable. When the interstage isolation switch 16 closes again to resume acquisition, the adjustable gain amplifier 15 can immediately operate normally based on the previous stage signal without waiting for the internal DC operating point to be re-established, further shortening the overall recovery time of the acquisition front end.

[0070] Compared to solutions using protective diodes or single switches, this embodiment employs the cooperation of series and parallel switches in the input stage to isolate stimulation pulses up to tens of volts, ensuring that low-voltage components are not damaged and significantly improving system reliability. The reset switch of the low-noise amplifier 11 prevents the amplifier from entering the saturation region, ensuring the stability of subsequent stages. Most importantly, the settling time of the entire acquisition front-end after stimulation is significantly reduced from tens to hundreds of milliseconds in traditional architectures to the millisecond level, enabling rapid recovery of acquisition after stimulation.

[0071] Example 2

[0072] Please see Figure 9 The diagram shows a schematic flowchart of the signal processing method for stimulus artifact control at the acquisition front end, as described in an embodiment of this application. Figure 9As shown, this embodiment provides a signal processing method for acquisition front-end for stimulus artifact control, which is applied to the acquisition front-end signal processing circuit 1 for stimulus artifact control described in this embodiment, and specifically includes the following steps S10 to S20.

[0073] In step S10, during the acquisition state, the first switch group 13 is closed and the second switch group 14 is opened, so that the physiological signal is output to the analog-to-digital converter after passing through the acquisition electrode, the first switch group 13, the low-noise amplifier 11 and the low-pass filter 12.

[0074] In the acquisition state, all the series isolation switches in the first switch group 13 are closed, connecting the signal path from the acquisition electrode to the differential input terminal of the low-noise amplifier 11. The weak physiological signal (microvolt to millivolt level neural signal) picked up by the acquisition electrode is fully amplified by the low-noise amplifier 11 through the first switch group 13. The amplified signal is then output to the low-pass filter 12 through the second switch group 14 (in the open state, which does not affect signal transmission). The low-pass filter 12 filters the signal to remove high-frequency noise and out-of-band interference, and finally outputs it to the analog-to-digital converter for sampling and quantization, thus completing the digital acquisition of the physiological signal.

[0075] In step S20, under the stimulation protection state, the first switch group 13 is opened and the second switch group 14 is closed to block the electrical stimulation signal from being transmitted to the low noise amplifier 11 through the acquisition electrode. The differential input terminal of the low noise amplifier 11 is shorted to the common mode reference voltage or ground through the second switch group 14 to discharge the residual charge of the electrode and prevent the input terminal from being floating.

[0076] In the stimulation protection state, all series disconnect switches in the first switch group 13 are disconnected, physically and completely cutting off the signal path between the acquisition electrode and the low-noise amplifier 11. This blocks the high-voltage stimulation pulse of several volts to tens of volts from coupling into the low-noise amplifier 11 through the electrode, preventing the low-voltage range components inside the low-noise amplifier 11 from being damaged by high voltage. At the same time, all parallel short-circuit switches in the second switch group 14 are closed, shorting the differential input terminal of the low-noise amplifier 11 to a low-impedance common-mode reference voltage or ground. On the one hand, this allows the residual polarization charge on the electrode to be quickly discharged through a low-impedance path, preventing residual charge from affecting the accuracy of subsequent acquisition signals after stimulation. On the other hand, it ensures that the differential input terminal of the low-noise amplifier 11 will not be in a floating state after the series disconnect switches are disconnected, avoiding uncertain potentials generated at the input terminal due to coupling with external interference, thus preparing for rapid recovery of acquisition after stimulation.

[0077] It should be noted that the specific implementation of each step in this method embodiment can refer to the description of the corresponding function in the aforementioned embodiment of the acquisition front-end signal processing circuit 1 for stimulus artifact control, and will not be repeated here. However, it should be noted that the acquisition front-end signal processing circuit 1 for stimulus artifact control described in the above embodiment can implement the acquisition front-end signal processing method for stimulus artifact control described in this application. However, the implementation system of the acquisition front-end signal processing method for stimulus artifact control described in this application includes, but is not limited to, the structure of the acquisition front-end signal processing circuit 1 for stimulus artifact control listed in this embodiment 1. All structural modifications and substitutions of the prior art made according to the principles of this application are included within the protection scope of this application.

[0078] The scope of protection of the acquisition front-end signal processing method for stimulus artifact control described in this application is not limited to the execution order of the steps listed in this embodiment. Any solution implemented by adding, subtracting, or replacing steps in the prior art based on the principles of this application is included within the scope of protection of this application.

[0079] Example 3

[0080] This embodiment provides a chip, including the aforementioned acquisition front-end signal processing circuit 1 for stimulus artifact control.

[0081] In one implementation of this embodiment, it can be used in neuromodulation devices that require integrated acquisition and stimulation, such as brain-spinal interfaces, deep brain stimulation, and pacemakers. By integrating the above circuitry onto a chip, the protection and rapid recovery issues of the on-chip acquisition front-end under high-voltage stimulation can be resolved, thereby improving the chip's reliability and signal acquisition continuity.

[0082] In the above chip embodiment, the chip performs the following process during operation:

[0083] When the chip is in the acquisition state, the first switch group 13 (series isolation switches S1, S2, S3, S4) is closed, the second switch group 14 (parallel short-circuit switches S5, S6) is open, and the reset switch is open.

[0084] In this state, the weak physiological signals (microvolt to millivolt level neural signals) picked up by the acquisition electrodes enter the differential input terminal of the low-noise amplifier 11 through closed series isolation switches S1, S2, S3, and S4. After the low-noise amplifier 11 performs pre-amplification of the differential signal, it is transmitted to the low-pass filter 12 through the second switch group 14S5 and S6 (open state, signal passes through). The low-pass filter 12 filters the amplified signal to remove high-frequency noise and out-of-band interference. The filtered signal is finally output to the analog-to-digital converter for sampling and quantization, completing the digital acquisition of the physiological signal.

[0085] When the chip is in the stimulation protection state, the first switch group 13 (series isolating switches S1, S2, S3, S4) is open, the second switch group 14 (parallel short-circuit switches S5, S6) is closed, and the reset switches S3 and S4 are closed.

[0086] In this state, the series disconnect switches S1, S2, S3, and S4 are all disconnected, physically and completely cutting off the signal path between the acquisition electrodes and the low-noise amplifier 11. This blocks the high-voltage stimulation pulses of several volts to tens of volts from coupling into the low-noise amplifier 11 through the electrodes, preventing the low-voltage components inside the low-noise amplifier 11 from being damaged by high voltage. At the same time, the parallel short-circuit switches S5 and S6 are closed, shorting the differential input terminal of the low-noise amplifier 11 to the common-mode reference voltage or ground. This allows the residual polarization charge on the electrodes to be quickly discharged through a low-impedance path, preventing residual charge from affecting subsequent acquisition after stimulation. It also ensures that the differential input terminal of the low-noise amplifier 11 is not in a floating state after the series disconnect switches are disconnected, avoiding uncertain potentials at the input terminal due to coupling with external interference. Meanwhile, the reset switches S3 and S4 are closed, shorting the output terminal of the low-noise amplifier 11 to the inverting input terminal, forcing the low-noise amplifier 11 to switch to unity-gain buffer mode, preventing the internal nodes of the low-noise amplifier 11 from becoming deeply saturated due to overdrive voltage.

[0087] When the stimulation pulse ends, all switches quickly switch back to the acquisition state, that is, the first switch group 13 (series isolation switches S1, S2, S3, S4) closes, the second switch group 14 (parallel short-circuit switches S5, S6) opens, and the reset switches S3 and S4 open.

[0088] During the stimulation protection state: ① the series isolating switch physically isolates the high-voltage pulse, and the low-noise amplifier 11 is not subjected to high-voltage impact; ② the parallel short-circuit switch has completely discharged the residual charge on the electrodes, and the input potential of the low-noise amplifier 11 has returned to the common-mode reference potential; ③ the reset switch has forced the low-noise amplifier 11 into unity-gain buffer mode, and its internal nodes have not entered the deep saturation region. Therefore, at the instant of switching back to the acquisition state, the low-noise amplifier 11 can immediately enter the normal amplification state at the correct DC operating point without experiencing a delay in recovery from the saturation state. This allows the acquisition front end to resume normal acquisition within milliseconds after the stimulation ends, ensuring the continuity and integrity of physiological signal sampling in the stimulation-acquisition alternating working mode.

[0089] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0090] The descriptions of the processes or structures corresponding to the above figures each have their own emphasis. For parts of a process or structure that are not described in detail, please refer to the relevant descriptions of other processes or structures.

[0091] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A signal processing circuit for a data acquisition front-end for stimulus artifact control, characterized in that, include: A low-noise amplifier, a low-pass filter, and a first and second switch group are configured for each acquisition channel; The first switch group is disposed between the low-noise amplifier and the acquisition electrode, and the second switch group is disposed between the differential input terminal of the low-noise amplifier and the common-mode reference voltage or ground; The acquisition front-end signal processing circuit has an acquisition state and a stimulation protection state: In the acquisition state, the first switch group is closed and the second switch group is open, so that the neural signal is output to the analog-to-digital converter after passing through the acquisition electrodes, the first switch group, the low-noise amplifier and the low-pass filter; In the stimulation protection state, the first switch group is open and the second switch group is closed to block the electrical stimulation signal from being transmitted to the low noise amplifier through the acquisition electrode, and the input terminal of the low noise amplifier is shorted to the common mode reference voltage or ground through the second switch group to block crosstalk between the acquisition front-end channels.

2. The acquisition front-end signal processing circuit for stimulus artifact control according to claim 1, characterized in that, The first switch group includes: Four series disconnect switches are respectively set between the differential input terminal of the low-noise amplifier and the acquisition electrode, and are used to disconnect in the stimulation protection state to physically isolate the high-voltage stimulation pulse.

3. The acquisition front-end signal processing circuit for stimulus artifact control according to claim 1, characterized in that, The second switch group includes two parallel short-circuit switches, which are disposed between the differential input terminal of the low-noise amplifier and the common-mode reference voltage or ground, for closing in the stimulated protection state to short-circuit the input terminal of the low-noise amplifier to a low impedance potential, discharge residual charge on the electrodes and prevent the input terminal from being left floating.

4. The acquisition front-end signal processing circuit for stimulus artifact control according to claim 1, characterized in that, The acquisition front end also includes two reset switches, located between the output terminal and the inverting input terminal of the low-noise amplifier. These switches are used to close in the stimulation protection state, short-circuiting the output terminal and the inverting input terminal of the low-noise amplifier, forcing the low-noise amplifier to switch to unity-gain buffer mode to avoid deep saturation of the internal nodes of the low-noise amplifier due to overdrive voltage; and to open in the acquisition state, allowing the low-noise amplifier to operate in normal amplification mode.

5. The acquisition front-end signal processing circuit for stimulus artifact control according to claim 1, characterized in that, The data acquisition front end also includes: An adjustable gain amplifier is connected to the output of the low-noise amplifier and is used to adjust the gain of the signal output by the low-noise amplifier.

6. The acquisition front-end signal processing circuit for stimulus artifact control according to claim 5, characterized in that, The data acquisition front end also includes: An interstage isolation switch is located between the output terminal of the low-noise amplifier and the input terminal of the adjustable gain amplifier. It is used to disconnect in the stimulation protection state to block the residual influence of the high-voltage stimulation pulse from being transmitted to the adjustable gain amplifier; and to close in the acquisition state to allow the signal output by the low-noise amplifier to be transmitted to the adjustable gain amplifier.

7. The acquisition front-end signal processing circuit for stimulus artifact control according to claim 6, characterized in that, The adjustable gain amplifier is a capacitively coupled programmable gain amplifier; a pseudo-resistor is connected between the input terminal of the capacitively coupled programmable gain amplifier and the common-mode voltage to provide a stable DC bias path for the adjustable gain amplifier when the interstage isolation switch is open.

8. The acquisition front-end signal processing circuit for stimulus artifact control according to claim 5, characterized in that, The low-pass filter is connected between the output of the adjustable gain amplifier and the input of the analog-to-digital converter, and is used to filter the signal amplified by the adjustable gain amplifier.

9. A signal processing method for a data acquisition front-end for stimulus artifact control, applied to the circuit described in any one of claims 1 to 8, characterized in that, The method includes: During the acquisition state, the first switch group is closed and the second switch group is opened, so that the physiological signal is output to the analog-to-digital converter after passing through the acquisition electrode, the first switch group, the low-noise amplifier and the low-pass filter. In the stimulation protection state, the first switch group is opened and the second switch group is closed to block the electrical stimulation signal from being transmitted to the low noise amplifier through the acquisition electrode. The differential input terminal of the low noise amplifier is shorted to the common mode reference voltage or ground through the second switch group to discharge the residual charge of the electrode and prevent the input terminal from being floating.

10. A chip, characterized in that, include: The acquisition front-end signal processing circuit for stimulus artifact control as described in any one of claims 1 to 8.

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