Probe load compensation based analog circuit testing method

Abstract

The application discloses a probe load compensation-based analog circuit test method and belongs to the field of analog circuit test and measurement compensation. In order to solve the problem that the node response is distorted and the real impedance drift is covered due to the probe load, the application identifies the undetected transfer response and the node output impedance through joint identification of multiple load responses, and forms a joint uncertainty domain. When the normal and detectable abnormal impedance interpretation coexist, the independent verification load is selected according to the separability of the complex response ratio prediction set, the prediction is frozen, and the actual load is loaded when the test conditions are consistent and the calibration is applicable, so that the measured response ratio and the complete forward residual are verified. Within the effective and verified frequency band, the restored response and the impedance characteristics are compared jointly, and the technical effect of limiting the load misjudgment and retaining the impedance drift evidence is realized.

Description

Technical Field

[0001] This invention relates to the field of analog circuit testing and measurement compensation, and in particular to an analog circuit testing method based on probe load compensation. Background Technology

[0002] Analog circuit board level testing involves connecting probes and measurement channels to test nodes to acquire the amplitude, phase, and time response of the nodes to specified stimuli, which is used to check gain, bandwidth, and dynamic performance. The probe input resistance, input capacitance, and connecting wires constitute an additional electrical load, which, together with the node output impedance, can change the measured response; in particular, capacitive loading affects the amplitude and phase of high-frequency components and alters the timing characteristics of signal edges.

[0003] In circuits with high input impedance and weak signals, the sensitivity of a node to an additional load depends on its output impedance and operating state. Different test nodes cannot simply use the same compensation coefficient. If the judgment is made only based on the amplitude or settling time after the probe is connected, the loading effect may be interpreted as a decrease in gain or a slow response. If only the waveform is recovered without retaining the identification results of the output impedance, the drift of the actual device parameters may be masked by the compensation process.

[0004] Furthermore, due to limited measurement accuracy and shared calibration errors, multiple sets of undetected responses and output impedances may simultaneously interpret the acquired load response. The fitting residuals from the same set of data alone are insufficient to form independent evidence of model validity; if a load is directly added without confirming consistent test conditions and the applicability of calibration, time drift or contact changes may be mistakenly interpreted as impedance anomalies. Therefore, it is necessary to incorporate nodal response recovery, impedance interpretation differentiation, and physical verification conditions into the testing process.

[0005] Therefore, there is a need for an analog circuit testing method based on probe load compensation that can overcome the shortcomings of the existing technology. Summary of the Invention

[0006] One objective of this invention is to propose a test method for analog circuits based on probe load compensation. Addressing the problems in existing technologies where probe loading alters node responses, uniform compensation struggles to adapt to differences in node impedance, and waveform recovery may mask true impedance drift, this invention proposes a technical solution that acquires multiple calibrated load responses under consistent test conditions, jointly identifies undetected transmitted responses and frequency-dependent output impedances, and propagates measurement and calibration errors. When normal impedance interpretations and abnormal impedance interpretations reaching the detectable drift lower limit coexist, the invention utilizes a complex response ratio prediction set that eliminates common undetected responses to select independent verification loads, freezes the identification results and measurement plane predictions, and, under consistent test conditions and applicable calibration, verifies the loading relationship using measured response ratios and complete positive residuals. Finally, the invention jointly compares the recovered response and impedance characteristics. This invention effectively distinguishes between loading disturbances and device parameter changes, reduces loading false alarms, and limits unreliable deterministic conclusions.

[0007] This invention provides a method for testing analog circuits based on probe load compensation, comprising: S1, under consistent test conditions, acquiring the response and excitation reference of the same test node under multiple calibrated additional loads, and obtaining a load response set through channel compensation and coherent normalization; S2, based on the loading relationship formed by the undetected transfer response through the node output impedance and total additional admittance, jointly identifying the undetected transfer response and frequency-dependent node output impedance, and propagating measurement and calibration errors to obtain a joint uncertainty region; S3, selecting a verification load from the calibrated candidate loads that have not participated in the current fitting, wherein the joint uncertainty region simultaneously includes a normal interpretation that conforms to the independently established acceptable impedance range and a deviation from the range that reaches a preset acceptable range. When detecting anomalies in the lower limit of drift, the common undetected transmitted response is eliminated by the ratio of the candidate load response to the reference load response. The set of complex response ratio predictions for the two types of interpretations is selected based on the separability of the measurement error. S4: Freeze the identification results and the measurement plane prediction of the verification load. Apply the verification load when the test conditions are consistent and the calibration is applicable. The measured response ratio is formed by the verification response and the corresponding reference response. Combine the complete positive prediction residual to check the loading relationship and eliminate incompatible interpretations. S5: Only in the frequency bands where the identification is valid and the verification is passed, remove the total additional admittance of the test attachment to recover the undetected response. Compare the recovered response characteristics with the retained node output impedance characteristics to the independently established qualified characteristic range, and output qualified, abnormal, or uncertain.

[0008] Optionally, S1 includes: connecting test nodes one by one to keep the power supply, bias settings, original functional load and repeated test stimuli of the analog circuit under test consistent under each load condition.

[0009] Using the node contact surface as the calibration reference surface, the total additional admittance formed by the probe, switching network, and connecting wires in each state, as well as the complex transfer function of the measurement channel from the node contact surface to the acquisition end, are invoked.

[0010] Multiple calibrated additional loads include a reference load, a conductance variation load, and a capacitance variation load, with a reserved validation load not currently involved in the fitting.

[0011] Synchronously acquire node responses and excitation references, use the complex transfer function of the measurement channel to compensate for amplitude and phase, normalize at coherent frequency points according to the excitation reference, and associate load status, sampling time and calibration records to form a load response set;

[0012] Furthermore, the total additional admittance of each load state within the test band is calibrated using traceable impedance standards, and the complex transfer function of the measurement channel is calibrated under the same node contact reference surface and connection configuration.

[0013] The calibration log contains complex calibration values ​​for each state, frequency, applicable connection configuration, and correlation of cross-state shared calibration errors;

[0014] Before loading, the actual connection configuration is checked against the calibration record. If the arrangement of the connecting wires, the switching of network connections, or the probe contact structure changes and exceeds the calibration applicable configuration, the load response set is recalibrated and re-acquired.

[0015] Optionally, S2 includes: representing the additional load response at each frequency point as the sum of the undetected transferred response divided by the product of the node output impedance and the total additional admittance of the corresponding state, and establishing a joint identification model with the set of load responses;

[0016] The undetected transfer response and node output impedance are determined by weighted fitting, while maintaining their correlation. Repeated measurement error and shared calibration error are propagated according to a preset coverage probability, forming a joint uncertainty domain that simultaneously constrains both.

[0017] Identifiability is tested based on the rank and condition number of the identification matrix, and whether each state conforms to a common undetected transmitted response and node output impedance is checked based on bias stability, repetitive response consistency and nonlinear distortion, thus forming an effective frequency band for verification and anomaly detection.

[0018] Furthermore, based on the repeated measurement samples, the joint error between the node response and the excitation reference is estimated. Combined with the calibration records formed by the total additional admittance of each state and the calibration values ​​of the complex transfer function of the measurement channel and related errors, a joint error sample is constructed across load states and across frequency points.

[0019] Each propagation uses the same error to achieve the calibration error shared by all states. Repeated measurement errors are jointly sampled according to actual correlation and refitted to obtain paired parameter samples of undetected transmission response and node output impedance, which are then used to construct a joint uncertainty domain according to a preset coverage probability.

[0020] The validity conditions are: the identification matrix is ​​full column rank, the number of condition numbers after column normalization does not exceed the upper limit of the preset number of condition numbers, and the amplitudes of the excitation reference and the reference response used for comparison exceed the lower limit determined by the noise floor. Frequency points that do not meet the validity conditions are excluded.

[0021] The upper limit of the condition number is determined based on the allowable amplification factor of the parameter error, and the thresholds for bias stability, repeatability consistency, and nonlinear distortion are determined based on the allowable operating point variation, repeatability error, and distortion limits specified in the test procedure.

[0022] Optionally, S3 includes: based on the qualified impedance range established independently of the current circuit under test, classifying the parameter interpretations in which the node output impedance within the joint uncertainty domain belongs to the qualified impedance range into the normal interpretation, classifying the parameter interpretations in which the distance from the node output impedance to the qualified impedance range reaches the detectable drift lower limit into the abnormal interpretation, and retaining the parameter interpretations in between as the uncertainty band.

[0023] The distance is calculated using the impedance characteristic coordinates and unit normalization scale specified in the test procedure. The drift lower limit can be detected and determined before the test based on the impedance change corresponding to the allowable device parameter offset and the measurement resolution.

[0024] For each candidate load, the sum of the products of the node output impedance and the total additional admittance of the reference load is divided by the sum of the products of the node output impedance and the total additional admittance of the candidate load. The parameter ranges and calibration errors of the normal interpretation and the abnormal interpretation are propagated respectively, resulting in two sets of complex response ratio predictions.

[0025] The ratio of the shortest distance between two sets of complex response ratio predictions to the response ratio measurement error bound is used as the separability index, and a verification load that meets the preset separability threshold is selected.

[0026] When the joint uncertainty domain does not simultaneously contain both types of interpretations, positive prediction verification is performed using a reserved calibrated load that is not currently involved in the fitting, and verification is not substituted for the absence of interpretation ambiguity;

[0027] Furthermore, when selecting the verification load, for all candidate loads to be retained for interpretation within the joint uncertainty domain, the response disturbance, bias change, node voltage, load current, and magnitude of the denominator of the loading relationship caused by the candidate load are examined. Only candidate loads whose response disturbance and bias change do not exceed the allowable values ​​specified in the test procedure, whose node voltage and load current do not exceed the rated boundaries of the circuit under test and the test accessories, and whose denominator magnitude is not lower than the preset nonsingularity lower limit are included in the selection.

[0028] The real and imaginary parts of the complex response ratio are normalized according to the covariance of the response ratio measurement error. The prediction set spacing and response ratio measurement error bound are calculated in the same normalized coordinates. The candidate load that satisfies the separability threshold and has the largest separability index is selected.

[0029] The separability threshold is determined before testing based on the preset error coverage probability and the allowable misjudgment probability. When no candidate load meets the threshold, two interpretations are retained and uncertainty is output. The judgment conclusion is not forcibly obtained by increasing the disturbance beyond the rated boundary.

[0030] Optionally, S4 includes: saving the current identification result, joint uncertainty domain and verification load prediction before applying the verification load, wherein the verification load prediction includes a set of complex response ratio predictions and a complete set of positive response predictions obtained by mapping the undetected transferred response to the acquisition end through the loading relation, the complex transfer function of the measurement channel and the excitation reference.

[0031] Keeping the probe contacts unchanged, the response and bias under the reference load, verification load and reference load are measured sequentially. Only when the difference between the reference response and the bias difference do not exceed the consistency threshold determined by the repeatability error and the allowable operating point offset, the reference response after channel compensation and coherent normalization is interpolated according to the sampling time, so as to form the measured response ratio by dividing the verification load response by the interpolated reference response.

[0032] The compatibility of each interpretation is determined by the compatibility of the measured response ratio with the complex response ratio prediction set of each interpretation, and by verifying whether the residual of the measured response at the load acquisition end relative to the complete positive response prediction set falls within the error bound of the preset coverage probability. The joint uncertainty domain corresponding to the compatible interpretation is retained.

[0033] If the baselines are inconsistent, all interpretations are incompatible, the normal and abnormal interpretations are incompatible after triggering ambiguous verification, or there is no available verification load, the verification is deemed to have failed, and the deterministic judgment conclusion is not based on the current verification measurement output.

[0034] Optionally, S5 includes: propagating the joint uncertainty domain retained after verification to the undetected response and node output impedance characteristics when the total additional admittance is zero, wherein the total additional admittance only includes the test accessory load connected this time, and the original functional load is retained;

[0035] The amplitude and phase of the undetected response are extracted, and the settling time is extracted when the time reconstruction condition is met. Together with the node output impedance characteristics, they form the features to be judged and their uncertainty range.

[0036] The acceptable characteristic range is established before testing based on independent acceptable sample measurements or circuit design tolerances, and specifies the mandatory test nodes, frequency bands, and indicators;

[0037] Output "Pass" when the uncertainty range of all mandatory inspection features falls within the corresponding pass range; output "Abnormal" when the uncertainty range of at least one validly identified and verified mandatory inspection feature does not intersect with the corresponding pass range; output "Uncertain" in all other cases.

[0038] Output the corresponding node and indicator along with the determination result;

[0039] No qualification shall be output when mandatory inspection features are missing or verification is not completed;

[0040] When the impedance interpretation cannot yet be classified as a normal interpretation or an abnormal interpretation, an indeterminate result is output for the impedance indicator; unless an abnormality is confirmed by other valid and verified mandatory inspection indicators, the overall output is indeterminate, the reason is recorded for the node to be retested and re-acquisition is performed, and after reaching the preset retest upper limit, an indeterminate result or compensation unavailable is output;

[0041] Further, the time reconstruction conditions include that the excitation has a repeatable time reference, the effective frequency band covers the frequency range required by the settling time indicator, the frequency sampling interval supports the specified observation duration, the phase continuity meets the reconstruction requirements, and the time-domain error introduced by the unmeasured frequency band does not exceed the preset error budget;

[0042] When the time reconstruction conditions are met, combine the undetermined transfer response with the specified test excitation spectrum and perform inverse transform to obtain the time-domain response retaining the original functional load, determine the settling time according to the final value tolerance band and hold duration specified in the test procedure, and obtain the uncertainty range of the settling time through joint uncertainty domain propagation;

[0043] When the time reconstruction conditions are not met, the compensated settling time is not output; if the settling time is a mandatory inspection indicator, the overall determination is restricted to indeterminate, but an abnormal result is still output when an abnormality has been confirmed by other valid and verified mandatory inspection indicators.

[0044] The beneficial effects of the present invention are:

[0045] 1. By invoking the total additional admittance of each state and the complex transfer function of the measurement channel at the node contact reference plane, and performing channel compensation and coherent normalization on the multi-load response, the undetermined transfer response and frequency-dependent output impedance can be identified by node, so that the compensation basis corresponds to the actual test node and accessory configuration, and reduces load misjudgment caused by the fact that the unified coefficient cannot reflect node differences.

[0046] 2. By propagating repeated measurement errors and shared calibration errors, selecting independent verification loads according to the separability of the complex response ratio prediction set when normal and abnormal impedance interpretations coexist, and verifying the measured response ratio and the complete forward residual with the frozen prediction when the test conditions are consistent and the calibration is applicable, new measurement evidence for impedance ambiguity can be obtained; further adopting front-back reference clamping measurement, bias consistency check and time interpolation under the original contact can limit false abnormal interpretations caused by time drift and contact variation.

[0047] 3. By removing the load from the test accessories only within the identified and verified frequency bands, while retaining the original functional load and output impedance characteristics, and by implementing qualified, abnormal, and uncertain judgments based on the uncertainty range, it is possible to avoid equating the recovered waveform with the circuit being qualified; the conclusions on the establishment time that cannot be reliably reconstructed and the limitations of unusable compensation provide a clear basis for subsequent retesting. Attached Figure Description

[0048] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:

[0049] Figure 1 This is an overall flowchart of the analog circuit testing method based on probe load compensation according to the present invention.

[0050] Figure 2 The flowchart for selecting the verification load in S3 of the present invention. Detailed Implementation

[0051] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the invention, and therefore only show the components relevant to the invention.

[0052] refer to Figures 1-2 The analog circuit testing method based on probe load compensation includes: S1. Under consistent test conditions, obtaining the response and excitation reference of the same test node under multiple calibrated additional loads, and obtaining the load response set through channel compensation and coherent normalization; S2. Based on the loading relationship formed by the undetected transferred response through the node output impedance and the total additional admittance, jointly identifying the undetected transferred response and the frequency-dependent node output impedance, and propagating measurement and calibration errors to obtain the joint uncertainty region; S3. Selecting a verification load from the calibrated candidate loads that have not participated in the current fitting, wherein the joint uncertainty region simultaneously includes the normal interpretation that conforms to the independently established qualified impedance range and the deviation from the range that reaches the preset detectable range. When interpreting the anomalies of the lower drift limit, the common undetected transmitted response is eliminated by the ratio of the candidate load response to the reference load response. The set of complex response ratio predictions for the two interpretations is selected based on the separability of the measurement error. S4: Freeze the measurement plane prediction of the identification results and the verification load. Apply the verification load when the test conditions are consistent and the calibration is applicable. The measured response ratio is formed by the verification response and the corresponding reference response. Combine the complete positive prediction residual to check the loading relationship and eliminate incompatible interpretations. S5: Only in the frequency bands where the identification is valid and the verification is passed, remove the total additional admittance of the test attachment to recover the undetected response. Compare the recovered response characteristics with the retained node output impedance characteristics to the independently established qualified characteristic range, and output qualified, abnormal, or uncertain.

[0053] In this specific embodiment, S1 includes:

[0054] The test controller uses the output node of the analog filter stage with the original functional load as the test node. The test excitation is defined as a small signal voltage superimposed on the working bias at the input terminal. The undetected transmission response is the complex ratio of the node voltage to the input excitation when the original functional load is still connected and only the test accessory is not connected. In this specific embodiment, the power supply is set to 5V, the node working bias is set to 2.5V, the excitation effective value is set to 20mV, and the measurement temperature range is set to 23℃ to 27℃. The above settings, along with the board model, node number, and connection status of the original functional load, are written into the test task record. Other nodes execute the same process one by one, and a new task record is created when switching nodes.

[0055] The probe contact, load switching network, and connecting wires are calibrated as a complete set of accessories. The probe contact remains stationary during one identification and verification cycle, and switching occurs only within the accessories. This specific implementation configures three calibrated additional load fitting states, including a reference load, a conductance variation load, and a capacitance variation load. These are, respectively, a reference state with only the probe and connecting network connected, a conductance variation state with a 100kΩ resistor added to the reference state, and a capacitance variation state with a 10pF capacitor added to the reference state. Additionally, a state with a combination of a 47kΩ resistor and a 10pF capacitor, and a state with a 22pF capacitor are configured as two verification candidates. The node response of these two verification candidates is not collected in this round of identification. The total additional admittance of each state includes the probe input admittance, the wire parasitic admittance, and the switching parasitic admittance, and cannot be replaced by the nominal admittance of the added components.

[0056] Calibration personnel connect a traceable impedance standard with a calibration certificate to the same reference plane as the node contact, and use an impedance analyzer to perform open-circuit, short-circuit, and load calibrations. The complex amplitude of the current measured at the test frequency point for each accessory state is divided by the complex amplitude of the applied voltage to obtain the real and imaginary parts of the total additional admittance, in Siemens units. A calibrated voltage source and a reference receiving channel on the same reference plane are used, and the reference plane voltage and the acquisition terminal voltage are recorded simultaneously. The complex ratio of the two gives the complex transfer function of the measurement channel. The amplitude and phase error of the reference receiving channel itself is corrected according to the calibration certificate. The test excitation reference channel is separately calibrated to the circuit input reference plane, and subsequent excitation references all refer to the input terminal voltage after this calibration correction.

[0057] The controller reads the frequency, load state number, connection configuration number, total additional admittance complex value, channel complex transfer function, reference channel correction value, effective temperature range, standard uncertainty, and related error model from the accessory calibration library. The calibration error model uses the errors of the shared impedance standard, shared time base, and shared reference receiving channel as shared components, and the remaining error of each switch as state components. It maintains correlation with the shared source number and cross-frequency covariance matrix. When the certificate gives the coverage uncertainty, it is first converted to standard uncertainty according to the attached coverage factor. When only the bounded tolerance is given, it is entered according to the distribution specified in the certificate. For bounded tolerances without a specified distribution, it is entered according to the rectangular distribution and the assumption is retained.

[0058] The calibration certificate and sensitivity record are matched with the shared source number. The standardized random quantity of each source is first multiplied by its standard uncertainty, and then the sensitivity corresponding to each state and frequency point is superimposed on the real and imaginary parts of the calibration complex value. The correlation random vector is calculated by decomposing the correlation matrix according to the eigenvalues. The direction of the eigenvalue zero is kept fixed. If a negative eigenvalue exceeding the rounding tolerance occurs, the calibration record is rejected and re-verified. The calibration sample is not forcibly generated by arbitrarily deleting relevant items.

[0059] In this specific implementation, the calibration library is configured with an attachment of approximately 1 MΩ total parallel resistance and approximately 12 pF total parallel capacitance for the reference state at low frequency. The nominal values ​​are used for selection and calibration rationality verification. During operation, the complex measured calibration values ​​are read frequency by frequency. A calibration record uses the attachment number, connection configuration number, reference state and 10 kHz as the search key, and saves the real part of admittance, the imaginary part of admittance, the channel gain, the channel phase and the shared source number. When no completely matching key is found, reading stops. If the actual wire layout, switching connection, probe contact structure exceeds the record configuration, the calibration value is not borrowed from the cross configuration. Instead, the calibration is recalibrated, the calibration version is upgraded and the old load response set of the task is discarded.

[0060] The acquisition module selects coherent frequency points from 1kHz to 100kHz with 1kHz intervals and applies sinusoidal excitation frequency-wise. The dual channels share a 1MHz sampling clock, and 10,000 points are collected for each segment. After each state stabilizes, 20 segments are collected. After switching, wait for no less than 5ms and continuously check the bias window until the average bias difference of three consecutive 1ms windows does not exceed 1mV before starting acquisition. If it still does not stabilize after waiting for 20ms, stop the current round. The fitted state is cycled 20 times in the order of reference, conductance change, and capacitance change. Each segment saves the absolute sampling time, excitation cycle number, bias mean, node original waveform, reference original waveform, and overload position. The repeated samples across states are aligned with the cycle number. The power supply deviation of the whole round does not exceed 10mV. The original functional load and excitation settings are not switched.

[0061] After removing the DC mean for each segment, the controller performs a Discrete Fourier Transform on the integer period records, extracts the complex amplitude value at the excitation frequency using the same RMS scale, and calculates... ;in This represents the dimensionless complex response corresponding to the load state after channel compensation and coherent normalization, and is used as a calculation field for the load response set. This represents the complex amplitude value of the voltage at the acquisition node in this state, in volts (V), derived from the Fourier coefficients of synchronous sampling. This represents the complex transfer function of the measurement channel from the node contact surface to the acquisition end, which is dimensionless and derived from the matched frequency point and the configured calibration record. This indicates that the state has been calibrated to the complex amplitude of the excitation voltage at the input reference plane, in volts (V), and originates from the synchronization reference channel. The value represents the dimensionless load state index, which is the number of the three fitted states in this round; the division is performed only when the same frequency calibration value is used at each frequency point, the channel transfer function magnitude is not less than 0.1 and the excitation amplitude is greater than 10 times the standard deviation of the same frequency noise when the excitation is turned off;

[0062] For sampling segments that are saturated, have lost reference lock, have incomplete sampling points, or have mismatched channel calibration keys, the controller retains the original record and the cause of failure but does not treat them as valid repeat samples. If any state has less than 20 segments, the entire round is resampled to avoid using samples with different time coverage between states. When the excitation is turned off and the same sampling settings are maintained, 20 noise records are collected to establish the noise floor of the node and reference. In addition to the main frequency complex amplitude, normal sampling segments also retain the effective values ​​of the second to fifth harmonics, the time-domain clipping value, and the offset mean. Harmonics that exceed the acquisition analog bandwidth are not included in the distortion acceptance judgment. The corresponding frequency points are checked by a distortion detection channel with an analog bandwidth of not less than 1MHz.

[0063] When calculating the error statistics based on 20 rounds of synchronous samples, first subtract the mean of each real and imaginary component from the mean of the 20 rounds, then multiply the centered components pairwise, accumulate them, and divide by 19 to form the covariance of a single round of samples; the mean covariance of independent cycles is then divided by 20. If the correlation test of adjacent cycles exceeds the predetermined 99% zero correlation acceptance threshold, then the mean covariance is re-estimated by re-sampling continuous cycle blocks, without applying the reduction by dividing by 20 for independent cycles. The correlation model between cycles, along with the covariance, is saved to the load response set.

[0064] Filter 20 complete records according to the same state and frequency, calculate the average of the real part and the imaginary part respectively, and retain the complete 20-round repeating sequence without replacing the error sample with the average value; the load response set is associated with the original node and reference complex amplitude value, channel compensation value, normalized complex response, noise record, bias record and calibration version by using task number, node number, frequency, state number and cycle number as joint keys. The fitting flag is only set to be valid for three fitting states. The controller writes the set into the local measurement data area and passes it to S2. The reserved candidate calibration records are passed with the set but without the candidate measured node response.

[0065] In this specific embodiment, S2 includes:

[0066] The identification module reads the S1 load response set and uses three fitted states under the same node, frequency, and test conditions to form an identification unit. The original functional load is kept connected as the internal boundary of the circuit under test. The model adopts the small-signal Thevenin equivalent of the node, that is, the test accessory is only loaded through the calibrated parallel admittance of the node. The gain and output impedance inside the node remain unchanged before and after the state switch. The output impedance refers to the equivalent output impedance observed at the node when the small-signal component of the independent excitation is set to zero and the original functional load is retained. If the accessory introduces non-negligible coupling to the input or power supply, the collected data does not conform to the single-port model, and the additional coupling is not interpreted as an impedance compensation term.

[0067] The loading relationship of each identification unit is as follows: ;in This represents the same-frequency normalized complex response read from S1, which is dimensionless. This represents the undetected transitive response to be identified, which is dimensionless. This represents the complex output impedance of the node to be identified, in Ω. This represents the total additional admittance of the test attachment for this state, in units of s, taken from the same-frequency calibration record. The dimensionless fitting state index is used to traverse the three fitting states. The undetected transfer response and output impedance are shared by all states at the same frequency point and are identified separately with frequency. The product of impedance and admittance is dimensionless. This parameter is not used when the loading denominator modulus is less than 0.2. The lower limit of the denominator modulus is preset in the test procedure as the reciprocal of the allowable amplitude amplification factor of 5.

[0068] The identification module performs weighted fitting with four real parameters, which are the real and imaginary parts of the undetected transmission response and the output impedance, respectively. The difference between the measured complex response and the predicted complex response under load for each state is arranged in order of real and imaginary parts to form a six-dimensional residual vector. The real number obtained by multiplying the residual vector by the inverse of the repeated measurement mean error covariance matrix and then multiplying it by its transpose is used as the weighted squared loss. The minimum value is found by nonlinear least squares iteration in the trust region. The weights only bear the weight of repeated measurement errors. The calibration error is propagated in subsequent joint resampling to avoid the same calibration error being counted repeatedly. The covariance unit is dimensionless square, and the loss is dimensionless. In the case of singularity or ill-conditioned conditions, a fixed contraction is performed by adding 5% of the diagonal covariance to 95% of the sample covariance. The contraction rule and the lower limit of the noise variance are locked before this round of fitting.

[0069] The initial values ​​are obtained by rearranging the loading relationship and then performing complex linear least squares. The initial values ​​are fitted to the rearranged matrix. The first column of each row of the matrix is ​​1, the second column is the negative value of the product of the measured complex response and the total additional admittance, and the right end is the measured complex response. The initial values ​​of the undetected transfer response and the output impedance are obtained directly from this. The linear solution is only used for initialization and not as the final error model. During iteration, the undetected transfer response of 1 and the impedance of 1000Ω are used as the parameter scaling scale. At the same time, the initial values ​​are re-solved from the linear initial value and the initial values ​​of the real and imaginary parts of the impedance, which are offset by ±100Ω respectively. The maximum number of iterations is 200. Convergence is judged when the relative change of adjacent objective functions is less than one millionth and the change of normalized parameters is less than one hundred thousandth. Multiple compatible solutions are retained as independent branches. Solutions are not selected based on their proximity to the acceptable range.

[0070] The module divides each column of the aforementioned complex identification matrix by the L2 norm of that column, and uses singular value decomposition to check for full column rank and condition number. The second singular value must exceed one hundred millionth of the first singular value, and the column normalized condition number must not exceed 100. In this specific implementation, the relative magnitude control target of the repetition error is set to one-thousandth, and the allowable first-order parameter error amplification target is set to one-tenth. The upper limit of the condition number is determined by the ratio of the two. Then, the actual joint uncertainty range is used to determine whether it is sufficient to identify the anomaly. A qualified condition number does not necessarily mean that the uncertainty range meets the requirements. The whitened Jacobian matrix of the loading prediction is calculated using four scaling real parameters. This matrix must also be full column rank. If the numerical rank is not satisfied, the solution does not converge, or the modulus of the baseline complex response does not exceed 10 times the standard deviation obtained from the propagation of nodal noise, the frequency point is marked as invalid identification.

[0071] Error propagation maintains the correlation between the original node voltage and the excitation reference. The repeated error vector is constructed using all load states, all frequency points, and the real and imaginary components of the dual-channel complex amplitude in the same cycle. The repeated measurement error is jointly sampled according to the actual correlation. The entire round vector is resampled with replacement in a block auto-sampling. When the cycles are independent, 20 complete cycles are sampled each time and the average is recalculated. When there is correlation between cycles, the continuous cycle blocks saved in S1 are resampled. The block length is determined by the lag after the first correlation coefficient enters the 99% zero correlation acceptance boundary. When the length of a single round is insufficient to form at least five blocks, the number of repeated rounds is expanded and resampled. The reference noise and node noise or different frequency points cannot be independently separated. Each propagation generates a set of calibration errors from the joint distribution specified in the calibration library. Only one random realization is generated for the same shared error source. The saved sensitivity and correlation matrix are applied to all states, all frequencies, and two reserved candidates. The state-specific components are generated according to the remaining correlation blocks. Channel compensation, normalization, and weighted fitting are re-executed to obtain the paired undetected transfer response and output impedance and candidate calibration values ​​under the same realization.

[0072] This specific implementation first generates 10,000 joint error realizations, saving the complete cross-frequency parameter trajectory, shared source realizations, candidate and reference calibration parameters for each realization. Frequency points are connected according to the same realization number, and arbitrary recombination of independent marginal intervals of undetected transfer response and output impedance is prohibited. The joint uncertainty domain is formed by empirical joint distribution based on these paired samples. Within each convergence branch, parameters and calibration latent variables are centered and covariance whitened. An ellipsoidal domain is formed using a predetermined coverage quantile of the whitening distance, and the union of each branch domain is taken. Non-random and fixed calibration parameters do not occupy random dimensions, and variables with hard boundaries intersect with their hard boundaries. The ellipsoid preserves the covariance direction and parameter correlation; subsequent extrema and set determinations are performed on the continuous domain rather than just checking sample points.

[0073] The test procedure sets the total error coverage target for a single task to 99%, sets the uncovered probability budget for the joint identification and calibration domain to 0.4%, sets the verification error budget to 0.4%, and reserves the remaining 0.2% for verification of the numerical and time-domain truncation budgets. The joint domain uses a 99.6% coverage quantile, sorted in ascending order of whitening distance, and selects the quantile threshold as the distance of the number of samples multiplied by 0.996 and rounded up. Simultaneous coverage domains are formed using the whitening distance of the same joint trajectory on all mandatory detection frequencies. The empirical coverage value is an approximation under the adopted repetition error and calibration distribution model. The controller uses another 10,000 independent errors to check the quantile and output range, and then increases the sample size exponentially until the difference between the upper and lower bounds of the mandatory features obtained from the two batches does not exceed one-tenth of their respective judgment tolerances, up to a maximum of 160,000 times. If it is not stable, the task is included in the retest. The coverage ratio of a limited sample is not regarded as unconditional accuracy.

[0074] Each load state must also pass a common working state check. The controller reads the bias difference, repetition error, and harmonic data from S1. The average bias difference between states is specified to be no more than 2mV. The deviation between the repeated complex response and its mean value in the same state shall not exceed the 99.6% simultaneous error boundary determined in advance by 20 rounds of stable sampling noise. The square root of the sum of squares of the second to fifth harmonics divided by the effective value of the fundamental wave shall not exceed 0.1%. Distortion detection uses the corresponding frequency amplitude after the node contact surface is calibrated. The synchronous harmonic record of the excitation source is used to exclude the source itself from exceeding the standard. If the source harmonic exceeds the standard, the excitation source shall be corrected and then resampled. Compensation shall not continue. During the initial configuration confirmation, the entire round is repeated with a 10mV excitation. The difference of the normalized response is compared with the combined error boundary of the two rounds to verify the consistency of the small signal. The 20mV formal measurement data is still in a separate round. It is reconfirmed after the configuration is changed.

[0075] The identification module uses the model residuals to determine whether they are within the preset 99.6% threshold, and combines the repeatability error bound, rank, condition number, bias stability, repeatability consistency, and nonlinear distortion to form a frequency validity indicator. If any necessary check fails, the frequency point is excluded. The valid frequency points are compiled into a list of valid frequency bands for use by S3 and S4. The identification result record saves the parameter center, branch number, joint domain expression, paired sample index, calibration latent variable relationship, fitting residual, and failure reason. If a key frequency point is missing, interpolation between neighboring points is not used to fabricate a valid result. S5 limits the final conclusion based on the missing information.

[0076] In this specific embodiment, S3 includes:

[0077] The load selection module reads the S2 identification result record, the joint uncertainty domain, and the calibration record of the reserved candidates in S1, and completes the screening before applying any verification load. The acceptable impedance range is established before testing by scanning the allowable tolerance of the circuit design parameters and measuring the impedance of independent qualified boards. The independent impedance measurement uses a separately calibrated micro-current injection and voltage measurement method, retaining the same power supply, bias, node, and original functional load boundaries as the current task. Its data does not include the load response of the current board under test. The reference range record uses the board model, node, operating conditions, and frequency as keys, and saves the allowable range of the real and imaginary parts, coordinate scale, detectable drift lower limit, mandatory attributes, and procedure version. The current measurement can only be queried and cannot be reversed to adjust the acceptable boundary.

[0078] This specific implementation uses the real and imaginary parts of impedance to form a two-dimensional feature coordinate system, with each coordinate normalized to a scale of 10Ω. In the 10kHz record of node A, the acceptable real part range is set to 900Ω to 1100Ω, and the imaginary part range is set to -50Ω to 50Ω. Other frequency points retain the range obtained from the design tolerance analysis. Unregistered frequency points are not fitted with the acceptable range from the current sample. The distance to the rectangle is obtained by calculating the shortest distance between the real part and the real part interval, and between the imaginary part and the imaginary part interval, dividing each distance by the corresponding 10Ω scale, summing the squares, and taking the square root. The single coordinate distance within the interval is taken as zero, so the final distance is dimensionless.

[0079] In this specific implementation, the detectable drift lower limit is set to a normalized distance of 2, corresponding to an out-of-range deviation of at least 20Ω for a single coordinate. This value is determined before testing based on the minimum impedance change caused by the allowable component parameter offset and the resolution confirmed by independent measurement. If the required detectable drift is less than the actual resolution, this configuration does not claim to be able to detect the drift. Parameters falling within the qualified rectangle in the joint domain are marked as normal, parameters with an out-of-range distance of 2 are marked as abnormal, and interpretations with a distance greater than zero but less than 2 are retained in the uncertainty band. Boundary equality signs are handled according to normal boundaries and abnormal lower limits, respectively. The original undetected transfer response and calibration latent variables are retained by category, and the correlation of parameters corresponding to the same impedance is not discarded. Cross-frequency interpretations are saved along the same trajectory.

[0080] For mandatory frequency points that are not empty in both normal and abnormal interpretations, the module calculates the candidate complex response ratio relative to the baseline. ;in This represents the ratio of the nodal normalized complex response of the candidate load to that of the baseline load, and is dimensionless. This represents the nodal output impedance carried within the joint domain at the current frequency point, in Ω. This represents the total additional admittance at the reference state at that frequency, in units of s. This represents the total additional admittance for the candidate state at this frequency point, in units of S. Both admittances are obtained from the calibration latent variables and calibration records associated with this interpretation. Represents a dimensionless candidate load index, traversing the two reserved states in this round, with the index... The fixed label representing the reference state is not applicable in terms of dimensions, as it only serves as a state identifier and is fixedly assigned by the reference state record of this round; the division uses the undetected transit response common to both states to eliminate the gain degree of freedom, and before the comparison, the reference response is still required to meet the lower limit of S2 amplitude, and the candidate loading denominator modulus value is required to be not less than 0.2;

[0081] The module substitutes the normal and abnormal interpretation domains, along with the calibration latent variables, into the complex response ratio to obtain two continuous prediction sets. The prediction sets include the changes caused by identification and shared calibration, without adding random noise from future new samples in advance. Based on the S1 repetition error model and the predetermined baseline, candidate, and baseline sampling times during verification, it jointly simulates three samplings and complex interpolation to establish the covariance of the real and imaginary parts of the new measurement complex response ratio error. The covariance corresponding to the candidate is used to perform the same whitening transformation on the real and imaginary coordinates, and then the shortest Euclidean distance between the two prediction sets is calculated in the coordinates. When there is a noise zero direction in the covariance, the quantization and noise variance lower limit measured with the excitation off are used to make it positive definite. This lower limit is also included in the error simulation. The separability cannot be artificially increased by reducing the variance lower limit.

[0082] In the same whitening coordinate system, the quantile of the new measurement error modulus, which is simultaneously covered by 99.6%, is used as the response ratio measurement error radius. The quantile is calculated by taking the maximum standardized modulus of each error realization for all predetermined candidates, frequency points, and verification comparison items, thereby including candidate selection within the error coverage range. The shortest distance between the two prediction sets is divided by this radius to obtain the separability index. The radius must be positive. The index is zero when the prediction sets intersect. The larger the index, the easier it is for the two interpretations to be distinguished by independent measurements. In this specific implementation, the threshold is set to 2.2. The value of 2 corresponding to the sum of the two error radii is exceeded, and a margin of 0.2 is left. In the pre-simulated joint error, it is checked that the probability of false exclusion does not exceed the allocated budget of 0.4%. Configurations that do not meet the budget are not enabled for deterministic ambiguity discrimination.

[0083] Before comparing separability, the module interprets all elements to be retained in the joint domain, including uncertain band interpretations, and checks the node response disturbance, bias change, total peak node voltage, and accessory current after the candidate is applied. The response disturbance is calculated by dividing the magnitude of the difference between the candidate and the reference node complex voltage by the magnitude of the reference node complex voltage. In this specific implementation, the upper limit is allowed to be 15%, and the denominator still uses the noise lower limit protection. The DC bias change is calculated using the DC output resistance range measured separately at the same operating point, the accessory DC admittance, and the node DC voltage according to the same parallel loading relationship. Its uncertainty range is given by the DC measurement record. The upper limit of the bias change is 2mV. Candidates lacking DC records are not selected. A single frequency point of AC impedance cannot be used to replace the DC output resistance.

[0084] In this specific implementation, the node voltage boundary is set to 0.2V to 4.8V, and the allowable current for the accessory is set to 0.5mA. Simultaneously, the allowable output current of the board node is read, and the minimum current boundary between the two is used in practice. The lower limit of the valley value obtained by subtracting the upper limit of the AC effective value multiplied by the square root of 2 from the lower limit of the DC voltage range of the candidate node after loading is verified to be no less than 0.2V. The upper limit of the peak value obtained by adding the upper limit of the AC effective value multiplied by the square root of 2 to the upper limit of the DC voltage range is verified to be no more than 4.8V. The accessory current is connected through the node voltage and various states. The total admittance is obtained by multiplying the values ​​of the currents at each frequency, and then superimposed with the upper limit of the absolute value of the DC branch current. Switching adopts a disconnect-then-close approach. The switching transient boundary is pre-checked based on the worst transient envelope within the voltage range of the node, as specified in the calibrated attachment. The lower voltage envelope must not be lower than 0.2V and the upper envelope must not be higher than 4.8V. Candidates without a suitable envelope are not loaded. During operation, hardware overcurrent or overvoltage occurs, and the system exits and records the verification failure. For any candidate whose interpretation exceeds the disturbance, bias, or rated boundary, or whose denominator modulus is lower than 0.2, the reason for elimination is saved and the candidate is deleted.

[0085] The shortest distance and safety boundary of continuous sets are calculated using interval branching and delimiting. Starting from the outer box of the joint domain, the subdivision is performed according to the longest normalized edge. Sub-boxes that do not intersect with the ellipsoidal domain and category constraints are discarded. The response ratio and voltage and current envelope range are calculated by interval complex multiplication and division. The candidate is declared to meet the requirements only when the lower bound of the shortest distance exceeds the required distance of the threshold and the upper and lower envelopes of all safety quantities meet the corresponding boundary constraints. The difference between the upper and lower bounds of the numerical values ​​is terminated with a precision of 1% of the whitening error radius. Each candidate can be subdivided into a maximum of 100,000 sub-boxes per frequency point. If the upper limit is reached but it cannot be proven that the requirements are met, it is treated as unverifiable and uncertain. The minimum distance of finite sampling is not used to replace the shortest distance between continuous sets.

[0086] For multi-frequency tasks, the candidate score is the minimum separability index of all valid frequencies with normal and abnormal ambiguities. The safe candidate with the largest minimum value that meets the threshold is selected. When the scores are the same and within 1% of the numerical accuracy of the error radius, the candidate with the smallest upper bound of the response disturbance is selected first, and then the candidates are selected in ascending order of their numbers. If no candidate meets the threshold, both interpretations are retained and the uncertainty reason is written to S5, without increasing the load beyond the rated boundary. If the joint domain does not contain both interpretations at the same time, a candidate is still selected from the safe reserved candidates by number to perform positive prediction verification. This candidate cannot participate in the current fitting. The load selection record saves the ambiguity triggering state, the reason for the elimination of each candidate, the final load number, whitening transformation, error radius, separability lower bound, and calibration version and is handed over to S4.

[0087] In this specific embodiment, S4 includes:

[0088] Before issuing the load switching command, the verification module reads the S2 identification results and S3 load selection records, freezes the model branches, complete joint uncertainty domain, calibration version, error model, candidate number, and complex response ratio prediction set for each frequency point, and associates the frozen file with the original measurement by task number and content summary; the complete forward prediction uses the input excitation complex amplitude value set in S1 and the planned verification sampling time as known inputs, and uses the amplitude and phase error envelope of repeated excitation as the predetermined input uncertainty to form the acquisition end response prediction set. After verification, only the measured reference is checked to see if it falls within the frozen input envelope, without refitting the model or expanding the prediction set with new node responses;

[0089] Complete positive prediction at the acquisition end ;in This represents the predicted complex amplitude of the acquisition node voltage under candidate load, in volts (V). The subscript indicates... This indicates the prediction label; the units are not applicable because it only marks the model's predicted values ​​and is a fixed identifier for this method. Indicates the selected candidate indexes that are dimensionless. This represents the dimensionless complex transfer function of the channel from the node contact surface to the acquisition end. This indicates that the undetected transitive response is frozen within the joint domain; it is dimensionless. This represents the input excitation reference complex amplitude value at the planned verification time, in units of V, derived from the frozen envelope formed by the set excitation and the S1 repetition reference error. This represents the output impedance of the node paired with the undetected transmitted response, in Ω. The candidate total additional admittance is expressed in S; the channel and admittance use the same joint domain to interpret the carried calibration latent variable, the denominator modulus must not be less than 0.2, and the predicted value multiplied by the channel and input excitation is on the same measurement plane as the actual acquisition terminal voltage;

[0090] The module interprets the same parameters and simultaneously generates response ratio prediction and complete positive prediction at the acquisition end. It merges and saves the real and imaginary parts of the two predictions into a single prediction record, establishes a parameter interpretation index, and saves the two marginal sets without losing their pairing relationships. The joint error of the two predictions is propagated by repeated S1 samples, frozen inputs, and calibration latent variables. Candidate random sampling noise is only added once in the new measurement error bound. When calibration uncertainty is already reflected in the prediction interpretation domain, it is no longer added as independent noise. The correlation caused by the same candidate voltage participating in both the response ratio and the complete positive residual must be retained. The compatibility threshold is set by the joint whitening modulus of the four-dimensional residuals of the real and imaginary parts and the envelope of the single error.

[0091] Before actual loading, the power supply, bias settings, functional load, excitation, temperature, and connection configuration are checked again to ensure they are consistent with the freeze record. The controller keeps the probe contacts unchanged and completes three-segment measurements in the order of reference load, selected verification load, and reference load. Each segment uses the same sampling rate, coherent record length, and 20-segment repetition strategy as S1, and saves the sampling midpoint time, bias, and complex amplitude value of each frequency point. The midpoint time of the three measurements at the same frequency must be strictly incremented, and the verification time is located between the two reference times. Extrapolation to replace clamping is not allowed. The scanning task completes the three-state clamping test at each frequency point before moving to the next frequency point, and interpolation is performed using the references before and after the same frequency.

[0092] The module first compares the reference complex response before and after compensation and coherent normalization of its respective channels. The difference is judged by the 99.6% simultaneous consistency error boundary obtained by the propagation of the S1 repeated sampling error. At the same time, it is required that the difference between the offsets before and after does not exceed 2mV and that both offsets are within the allowable range of the original working offset. The random part of the consistency threshold is determined by the repeated error of the stable clamp test before verification. The allowable operating point offset of 2mV is the fixed upper limit of the procedure and shall not be relaxed due to the increase of the difference between the two sides. If any item fails, the clamp test result of this round is invalidated.

[0093] When the preceding and following references are consistent, for each frequency point, the time interval between the verification midpoint and the preceding reference midpoint, divided by the time interval between the following reference midpoint and the preceding reference midpoint, is used as the interpolation weight. The weight is dimensionless and strictly between zero and one. The preceding reference complex response is multiplied by one and the weight is subtracted, and the following reference complex response is multiplied by the weight. The two complex numbers are then added together to obtain the reference response at the verification time. The real and imaginary parts are interpolated with the same weight, and phases with integer jumps are not directly interpolated. The measured complex response ratio is formed by dividing the verification response after channel compensation and coherent normalization by the interpolated reference response. Verification at that frequency point is stopped when the modulus of the interpolated reference response is less than 10 times its noise standard deviation.

[0094] Error propagation involves joint sampling of the preceding and following benchmarks and candidate segments based on actual correlation, reusing the same calibration shared source as the frozen prediction, and propagating the interpolation error with the same time weight. Before testing, a three-state clamp test is performed with a stable reference node to evaluate the residual curvature error envelope of the linear interpolation. The envelope and the repetition error are included in the frozen response ratio measurement error bound. If the clamp test duration exceeds the applicable duration of the envelope or if the consistency before and after the test is passed but the operating state exceeds the applicable range, the verification is still considered to have failed. This avoids treating the situation where the before and after are the same but nonlinear drift occurs in the middle as error-free.

[0095] For each frozen parameter interpretation, the module calculates the difference between the measured complex response ratio and the predicted complex response ratio of that interpretation, and calculates the difference between the candidate measured acquisition voltage and the complete positive predicted voltage of the same interpretation. It checks whether the response ratio difference is within the whitening error radius saved in S3 and whether the acquisition voltage residual is within the predetermined complex voltage error envelope. Then, it combines the real and imaginary parts of the two residuals into a four-dimensional vector, requiring that their joint whitening modulus be within the predetermined 99.6% simultaneous error boundary. The corresponding threshold is covered by the same verification error budget of S3 for all frequency points and comparison items. Only the same parameter and calibration interpretation that simultaneously meet all checks are retained. It is not allowed to declare compatibility by having one parameter interpretation pass the response ratio and another interpretation pass the positive residual.

[0096] The retention operation of the joint domain is to freeze the intersection of the domain and the compatibility constraint. The controller uses the S3 interval branching and delimiting method to retain the intersecting subdomains and delete the subdomains that can be proven to be incompatible. Boundary subdomains that cannot be clearly determined by numerical values ​​are conservatively retained. If the accuracy fails to meet the requirements of subsequent deterministic determination, it is recorded as uncertain. If the benchmarks before and after are inconsistent, all interpretations are incompatible, both normal and abnormal interpretations are incompatible after triggering the ambiguity verification, or there is no available verification load, it is marked as verification failed. Among them, the remaining uncertain interpretation cannot make the triggered ambiguity verification pass. If the normal and abnormal interpretations are still compatible at the same time, it is recorded that the loaded model is compatible but the ambiguity is not eliminated. The relevant impedance index remains uncertain. The model incompatibility is not written as abnormal and has been excluded.

[0097] When ambiguity verification has been triggered and at least one normal or abnormal interpretation is compatible with the frozen prediction, and other necessary checks have passed, or when ambiguity verification has not been triggered and at least one frozen interpretation has passed all entity verification checks, the verification module writes a verification pass flag for the corresponding valid frequency point, and saves the retained joint domain, remaining category, consistency results of the previous and subsequent benchmarks, interpolation weights, measured ratios, complete positive residuals and their shared parameter indexes for S5 propagation and judgment; when ambiguity verification has not been triggered and only the uncertain band interpretation is compatible, the model verification flag is still passed, the impedance classification remains uncertain, and S5 determines whether it is abnormal or overall uncertain based on other valid and verified mandatory indicators at the same frequency; tasks that have not been ambiguity triggered still need to complete the above entity loading and double residual checks. The verification data is only used for the screening of the domain in this round and is not incorporated into the fitting in this round. If the load is used for a new round of identification in the future, the calibration state that has not participated in the new fitting must be reserved for re-verification. If it cannot be reserved, the process ends and compensation is recorded as unavailable.

[0098] In this specific embodiment, S5 includes:

[0099] The judgment module reads the reserved joint domain and frequency-by-frequency verification records saved in S4, intersects them with the effective frequency band list in S2, and filters frequencies according to dual flags, only compensating for frequencies that are simultaneously marked as both valid and verified. During calculation, the total additional admittance of the attachments in this test is set to zero, so that the output of the loaded model is directly equal to the undetected transfer response of this interpretation. The original functional load is not in the zeroing object, and the output impedance continues to correspond to the same power supply, bias and original functional load boundary. The zeroing is an attachment removal operation in the model, retaining the original probe measurement and actual state number in order to trace the source of each recovery result.

[0100] The module will retain the complex amplitude and phase of the joint domain propagated one by one to the undetected transmitted response. The amplitude is calculated as the square root of the sum of the squares of the real and imaginary parts, which is dimensionless. The phase is converted to an angle using a two-parameter arctangent, and the value is based on the continuous phase branch of the test procedure. When the domain crosses zero amplitude or the distance to zero amplitude is less than the lower limit determined by noise, no bounded phase conclusion is output. At other frequency points, the phase change is expanded according to the continuity of the adjacent frequency. If the only expanded branch cannot be proved, all feasible branches are retained and the phase index is marked as uncertain. The real and imaginary parts of the impedance interpreted by the same parameter are retained simultaneously, with the unit being Ω. It is forbidden to use the recovery gain to meet the requirements to replace the impedance index check.

[0101] The minimum and maximum values ​​of each feature are calculated using the verified continuous joint domain to form the uncertainty range of each item. The outer envelope is obtained by interval branching and delimitation, following the S3 numerical accuracy and undetermined boundary retention principle. If the procedure uses gain in decibels as the indicator, the dimensionless amplitude is multiplied by 20 after taking the logarithm to the base 10. When the amplitude is zero, the logarithm is not performed and the indicator is marked as unusable. The interval logarithmic transformation is only performed when the lower bound of the amplitude is positive. When the phase spans an integer cycle, the continuous branches are compared instead of forcibly combining two separation angle intervals into a narrow interval. The output record saves both the original complex domain and the display interval, ensuring that the boundary judgment is performed by the unrounded value.

[0102] In this specific implementation, the formal task lists the 10kHz gain, phase, and impedance real and imaginary parts of node A as mandatory inspection features. In the design specifications, the dimensionless gain acceptable range for this frequency point is set to 0.95 to 1.05, the phase range is set to -8° to -2°, and the impedance range is set to 900Ω to 1100Ω and -50Ω to 50Ω, which are independently established using S3. These values ​​are the preset acceptance parameters of this specific implementation, derived from the design tolerance and the measurement specifications of independent qualified samples, and do not indicate that the corresponding measured results have been obtained in this task. Other mandatory inspection nodes or frequencies are read item by item according to the keys recorded in the same range. If the record is missing, there is a version conflict, or the working conditions are incompatible, the mandatory inspection feature is marked as missing. It is forbidden to deduce the acceptable range from the board under test itself.

[0103] When the setup time is separately registered as a mandatory indicator, the controller first checks the time reference, effective frequency coverage, frequency interval, phase continuity, and unmeasured frequency band error estimate. In this specific implementation, the 1kHz to 100kHz sinusoidal scan lacks DC and the complete frequency coverage required to meet the specified step reconstruction; therefore, the compensated setup time is not output by default. If the current procedure requires this indicator, it enters an uncertain branch. To perform the setup time task, the procedure sets up a dedicated coherent scan: including DC and frequency points from 0.5kHz to 500kHz, spaced 0.5kHz apart, with a dual-channel sampling rate of 10MHz, each segment originally acquiring 20,000 points, covering 2ms. This dedicated setting covers the 10,000-point setting of S1, ensuring that 0.5kHz and its integer multiples of the frequency cover integer periods. The S4 clamp test of this dedicated task uses the same 10MHz and 20,000-point original record length, and follows the 20-segment repetition strategy. The calibration record, noise record, and error budget are all re-established or verified for applicability according to the dedicated sampling settings. The original number of acquisition points and the reconstruction grid are recorded separately. The reconstruction equivalent sampling rate is 1MHz and the number of transformation points is 2000, forming a reconstruction record with a 2ms period. All newly added frequency points are re-executed from S1 to S4 and meet the same calibration, validity, and verification conditions. Extended interpolation cannot replace measurement.

[0104] The dedicated time task uses a repeatable, band-limited step test excitation, with high and low levels each held for 1ms within a 2ms period. The level change is set to 20mV, and the spectrum of the edge is obtained from the excitation reference measurement calibrated to the input surface. The DC point is used to perform multi-load identification and independent verification with a small DC increment. The 2.5V operating bias cannot be used as a small-signal DC transfer response. If the DC increment is too large and causes inconsistency in the operating state, the point is invalid. The negative frequency is filled with conjugate symmetry according to the real signal. The imaginary part of the DC and Nyquist points should be within the corresponding error limits. The node time response is multiplied by the specified excitation spectrum by the undetected transfer response explained by each cross-frequency pairing, and then the inverse transformation is performed according to the discrete Fourier convention of forward transformation without scaling and inverse transformation divided by 2000. The unit of the resulting incremental voltage is V. Finally, the independently stored node bias is superimposed.

[0105] The inverse transformation is only performed when the time reconstruction conditions are met. Specifically, before time reconstruction, the upper bound of the unmeasured frequency band transfer gain is obtained from the circuit design under the original functional load boundary. This upper bound is multiplied frequency-by-frequency by the measured amplitude of the specified excitation in the unmeasured frequency band and then summed according to the upper bound of the inverse transformation amplitude. For the continuous tail of higher frequencies, the upper bound of the attenuation of the specified excitation filter is used for integration to form the time-domain truncation error envelope. This envelope must not exceed 0.2% of the step change. The combined sampling, calibration, interpolation, truncation, and numerical voltage error envelope must not exceed 0.5% of the step change. If this budget cannot be proven or any key effective frequency point is missing, no settling time determination is made. A 0.5kHz interval corresponds to a 2ms observation period. It is also required that the design or independent measurement confirms that the node response returns to the stable band before the next edge and meets the consistency of the beginning and end of the period. Otherwise, the period is lengthened, the frequency interval is reduced, and the entire process is retested. The foldback waveform of the circular convolution is not used as the settling time.

[0106] The setup time is set to zero at the rising edge of the trigger, and the final value is the average value of the last 100μs of the reconstructed high-level segment. The tolerance band for the final value is ±2% of the step change. Starting from each 1μs sampling moment after the rising edge, the system checks for the earliest entry into the tolerance band, which remains for at least 100μs thereafter and does not leave the band until the next falling edge. If the holding condition is not met, the finite setup time is not output. The waveform envelope obtained by continuous joint domain propagation is simultaneously added to the unmeasured frequency band and reconstruction error. The setup time is taken for each feasible waveform according to the same rule, and then the time range covering all feasible results is taken. The time discretization is extended outward by a 1μs sampling interval. If the earliest entry time of the envelope cannot be confirmed, the upper and lower bounds or uncertain flags are retained. The interval is not replaced by the single setup time result of the parameter mean waveform.

[0107] The determination is based on the first check of the mandatory features that have been effectively identified and verified by the physical load: if any such feature's uncertainty range does not intersect with the independent acceptable range, an anomaly is output, and the node, frequency point, index, and non-intersecting boundary are marked; the impedance index is further classified according to S3 drift. If the retained impedance domain still contains uncertain band interpretations, or if normal interpretations and abnormal interpretations coexist, the impedance index remains uncertain. An impedance anomaly cannot be output simply because it is outside the acceptable range but has not reached the detectable drift lower limit. A definite impedance anomaly is formed only when the entire domain belongs to the abnormal interpretation and the corresponding mandatory impedance feature range does not intersect with the acceptable range; if other valid and verified mandatory indicators have been confirmed as abnormal, the anomaly conclusion is not revoked even if the impedance is unresolved or the establishment time is missing.

[0108] When no anomalies have been confirmed, the output is qualified only if all mandatory inspection nodes, frequency bands, and indicators have been effectively identified and verified, all uncertain ranges are included in the corresponding qualified ranges, and all impedance interpretations are normal interpretations. Equal boundaries are treated as inclusion. Uncertainty is output when the range partially intersects with the qualified range, falls only into the impedance uncertainty band, two types of impedance interpretations still coexist, mandatory inspection features are missing, verification fails, or the mandatory inspection establishment time reconstruction conditions are not met. A judgment record simultaneously saves the total result, item-by-item results, recovered amplitude and phase range, impedance range, applicable status of time indicators, procedure version, and joint field index. Rounding of displayed values ​​is not included in range comparison.

[0109] For uncertain nodes, the controller categorizes the causes as sampling failure, inapplicable calibration configuration, insufficient effective frequency points, indivisible candidates, and model verification failure. For the first two categories, the entire process is resampled after re-acquisition or recalibration. For other cases, the contact and excitation are re-checked according to the established procedures, and a new task version is started. Old records are saved in read-only mode. In this specific implementation, each node can be subjected to a maximum of two rounds of complete retesting. Each round retains the verification load independently. If the judgment condition is not met even after reaching the upper limit, the output is uncertain. For nodes where the model and calibration conditions are consistently inapplicable, compensation is noted as unavailable. The result of a round that is close to qualified is not selected to overwrite the result of the previous round. Finally, all node judgment records formed by this analog circuit test method based on probe load compensation and the original load response index are written into the test result file.

[0110] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

[0111] This invention uses a calibrated additional load change as the node identification input, and processes the undetected transmission response and node output impedance as relevant parameters. While removing only the total additional admittance of the test accessory and retaining the original functional load, the recovered response corresponds to the node response without the test accessory under the same power supply, bias setting, functional load, and test stimulus. The output impedance is then used as a distinguishing feature independent of the waveform appearance for comparison within the acceptable range.

[0112] By introducing ambiguity-triggered physical load verification between joint identification and final discrepancy determination, the selection criterion for verification load shifts from a fixed configuration to the distinguishability of two types of impedance interpretations under measurement error. By first freezing the model and predictions, and then actually loading the load under consistent test conditions and applicable calibration, the added measurement can be used to eliminate incompatible interpretations. When the load is indivisible, test conditions are inconsistent, or verification fails, uncertain conclusions are retained, thus limiting compensation discrepancies without independent evidence. Using the original probe contact's reference load, verification load, reference load measurement, and time interpolation further limits the impact of drift during measurement on interpretation elimination.

Claims

1. A method for testing analog circuits based on probe load compensation, characterized in that, include: S1. Under consistent test conditions, obtain the response and excitation reference of the same test node under multiple calibrated additional loads, and obtain the load response set after channel compensation and coherent normalization. S2. Based on the loading relationship formed by the undetected transfer response through the node output impedance and the total additional admittance, the undetected transfer response and the frequency-dependent node output impedance are jointly identified, and the measurement and calibration errors are propagated to obtain the joint uncertainty region; S3. A verification load is selected from the calibrated candidate loads that have not participated in the current fitting. When the joint uncertainty region contains both a normal interpretation that meets the independently established acceptable impedance range and an abnormal interpretation that deviates from the range to the preset detectable drift lower limit, the common undetected transfer response is eliminated by the ratio of the candidate load response to the reference load response. The selection is based on the separability of the complex response ratio prediction set of the two interpretations relative to the measurement error. S4. Freeze the measurement plane prediction of the identification results and verification load. Apply the verification load when the test conditions are consistent and the calibration is applicable. The measured response ratio is formed by the verification response and the corresponding reference response. Combine the complete positive prediction residual to check the loading relationship and eliminate incompatible interpretations. S5. Only in the frequency band where the identification is valid and the verification is passed, remove the total additional admittance of the test accessory to recover the undetected response. Compare the recovered response characteristics with the retained node output impedance characteristics to the independently established qualified characteristic range, and output qualified, abnormal or uncertain.

2. The analog circuit testing method based on probe load compensation according to claim 1, characterized in that, S1 includes: Connect the test nodes one by one, and keep the power supply, bias settings, original functional load and repeated test stimuli of the analog circuit under test consistent under each load condition. Using the node contact surface as the calibration reference surface, the total additional admittance formed by the probe, switching network, and connecting wires in each state, as well as the complex transfer function of the measurement channel from the node contact surface to the acquisition end, are invoked; multiple calibrated additional loads include reference load, conductance variation load, and capacitance variation load, and verification loads not involved in the current fitting are reserved; The node response and excitation reference are acquired synchronously. The amplitude and phase are compensated using the complex transfer function of the measurement channel. The load response is normalized at the coherent frequency point according to the excitation reference and associated with the load state, sampling time and calibration record to form a load response set.

3. The analog circuit testing method based on probe load compensation according to claim 1, characterized in that, S2 includes: The additional load response at each frequency point is represented as the sum of the undetected transport response divided by the product of the node output impedance and the total additional admittance of the corresponding state. A joint identification model is established using the set of load responses. The undetected transport response and node output impedance are determined by weighted fitting, maintaining their correlation. Repeated measurement errors and shared calibration errors are propagated according to a preset coverage probability to form a joint uncertainty domain that simultaneously constrains both. Identifiability is verified based on the rank and condition number of the identification matrix. Furthermore, the bias stability, repeatable response consistency, and nonlinear distortion are used to check whether each state conforms to a common undetected transport response and node output impedance, forming an effective frequency band for verification and anomaly detection.

4. The analog circuit testing method based on probe load compensation according to claim 1, characterized in that, S3 includes: based on the acceptable impedance range established independently of the current circuit under test, parameter interpretations where the node output impedance within the joint uncertainty domain falls within the acceptable impedance range are classified as normal interpretations; parameter interpretations where the distance from the node output impedance to the acceptable impedance range reaches the detectable drift lower limit are classified as abnormal interpretations; and parameter interpretations in between are retained as the uncertainty band. The distance is calculated using impedance characteristic coordinates and unit normalization scales pre-defined in the test procedure. The detectable drift lower limit is determined before testing based on the impedance change corresponding to the allowable device parameter offset and the measurement resolution. For each candidate load, a... The sum of the products of the node output impedance and the total additional admittance of the reference load is divided by the sum of the products of the node output impedance and the total additional admittance of the candidate load. The parameter ranges and calibration errors of the normal and abnormal interpretations are propagated respectively, resulting in two sets of complex response ratio predictions. The ratio of the shortest distance between the two sets of complex response ratio predictions to the response ratio measurement error boundary is used as the separability index, and the verification load that meets the preset separability threshold is selected. When the joint uncertainty domain does not contain both interpretations at the same time, the reserved calibrated load that has not participated in the current fitting is used to perform forward prediction verification, and the absence of interpretation ambiguity is not used to replace verification.

5. The analog circuit testing method based on probe load compensation according to claim 1, characterized in that, S4 includes: saving the current identification result, joint uncertainty domain, and verification load prediction before applying the verification load. The verification load prediction includes a complex response ratio prediction set and a complete positive response prediction set obtained by mapping the undetected transferred response to the acquisition end via the loading relationship, the complex transfer function of the measurement channel, and the excitation reference. Keeping the probe contact unchanged, the response and bias under the reference load, verification load, and reference load are measured sequentially. Only when the difference between the reference response and the bias difference before and after the verification load do not exceed the consistency threshold determined by the repeatability error and the allowable operating point offset, respectively, the reference response before and after the verification load is calculated according to the sampling time after channel compensation and coherent normalization. Complex time interpolation should be performed to verify that the load response divided by the interpolated baseline response forms the measured response ratio. The compatibility of the measured response ratio with the complex response ratio prediction set of each interpretation, and whether the residual of the load measured acquisition terminal response relative to the complete positive response prediction set falls within the error bound of the preset coverage probability, are used to jointly determine whether each interpretation is compatible, and the joint uncertainty domain corresponding to the compatible interpretation is retained. If the baselines before and after are inconsistent, all interpretations are incompatible, the normal interpretation and the abnormal interpretation are incompatible after triggering the ambiguity verification, or there is no available verification load, the verification is judged as unsuccessful, and the deterministic judgment conclusion is not based on the current verification measurement output.

6. The analog circuit testing method based on probe load compensation according to claim 1, characterized in that, S5 includes: propagating the joint uncertainty domain retained after verification to the undetected response and node output impedance characteristics when the total additional admittance is zero, wherein the total additional admittance only includes the test accessory load connected this time, and the original functional load is retained; extracting the amplitude and phase of the undetected response, and extracting the settling time when the time reconstruction condition is met, and forming the characteristics to be judged and their uncertainty range together with the node output impedance characteristics; the qualified characteristic range is established before the test based on independent qualified sample measurement or circuit design tolerance, and the mandatory nodes, frequency bands and indicators are specified; when the uncertainty range of all mandatory characteristics falls into the corresponding qualified range, the output is qualified; when the uncertainty range of at least one validly identified and verified mandatory characteristic does not intersect with the corresponding qualified range, the output is abnormal; in other cases, the output is uncertain; the corresponding node and indicator are output according to the judgment result; when the mandatory characteristic is missing or not verified, the output is not qualified; when the impedance interpretation cannot be classified into normal interpretation or abnormal interpretation, the output of the impedance indicator is uncertain; unless other valid and verified mandatory indicators confirm the abnormality, the overall output is uncertain; the reason for the node to be retested is recorded and re-acquired; after reaching the preset retest upper limit, the output is uncertain or compensation is unavailable.

7. The analog circuit testing method based on probe load compensation according to claim 2, characterized in that, The total additional admittance of each load condition in the test band is calibrated using traceable impedance standards, and the complex transfer function of the measurement channel is calibrated with the same node contact reference surface and connection configuration. The calibration record includes the complex calibration values, frequencies, applicable connection configurations, and correlations of cross-state shared calibration errors for each condition. Before loading, the actual connection configuration is checked against the calibration record. If the arrangement of the connecting wires, the switching of network connections, or the probe contact structure changes and exceeds the calibration applicable configuration, the load response set is recalibrated and re-acquired.

8. The analog circuit testing method based on probe load compensation according to claim 3, characterized in that, Based on the repeated measurement samples, the joint error between the node response and the excitation reference is estimated. Combined with the calibration record formed by the total additional admittance of each state and the calibration value of the complex transfer function of the measurement channel and the related error, a joint error sample is constructed across load states and across frequency points. Each propagation uses the same error to achieve the calibration error shared by all states. Repeated measurement errors are jointly sampled according to actual correlation and refitted to obtain paired parameter samples of undetected transmission response and node output impedance, which are then used to construct a joint uncertainty domain according to a preset coverage probability. The validity conditions are: full column rank of the identification matrix, the number of conditional numbers after column normalization not exceeding the preset upper limit of the number of conditional numbers, and the amplitudes of the excitation reference and the reference response used for comparison exceeding the lower limit determined by the noise floor. Frequency points that do not meet the validity conditions are excluded. The upper limit of the number of conditional numbers is determined according to the allowable parameter error amplification factor. The thresholds for bias stability, repeatability consistency, and nonlinear distortion are determined according to the allowable operating point variation, repeatability error, and distortion limit specified in the test procedure.

9. The analog circuit testing method based on probe load compensation according to claim 4, characterized in that, When selecting the verification load, examine the response disturbance, bias change, node voltage, load current and the magnitude of the denominator of the load relationship caused by all candidate loads to be retained in the joint uncertainty domain. Only candidate loads whose response disturbance and bias change do not exceed the allowable values ​​specified in the test procedure, whose node voltage and load current do not exceed the rated boundaries of the circuit under test and the test accessories, and whose denominator magnitude is not lower than the preset nonsingularity lower limit are included in the selection. The real and imaginary parts of the complex response ratio are normalized according to the covariance of the response ratio measurement error. The prediction set spacing and response ratio measurement error boundary are calculated in the same normalized coordinates. The candidate load that meets the separability threshold and has the largest separability index is selected. The separability threshold is determined before testing based on the preset error coverage probability and the allowable misjudgment probability. If no candidate load meets the threshold, two interpretations are retained and uncertainty is output. The judgment conclusion is not forcibly obtained by increasing the disturbance beyond the rated boundary.

10. The analog circuit testing method based on probe load compensation according to claim 6, characterized in that, The time reconstruction conditions include: the excitation has a repeatable time reference; the effective frequency band covers the frequency range required for the establishment time index; the frequency sampling interval supports the specified observation duration; the phase continuity meets the reconstruction requirements; and the time domain error introduced by the untested frequency band does not exceed the preset error budget. When the time reconstruction conditions are met, the undetected transferred response is combined with the specified test excitation spectrum and an inverse transform is performed to obtain the time domain response that retains the original functional load. The establishment time is determined according to the final value tolerance band and hold duration specified in the test procedure, and the establishment time uncertainty range is obtained through joint uncertainty domain propagation. When the time reconstruction conditions are not met, the compensated establishment time is not output. When the establishment time is a mandatory inspection index, the overall judgment is restricted to uncertainty. However, if the abnormality has been confirmed by other valid and verified mandatory inspection indexes, the abnormality is still output.

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