Wide voltage adaptive and anti-transient interference dc power supply power failure detection system and method

Abstract

The application relates to the power management technical field and discloses a wide-voltage self-adaptive and anti-transient interference DC power failure detection system and method. The system comprises a voltage division, isolation delay and microcontroller module; a main input end is connected with a wide-voltage fluctuation random input DC power source, a series anti-backflow diode is connected between the wide-voltage fluctuation random input DC power source and an internal voltage reduction module, and an energy storage filter capacitor is connected in parallel with an input end of the voltage reduction module; after the microcontroller module is powered on, voltage is continuously collected to obtain a steady-state analog-digital conversion reference value, a mapping table of multiple wide-voltage working areas is addressed according to the mapping table, and a corresponding drop trigger analog-digital conversion threshold value is dynamically obtained; during a running stage, a de-extreme value average filtering is performed on real-time readings, if the real-time readings are lower than the threshold value, a power failure interruption is triggered, a capacitor delay power supply is utilized, an external load is turned off, an external communication module is driven to send an alarm message and data is solidified. The application realizes wide-voltage self-adaptation and orderly shutdown.

Description

Technical Field

[0001] This invention relates to the field of power management technology, specifically to a DC power failure detection system and method with wide voltage adaptive and transient interference resistance. Background Technology

[0002] DC power failure detection is a fundamental function in the power management module of electronic devices, primarily used to trigger the device's internal protection mechanism when an external power supply fails. Existing power failure detection solutions typically employ a fixed voltage divider resistor network combined with a voltage comparator or analog-to-digital converter pin of a microcontroller with a fixed threshold. This architecture, using fixed hardware parameters and a single software threshold, requires manual replacement of the voltage divider resistor values ​​or modification of the decision threshold in the program when facing input power supplies of different voltage levels. This design cannot adapt to a wide range of input voltages, increasing the workload of material setup and maintenance in multi-voltage application scenarios.

[0003] In complex electrical environments, power supply networks are often accompanied by high-frequency transient electromagnetic interference or brief voltage spikes. Existing detection schemes mostly rely on directly comparing the acquired real-time voltage value with a set threshold, lacking a hardware-software co-processing mechanism for transient interference. When a brief transient spike occurs at the input, the voltage at the detection pin can easily drop below the fixed threshold, causing the system to misjudge and trigger unnecessary shutdowns, affecting the continuity of equipment operation. Furthermore, when a real power outage occurs, the system input voltage decays rapidly, and conventional detection circuits typically lack power isolation and delay maintenance mechanisms. After detecting a voltage drop, the microcontroller quickly loses its operating voltage, unable to solidify and store current operating data or send communication alarms to the outside world before power failure, easily leading to the loss of critical equipment status data. Summary of the Invention

[0004] To address the shortcomings of existing technologies, this invention provides a DC power failure detection system and method with wide voltage adaptability and transient interference resistance. This solves the problems of existing DC power failure detection schemes being unable to adapt to wide voltage inputs and lacking transient interference resistance and power failure delay mechanisms, which easily lead to false power failure judgments and loss of critical operating data.

[0005] To achieve the above objectives, the present invention provides the following technical solution: The first aspect of the present invention provides a DC power failure detection system with wide voltage adaptive and transient interference resistance, including a voltage divider module, an isolation delay module and a microcontroller module.

[0006] The DC power failure detection system connects to a random input DC power supply with wide fluctuation range at its main input terminal. A reverse-current protection diode is connected in series between the main input terminal and the input terminal of the internal buck module. An energy storage filter capacitor is connected in parallel to the input terminal of the internal buck module, with the other end of the capacitor connected to system ground. The reverse-current protection diode prevents reverse loss of internal stored charge to the input terminal when the main power supply drops. The energy storage filter capacitor maintains power supply to the internal buck module and microcontroller module during the power failure delay period. A voltage divider module is connected between the main input terminal and the reverse-current protection diode. Its output is connected to an isolation delay module, and the output of the isolation delay module is connected to the analog-to-digital converter pin of the microcontroller module. The signal control pins of the microcontroller module are connected to an external wireless communication module and an external load module, respectively.

[0007] The voltage divider module attenuates the voltage at the main input terminal of the system by proportionally reducing the impedance of the first and second resistors connected in series, forming a voltage divider node. The isolation delay module includes a unidirectional isolation device, a signal filtering capacitor, and a discharge regulating resistor. The unidirectional isolation device conducts the voltage at the voltage divider node in one direction and generates a forward voltage drop. The signal filtering capacitor and the discharge regulating resistor adjust the charging and discharging rate of the sampling node to filter out transient spikes at the input terminal. After power-on, the microcontroller module temporarily delays the activation of the external load module and continuously collects multiple sets of voltage sampling data. The voltage fluctuation amplitude is monitored by performing range or variance calculations on the data.

[0008] When the range or variance is less than a preset hardware tolerance threshold, the microcontroller module calculates the arithmetic mean of multiple sets of data and uses it as the steady-state analog-to-digital conversion (ADC) reference value. The microcontroller module combines the resistance ratio parameter, forward voltage drop parameter, and steady-state ADC reference value to calculate the physical input voltage value and records it in its internal storage. Then, using the steady-state ADC reference value as a search condition, the microcontroller module reads a pre-defined mapping lookup table from the non-volatile memory. This mapping lookup table is pre-divided into multiple wide-voltage operating regions, and each wide-voltage operating region is bound to a pre-calculated drop-triggered ADC threshold. The drop-triggered ADC threshold corresponding to the current voltage region is extracted and written to the internal threshold register.

[0009] During system operation, the microcontroller module periodically reads the real-time analog-to-digital conversion (ADC) values ​​from the isolation delay module and performs an extreme value removal and averaging filter operation to obtain a filter sampling reference value. The microcontroller module then performs an integer comparison between the filter sampling reference value and the drop-triggered ADC threshold value in its internal threshold register. When the filter sampling reference value falls below the drop-triggered ADC threshold value, the microcontroller module triggers a power-down protection interrupt. During the delayed power supply provided by the energy storage filter capacitor, the microcontroller module outputs a shutdown signal to the external load module, drives the external wireless communication module to send an offline alarm message, and stores the operating status data in non-volatile memory.

[0010] The second aspect of the present invention provides a DC power failure detection method with wide voltage adaptive capability and resistance to transient interference, which is applied to the aforementioned DC power failure detection system.

[0011] After the system is connected to a random input DC power supply with wide fluctuations and powered on, the microcontroller module temporarily delays the activation of the external load module. It then acquires multiple sets of voltage sampling data output from the isolation delay module via the analog-to-digital conversion (ADC) pin. The microcontroller module performs range or variance calculations on these multiple sets of voltage sampling data. When the range or variance is less than a preset hardware tolerance threshold, it calculates the average value of the multiple sets of voltage sampling data as the steady-state ADC reference value. Based on the resistance ratio parameters of the voltage divider module, the forward voltage drop parameters of the isolation delay module, and the steady-state ADC reference value, the microcontroller module calculates the physical input voltage value and stores it in its internal storage. The microcontroller module uses the steady-state ADC reference value to access a pre-defined mapping lookup table in its internal non-volatile memory. This mapping lookup table is pre-divided into multiple wide-voltage operating regions, and each wide-voltage operating region is bound to a pre-calculated drop-triggered ADC threshold. The microcontroller module obtains the drop-triggered ADC threshold corresponding to the current voltage region and writes it into its internal threshold register.

[0012] After the system enters the operational phase, the microcontroller module periodically acquires the real-time analog-to-digital conversion (ADC) readings output by the isolation delay module. The microcontroller module performs an extreme value removal and averaging filter operation on the real-time ADC readings to obtain a filtered sampling reference value. It then performs an integer comparison operation between this filtered sampling reference value and the drop-triggered ADC threshold value in its internal threshold register. When the filtered sampling reference value falls below the drop-triggered ADC threshold value, the microcontroller module triggers a power-down protection interrupt, outputs a shutdown signal to the external load module, drives the external wireless communication module to send an offline alarm message, and stores the operational status data in non-volatile memory.

[0013] This invention provides a DC power failure detection system and method with wide voltage adaptive capability and transient interference resistance. It has the following beneficial effects: 1. This invention uses a microcontroller module to collect multiple sets of data during the power-on phase and calculate the range or variance to obtain a steady-state analog-to-digital conversion reference value. Then, through a mapping lookup table in non-volatile memory, it dynamically extracts the drop-triggered analog-to-digital conversion threshold that matches the current physical input voltage. This design allows the system to be directly connected to DC power supplies of different voltage levels without changing the hardware voltage divider parameters, realizing adaptive tuning of the detection threshold according to the input voltage domain, and avoiding misjudgment or missed judgment of a single fixed threshold in a wide voltage input environment.

[0014] 2. In terms of hardware, this invention uses the unidirectional isolation device, signal filtering capacitor, and discharge regulating resistor in the isolation delay module to work together to smooth the charging and discharging slope at the voltage divider node and filter out high-frequency transient electromagnetic interference. In terms of software, the microcontroller module performs extreme value removal and averaging filtering to eliminate abnormal extreme values ​​in the sampling caused by sudden interference. The combined hardware and software filtering mechanism effectively prevents false triggering of power outages caused by power grid fluctuations or transient spikes, thus improving the stability of system operation.

[0015] 3. This invention utilizes anti-backflow diodes to block reverse leakage of charge to the input terminal when the main power supply drops, and relies on parallel energy storage filter capacitors to provide a delayed power supply window for the internal step-down module and microcontroller module after power failure. Within this delay window, the microcontroller module has sufficient time to respond to the power failure protection interrupt, and sequentially completes the operations of disconnecting the load module, sending offline communication alarms, and solidifying the operating status data to non-volatile memory, thereby realizing the orderly shutdown of the system and preventing the loss of critical operating data. Attached Figure Description

[0016] Figure 1 This is a block diagram of the overall architecture of the DC power failure detection system of the present invention; Figure 2 This is a flowchart illustrating the DC power failure detection method of the present invention. Figure 3 This is a core circuit topology diagram of the voltage divider module and the isolation delay module of the present invention; Figure 4 This is a schematic diagram of the state machine transition of the internal monitoring logic of the microcontroller module of the present invention; Figure 5 This is a schematic diagram of the extreme value removal averaging filter operation mechanism for real-time analog-to-digital conversion readings according to the present invention; Figure 6 This is a timing diagram of the collaborative response after the microcontroller module triggers a power-down protection interrupt according to the present invention. Figure 7 This is the logic diagram for the wide-voltage adaptive threshold dynamic matching of the present invention; Figure 8 The diagram shows the sampling voltage waveforms and performance comparisons of different schemes of the power failure detection system of the present invention. Detailed Implementation

[0017] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0018] Please see the appendix Figure 1 The present invention provides a DC power failure detection system with wide voltage adaptive capability and transient interference resistance, which may include a voltage divider module, an isolation delay module and a microcontroller module.

[0019] The system's main input terminal is connected to a DC power supply. A reverse-current protection diode is connected in series between the system's main input terminal and the input terminal of the internal step-down module.

[0020] An energy storage filter capacitor is connected in parallel to the input of the internal step-down module. The other end of the energy storage filter capacitor is grounded.

[0021] The output of the internal buck module is connected to the power pin of the microcontroller module to provide the operating voltage.

[0022] The input terminal of the voltage divider module is connected at the node between the system's main input terminal and the anti-backflow diode. The output terminal of the voltage divider module is connected to the input terminal of the isolation delay module.

[0023] The output of the isolation delay module is connected to the analog-to-digital converter pin of the microcontroller module.

[0024] The signal control pins of the microcontroller module are connected to the wireless communication module and the load module, respectively.

[0025] Please see the appendix Figure 2 This invention provides a DC power supply failure detection method with wide voltage adaptive capability and transient interference resistance, comprising the following steps: S1, after the system is powered on, the microcontroller module temporarily delays the activation of the load module and continuously acquires multiple sets of voltage sampling data output by the isolation delay module through the analog-to-digital conversion pin; S2, the microcontroller module calculates the range or variance of multiple sets of voltage sampling data. When the range or variance reaches the preset stability condition, the average value of multiple sets of voltage sampling data is calculated as the steady-state analog-to-digital conversion reference value. S3, the microcontroller module calculates the physical input voltage value based on the resistance ratio parameter of the voltage divider module and the forward voltage drop parameter of the isolation delay module, and stores the physical input voltage value in the internal storage space; S4, the microcontroller module uses the steady-state analog-to-digital conversion reference value to read the memory addressing of the pre-fixed mapping lookup table in the non-volatile memory; S5, the microcontroller module obtains the drop-triggered analog-to-digital conversion threshold corresponding to the current voltage region and writes the drop-triggered analog-to-digital conversion threshold into the internal threshold register; S6, the microcontroller module periodically acquires the real-time analog-to-digital conversion readings output by the isolation delay module after the system enters the running phase; S7, the microcontroller module performs an extreme value removal and averaging filter operation on the real-time analog-to-digital conversion reading to obtain the filtered sampling reference value, and performs an integer comparison operation between the filtered sampling reference value and the drop-triggered analog-to-digital conversion threshold in the internal threshold register; S8, when the filtered sampling reference value is lower than the drop-triggered analog-to-digital conversion threshold, the microcontroller module triggers a power-down protection interrupt, outputs a shutdown signal to the load module, drives the wireless communication module to send an offline alarm message, and saves the operating status data to non-volatile memory.

[0026] In this embodiment, the system's main input terminal is connected to a DC power supply. To adapt to uncertain input power supply environments, the DC power supply voltage range covers a wide range of fluctuating random input DC voltages (e.g., any DC power supply node within the 12V to 24V range). A reverse-current protection diode is connected in series between the system's main input terminal and the input terminal of the internal buck module. The anode of the reverse-current protection diode is connected to the system's main input terminal, and the cathode is connected to the input terminal of the internal buck module. Regarding the specific buck circuit topology of the internal buck module, those skilled in the art can select a DC-to-DC converter or a low-dropout linear regulator according to the actual power supply load requirements. The voltage conversion and regulation principles are well-known technologies in the field and will not be elaborated upon here.

[0027] An energy storage filter capacitor is connected in parallel to the input of the internal step-down module, with the other end of the capacitor connected to system ground. The energy storage filter capacitor is positioned between the cathode of the anti-backflow diode and the internal step-down module. In practice, the anti-backflow diode can be a Schottky diode. Based on physical characteristics, using a Schottky diode reduces line conduction losses during normal system power supply and provides a shorter reverse recovery time in response to transient changes, thus ensuring rapid physical isolation of internal charges during external busbar drops.

[0028] When the external DC power supply fails or the input line experiences a short circuit, the voltage at the system's main input terminal drops rapidly, causing the anode level of the anti-reverse current diode to fall below the cathode level. Due to the unidirectional conductivity of semiconductors, the anti-reverse current diode enters a reverse cutoff state, cutting off the reverse current path from the internal circuit to the system's main input terminal and the external busbar. At this time, the charge stored in the energy storage filter capacitor is retained in the internal power supply network, preventing current from flowing back to the external nodes at the front end of the main power supply.

[0029] After power failure and isolation, the energy storage filter capacitor releases residual energy to maintain power supply to the internal step-down module, enabling the microcontroller module to continue operating for a preset duration. According to the physical principle of energy conservation, the electric field energy stored in a capacitor is proportional to its capacitance and the square of the voltage across it. In this embodiment, to summarize the energy maintenance mechanism from a principle perspective and expand the protection scope, the system avoids using fixed mathematical expressions and instead defines it through physical relationships. The initial residual energy retained by the energy storage filter capacitor at the moment of power failure is determined by three physical parameters: the capacitance value of the energy storage filter capacitor, the input physical voltage at the system's main input terminal, and the forward voltage drop of the anti-reverse-current diode. This initial residual energy is proportional to the product of the aforementioned capacitance value and the square of the voltage difference at the power supply node (i.e., the input physical voltage minus the forward voltage drop).

[0030] The residual energy must be greater than the total energy consumption of the microcontroller module performing emergency tasks. After triggering a power-down interrupt, the microcontroller module needs to save the operating state data to non-volatile memory and send offline alarm messages. Therefore, the capacitance parameter is selected based on the following: the initial residual energy, calculated based on the conversion efficiency of the internal buck module, is sufficient to cover the minimum power integral required for the microcontroller module to operate until safe power-off. Due to the wide voltage fluctuation at the system's main input, the capacitance parameter setting must be calculated using the lowest supported input voltage (e.g., 12V) as the lower limit boundary condition to ensure that the system still has sufficient backup power redundancy under the worst power supply conditions.

[0031] In terms of specific component selection, the energy storage filter capacitor can be a conventional large-capacity aluminum electrolytic capacitor (e.g., 470uF). Combined with the aforementioned rapid detection mechanism, and given the short response time of the overall system architecture, the power supply duration required by the microcontroller module is also shortened. Therefore, the energy storage filter capacitor can be replaced with a surface-mount multilayer ceramic capacitor or tantalum capacitor with a lower equivalent series resistance, thereby reducing the overall system size.

[0032] In this embodiment, the input terminal of the voltage divider module is connected at the node between the system's main input terminal and the anti-reverse current diode. This arrangement of the physical lead-out point aims to avoid signal response lag caused by internal capacitor discharge. When an external power supply bus experiences a power outage, the anti-reverse current diode is reverse biased and enters the cutoff state, while the energy storage filter capacitor on its cathode side continues to maintain a high level. By placing the voltage sampling lead-out point in front of the anode side of the anti-reverse current diode, the voltage divider module's operation can be completely free from the interference of the slow discharge characteristics of the internal energy storage capacitor, thereby capturing the continuous voltage drop signal occurring on the external physical bus in real time.

[0033] The voltage divider module is implemented using a passive resistor network structure. The module includes a first resistor and a second resistor connected in series. One end of the first resistor serves as the input terminal of the voltage divider module, connected to the system's main input terminal. The other end of the first resistor is connected to one end of the second resistor, forming a voltage divider node. This voltage divider node serves as the output terminal of the voltage divider module, transmitting signals to subsequent circuits. The other end of the second resistor is connected to system ground.

[0034] Based on the aforementioned resistive network topology, the system can linearly convert a wide-amplitude fluctuating DC input signal into a low-voltage analog signal that can be safely processed by the subsequent microcontroller module. According to the linear voltage reduction principle of a series circuit, the voltage divider module establishes a fixed signal attenuation ratio for subsequent stages. The physical input voltage at the system's main input terminal is set to... The node voltage output by the voltage divider node is The physical conversion relationship between the two satisfies the following formula: ; in, This represents the physical input voltage at the system's main input terminal. This represents the node voltage output by the voltage divider node. The resistance parameter representing the first resistor. This represents the resistance value of the second resistor. In actual engineering setups, to ensure normal system operation and avoid division by zero (where the denominator is zero), the sum of the resistance values ​​of the first and second resistors must be a positive real number that is strictly greater than zero.

[0035] Regarding the specific value range and determination basis of the first and second resistors, this embodiment uses bidirectional physical constraints based on system power consumption and sampling accuracy. On the one hand, considering reducing static power consumption during system sleep to prevent excessive continuous leakage current, the equivalent series total impedance of the first and second resistors needs to be set to a relatively high level of kiloohms to hundreds of kiloohms. On the other hand, to avoid analog-to-digital conversion sampling distortion or voltage change response delay caused by excessive output impedance, the equivalent output impedance of the voltage divider module must be lower than the maximum external input impedance specification threshold required by the analog-to-digital conversion pin of the subsequent microcontroller module, and it needs to be matched with the time constant network of the subsequent isolation delay module.

[0036] Regarding The determination of the voltage divider ratio factor must be based on the worst-case power supply conditions. This ratio factor must be calculated using the highest permissible input physical voltage of the system as the evaluation benchmark. Specifically, the product of the highest permissible input physical voltage and the voltage divider ratio factor must be strictly lower than the maximum electrical withstand voltage threshold allowed by the analog-to-digital converter pins of the microcontroller module. By employing this parameter-backward derivation logic based on extreme high-voltage conditions, it is possible to ensure that the core pins of the internal microcontroller are protected from high-voltage breakdown when the hardware terminal is randomly connected to a high-voltage DC network or encounters a minor overvoltage surge. For example, in a typical application scenario supporting random 24V connection, the voltage divider ratio factor can be preset to 0.1.

[0037] In this embodiment, the input terminal of the isolation delay module is connected to the output terminal of the voltage divider module. The isolation delay module physically includes a unidirectional isolation device, a signal filtering capacitor, and a discharge regulating resistor. Specifically, the anode of the unidirectional isolation device is connected to the voltage divider node of the voltage divider module to receive the node voltage output from the preceding voltage divider node. The cathode of the unidirectional isolation device is connected to the analog-to-digital conversion pin of the microcontroller module, forming a sampling node thereon. The signal filtering capacitor and the discharge regulating resistor are connected in parallel, with one end of both connected to the sampling node and the other end connected to system ground.

[0038] Based on the aforementioned hardware connection topology, this module constructs an asymmetric charging and discharging response mechanism at the physical level. Under normal system power supply or when facing an external positive voltage surge, the node voltage output by the voltage divider node is at a high level. At this time, the unidirectional isolation device is forward biased and conducts. Due to the low dynamic equivalent impedance of the unidirectional isolation device when it is conducting, the preceding current can charge the signal filter capacitor with an extremely short delay. After the charging reaches physical equilibrium in a short time, the electrical state at the sampling node is determined by the following linear relationship: ; in, The sampling reference voltage represents the output of the sampling node. This represents the forward voltage drop of a unidirectional isolation device. Since in the same embodiment... The node voltage, already defined as the output of the voltage divider node, will not be elaborated further here. This formula characterizes the signal following logic under normal operating conditions, meaning that the sampling reference voltage can track the rising trend of the preceding bus voltage in real time, providing an accurate steady-state voltage measurement reference for the microcontroller module. For applications requiring high measurement accuracy, the specific lower-level characteristics of the unidirectional isolation device can also be replaced with a precision peak detection circuit controlled by a rail-to-rail operational amplifier closed loop to eliminate the influence of semiconductor diode voltage drop and temperature drift on analog sampling.

[0039] When a high-power load of pulse-width modulation type is driven by a shared bus in the system, high-frequency negative voltage ripple is generated, causing a transient drop in the node voltage output of the voltage divider node on the order of microseconds. Once the node voltage output of the voltage divider node drops below the sampling reference voltage, the unidirectional isolation device instantly enters a physical cutoff state due to reverse bias. Under this condition, the charging circuit of the signal filter capacitor is blocked, and the residual charge of the sampling node can only be discharged to the system ground through the discharge regulating resistor.

[0040] In this RC discharge process, the system introduces the discharge time constant as a core physical parameter for evaluating charge maintenance characteristics. The discharge time constant of this asymmetric network satisfies the following formula: ; in, Represents the discharge time constant. The resistance parameter representing the discharge adjustment resistor. This represents the capacitance value of the signal filtering capacitor. The asymmetric network characteristics of forward low-impedance fast charging and reverse high-impedance slow discharging enable the sampling reference voltage to remain relatively stable during microsecond-level high-frequency interference, effectively preventing the microcontroller module from misinterpreting it as a power-down fault, thus achieving hardware anti-interference against its own load operating noise.

[0041] To ensure that the asymmetric network can simultaneously achieve both high immunity and timely power-down response, the specific values ​​of the discharge regulating resistor and signal filtering capacitor must strictly adhere to bidirectional time-matching logic. On one hand, the discharge time constant must be significantly greater than the longest pulse-width modulation interference period present on the system's common bus. Typically, the discharge time constant needs to be set to tens of times the pulse interference period to ensure that high-frequency negative ripple is smoothed in the early stages of charge discharge, preventing a significant drop in the sampling reference voltage. On the other hand, this discharge time constant must be significantly smaller than the maximum power supply sustainment time window provided by the preceding power sustainment module to ensure sufficient time margin for subsequent power-down protection actions.

[0042] When a real and sustained power outage occurs in the external main power grid, the node voltage output by the voltage divider node remains at a low level. At this time, the unidirectional isolation device remains permanently off, and the sampling reference voltage experiences a gradual but continuous monotonic drop due to the continuous consumption of the discharge regulating resistor. Based on the upper limit constraint of the aforementioned time constant, this monotonic drop can quickly penetrate the monitoring safety lower limit of the microcontroller module before the internal buck module completely stops working, ensuring that the system acquires the physical characteristics of the real power outage and activates the corresponding interrupt.

[0043] In this embodiment, the power supply pin of the microcontroller module is connected to the output of the internal buck module to obtain a low-voltage DC power supply after voltage regulation and bucking. The analog-to-digital conversion pin of the microcontroller module is connected to the output of the front-end isolation delay module to receive the sampling reference voltage after smoothing by an asymmetric RC network.

[0044] To achieve power loss detection without consuming excessive computing resources under wide-range fluctuating DC input conditions, the microcontroller module integrates detection and processing logic based on steady-state verification and lookup table mapping. This processing logic is divided into three consecutive operation stages using a state machine architecture: power-on steady-state verification, dynamic threshold setting, and runtime monitoring.

[0045] During the initial power-up phase of the system, considering the unpredictable electrical surge that may occur upon the moment of external power connection, the microcontroller module temporarily delays the start-up of the external load and continuously acquires multiple sets of voltage sampling data through the analog-to-digital converter pin. Based on this continuous multi-source data, the microcontroller module calculates the range or variance parameter of the data and determines whether this parameter is lower than the hardware tolerance threshold. The hardware tolerance threshold must cover the inherent quantization noise floor of the analog-to-digital converter within the microcontroller module and must be slightly higher than the inherent peak-to-peak ripple of the power supply bus under no-load conditions to ensure that the verification process neither generates false triggers nor is interfered with by normal noise.

[0046] When the aforementioned parameters are consistently below the hardware tolerance threshold, the system determines that the external power supply network has passed the transient oscillation period and established a physical steady state. At this time, the microcontroller module calculates the average value of the multiple sets of voltage sampling data and uses it as the steady-state analog-to-digital conversion reference value. To avoid division by zero errors in software calculations, the total number of times the multiple sets of voltage sampling data are collected is set to a positive integer greater than zero in the underlying firmware.

[0047] After acquiring the steady-state reference, the system needs to deduce the current physical input voltage value by combining the electrical attenuation characteristics of the preceding circuit topology. The microcontroller module converts the acquired steady-state analog-to-digital converter (ADC) reference value into the corresponding node analog voltage value according to the ratio between the ADC's full-scale resolution and the reference voltage. Subsequently, numerical compensation is performed using the forward conduction voltage drop parameter of the unidirectional isolation device in the isolation delay module. Finally, the voltage is amplified and restored using the reciprocal of the voltage attenuation ratio coefficient of the voltage divider module, thereby deriving the true physical input voltage value. The technical purpose of this derivation logic is to offset the attenuation of the resistive network and the physical losses of semiconductor devices through hardware and software parameter compensation mechanisms, establishing an accurate external voltage observation reference. The derived physical input voltage value is then stored in the microcontroller module's internal non-volatile memory space as an operation log record.

[0048] After establishing a stable operating environment, the system naturally enters the dynamic threshold setting stage. In this stage, the microcontroller module calls a pre-installed mapping lookup table in its internal non-volatile memory. This lookup table pre-divides multiple wide-voltage operating regions and binds each specific voltage region to an offline pre-calculated drop-triggered analog-to-digital conversion threshold. Regarding the offline pre-calculation generation logic of this threshold, technicians can set the system's allowable voltage drop limit percentage (e.g., set to 80% of the nominal voltage) based on the nominal power supply node (e.g., 12V or 24V) corresponding to each wide-voltage operating region. Subsequently, the physical voltage corresponding to this drop limit is forward-converted to the corresponding analog-to-digital conversion sampling value based on the aforementioned voltage division attenuation and isolation voltage drop physical characteristics, and this value serves as the data mapping node in the mapping lookup table.

[0049] Based on the pre-loaded lookup table mechanism described above, the microcontroller module directly uses the steady-state analog-to-digital conversion reference value to perform memory addressing of the mapping lookup table. Through interval ratio hints, the system obtains the drop-triggered analog-to-digital conversion threshold that matches the current real physical power supply environment and writes this threshold into the microcontroller module's internal threshold register. This direct lookup method based on memory structure partitioning aims to avoid the microcontroller module performing complex floating-point multiplication and division operations during time-sensitive runtime, reducing processor computational overhead through a space-for-time tradeoff strategy.

[0050] Once the aforementioned thresholds are set and the system officially enters the operational phase and drives external loads, the power supply bus will experience load fluctuations due to business operations. At this time, the microcontroller module periodically acquires the real-time analog-to-digital conversion (ADC) readings output by the isolation delay module according to a preset timer cycle. To further filter out occasional spike noise caused by high-frequency chopping at the software level, the microcontroller module performs an extreme value removal and averaging filter operation on the acquired real-time ADC readings. Before executing this logic, the system pre-sets a sliding data window with a length greater than or equal to four sampling periods to ensure that the number of remaining valid data after removing extreme values ​​is strictly greater than zero, thereby preventing the denominator from approaching zero in the subsequent averaging process and ensuring that the calculation has practical averaging significance. The specific processing logic is as follows: remove the maximum and minimum extreme values ​​from a sampling window sequence, then calculate the truncated average value of the remaining valid data to generate a filtered sampling benchmark value. This multi-dimensional data smoothing mechanism avoids one-sided power outage misjudgments caused by relying solely on single extreme value data.

[0051] Within the execution loop of the underlying decision logic, the microcontroller module uses a single-instruction-cycle integer comparison method to evaluate the filtered sampling reference value against the drop-triggered analog-to-digital conversion threshold in the internal threshold register. When the filtered sampling reference value is determined to be lower than the drop-triggered analog-to-digital conversion threshold, it indicates that a real power-off fault has occurred on the external physical bus. Based on this deterministic determination, the microcontroller module immediately triggers an unshielded power-off protection interrupt.

[0052] During the interrupt service routine, the microcontroller module utilizes the residual power window reserved by the power sustainment module to output a low-level shutdown signal to the controlled load module to cut off the high-power-consuming circuit. Simultaneously, the microcontroller module drives the external communication node to send an offline alarm message and saves critical status data from the runtime memory to non-volatile memory, completing a closed-loop operation of safe power-off and field data preservation.

[0053] In this embodiment, the signal control pins of the microcontroller module are connected to the wireless communication module and the load module, respectively, thus forming the underlying hardware control topology for system action response and external interaction. The microcontroller module is connected to the drive terminals of the power switching devices inside the load module through general-purpose input / output pins to realize the on / off control and power regulation of external electrical equipment. In this setup, the power switching devices can be low-on-impedance N-channel metal-oxide-semiconductor field-effect transistors. Simultaneously, the microcontroller module is connected to the communication interface of the wireless communication module through a serial data bus. Regarding the specific RF architecture and network protocol stack of the wireless communication module, those skilled in the art can choose mature commercial modules such as narrowband IoT or cellular mobile communication based on the actual deployment environment. The RF signal modulation and base station paging interaction mechanisms are well-known technologies in the field and will not be elaborated upon here.

[0054] After the system enters a stable operating state, the microcontroller module typically uses pulse width modulation (PWM) to output a high-frequency chopper drive signal to the load module to adjust the working efficiency of the external load. This high-frequency switching action is the core source of severe electromagnetic interference on the system's shared bus. To reveal the generation mechanism of this interference at the fundamental principle level, this embodiment uses qualitative physical mechanism analysis instead of fixed mathematical expressions. Based on Faraday's principle of electromagnetic induction, when a high-power load frequently switches current on and off within a microsecond timescale, the inherent parasitic inductance in the physical input circuit will generate a reverse electromotive force that opposes sudden current changes. The product of this parasitic inductance parameter and the instantaneous rate of change of the load current will directly induce a violent negative voltage transient at the system's main input terminal.

[0055] As the load power or chopping frequency increases, the amplitude of the negative voltage ripple generated by the aforementioned induction mechanism will be amplified proportionally. To prevent this transient high-frequency ripple caused by its own operational actions from penetrating to the analog-to-digital conversion pin and causing the microcontroller module to misjudge a power failure, the system utilizes the asymmetric RC network in the aforementioned isolation delay module to perform physical-level unidirectional isolation and charge discharge smoothing of this negative downsurge.

[0056] When a real physical power outage occurs in the external backbone power supply network, and the microcontroller module confirms the power outage event and triggers an unmasked interrupt through multi-dimensional filtering and threshold comparison logic, the system sequentially and collaboratively executes the underlying power outage protection actions according to strict time-sensitive priority scheduling.

[0057] The primary task of interrupt response is load blocking. Within the first machine cycle of entering the interrupt service routine, the microcontroller module immediately controls the general-purpose input / output pins connected to the load module to output a physical low level. This low-level signal quickly pulls down the gate voltage of the power switching devices, forcing them into a physical cutoff state. This effectively cuts off the power supply to all high-power-consuming devices at the hardware level, preventing external loads from continuing to consume internal system energy during power failure. It also ensures that the limited charge remaining in the energy storage and filtering capacitors of the power sustaining module can be centrally allocated to subsequent energy-sensitive RF communication tasks.

[0058] After successfully isolating the high-power load circuit, the protection process enters the data preservation and message reassembly stage. The microcontroller module stores critical operating condition data cached in memory into its internal non-volatile memory. Considering that residual power cannot support continuous RF transmission for extended periods, the microcontroller module must execute a data filtering strategy at the underlying level. Specifically, the microcontroller module extracts only the device identification, power-down physical timestamp, and core fault codes, discarding all redundant status parameters from the regular heartbeat message, thereby generating a short-byte offline alarm message. This streamlined logic aims to compress the operating time of the RF power amplifier in the wireless communication module from the source, ensuring that the total power consumption of the transmission is strictly limited within the safe boundary of the current capacitor's residual energy. After message reassembly is completed, the microcontroller module pushes it to the wireless communication module via the serial data bus.

[0059] As the final interaction before a power outage, the wireless communication module, upon receiving a simplified message data stream, utilizes its internal voltage regulation network to obtain the last available residual voltage and activates the RF power amplifier. Before the system's internal bus voltage completely drops below the hardware reset threshold, the wireless communication module instantly transmits an offline alarm message to a remote cloud server or local monitoring node via an external RF antenna. Relying on this dual energy guarantee mechanism of load stripping and data simplification, the system can provide offline notifications with precise physical timestamps during the final window of power supply maintenance, successfully completing the technical loop of power outage detection and fault reporting.

[0060] Specific application examples: Application scenario background: In a large automated factory, numerous Industrial Internet of Things (IIoT) smart monitoring terminals are deployed. The main power supply network for these terminals is connected to the factory's DC bus, with the supply voltage typically randomly selected between 12V and 24V (depending on the distribution cabinet standards of different workshops). Each terminal internally controls a high-power DC cooling fan (load module, using 1kHz PWM speed control) and has a built-in NB-IoT wireless communication module. Due to the harsh factory environment, the main bus occasionally experiences sudden power outages or line damage. Before completely shutting down due to a power outage, each terminal must send a dying gasp message carrying its device ID and physical timestamp to the factory's cloud-based monitoring platform.

[0061] Hardware parameter settings and theoretical formulas: Backflow prevention and energy storage: A Schottky diode is connected in series at the main input terminal of the system (forward voltage drop is approximately...). (≈0.3V), with an internal 470μF aluminum electrolytic capacitor. The MCU and communication module require at least 50ms of sustained power after a safe power-down.

[0062] Voltage divider module: First resistor =90kΩ, second resistor =10kΩ. According to the series voltage divider formula... The voltage attenuation ratio is 0.1.

[0063] Isolation delay module: Uses unidirectional isolation devices and discharge adjustment resistors. =100kΩ, signal filter capacitor =0.1μF.

[0064] Normal charging follow formula: .

[0065] Formula for reverse discharge time constant after power failure: Substituting the parameters yields... =10ms.

[0066] System operation flow description with reference to the attached diagram: Combined with appendix Figure 8 In the graph, the horizontal axis represents the system running time (ms), and the vertical axis represents the equivalent physical bus voltage value (V) calculated by the microcontroller unit (MCU) after sampling by the ADC and undergoing hardware and software parameter compensation. The system operation steps are as follows: Phase 1: Power-on steady-state identification and threshold setting (0-5ms range) The MCU temporarily halts fan operation and continuously acquires ADC data. After confirming that the range is less than the tolerance threshold, the steady-state analog-to-digital conversion reference value is calculated. After compensating for voltage drop and voltage divider coefficients, the current physical input voltage is recorded as 24.0V.

[0067] Threshold setting by table lookup: The MCU queries the EEPROM to obtain the preset drop-triggered analog-to-digital conversion threshold for the 24V operating region (set to 80% of the nominal value). In the attached diagram, this threshold is represented by a dark gray horizontal dotted line, with its corresponding vertical axis being 19.2V. If subsequent sampling curves fall below this horizontal line, the system determines that a power failure has occurred.

[0068] Phase 2: Transient Interference Resistance Operation Period (5ms-20ms interval) The system is now operational, with the MCU driving the fan and outputting a 1kHz PWM signal. Based on Faraday's law of electromagnetic induction, the frequent switching of the high-power inductive load generates dense microsecond-level transient negative downswing interference on the bus.

[0069] Physical grid performance: As shown by the light gray thin solid line (physical bus voltage) in the attached figure, the actual physical grid voltage is disturbed during the period of 5-20ms, and a spike of 16V will occur every 1 millisecond.

[0070] The fatal flaw of the traditional solution: The resistor voltage divider sampling scheme without the invention is shown by the black dashed line (traditional solution) in the attached figure. Because this curve completely follows the transient changes of the bus, it lacks high-frequency resistance. At about 5ms, the black dashed line first drops below the 19.2V threshold line (marked as a hollow circle and the word "false trigger" in the figure), which will cause the MCU to misinterpret the temporary voltage fluctuation as a bus power failure, incorrectly cut off the service, and trigger a false alarm.

[0071] The anti-interference performance of the present invention: The sampling reference voltage of the present invention is shown as the thick black solid line (present invention solution) in the attached figure. When the voltage at the voltage divider node transiently drops, the unidirectional isolation device is reverse-biased and cut off. Due to the set discharge time constant... =10ms is much longer than the PWM period (1ms), and the ADC sampling node only experiences extremely weak discharge due to the RC network. Therefore, the high-frequency ripple of the thick black solid line is perfectly smoothed out, and the equivalent voltage is always maintained at a high level above 23.5V, completely avoiding false triggering.

[0072] Phase 3: Real Power Failure Response and Closed-Loop Protection (after 25ms) Sudden power outage: At 25ms on the horizontal axis of the attached diagram, the external cable was severed, and the light gray thin solid line (physical bus voltage) quickly dropped to 0.

[0073] Smooth drop and accurate identification: At this point, the ADC node loses its charging circuit and strictly follows the instructions. A constant discharge of 10ms is applied to the system monotonically. As shown in the attached figure, the thick black solid line begins to produce a smooth but continuous monotonic drop. After a hardware delay of approximately 2.2 milliseconds (around 27ms), the equivalent voltage after extremum filtering smoothly and deterministically penetrates the dark gray threshold line of 19.2V.

[0074] Protection Execution: As shown by the solid triangle and the words "True Power Failure Trigger" in the diagram, the MCU accurately confirmed the power failure event at this moment. The MCU immediately triggered the unmasked protection interrupt, outputting a low level to shut down the fan and cut off the high-power-consuming circuit; simultaneously, the anti-backflow diode was turned off, trapping the residual energy in the 470uF energy storage capacitor. The MCU used this precious energy to assemble a short-byte message containing the device MAC, power failure timestamp, and error code 0xEE, driving the NB-IoT module to instantly transmit it to the cloud, after which the system safely powered down.

[0075] Experimental verification and effect comparison: To verify the technological advancement of this invention, a hardware testing platform was built, and the proposed solution was compared with traditional solutions in a comparative experiment.

[0076] Comparison experiment on transient interference resistance performance: Experimental conditions: A 4A high-power inductive load is connected to a 24V power supply network, and a PWM control signal with a duty cycle of 50% and a frequency of 1kHz is applied.

[0077] Experimental results: Traditional solution: As shown by the hollow circle in the attached diagram, the physical voltage directly sampled by the ADC frequently exceeds the 19.2V threshold. The system experienced 15 false power-down interruptions within 1 minute, resulting in frequent service restarts.

[0078] The present invention achieves the following: thanks to the asymmetric charging and discharging structure, high-frequency ripple is completely isolated and flattened by the charge discharge smoothing mechanism, the filter sampling reference value is stably maintained in the range of 23.5V±0.1V, and the false trigger rate is 0%.

[0079] Experiment on power outage sustainment and alarm success rate: Experimental conditions: The system was operated under 12V low-voltage conditions, and the physical bus was manually disconnected 100 times. The success rate of receiving offline alarm messages in the cloud was then statistically analyzed.

[0080] Experimental results: Traditional solution: Due to the inability to promptly disconnect high-power loads during power outages and the lack of backflow prevention mechanisms, residual energy is backflowed and rapidly consumed internally. Power supply is maintained for only 8ms, and the NB-IoT module loses power before it can transmit, resulting in an alarm success rate of only 3%.

[0081] The solution of this invention: As shown in the solid triangle in the attached diagram, the fault is confirmed after only about 2.2ms after a power outage, and load disconnection and backflow prevention isolation are immediately executed. The energy storage capacitor supplies energy to the core communication node, and the internal 3.3V network can be effectively maintained for up to 65ms, which fully covers the 50ms window required for short message transmission. Alarms were received in all 100 power outage tests, with an alarm success rate of 100%.

Claims

1. A DC power supply failure detection system with wide voltage adaptive capability and transient interference resistance, characterized in that, It includes a voltage divider module, an isolation delay module, and a microcontroller module; The main input terminal of the DC power failure detection system is connected to a random input DC power supply that covers a wide range of fluctuations. A reverse-current protection diode is connected in series between the main input terminal of the system and the input terminal of the internal step-down module; An energy storage filter capacitor is connected in parallel to the input terminal of the internal step-down module, and the other end of the energy storage filter capacitor is connected to the system ground. The output of the internal step-down module is connected to the power pin of the microcontroller module; The input terminal of the voltage divider module is connected to the node between the main input terminal of the system and the anti-backflow diode, and the output terminal of the voltage divider module is connected to the input terminal of the isolation delay module. The output of the isolation delay module is connected to the analog-to-digital conversion pin of the microcontroller module; The signal control pins of the microcontroller module are connected to the external wireless communication module and the external load module, respectively.

2. The DC power failure detection system with wide voltage adaptive and transient interference resistance according to claim 1, characterized in that, The anode of the anti-backflow diode is connected to the main input terminal of the system, and the cathode of the anti-backflow diode is connected to the input terminal of the internal step-down module. The energy storage filter capacitor is disposed in the circuit between the cathode of the anti-backflow diode and the internal step-down module.

3. The DC power failure detection system with wide voltage adaptive capability and transient interference resistance according to claim 1, characterized in that, The voltage divider module includes a first resistor and a second resistor connected in series; One end of the first resistor is connected to the main input terminal of the system as the input terminal of the voltage divider module. The other end of the first resistor is connected to one end of the second resistor to form a voltage divider node. The voltage divider node serves as the output terminal of the voltage divider module. The other end of the second resistor is connected to the system ground.

4. The DC power failure detection system with wide voltage adaptive capability and transient interference resistance according to claim 3, characterized in that, The isolation delay module includes a unidirectional isolation device, a signal filtering capacitor, and a discharge adjustment resistor in its physical circuit. The anode of the unidirectional isolation device is connected to the voltage divider node of the voltage divider module, the cathode of the unidirectional isolation device is connected to the analog-to-digital conversion pin of the microcontroller module and forms a sampling node, the signal filtering capacitor and the discharge regulating resistor are connected in parallel, one end of the signal filtering capacitor and the discharge regulating resistor are connected to the sampling node, and the other end of the signal filtering capacitor and the discharge regulating resistor are connected to system ground.

5. The DC power failure detection system with wide voltage adaptive and transient interference resistance according to claim 4, characterized in that, The microcontroller module is used to temporarily delay the activation of the load module after the DC power failure detection system is powered on, and continuously acquires multiple sets of voltage sampling data output by the isolation delay module through the analog-to-digital conversion pin. The microcontroller module is used to calculate the range or variance of the multiple sets of voltage sampling data. When the range or variance is less than a preset hardware tolerance threshold, the microcontroller module calculates the average value of the multiple sets of voltage sampling data as the steady-state analog-to-digital conversion reference value.

6. The DC power failure detection system with wide voltage adaptive and transient interference resistance according to claim 5, characterized in that, The microcontroller module is used to calculate the physical input voltage value based on the steady-state analog-to-digital conversion reference value, the resistance ratio parameter of the voltage divider module, and the forward voltage drop parameter of the isolation delay module, and to store the physical input voltage value in the internal storage space of the microcontroller module.

7. The DC power failure detection system with wide voltage adaptive capability and transient interference resistance according to claim 5, characterized in that, The microcontroller module is used to read the pre-fixed mapping lookup table in the non-volatile memory inside the microcontroller module using the steady-state analog-to-digital conversion reference value. The mapping lookup table is pre-divided into multiple wide-voltage working regions, and each wide-voltage working region is bound to a drop-triggered analog-to-digital conversion threshold that has been pre-calculated offline. The microcontroller module is used to obtain the drop-triggered analog-to-digital conversion threshold corresponding to the current voltage region from the mapping lookup table, and write the drop-triggered analog-to-digital conversion threshold into the internal threshold register of the microcontroller module.

8. The DC power failure detection system with wide voltage adaptive and transient interference resistance according to claim 7, characterized in that, The microcontroller module is used to periodically acquire the real-time analog-to-digital conversion readings output by the isolation delay module after the DC power failure detection system enters the operation phase; The microcontroller module is used to perform an extreme value removal and averaging filter operation on the real-time analog-to-digital conversion reading to obtain a filtered sampling reference value, and to perform an integer comparison operation between the filtered sampling reference value and the drop-triggered analog-to-digital conversion threshold in the internal threshold register.

9. The DC power failure detection system with wide voltage adaptive and transient interference resistance according to claim 8, characterized in that, The microcontroller module is used to trigger a power-down protection interrupt when the filtered sampling reference value is lower than the drop-triggered analog-to-digital conversion threshold, output a shutdown signal to the external load module, drive the external wireless communication module to send an offline alarm message, and save the operating status data of the microcontroller module to the non-volatile memory.

10. A DC power supply failure detection method with wide voltage adaptive capability and transient interference resistance, applied to the DC power supply failure detection system with wide voltage adaptive capability and transient interference resistance as described in any one of claims 1-9, characterized in that, Includes the following steps: After the DC power failure detection system is connected to a random input DC power supply with a wide range of fluctuations and powered on, the microcontroller module temporarily delays the activation of the external load module and continuously acquires multiple sets of voltage sampling data output by the isolation delay module through the analog-to-digital conversion pin. The microcontroller module calculates the range or variance of the multiple sets of voltage sampling data. When the range or variance is less than a preset hardware tolerance threshold, the microcontroller module calculates the average value of the multiple sets of voltage sampling data as the steady-state analog-to-digital conversion reference value. The microcontroller module calculates the physical input voltage value based on the steady-state analog-to-digital conversion reference value, the resistance ratio parameter of the voltage divider module, and the forward voltage drop parameter of the isolation delay module, and stores the physical input voltage value in the internal storage space of the microcontroller module; The microcontroller module uses the steady-state analog-to-digital conversion reference value to perform memory addressing and reading of a pre-fixed mapping lookup table in the non-volatile memory. The mapping lookup table is pre-divided into multiple wide-voltage working regions, and each wide-voltage working region is bound to a drop-triggered analog-to-digital conversion threshold that has been pre-calculated offline. The microcontroller module acquires the drop-triggered analog-to-digital conversion threshold corresponding to the current voltage region and writes the drop-triggered analog-to-digital conversion threshold into the internal threshold register; The microcontroller module periodically acquires the real-time analog-to-digital conversion readings output by the isolation delay module after the DC power failure detection system enters the operation phase; The microcontroller module performs an extreme value removal and averaging filter operation on the real-time analog-to-digital conversion reading to obtain a filtered sampling reference value, and performs an integer comparison operation between the filtered sampling reference value and the drop-triggered analog-to-digital conversion threshold in the internal threshold register. When the filtered sampling reference value is lower than the drop-triggered analog-to-digital conversion threshold, the microcontroller module triggers a power-down protection interrupt, outputs a shutdown signal to the external load module, drives the external wireless communication module to send an offline alarm message, and saves the operating status data of the microcontroller module to the non-volatile memory.

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