A semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation

Abstract

The application relates to the technical field of semiconductor detector signal processing, and discloses a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation. The method comprises the following steps: two rows of two columns of adjacent pixels are connected by two diagonal lines to form two readout channels; charge-sensitive amplification signals of the two readout channels are collected respectively; unit gain differential and summation parallel processing is performed on the double-channel signals to form anode-simulated signals and cathode-simulated signals; the interaction depth is inversely calculated according to the amplitude ratio calibration relationship of the two signals; and the differential amplitude is corrected according to the charge collection efficiency of the corresponding depth to form an energy spectrum. The application can inhibit the depth response difference and low-energy tailing, and reduce the readout and calibration complexity of a large-area array without reading a real cathode signal or measuring an electron drift time.

Description

Technical Field

[0001] This invention relates to the field of semiconductor detector signal processing technology, and in particular to a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation. Background Technology

[0002] Currently, semiconductor crystals such as CdZnTe, CdTe, HgI2, GaAs, TlBr, and PbI2 can be used for room-temperature nuclear radiation detection and are applied in fields such as nuclear medicine, environmental monitoring, non-destructive testing, security inspection, and astrophysics. Pixel array semiconductor detectors obtain planar position and energy information by setting multiple pixel electrodes on the anode surface of the crystal.

[0003] To balance spatial resolution and detection efficiency, some pixel array detectors employ larger pixel sizes and crystal thicknesses. When the pixel size... With crystal thickness ratio When the value is greater than 0.3, the small pixel effect weakens, and the weighted potential below the pixel becomes flatter and extends over a wider range within the crystal. Due to crystal defects and carrier transport properties, the mobility-lifetime product of holes is usually lower than that of electrons, and the influence of carrier trapping on the anode signal is enhanced, which can easily cause low-energy tailing of the energy spectrum, reduced energy resolution, and decreased peak-to-peak ratio.

[0004] According to the Shockley-Ramo theory, the induced charge output by the pixel electrode is related to the weighted potential and carrier motion. The total charge collection efficiency of pixel-type cadmium zinc telluride detectors is less than 1 and varies with the interaction depth; the closer to the anode, the more significant the loss in charge collection efficiency due to hole trapping. If the interaction depth of each triggering event can be determined, the event energy can be corrected according to a pre-calibrated relationship between depth and charge collection efficiency. Depth information is typically acquired using two methods: the anode-cathode signal amplitude ratio method and the electron drift time method.

[0005] The anode-cathode signal amplitude ratio method reads the signals from the anode of a single pixel and the entire common cathode separately. When using a charge-sensitive preamplifier, the ratio of the cathode signal amplitude to the anode signal amplitude can be expressed as: ,in, Indicates the amplitude ratio of the anode and cathode signals. Represents the actual cathode signal. Indicates the anode signal of a single pixel. This indicates the normalized interaction depth. The large area of ​​the common cathode increases electronic noise due to its leakage current and inter-electrode capacitance; the common cathode also needs to respond to all events within the probe, making it prone to signal accumulation at high count rates and subject to baseline recovery time limitations.

[0006] The electron drift-time method requires measuring the time it takes for electrons to drift from the interaction site to the anode, typically relying on high-speed waveform sampling analog-to-digital converters, timing discrimination circuits, and time-to-digital conversion circuits, thus increasing hardware complexity and power consumption. Another method utilizes a single collected pixel and the signals of adjacent pixels to construct a virtual cathode, but this method does not form a structured module of adjacent 2 rows and 2 columns of pixels, nor does it utilize the same dual-channel signal group to perform unity-gain differential and summation parallel processing.

[0007] Therefore, there is an urgent need for a processing method that can construct depth-related amplitude quantities using existing readout signals from pixel arrays, and invert interaction depth and correction energy without relying on real cathodes or measuring electron drift time, so that local pixel modules can simultaneously take into account carrier trapping compensation, depth response correction, position discrimination, and low-channel-number readout of large-area arrays. Summary of the Invention

[0008] To address the aforementioned technical shortcomings, the present invention aims to propose a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation. This method and system are intended to solve the technical problems of existing pixel array semiconductor detectors, which rely on a whole common cathode or electron drift time to obtain depth information, and are limited by cathode noise, signal accumulation, and complex timing circuits. Furthermore, they are difficult to simultaneously compensate for the differences in charge carrier trapping and charge collection efficiency at different working depths.

[0009] To solve the above-mentioned technical problems, the present invention adopts the following technical solution: The present invention provides a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation.

[0010] The semiconductor detector depth correction method based on pixel diagonal pairing and differential summation includes:

[0011] Step S10: Obtain the detector pixel array configuration, and based on the detector pixel array configuration, use the adjacent pixel diagonal pairing mechanism to perform the readout channel construction task and output the diagonal paired pixel module;

[0012] Step S20: Based on the diagonally paired pixel module, a dual-channel charge-sensitive readout mechanism is used to perform signal acquisition tasks and output dual-channel signal groups;

[0013] Step S30: Based on the dual-channel signal group, a differential summation parallel processing mechanism is used to perform the simulated electrode feature extraction task and output the simulated electrode feature quantity;

[0014] Step S40: Based on the simulated electrode feature quantities, perform the interaction depth inversion task using the amplitude ratio calibration mapping mechanism, and output the depth correction parameter set;

[0015] Step S50: Based on the depth correction parameter set, perform the energy reconstruction task using the charge collection efficiency correction mechanism and output the corrected energy spectrum.

[0016] Preferably, step S10, which involves obtaining the detector pixel array configuration, performing a readout channel construction task based on the detector pixel array configuration using an adjacent pixel diagonal pairing mechanism, and outputting the diagonally paired pixel module, specifically includes:

[0017] Step S101: Based on the detector pixel array configuration, the pixel array of the semiconductor detector crystal is divided into multiple square basic modules composed of adjacent 2 rows and 2 columns of pixels;

[0018] Step S102: For each of the square basic modules, the two pixel electrodes on the first diagonal are interconnected to form a first readout channel, and the two pixel electrodes on the second diagonal are interconnected to form a second readout channel;

[0019] Step S103: Determine the first readout channel and the second readout channel as diagonally paired pixel modules of corresponding square basic modules, so that every four pixels correspond to two readout channels.

[0020] Preferably, step S20, which involves using a dual-channel charge-sensitive readout mechanism based on the diagonally paired pixel module to perform signal acquisition and output a dual-channel signal group, specifically includes:

[0021] Step S201: Based on the diagonally paired pixel module, determine the two readout channels therein as the first readout channel and the second readout channel, respectively; connect the first readout channel to the first charge-sensitive preamplifier; connect the second readout channel to the second charge-sensitive preamplifier.

[0022] Step S202: Using the first charge-sensitive preamplifier, perform charge-sensitive amplification on the induced charge signal of the first readout channel; using the second charge-sensitive preamplifier, perform charge-sensitive amplification on the induced charge signal of the second readout channel; output the first channel signal and the second channel signal;

[0023] Preferably, in step S202, the steps of using the first charge-sensitive preamplifier to perform charge-sensitive amplification on the induced charge signal of the first readout channel, using the second charge-sensitive preamplifier to perform charge-sensitive amplification on the induced charge signal of the second readout channel, and outputting the first channel signal and the second channel signal specifically include: the first charge-sensitive preamplifier and the second charge-sensitive preamplifier are independent of each other, and the signal acquisition process does not require measuring the electron drift time of the first channel signal and the second channel signal.

[0024] Preferably, step S30, which involves performing the simulated electrode feature extraction task based on the dual-channel signal group using a differential summation parallel processing mechanism and outputting the simulated electrode feature quantity, specifically includes:

[0025] Step S301: Determine the first channel signal and the second channel signal from the dual-channel signal group, and denot them as follows: and ;

[0026] Step S302: A single differential circuit with a fixed gain of 1 is used to subtract the first channel signal and the second channel signal to form a differential signal serving as an anode-like signal. An adder circuit is then used to add the first channel signal and the second channel signal to form a summation signal serving as a cathode-like signal. Where: ; in, This represents the differential signal. This indicates the first channel signal. This indicates the second channel signal; ; in, This represents the summation signal. and The meaning is the same as the aforementioned formula; the gain of the differential circuit is fixed to 1 by the on-chip matching equivalent resistors; when the diagonally paired pixel modules are located at the edge of the pixel array, the adder circuit multiplies the second channel signal by the preset relative gain and adds it to the first channel signal;

[0027] Step S303: Take the absolute value of the differential signal to obtain the differential amplitude, extract the polarity of the differential signal to obtain the polarity flag bit used to indicate the diagonal where the event is located, and combine the differential amplitude, the amplitude of the summed signal and the polarity flag bit to form an analog electrode characteristic quantity.

[0028] Preferably, step S40, which involves performing an interaction depth inversion task based on the amplitude ratio calibration mapping mechanism using the simulated electrode feature quantities and outputting a depth correction parameter set, specifically includes:

[0029] Step S401: Call the calibration relationship between the amplitude ratio and the interaction depth, which was established in advance by combining the simulation of weighted potential and charge transport with the collimation source incident experiments at different depths. This calibration relationship is a monotonic correspondence within the unipolar region of the semiconductor detector.

[0030] Step S402: Read the amplitude and differential amplitude of the summed signal from the simulated electrode characteristic quantities, and calculate the amplitude ratio: ;

[0031] in, This indicates the amplitude ratio. This indicates the amplitude of the summation signal. Indicates the difference magnitude;

[0032] Step S403: Input the amplitude ratio into the calibration relationship, invert to obtain the interaction depth of the event, and combine the interaction depth and differential amplitude to form a depth correction parameter group.

[0033] Preferably, step S50, which involves performing an energy reconstruction task based on the depth correction parameter set using a charge collection efficiency correction mechanism and outputting a corrected energy spectrum, specifically includes:

[0034] Step S501: Read the interaction depth and differential amplitude from the depth correction parameter set, and record the interaction depth as... Query the pre-calibrated charge collection efficiency at the corresponding depth and determine the correction coefficient: ;

[0035] in, The interaction depth is represented as Charge collection efficiency at that time The interaction depth is represented as Correction coefficients at that time;

[0036] Step S502: Apply the correction coefficient to the differential amplitude to obtain the depth-independent energy. ;

[0037] in, This indicates the depth-independent energy. Indicates the difference magnitude. Indicates the correction factor;

[0038] Step S503: Input the depth-independent energy of multiple events into a multichannel analyzer to form the corrected energy spectrum; wherein, the calibration relationship between the amplitude ratio and the interaction depth and the correction coefficient are implemented in the form of a lookup table, polynomial fitting or neural network model, running in a field-programmable gate array, application-specific integrated circuit or host computer software.

[0039] The present invention also provides a semiconductor detector depth correction system based on pixel diagonal pairing and differential summation, comprising:

[0040] The module construction module is used to obtain the detector pixel array configuration, and based on the detector pixel array configuration, it uses an adjacent pixel diagonal pairing mechanism to perform the readout channel construction task and outputs a diagonally paired pixel module.

[0041] The signal acquisition module is used to perform signal acquisition tasks based on the diagonally paired pixel module using a dual-channel charge-sensitive readout mechanism, and output a dual-channel signal group;

[0042] The feature extraction module is used to perform the simulated electrode feature extraction task based on the dual-channel signal group using a differential summation parallel processing mechanism, and output simulated electrode feature quantities;

[0043] The depth inversion module is used to perform an interaction depth inversion task based on the simulated electrode feature quantity using an amplitude ratio calibration mapping mechanism, and output a depth correction parameter set.

[0044] The energy reconstruction module is used to perform the energy reconstruction task based on the depth correction parameter set using a charge collection efficiency correction mechanism, and output the corrected energy spectrum.

[0045] The present invention also provides a semiconductor detector depth correction device based on pixel diagonal pairing and differential summation. The semiconductor detector depth correction device based on pixel diagonal pairing and differential summation includes: a memory, a processor, and a semiconductor detector depth correction program based on pixel diagonal pairing and differential summation stored in the memory and executable on the processor. When the semiconductor detector depth correction program based on pixel diagonal pairing and differential summation is executed by the processor, it implements the above-described method.

[0046] The present invention also provides a computer program product, the computer program product including a semiconductor detector depth correction program based on pixel diagonal pairing and differential summation, wherein the semiconductor detector depth correction program based on pixel diagonal pairing and differential summation implements the above method when executed by a processor.

[0047] The beneficial effects of this invention are as follows:

[0048] 1. By pairing adjacent 2 rows and 2 columns of pixels along the two diagonals, the two readout channels complementarily cover the four pixels of the same module; the simulated cathode signal formed by the sum of the two channels corresponds to the local equivalent large electrode response, without the need to read the entire common cathode, thus reducing the impact of common cathode leakage current, capacitance, noise and global event accumulation from the signal source.

[0049] 2. By forming a simulated anode signal through a single fixed unity gain differential circuit, the carrier capture correlation loss shared by the two channels can be deducted; the absolute value of the differential signal carries the deposition energy information, and the polarity is used to distinguish the diagonal of the module where the event is located, so that the same bipolar signal can simultaneously support energy measurement and location discrimination.

[0050] 3. By calling the pre-calibrated depth mapping by the ratio of the simulated cathode signal amplitude to the simulated anode signal amplitude, and then correcting the differential amplitude according to the charge collection efficiency of the corresponding depth, the energy response of different interaction depths can be made more consistent, thereby suppressing the low-energy tail of the energy spectrum and improving the energy resolution and peak ratio.

[0051] 4. The entire calibration link only measures the signal amplitude of two readout channels, without requiring high-speed waveform sampling, timing discrimination, or time-to-digital conversion; four pixels are combined into two readout channels, which is suitable for reducing the number of electronic channels, chip area, power consumption, and module-by-module differential gain calibration of large-area pixel arrays.

[0052] 5. The differential circuit adopts unity gain fixed by the on-chip matching resistor, without setting adjustable gain components, eliminating the need to scan and adjust the differential gain module by module, and reducing temperature drift, time drift and mismatch between modules caused by adjustable gain; the two input terminals use the same weight, which is beneficial to suppress common-mode components of power supply noise and external electromagnetic interference.

[0053] 6. The interaction depth and the position of the pixel module in the electrode plane together constitute three-dimensional position information, which can be used for the reconstruction of scattered photon positions in Compton imaging and the correction of interaction depth in coded imaging. Attached Figure Description

[0054] Figure 1 This is a flowchart illustrating the first embodiment of a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation according to the present invention.

[0055] Figure 2 This is a comparative schematic diagram of the adjacent 2-row 2-column pixel diagonal pairing readout structure of the first embodiment of the semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation of the present invention.

[0056] Figure 3 This is a block diagram illustrating the principle of a diagonally paired pixel module, a preamplifier unit, a differential circuit, and an adder circuit, representing the first embodiment of a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation according to the present invention.

[0057] Figure 4 This is a schematic diagram illustrating the principle of the absolute value processing, polarity discrimination, depth inversion, and energy correction processing chain of a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation according to the first embodiment of the present invention.

[0058] Figure 5 This is a schematic diagram of the weighted potential distribution of the simulated cathode signal and simulated anode signal in the first embodiment of a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation according to the present invention.

[0059] Figure 6 This is a schematic diagram of the amplitude ratio as a function of interaction depth, representing a first embodiment of the semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation according to the present invention.

[0060] Figure 7 This is a schematic diagram of the calibration curves showing the change of charge collection efficiency and correction coefficient with interaction depth in the first embodiment of a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation according to the present invention.

[0061] Figure 8 This diagram illustrates a comparison between the conventional single-pixel readout energy spectrum and the depth-corrected energy spectrum of the present invention, based on a first embodiment of a semiconductor detector depth correction method and system according to pixel diagonal pairing and differential summation. Detailed Implementation

[0062] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0063] Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0064] Example 1: As Figure 1 The diagram shown is a flowchart of the first embodiment of a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation according to the present invention.

[0065] In the first embodiment, a CdZnTe detector with 16 rows and 16 columns, totaling 256 pixels, is used. The crystal size is 40 mm × 40 mm × 5 mm, and the size of a single pixel is 2.46 mm × 2.46 mm. A negative 500 volt operating bias is applied to the cathode surface. The detector completes pixel readout, simulated electrode feature formation, depth inversion, and energy correction according to steps S10 to S50.

[0066] The semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation includes:

[0067] Step S10: Obtain the detector pixel array configuration, and based on the detector pixel array configuration, use the adjacent pixel diagonal pairing mechanism to perform the readout channel construction task and output the diagonal paired pixel module.

[0068] The detector pixel array configuration refers to the pixel row and column relationship, pixel position, and corresponding electrode connection conditions on the anode surface of the semiconductor detector crystal. It is applicable to semiconductor crystals such as CdZnTe, CdTe, HgI2, GaAs, TlBr, or PbI2. According to this configuration, four pixels in two adjacent rows and two columns are defined as a square basic module. Two pixel electrodes on one diagonal are interconnected to form a first readout channel, and two pixel electrodes on the other diagonal are interconnected to form a second readout channel. The two diagonals complementarily cover all four pixels within the same module, allowing for an equivalent large electrode response covering the module area when the two channels are subsequently summed, while preserving the response difference between the two diagonals. For [the following is incomplete and requires further context: "for including..."] A complete array of pixels, with every four pixels forming two readout channels, corresponding to a total of readout channels of [number]. Taking a CdZnTe detector with 16 rows and 16 columns and a total of 256 pixels as an example, the pixel plane is divided into 8 rows and 8 columns, a total of 64 square basic modules. Each module outputs two readout channels. Therefore, subsequent electronic processing is performed on local modules, and it is not necessary to use the entire common cathode as the depth correction input.

[0069] For example, such as Figure 2 As shown, Figure 2 The left side shows a traditional pixel-by-pixel readout structure, where each pixel electrode leads out an independent readout channel; Figure 2 The right side shows the diagonal pairing structure of this embodiment. The red box represents a square basic module composed of two adjacent rows and two columns of pixels. Within the same module, the two pixel electrodes on one diagonal are connected to each other, and the two pixel electrodes on the other diagonal are connected to each other. This connection method allows four pixels to form two readout channels, preserving the response differences between the two diagonals while merging the coverage areas of the two channels to correspond to the entire module area. For those containing... An array of pixels, with the number of electronic readout channels being... In this embodiment, the 16-row, 16-column pixel plane is divided into 8-row, 8-column modules, reducing the number of electronic readout channels from 256 to 128.

[0070] Step S20: Based on the diagonally paired pixel module, a dual-channel charge-sensitive readout mechanism is used to perform signal acquisition tasks and output dual-channel signal groups.

[0071] After the diagonally paired pixel module is formed, the first readout channel is connected to the first charge-sensitive preamplifier, and the second readout channel is connected to the second charge-sensitive preamplifier. The two preamplifiers respond to the induced charges collected by the two pixel electrodes on the corresponding diagonals, respectively, and output the first channel signal. Second channel signal The two channels are independent but correspond to the same 2x2 pixel module, thus reflecting both the charge response of each diagonal line and the correlation components formed by the same radiative interaction and carrier transport process. Subsequent differential processing uses the difference between the two channels to form a pseudo-anodic signal, and summation processing uses the complementary coverage relationship between the two channels to form a pseudo-cathode signal. Signal acquisition only records the amplitude of the difference and summation between the first and second channel signals, without measuring electron drift time. Therefore, there is no need to set up a high-speed waveform sampling analog-to-digital converter, timing discrimination circuit, or time-to-digital converter for depth acquisition. In one embodiment, the two readout channels of each module are led to Preamplifier A and Preamplifier B, respectively, forming the input of the subsequent single application-specific integrated circuit (ASIC) processing channel.

[0072] For example, such as Figure 3 As shown, Figure 3 The left side further shows the two diagonal interconnection paths of a single 2x2 pixel module. The first diagonal channel connects to charge-sensitive preamplifier A, and the second diagonal channel connects to charge-sensitive preamplifier B, outputting the first and second channel signals respectively. Both channels originate from the same local module and can synchronously reflect the induced charge response of the same event along both diagonal directions, providing a common input for the differential and adder circuits on the right. The entire acquisition process does not read the detector's common cathode or record electron drift time.

[0073] Step S30: Based on the dual-channel signal group, a differential summation parallel processing mechanism is used to perform the simulated electrode feature extraction task and output the simulated electrode feature quantity.

[0074] The first channel signal is denoted as The second channel signal is denoted as A single unity-gain differential amplifier outputs a simulated anode signal. ;

[0075] in, Indicates a differential signal. Indicates the first channel signal. This represents the second channel signal. The differential gain is fixed at 1 by four matched equal-value resistors on-chip; there is no gain stage controlled by a digital potentiometer, variable resistor, or register, and no gain adjustment is performed during calibration and operation. Both inputs use equal weights, suppressing common power supply noise and external electromagnetic interference components during subtraction. The adder circuit outputs a cathode-like signal. ;

[0076] in, This indicates a summation signal. and The meaning is the same as the aforementioned formula. The two channels complementarily cover the four pixels of the module, therefore the summed signal corresponds to the equivalent large electrode response covering the entire module area. For array edge pixels, the adder circuit can be configured as follows: Configuration, in which, This represents the relative gain preset for the geometric conditions of edge pixels.

[0077] Figure 3 The right side shows that the first and second channel signals simultaneously enter the differential circuit and the adder circuit. The differential circuit only has one unity-gain differential output, without a second differential circuit or a two-signal comparison and selection unit; the adder circuit uses the same dual-channel signal group to form a summation output. This parallel structure simultaneously generates simulated anode and simulated cathode signals on the same input, avoiding the need to read the actual cathode.

[0078] For example, such as Figure 4 As shown, Figure 4 The display shows the differential signal entering the absolute value circuit and polarity determination unit. The absolute value circuit can be an analog absolute value circuit, or it can use digital absolute value calculation after analog-to-digital conversion to output the differential amplitude. The polarity discrimination unit can extract the differential signal symbol from the comparator and output a 1-bit polarity flag; when Greater than When the differential signal is positive, the event is biased towards the first diagonal; when Less than When the differential signal is negative, the event is biased towards the second diagonal. The differential amplitude serves as the energy correction input, and the polarity flag provides information about the diagonal position within the module.

[0079] For example, such as Figure 5 As shown, Figure 5 The weighted potential distributions for the simulated cathode and simulated anode signals are presented separately. The weighted potential corresponding to the summation signal changes approximately linearly along the crystal depth direction, exhibiting a cathode-type response; the weighted potential corresponding to the differential signal is concentrated on the anode side and exhibits unipolar characteristics. The summation response and the differential response depend on depth in different ways, allowing their amplitude ratio to vary with the depth of the event. Differential processing simultaneously cancels the hole trapping correlation loss shared by the two diagonal channels, making the differential amplitude closer to the unipolar response corresponding to the deposition energy.

[0080] Step S40: Based on the simulated electrode characteristic quantities, the interaction depth inversion task is performed using the amplitude ratio calibration mapping mechanism, and the depth correction parameter set is output.

[0081] The amplitude ratio used for deep inversion is: ;

[0082] in, Indicates the amplitude ratio, Indicates the amplitude of the simulated cathode signal. This represents the amplitude of the simulated anode signal. The amplitude ratio is related to the interaction depth. The relationship was pre-calibrated through simulations of weighted potential and charge transport combined with experiments using a collimated standard source incident at different depths. Within the detector's unipolar region, this relationship exhibits a monotonic or approximately linear variation, from which the interaction depth can be inverted from the event amplitude ratio.

[0083] For example, such as Figure 6 As shown, Figure 6 The calibration curve displays the amplitude ratio as a function of interaction depth. The horizontal axis represents the interaction depth, and the vertical axis represents the amplitude ratio; the monotonic change of the curve ensures that each effective amplitude ratio corresponds to a depth within the calibration range. During actual operation, the depth inversion module receives... Figure 4 The summation signal amplitude and differential amplitude output by the processing chain are calculated, and the amplitude ratio is then used to obtain the interaction depth through the curve or its equivalent mapping. The interaction depth and differential amplitude are then fed into the energy reconstruction stage together.

[0084] Step S50: Based on the depth correction parameter set, perform the energy reconstruction task using the charge collection efficiency correction mechanism and output the corrected energy spectrum.

[0085] Interaction depth is The correction factor at that time is: ;

[0086] in, The interaction depth is represented as Charge collection efficiency at that time This represents the correction coefficient for the corresponding depth. The depth-independent energy is: ;

[0087] in, This represents the corrected depth-independent energy. Indicates the difference magnitude. This represents the correction coefficient. Events are collected using a standard radioactive source with known energy. Charge collection efficiency is statistically analyzed in layers according to interaction depth, and a separate correction coefficient table can be established for each module to compensate for material inhomogeneities and response differences between modules.

[0088] For example, such as Figure 7 As shown, Figure 7 The left side shows the calibration curve of charge collection efficiency as a function of interaction depth. Figure 7The right side displays the corresponding correction coefficient curve. As the charge collection efficiency decreases, the correction coefficient, formed by its reciprocal, increases accordingly. Applying this correction coefficient to the differential amplitude allows the response at different depths to be adjusted to the same energy scale. Calibration can be performed using a standard 137Cs or 99mTc radioactive source with known energy, and the resulting charge collection efficiency and correction coefficient are written into the correction mapping corresponding to each module.

[0089] For example, such as Figure 8 As shown, Figure 8 The left side shows the energy spectrum under traditional single-pixel readout conditions, with a tail on the low-energy side caused by differences in carrier trapping and depth response; Figure 8 The right side displays the energy spectrum formed after depth inversion using the amplitude ratio of the simulated cathode and simulated anode signals in this embodiment, and after correcting the differential amplitude based on charge collection efficiency. After correction, events at different depths converge to their corresponding energy peaks, low-energy tails are suppressed, and peak shapes become narrower. Traditional pixel-by-pixel readout has a contrast ratio of 4.5% for energy resolution and 41% for total peak ratio. Figure 8 This indicates the trend of reduced low-energy tailing and narrowed peak shape after correction, with energy resolution improved to 3.0% and total peak ratio improved to 59%.

[0090] The calibration process includes fixing the differential gain, establishing the amplitude ratio versus depth calibration relationship, and establishing the charge collection efficiency correction relationship. The gain of the differential circuit is fixed to 1 by the on-chip matching resistor, and this fixed value is shared by the entire array module. The amplitude ratio versus depth calibration relationship is established by combining weighted potential and charge transport simulations with collimated source incident experiments at different depths. The charge collection efficiency and correction coefficients are statistically analyzed by depth using a known energy standard radioactive source. The amplitude ratio versus depth relationship and correction coefficients can be implemented using lookup tables, polynomial fitting, or neural network models, and run on a field-programmable gate array, application-specific integrated circuit, or host computer software. Alternatively, the amplitudes of the simulated cathode signal and the simulated anode signal can be used as two parameters to establish a correction mapping, and the depth correction and energy reconstruction can be completed in one step by the two-parameter correction mapping.

[0091] Example 2: Furthermore, the present invention provides a semiconductor detector depth correction system based on pixel diagonal pairing and differential summation, employing a semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation as described in the above embodiments, which can solve the technical problem of semiconductor detector depth correction based on pixel diagonal pairing and differential summation. The beneficial effects of the semiconductor detector depth correction system based on pixel diagonal pairing and differential summation provided by the present invention are the same as those of the semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation provided in the above embodiments, and other technical features of the semiconductor detector depth correction system based on pixel diagonal pairing and differential summation are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.

[0092] Example 3: This invention provides a semiconductor detector depth correction device based on pixel diagonal pairing and differential summation. The device includes at least one processor and a memory communicatively connected to the processor. The memory stores instructions executable by the processor, which are then executed to enable the processor to perform the semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation described in Example 1. The semiconductor detector depth correction device based on pixel diagonal pairing and differential summation in this invention can include, but is not limited to, mobile terminals such as mobile phones, laptops, digital radio receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), PMPs (Portable Media Players), and in-vehicle terminals (e.g., in-vehicle navigation terminals), as well as fixed terminals such as digital TVs and desktop computers. This semiconductor detector depth correction device based on pixel diagonal pairing and differential summation is merely an example and should not limit the functionality or scope of the invention. A semiconductor detector depth correction device based on pixel diagonal pairing and differential summation may include a processing unit (e.g., a central processing unit, a graphics processing unit, etc.) that can perform various appropriate actions and processes according to a program stored in a read-only memory or a program loaded from a storage device into a random access memory. The random access memory also stores various programs and data required for the operation of the semiconductor detector depth correction device based on pixel diagonal pairing and differential summation. The processing unit, read-only memory, and random access memory are interconnected via a bus. An I / O interface is also connected to the bus. Typically, the following systems can be connected to the I / O interface: input devices including touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices including liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices including magnetic tapes, hard disks, etc.; and communication devices. The communication device allows the semiconductor detector depth correction device based on pixel diagonal pairing and differential summation to exchange data with other devices wirelessly or via wired communication. While a semiconductor detector depth correction device based on pixel diagonal pairing and differential summation with various systems has been described, it should be understood that implementation of all the described systems is not required. More or fewer systems may be implemented alternatively.

[0093] Example 4: This invention also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation as described above. The computer program product provided by this invention can solve the technical problem of semiconductor detector depth correction based on pixel diagonal pairing and differential summation. Compared with the prior art, the beneficial effects of the computer program product provided by this invention are the same as those of the semiconductor detector depth correction method and system based on pixel diagonal pairing and differential summation provided in the above embodiments, and will not be repeated here.

[0094] In particular, according to the embodiments disclosed in this invention, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this invention include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from a storage device, or installed from a read-only memory. When the computer program is executed by a processing device, it performs the functions defined in the methods of the embodiments disclosed in this invention.

[0095] It should be understood that the various parts disclosed in this invention can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics may be combined in any suitable manner in one or more embodiments or examples.

[0096] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the present invention and its equivalents, the present invention also intends to include these modifications and variations.

Claims

1. A semiconductor detector depth correction method based on pixel diagonal pairing and differential summation, characterized in that the method... include: Step S10: Obtain the detector pixel array configuration, and based on the detector pixel array configuration, perform the readout channel construction task using an adjacent pixel diagonal pairing mechanism to output the diagonally paired pixel module; Step S10 specifically includes: Step S101: Based on the detector pixel array configuration, the pixel array of the semiconductor detector crystal is divided into multiple square basic modules composed of adjacent 2 rows and 2 columns of pixels; Step S102: For each of the square basic modules, the two pixel electrodes on the first diagonal are interconnected to form a first readout channel, and the two pixel electrodes on the second diagonal are interconnected to form a second readout channel; Step S103: Determine the first readout channel and the second readout channel as diagonally paired pixel modules of corresponding square basic modules, so that every four pixels correspond to two readout channels; Step S20: Based on the diagonally paired pixel module, a dual-channel charge-sensitive readout mechanism is used to perform signal acquisition tasks and output dual-channel signal groups; Step S30: Based on the dual-channel signal group, a differential summation parallel processing mechanism is used to perform the simulated electrode feature extraction task and output the simulated electrode feature quantity; Step S40: Based on the simulated electrode feature quantities, perform the interaction depth inversion task using the amplitude ratio calibration mapping mechanism, and output the depth correction parameter set; Step S50: Based on the depth correction parameter set, perform the energy reconstruction task using the charge collection efficiency correction mechanism and output the corrected energy spectrum.

2. The semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in claim 1, characterized in that, Step S20, which involves using a dual-channel charge-sensitive readout mechanism based on the diagonally paired pixel module to perform signal acquisition and output a dual-channel signal group, specifically includes: Step S201: Based on the diagonally paired pixel module, determine the two readout channels therein as the first readout channel and the second readout channel, respectively; connect the first readout channel to the first charge-sensitive preamplifier; connect the second readout channel to the second charge-sensitive preamplifier. Step S202: Using the first charge-sensitive preamplifier, perform charge-sensitive amplification on the induced charge signal of the first readout channel; using the second charge-sensitive preamplifier, perform charge-sensitive amplification on the induced charge signal of the second readout channel; output the first channel signal and the second channel signal.

3. The semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in claim 2, characterized in that, In step S202, the induced charge signal of the first readout channel is amplified using the first charge-sensitive preamplifier; the induced charge signal of the second readout channel is amplified using the second charge-sensitive preamplifier. The steps of outputting the first channel signal and the second channel signal specifically include: the first charge-sensitive preamplifier and the second charge-sensitive preamplifier are independent of each other, and the signal acquisition process does not require measuring the electronic drift time of the first channel signal and the second channel signal.

4. The semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in claim 1, characterized in that, Step S30, which involves performing the simulated electrode feature extraction task based on the dual-channel signal group using a differential summation parallel processing mechanism and outputting the simulated electrode feature quantity, specifically includes: Step S301: Determine the first channel signal and the second channel signal from the dual-channel signal group, and denot them as follows: and ; Step S302: A single differential circuit with a fixed gain of 1 is used to subtract the first channel signal and the second channel signal to form a differential signal serving as an anode-like signal. An adder circuit is then used to add the first channel signal and the second channel signal to form a summation signal serving as a cathode-like signal. Where: ； in, This represents the differential signal. This indicates the first channel signal. This indicates the second channel signal; ； in, This represents the summation signal. and The meaning is the same as the aforementioned formula; the gain of the differential circuit is fixed to 1 by the on-chip matching equivalent resistors; when the diagonally paired pixel modules are located at the edge of the pixel array, the adder circuit multiplies the second channel signal by the preset relative gain and adds it to the first channel signal; Step S303: Take the absolute value of the differential signal to obtain the differential amplitude, extract the polarity of the differential signal to obtain the polarity flag bit used to indicate the diagonal where the event is located, and combine the differential amplitude, the amplitude of the summed signal and the polarity flag bit to form an analog electrode characteristic quantity.

5. The semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in claim 1, characterized in that, Step S40, which involves performing an interaction depth inversion task based on the amplitude ratio calibration mapping mechanism using the simulated electrode feature quantities and outputting a depth correction parameter set, specifically includes: Step S401: Call the calibration relationship between the amplitude ratio and the interaction depth, which was established in advance by combining the simulation of weighted potential and charge transport with the collimation source incident experiments at different depths. This calibration relationship is a monotonic correspondence within the unipolar region of the semiconductor detector. Step S402: Read the amplitude and differential amplitude of the summed signal from the simulated electrode characteristic quantities, and calculate the amplitude ratio: ； in, This indicates the amplitude ratio. This indicates the amplitude of the summation signal. Indicates the difference magnitude; Step S403: Input the amplitude ratio into the calibration relationship, invert to obtain the interaction depth of the event, and combine the interaction depth and differential amplitude to form a depth correction parameter group.

6. The semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in claim 1, characterized in that, Step S50, which involves performing an energy reconstruction task based on the depth correction parameter set using a charge collection efficiency correction mechanism and outputting the corrected energy spectrum, specifically includes: Step S501: Read the interaction depth and differential amplitude from the depth correction parameter set, and record the interaction depth as... Query the pre-calibrated charge collection efficiency at the corresponding depth and determine the correction coefficient: ； in, The interaction depth is represented as Charge collection efficiency at that time The interaction depth is represented as Correction coefficients at that time; Step S502: Apply the correction coefficient to the differential amplitude to obtain the depth-independent energy. ； in, This indicates the depth-independent energy. Indicates the difference magnitude. Indicates the correction factor; Step S503: Input the depth-independent energy of multiple events into a multichannel analyzer to form the corrected energy spectrum; wherein, the calibration relationship between the amplitude ratio and the interaction depth and the correction coefficient are implemented in the form of a lookup table, polynomial fitting or neural network model, running in a field-programmable gate array, application-specific integrated circuit or host computer software.

7. A semiconductor detector depth correction system based on pixel diagonal pairing and differential summation, applied to the semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in any one of claims 1 to 6, characterized in that, The system includes: The module construction module is used to obtain the detector pixel array configuration, and based on the detector pixel array configuration, it uses an adjacent pixel diagonal pairing mechanism to perform the readout channel construction task and outputs a diagonally paired pixel module. The signal acquisition module is used to perform signal acquisition tasks based on the diagonally paired pixel module using a dual-channel charge-sensitive readout mechanism, and output a dual-channel signal group; The feature extraction module is used to perform the simulated electrode feature extraction task based on the dual-channel signal group using a differential summation parallel processing mechanism, and output simulated electrode feature quantities; The depth inversion module is used to perform an interaction depth inversion task based on the simulated electrode feature quantity using an amplitude ratio calibration mapping mechanism, and output a depth correction parameter set. The energy reconstruction module is used to perform the energy reconstruction task based on the depth correction parameter set using a charge collection efficiency correction mechanism, and output the corrected energy spectrum.

8. A semiconductor detector depth correction device based on pixel diagonal pairing and differential summation, characterized in that, The semiconductor detector depth correction device based on pixel diagonal pairing and differential summation includes: a memory, a processor, and a semiconductor detector depth correction program based on pixel diagonal pairing and differential summation stored in the memory and executable on the processor. When the semiconductor detector depth correction program based on pixel diagonal pairing and differential summation is executed by the processor, it implements a semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in any one of claims 1 to 6.

9. A computer program product, characterized in that, The computer program product includes a semiconductor detector depth correction program based on pixel diagonal pairing and differential summation. When the semiconductor detector depth correction program based on pixel diagonal pairing and differential summation is executed by the processor, it implements a semiconductor detector depth correction method based on pixel diagonal pairing and differential summation as described in any one of claims 1 to 6.

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