A photonic integrated chip design method and chip based on reverse design mechanism
Patent Information
- Application Number
- CN202610753545.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-05-28
- Publication Date
- 2026-10-30
AI Technical Summary
这种芯片架构目前面临着摩尔定律接近物理极限的严峻挑战:纳米级制程工艺下,漏电流、RC延迟、热噪声等问题一方面导致芯片功耗呈指数级增长,另一方面制约了算力密度和传输带宽的提升,难以满足下一代高性能计算场景的需求
(1)本发明提出平面波导结构,通过在若干层平面波导结构中使用双光波导对输入比特进行编码,将有限域中的数值映射关系转化为首层输入波导和末层输出波导之间的光强分布映射关系,进而获得可进行迭代优化的硅基芯片结构;通过频域有限差分方法,基于相对介电常数分布,求解电磁场强度分布,进而获得平面波导结构中的电场强度分布,通过所提出的逆向设计方法,进而获得平面波导结构的相对介电常数分布,通过所提出的分步式残差训练方法进行多阶段迭代训练,进而引导优化过程更快收敛到有效解附近;通过不断迭代优化,最终得到可进行低功耗代数运算的光子集成芯片;
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Figure CN123010177A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of photonic integrated chips, and in particular to a photonic integrated chip design method and chip based on a reverse design mechanism. Background Technology
[0002] In recent years, fields such as artificial intelligence, 5G / 6G communication, and high-performance computing have developed rapidly, leading users to place higher demands on chip performance, including computing density, power consumption control, and transmission bandwidth. Widely used silicon-based electronic chips perform calculations based on the transmission and processing of electrical signals. This chip architecture currently faces the severe challenge of Moore's Law approaching its physical limits: under nanometer-scale manufacturing processes, issues such as leakage current, RC delay, and thermal noise cause chip power consumption to increase exponentially, while also limiting improvements in computing density and transmission bandwidth, making it difficult to meet the needs of next-generation high-performance computing scenarios.
[0003] Silicon-based photonic chips integrate technologies from silicon-based integrated circuits and photonics, offering advantages such as high-speed optical signal transmission, strong anti-interference capabilities, and low power consumption. They represent a crucial direction for overcoming performance bottlenecks in silicon-based electronic chips. The core approach of this chip architecture is to integrate photonic components and micro / nano structures for optical emission, transmission, modulation, and detection on a silicon-based platform. This enables high-speed conversion and processing of optical and electrical signals, potentially solving the computing power, energy consumption, and transmission challenges of silicon-based electronic chips in high-frequency, high-bandwidth scenarios.
[0004] However, most existing silicon-based photonic chips use a large-scale cascaded Mach-Zehnder interferometer architecture. This structure cannot achieve high-density integration on small-area silicon platforms, and transmission loss is often uncontrollable. Specifically, the cascading nature of the Reck grid architecture leads to phase error accumulation and poor robustness in multi-stage transmission. While the optimized Clements architecture offers slight improvements in loss control, its optical field manipulation range is limited by the fixed topology of the grid, making it difficult to achieve complex tasks such as algebraic operations by manipulating multi-dimensional optical field characteristics. In algebraic operation scenarios, the above architectures all rely on empirical design, and their physical characteristics significantly limit their ability to perform algebraic operations. Therefore, there is an urgent need to propose a more efficient and highly integrated silicon-based photonic chip design method to perform complex tasks such as algebraic operations. Summary of the Invention
[0005] The purpose of this invention is to overcome the shortcomings of the existing technology and provide a more efficient and highly integrated photonic integrated chip design method and chip based on reverse design mechanism. It can realize the design of photonic integrated chips capable of performing complex algebraic operations on a small silicon-based platform with as few iterations as possible. At the same time, the photonic integrated chip has the advantages of low power consumption, integration, high robustness and strong versatility.
[0006] The objective of this invention can be achieved through the following technical solutions: A photonic integrated chip design method based on reverse design mechanism includes: S1: Construct a photonic integrated chip containing a multi-layer planar waveguide structure. The first-layer planar waveguide structure encodes the input bits based on dual optical waveguides, transforming the numerical mapping relationship in the finite domain into the light intensity distribution mapping relationship between the first-layer input waveguide and the last-layer output waveguide. Each layer of planar waveguide structure is decomposed into multiple discrete finite elements. S2: Select the first [chip] from the photonic integrated chip. K The planar waveguide structure of the first layer, in the first layer K Selecting in a layered planar waveguide structure N Each output waveguide is assigned an output bit data as the target value for light intensity integration. S3: Forward K The relative permittivity of the layered planar waveguide structure is projected. S4: Solving using the frequency domain finite difference method K The electric field intensity distribution after projection in a layered planar waveguide structure; S5: Using a reverse design method, based on the obtained electric field intensity distribution, calculate the regional optical intensity integral of the output waveguide of each layer of planar waveguide structure, and compare it with the target value of the optical intensity integral. K The relative permittivity of each layer in the finite element method of the layered planar waveguide structure in the next iteration; S6: Repeat steps S3-S5 to determine whether the accuracy of the output result of the photonic integrated chip has reached saturation. If so, proceed to step S7. S7: In K One more planar waveguide structure is added after the first planar waveguide structure, and steps S2-S6 are repeated until the maximum number of planar waveguide structures is reached, thus obtaining the final photonic integrated chip design result.
[0007] Furthermore, each planar waveguide structure has an input region and an output region on both sides, with multiple input waveguides in the input region and multiple output waveguides in the output region. Each layer of the planar waveguide structure is an independent aperiodic photonic structure.
[0008] Furthermore, the first k The first layer in a planar waveguide structure i Line 1 j The finite element of the column in the first t The expression for the relative permittivity in the round iteration is: In the formula, For the first kLayered planar waveguide structure i Line 1 j The finite element of the column in the first t The relative permittivity in the round iteration, This is the lower bound of the relative permittivity. This is the upper bound of the relative permittivity. For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Density function in round iteration; Initial values are assigned according to a uniform or random distribution, thereby assigning... Initial value.
[0009] Furthermore, the input region of the first-layer planar waveguide structure of the photonic integrated chip is determined according to the number of input bits. N , divided into N Each input sub-region is provided with two input waveguides, i.e., dual optical waveguides; in any one input sub-region, the optical intensity of the two input waveguides is assigned to be 0 / 1 or 1 / 0 according to the value of the bit at the corresponding position of the input bit. The second~ of the photonic integrated chip K The number of input waveguides in the layered planar waveguide structure is the same as the number of output waveguides in the previous layer. The light intensity value of any input waveguide is the activation value of the normalized function of the integral of the light intensity of the corresponding output waveguide in the previous layer. The first to ( ) of the photonic integrated chip K -1) The number of output waveguides in the output region of the layered planar waveguide structure is adjustable; The first of the photonic integrated chip K Layered planar waveguide structure N In each output waveguide, the light intensity is integrated for any output waveguide, and the corresponding output bit value is determined to be 0 or 1 based on the activation value of the normalization function of the light intensity integration.
[0010] Furthermore, the frequency domain finite difference method includes: Construct electric field strength exist x , y , z Directional components , , The equations for the electric field intensity are given by: In the formula, , , It is the first k Layered planar waveguide structure in the first t Source strength in round iteration x , y , z directional components, , , It is the discretization of the planar waveguide structure x , y , z Grid size in the direction, oh It is the angular frequency of the light wave. m It is the permeability. c It is the propagation constant, the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t In round iteration c 2 Represented as: In the formula, s It is electrical conductivity; ( mn × mn )yes diagonal matrix, For the first k The first layer in a planar waveguide structure i Line 1 j The finite element of the column in the first t The relative permittivity values in the round iterations, ( mn × mn ), ( mn × mn ), ( mn × mn This can be expressed as a tensor product: In the formula, I m ( m × m ), I n ( n × n ), I 1 (1×1) is the identity matrix and the Laplace matrix. L m , L n , L 1st i Line 1j Column elements l ij satisfy: In the electric field strength equations, ( mn ×1) ( mn ×1) ( mn ×1) is the first k Layered planar waveguide structure in the first t Electric field strength in round iteration of x , y , z Directional components , , The vector, ( mn ×1) ( mn ×1) ( mn ×1) is the first k Layered planar waveguide structure in the first t Source strength in round iteration of x , y , z Directional components , , ; Substitute the known parameters of the planar waveguide structure to be determined oh , m , s , , , , , , , Solving for the first... k Layered planar waveguide structure in the first t Electric field strength in round iteration , .
[0011] Furthermore, the reverse engineering method includes: S51: Based on the obtained first... k Layered planar waveguide structure in the first t Electric field intensity distribution in round iteration Calculate the regional optical intensity integral of the output waveguide of the corresponding planar waveguide structure. ,in, aThis is the number of the output waveguide; S52: Normalize the calculated regional light intensity integral using a normalization function, and then activate it using an activation function to obtain the normalized function activation value. The input light intensity is used as the input light intensity for the next layer of planar waveguide structure, and the calculation of the next layer of planar waveguide structure in step S51 is performed. t The normalized activation value of the regional light intensity integral in each iteration is obtained until the th iteration is achieved. K Activation value of the normalized function for the regional intensity integral of a layered planar waveguide structure ; S53: Calculate the... K Target value of optical intensity integral of layered planar waveguide structure With the activation value of the normalization function Binary cross-entropy ; S54: Using the chain rule, based on the binary cross-entropy... Recursively calculate the first k In a layered planar waveguide structure, the first a The input waveguide at the th ... t Local gradient of input light intensity in round iteration ; S55: Using the chain rule, based on the local gradient of the input light intensity... Calculate the first k In a layered planar waveguide structure, the first i Line 1 j The finite element of the column in the first t Local gradient of density function in round iteration ; S56: Based on the local gradient of the density function Calculate the first layer of the planar waveguide structure layer by layer. i Line 1 j The finite element of the column in the first t Correction amount of density function in round iteration ; S57: Correction based on the density function In the layer-by-layer update of the planar waveguide structure, the first i Line 1 j The finite element of the column in the ( t +1) Density function in round iteration and relative permittivity .
[0012] Furthermore, the regional light intensity integral The calculation expression is: In the formula, Oa Representing the a One output waveguide; The activation value of the normalization function The calculation expression is: In the formula, For normalization function, For activation functions; The binary cross-entropy The calculation expression is: In the formula, The number of output bits is equal to the number of selected output waveguides. a This is the number of the output waveguide. q This is the instance number; The local gradient of the input light intensity The calculation expression is: In the formula, For the k-th layer planar waveguide structure in the th... t Source strength in round iteration, For the first k The activation value of the normalized function for the regional optical intensity integral of the layered planar waveguide structure; The local gradient of the density function The calculation expression is: In the formula, for diagonal matrix, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Propagation constant in round iteration The square of, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Density function in round iteration; The correction amount of the density function The calculation expression is: In the formula, or It's the learning rate. It is the ADAM optimizer; The density function and relative permittivity The calculation expression is: In the formula, This is the lower bound of the relative permittivity. This is the upper bound of the relative permittivity.
[0013] Furthermore, in step S2, the activation value of the normalized function of the optical intensity integral for each of the multiple output waveguides selected is... Each of them independently satisfies the following conditions: In the formula, q It is the instance index number of the numerical mapping relationship. It is the first K Layered planar waveguide structure, first t Round iteration, the first a The first output waveguide, the first q The normalized activation value of the light intensity integral value for each instance It is the target value of light intensity integral. The set of corresponding instances is defined as: If the activation value of the normalized function of the integral of the light intensity of each output waveguide is... If all of the above conditions are met, or if the accuracy of the output result of the photonic integrated chip reaches a preset accuracy threshold in the results of multiple adjacent iterations, then the accuracy of the output result of the photonic integrated chip is judged to have reached saturation.
[0014] Furthermore, the calculation expression for the relative permittivity after projection is as follows: In the formula, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Density function in round iteration, For the binarized center parameters, This is a parameter for the degree of binarization, and its value gradually increases during iterative training. For projection function, This is the lower bound of the relative permittivity. This is the upper bound of the relative permittivity. This is the relative permittivity after processing with the projection function.
[0015] The present invention also provides a photonic integrated chip, which is designed using a photonic integrated chip design method based on a reverse design mechanism as described above.
[0016] Compared with the prior art, the present invention has the following advantages: (1) This invention proposes a planar waveguide structure. By using dual optical waveguides to encode the input bits in a planar waveguide structure with several layers, the numerical mapping relationship in the finite domain is transformed into the optical intensity distribution mapping relationship between the first layer input waveguide and the last layer output waveguide, thereby obtaining a silicon-based chip structure that can be iteratively optimized. By using the frequency domain finite difference method, the electromagnetic field intensity distribution is solved based on the relative permittivity distribution, thereby obtaining the electric field intensity distribution in the planar waveguide structure. By using the proposed reverse design method, the relative permittivity distribution of the planar waveguide structure is obtained. By using the proposed step-by-step residual training method, multi-stage iterative training is performed, thereby guiding the optimization process to converge to the vicinity of the effective solution more quickly. Through continuous iterative optimization, a photonic integrated chip capable of low-power algebraic operations is finally obtained. The frequency-domain finite difference method of this invention enables the electric field distribution in a planar waveguide structure to be solved with lower time complexity, thereby accelerating the iterative optimization process. The reverse design method of this invention enables the numerical gradient of the relative permittivity in the planar waveguide structure to be obtained through analytical mathematical calculation, thereby improving the optimizability of the multi-dimensional parameters of the designed photonic integrated chip. The step-by-step residual training method proposed in this invention improves the iterative optimization process of the photonic integrated chip, enhances the convergence ability of the optimization, and enables the design of photonic integrated chips that can perform low-power algebraic operations better and faster.
[0017] (2) This invention enables the design of photonic integrated chips capable of performing complex algebraic operations on a small-area silicon-based platform with the simplest possible design flow. Compared with the prior art, this invention has the advantages of low power consumption, integration, high robustness, and strong versatility. Attached Figure Description
[0018] Figure 1 This is a flowchart illustrating a photonic integrated chip design method based on a reverse design mechanism provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of a planar waveguide structure provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of an output waveguide selection process provided in an embodiment of the present invention; Figure 4 This is a schematic diagram illustrating an example of solving for electric field strength in an embodiment of the present invention; Figure 5This is a schematic diagram illustrating an example of iteratively solving the relative permittivity distribution of a photonic integrated chip provided in an embodiment of the present invention. Detailed Implementation
[0019] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.
[0020] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.
[0021] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.
[0022] Example 1 like Figure 1 As shown, this embodiment provides a photonic integrated chip design method based on a reverse design mechanism, including: S1: Construct a photonic integrated chip containing a multi-layer planar waveguide structure. The first-layer planar waveguide structure encodes the input bits based on dual optical waveguides, transforming the numerical mapping relationship in the finite domain into the light intensity distribution mapping relationship between the first-layer input waveguide and the last-layer output waveguide. Each layer of planar waveguide structure is decomposed into multiple discrete finite elements. S2: Select from the photonic integrated chip K The planar waveguide structure of the first layer, in the first layer K Selecting in a layered planar waveguide structure N Each output waveguide is assigned an output bit data as the target value for light intensity integration. S3: Forward K The relative permittivity of the layered planar waveguide structure is projected. S4: Solving using the frequency domain finite difference method K The electric field intensity distribution after projection in a layered planar waveguide structure; S5: Using a reverse design method, based on the obtained electric field intensity distribution, calculate the regional optical intensity integral of the output waveguide of each layer of planar waveguide structure, and compare it with the target value of the optical intensity integral. KThe relative permittivity of each layer in the finite element method of the layered planar waveguide structure in the next iteration; S6: Repeat steps S3-S5 to determine whether the accuracy of the output result of the photonic integrated chip has reached saturation. If so, proceed to step S7. S7: In K One more planar waveguide structure is added after the first planar waveguide structure, and steps S2-S6 are repeated until the maximum number of planar waveguide structures is reached, thus obtaining the final photonic integrated chip design result.
[0023] The photonic integrated chip constructed in step S1 is composed of K Layered planar waveguide structure composition ( Each layer of the structure has an input region and an output region on both sides. Each region consists of several input waveguides or output waveguides. Each layer of the structure is an independent non-periodic photonic structure, and the structure is a planar waveguide with a low effective refractive index contrast distribution.
[0024] The planar waveguide structure is optimizable. This region uses a discretization approach, decomposing the planar waveguide structure into several finite element methods. The discretized planar waveguide structure of each layer is expressed as follows: m OK n Column matrix .
[0025] The encoding method for each layer of planar waveguide structure follows the law of energy conservation. In the first layer input region and the last layer output region, the numerical mapping relationship in the finite domain is transformed into a binary representation and encoded as the light intensity distribution mapping relationship between the input waveguide and the output waveguide at different spatial locations.
[0026] Definition of input waveguide: For the first-layer planar waveguide: The input region is determined by the number of bits of input bit data. N Classified as N There are two input sub-regions, each with two input waveguides (i.e., dual-waveguides). In any one of these sub-regions, based on the corresponding value (0 or 1) of the input bit data at that bit position, the light intensity of the two input waveguides is assigned a value of 0 / 1 or 1 / 0. For the second... K Layered planar waveguides: The number of input waveguides is the same as the number of output waveguides in the previous layer. The light intensity value of any input waveguide is the activation value of the normalized function of the integral of the light intensity of the corresponding output waveguide in the previous layer; from layer 1 to layer 2... K The input waveguides of the layers are expressed as follows: , ; Definition of output waveguide: For the 1st to ( K -1) Layer planar waveguide: The number of output waveguides in the output region is adjustable; for the first layer planar waveguide... K Planar waveguide: Number of output waveguides isN In any one of the output waveguides, the light intensity is integrated, and the value of the output bit is determined to be 0 or 1 based on the activation value of the normalized function of the light intensity integral; from layer 1 to layer 2... K The output waveguides of the layers are expressed as follows: , .
[0027] The aforementioned finite field, also known as a Galois field, satisfies the operational properties of closure, associativity, and distributivity. It is an integer field containing only a finite number of elements, specifically 2^n elements. N , denoted as GF(2 N ), , That is, the number of bits of input bit data and the number of bits of output bit data.
[0028] In this embodiment, the processing procedure of step S1 specifically includes the following steps: Discretized planar waveguide structure definition step S11: Definition A matrix of relative permittivity is generated, and each matrix is given an initial value according to a certain distribution. The specific process includes: definition indivual m OK n Column matrix ,represent In this embodiment, a discrete planar waveguide structure is described. =3, for any one of these matrices Elements in the matrix Representing the k The first layer of discretized planar waveguide structure i Line 1 j The finite element of the column in the first t The relative permittivity values in the round iterations, satisfy: (1) In equation (1), , These represent the upper and lower bounds of the relative permittivity, respectively, and are known parameters. It is a density function; Appropriately select a uniform distribution form to assign initial values to the density function of each layer of the planar waveguide structure. Therefore, the relative permittivity Assigned initial value .
[0029] Input / output waveguide definition step S12: The input waveguides of the layers are as follows: , No. The output waveguide numbers of the layers are respectively Example Layered planar waveguide structures are used to perform N Bit random permutation algebra operation task.
[0030] In this embodiment, the processing procedure of step S2 specifically includes the following steps: Initial training layer selection step S21: Select the first layer from the... K = 2-layer planar waveguide structure.
[0031] Initial training final layer output waveguide selection step S22: as follows Figure 3 As shown, the first K In a planar waveguide structure, the output waveguide Perform uniform screening and select N One output waveguide is selected; the selected output waveguide is assigned output bit data and its light intensity integral is calculated, while the remaining output waveguides only retain the waveguide structure, are not assigned output bit data and their light intensity integrals are not calculated.
[0032] In this embodiment, the processing procedure of step S3 specifically includes the following steps: Relative permittivity projection operation step S31: Perform a projection operation on the relative permittivity of each layer of planar waveguide structure, and update the relative permittivity and density function after the projection operation; The specific process includes: The relative permittivity of each layer of the planar waveguide structure is obtained by projection function. operate: (2) In equation (2), This is a parameter related to the degree of binarization, which gradually increases in value during iterative training. It is the binarization center parameter; Relative permittivity after projection operation Represented as: (3) Density function after projection operation Updated to: (4) In step S4, the processing procedure of the frequency domain finite difference method specifically includes the following steps: Step S41 for constructing the equation system: Construct a system of difference equations for a single-layer planar waveguide structure. The specific process includes: Construct the following system of equations to solve for the electric field strength. exist x , y , zDirectional components , , : (5) In equation (5), , , It is the first k Layered discretized planar waveguide structure in the first t Source strength in round iteration x , y , z directional components, , , It is the discretization of the planar waveguide structure x , y , z Grid size in the direction, oh It is the angular frequency of the light wave. m It is the permeability (a constant known quantity in a discretized planar waveguide structure). c It is the propagation constant, the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t In round iteration c 2 Represented as: (6) In equation (6), s It is the conductivity (a constant known quantity in a discretized planar waveguide structure). In equation (5), ( mn × mn )yes The diagonal matrix is represented as: (7) In equation (5), ( mn × mn ), ( mn × mn ), ( mn × mn This can be expressed as a tensor product: (8) In equation (8), I m ( m × m ), I n( n × n ), I 1 (1×1) is the identity matrix and the Laplace matrix. L m , L n , L 1st i Line 1 j Column elements l ij satisfy: (9) In equation (5), ( mn ×1) ( mn ×1) ( mn ×1) is the first k Layered discretized planar waveguide structure in the first t Electric field strength in round iteration of x , y , z Directional components , , The vector, ( mn ×1) ( mn ×1) ( mn ×1) is the first k Layered discretized planar waveguide structure in the first t Source strength in round iteration of x , y , z Directional components , , vector: (10) (11) Step S42 for solving the system of equations: Substitute the known parameters to solve for the electric field strength of the single-layer planar waveguide structure; The specific process includes: By substitution oh , m , s , , , , , , , Given the parameters, combine equations (6) and (7) to solve the system of equations (5) and obtain the first... k Layered discretized planar waveguide structure in the first t Electric field strength in round iteration ( ): (12) Layer-by-layer solution step S43: For each layer of discretized planar waveguide structure, perform the above steps S41 and S42 to solve for the solution of each layer at the [missing information - likely a specific step or step]. t Electric field strength in round iteration E t , For example, Figure 4 As shown.
[0033] In step S5, the reverse engineering process specifically includes the following steps: S51: Calculate the regional optical intensity integral of the output waveguide using the electric field strength. The specific process includes: The solution obtained from the frequency domain finite difference method is the first... k Layered discretized planar waveguide structure in the first t Electric field strength in round iteration ,calculate Integral light intensity in the output waveguide region: (13) In equation (13), O a Representing the a One output waveguide.
[0034] Normalization function activation value calculation S52: Calculate the normalization function activation value of each output waveguide by integrating the regional light intensity of the output waveguide. The specific process includes: For the k Regional intensity integral of the output waveguide of the layered discretized planar waveguide structure Using normalization function Normalize all mapping instances before applying the activation function. Activation is performed to obtain the activation value of the normalized function. : (14) The input light intensity of the next layer planar waveguide structure is used as the source term in the electric field intensity equations to obtain the next layer planar waveguide structure at the [missing information - likely a specific point or condition]. t The electric field intensity distribution in the iteration is calculated, and then the process returns to step S51 to calculate the electric field intensity distribution of the next layer of planar waveguide structure in the first iteration. tThe normalized activation value of the regional light intensity integral in each iteration is obtained until the th iteration is achieved. K Activation value of the normalized function for the regional intensity integral of a layered planar waveguide structure .
[0035] For example, starting with the first layer, calculate the electric field intensity distribution. Then, calculate the regional light intensity integral of the first layer's output waveguide. After obtaining the activation value of the normalized function, obtain the input light intensity of the second layer. Then, calculate the regional light intensity integral of the second layer's output waveguide. After obtaining the activation value of the normalized function, obtain the input light intensity of the third layer... and so on, until finally obtaining the... K The regional light intensity of the output waveguides of each layer is integrated, and their normalized function activation values are obtained. Finally, these normalized function activation values of the last layer are used to calculate the binary cross-entropy.
[0036] Binary cross-entropy calculation S53: using the first K The target value of the integral light intensity of the layer and the first K The normalized activation value of the layer output light intensity integral is used to calculate the binary cross-entropy; The specific process includes: Calculate the first K Layer light intensity integral target value and Binary cross-entropy : (15) Local gradient calculation of input light intensity S54: The local gradient of input light intensity of each layer of planar waveguide structure is recursively calculated using the chain rule; The specific process includes: Using the chain rule, recursively calculate the... k In a layered discretized planar waveguide structure, the first a The input waveguide at the th ... t Local gradient of input light intensity in round iteration : (16) (17) Local gradient calculation of density function S55: Calculate the local gradient of density function of each layer of planar waveguide structure using the chain rule; The specific process includes: Using the chain rule, calculate the... k In a layered discretized planar waveguide structure, the first i Line 1 j The finite element of the column in the first t Local gradient of density function in round iteration : (18) In the formula, for diagonal matrix, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Propagation constant in round iteration The square of, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Density function in round iteration; 1st round k Local gradient of the density function of the layer The local gradient of the activation value depends on the normalization function of the light intensity integral in the output region of this layer. .
[0037] S56: Calculate the correction amount of the density function using the local gradient of the density function; The specific process includes: In the layer-by-layer calculation of the discretized planar waveguide structure, the first i Line 1 j The finite element of the column in the first t Correction amount of density function in round iteration : (19) In equation (19), or It is the learning rate (step size). It is the ADAM optimizer.
[0038] Update the density function and relative permittivity values S57: Calculate the density function and relative permittivity values of each layer of the planar waveguide structure in the next iteration using the correction of the density function; The specific process includes: In the layer-by-layer update of the discretized planar waveguide structure, the first i Line 1 j The finite element of the column in the ( t +1) Density function in round iteration and relative permittivity : (20) (twenty one) In step S6, steps S3-S5 are repeated iteratively until the accuracy saturates.
[0039] In step S7, KIf one more planar waveguide structure is added after the first planar waveguide structure, then... ,but K The value assigned is ( K +1), repeat S2-S6 until... .
[0040] After step S7 is completed, the loss function needs to be iterated and optimized repeatedly until the... K Each output waveguide in the layer independently satisfies the specified conditions; The specific process includes: The loss function is continuously optimized to ensure the stability of the chip structure during algebraic operations, until the loss function selected in S2 is optimized. N In each output waveguide, the activation value of the normalized function of the optical intensity integral is... Each of them independently satisfies the following conditions: (twenty two) In equation (22), q It is the instance index number of the numerical mapping relationship. It is the first K Layered planar waveguide structure, first t Round iteration, the first a The first output waveguide, the first q The normalized activation value of the light intensity integral value for each instance It is the target value of light intensity integral. The set of corresponding instances is defined as: (twenty three) After the above conditions are met, the iterative training stops, resulting in a photonic integrated chip capable of performing low-power mathematical operations, such as... Figure 5 As shown.
[0041] Example 2 This embodiment provides a photonic integrated chip, which is designed using a photonic integrated chip design method based on a reverse design mechanism as described in Embodiment 1.
[0042] The preferred embodiments of the present invention have been described in detail above. It should be understood that those skilled in the art can make numerous modifications and variations based on the concept of the present invention without creative effort. Therefore, all technical solutions that can be obtained by those skilled in the art based on the concept of the present invention through logical analysis, reasoning, or limited experimentation on the basis of existing technology should be within the scope of protection defined by the claims.
Claims
1. A photonic integrated chip design method based on reverse design mechanism, characterized in that, include: S1: Construct a photonic integrated chip containing a multi-layer planar waveguide structure. The first-layer planar waveguide structure encodes the input bits based on dual optical waveguides, transforming the numerical mapping relationship in the finite domain into the light intensity distribution mapping relationship between the first-layer input waveguide and the last-layer output waveguide. Each layer of planar waveguide structure is decomposed into multiple discrete finite elements. S2: Select the first [chip] from the photonic integrated chip. K The planar waveguide structure of the first layer, in the first layer K Selecting in a layered planar waveguide structure N Each output waveguide is assigned an output bit data as the target value for light intensity integration. S3: Forward K The relative permittivity of the layered planar waveguide structure is projected. S4: Solving using the frequency domain finite difference method K The electric field intensity distribution after projection in a layered planar waveguide structure; S5: Using a reverse design method, based on the obtained electric field intensity distribution, calculate the regional optical intensity integral of the output waveguide of each layer of planar waveguide structure, and compare it with the target value of the optical intensity integral. K The relative permittivity of each layer in the finite element method of the layered planar waveguide structure in the next iteration; S6: Repeat steps S3-S5 to determine whether the accuracy of the output result of the photonic integrated chip has reached saturation. If so, proceed to step S7. S7: In K One more planar waveguide structure is added after the first planar waveguide structure, and steps S2-S6 are repeated until the maximum number of planar waveguide structures is reached, thus obtaining the final photonic integrated chip design result.
2. The photonic integrated chip design method based on reverse design mechanism according to claim 1, characterized in that, Each layer of planar waveguide structure has an input region and an output region on both sides, with multiple input waveguides in the input region and multiple output waveguides in the output region; Each layer of the planar waveguide structure is an independent aperiodic photonic structure.
3. The photonic integrated chip design method based on reverse design mechanism according to claim 1, characterized in that, No. k The first layer in a planar waveguide structure i Line 1 j The finite element of the column in the first t The expression for the relative permittivity in the round iteration is: In the formula, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t The relative permittivity in the round iteration, This is the lower bound of the relative permittivity. This is the upper bound of the relative permittivity. For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Density function in round iteration; Initial values are assigned according to a uniform or random distribution, thereby assigning... Initial value.
4. The photonic integrated chip design method based on reverse design mechanism according to claim 1, characterized in that, The input region of the first-layer planar waveguide structure of the photonic integrated chip is determined according to the number of input bits. N , divided into N Each input sub-region is provided with two input waveguides, i.e., dual optical waveguides; in any one input sub-region, the optical intensity of the two input waveguides is assigned to be 0 / 1 or 1 / 0 according to the value of the bit at the corresponding position of the input bit. The second~ of the photonic integrated chip K The number of input waveguides in the layered planar waveguide structure is the same as the number of output waveguides in the previous layer. The light intensity value of any input waveguide is the activation value of the normalized function of the integral of the light intensity of the corresponding output waveguide in the previous layer. The first to ( ) of the photonic integrated chip K -1) The number of output waveguides in the output region of the layer planar waveguide structure is adjustable; The first of the photonic integrated chip K Layered planar waveguide structure N In each output waveguide, the light intensity is integrated for any output waveguide, and the corresponding output bit value is determined to be 0 or 1 based on the activation value of the normalization function of the light intensity integration.
5. The photonic integrated chip design method based on reverse design mechanism according to claim 1, characterized in that, The frequency domain finite difference method includes: Constructing electric field strength exist x , y , z Directional components , , The equations for the electric field intensity are given by: In the formula, , , It is the first k Layered planar waveguide structure in the first t Source strength in round iteration x , y , z directional components, , , It is the discretization of the planar waveguide structure x , y , z Grid size in the direction, ω It is the angular frequency of the light wave. μ It is the permeability. γ It is the propagation constant, the first k Layered planar waveguide structure i Line number j The finite element of the column in the first t In round iteration γ 2 Represented as: In the formula, σ It is electrical conductivity; ( mn × mn )yes diagonal matrix, For the first k The first layer in a planar waveguide structure i Line number j The finite element of the column in the first t The relative permittivity values in the round iterations, ( mn × mn ), ( mn × mn ), ( mn × mn This can be expressed as a tensor product: In the formula, I m ( m × m ), I n ( n × n ), I 1 (1×1) is the identity matrix and the Laplace matrix. L m , L n , L 1st i Line 1 j Column elements l ij satisfy: In the electric field strength equations, ( mn ×1) ( mn ×1) ( mn ×1) is the first k Layered planar waveguide structure in the first t Electric field strength in round iteration of x , y , z Directional components , , The vector, ( mn ×1) ( mn ×1) ( mn ×1) is the first k Layered planar waveguide structure in the first t Source strength in round iteration of x , y , z Directional components , , ; Substitute the known parameters of the planar waveguide structure to be determined ω , μ , σ , , , , , , , Solving for the first... k Layered planar waveguide structure in the first t Electric field strength in round iteration , .
6. The photonic integrated chip design method based on reverse design mechanism according to claim 1, characterized in that, The reverse design method includes: S51: Based on the obtained first... k Layered planar waveguide structure in the first t Electric field intensity distribution in round iteration Calculate the regional optical intensity integral of the output waveguide of the corresponding planar waveguide structure. ,in, a This is the number of the output waveguide; S52: Normalize the calculated regional light intensity integral using a normalization function, and then activate it using an activation function to obtain the normalized function activation value. The input light intensity is used as the input light intensity for the next layer of planar waveguide structure, and the calculation of the next layer of planar waveguide structure in step S51 is performed. t The normalized activation value of the regional light intensity integral in each iteration is obtained until the th iteration is achieved. K Activation value of the normalized function for the regional intensity integral of a layered planar waveguide structure ; S53: Calculate the... K Target value of optical intensity integral of layered planar waveguide structure With the activation value of the normalization function Binary cross-entropy ; S54: Using the chain rule, based on the binary cross-entropy... Recursively calculate the first k In a layered planar waveguide structure, the first a The input waveguide at the th ... t Local gradient of input light intensity in round iteration ; S55: Using the chain rule, based on the local gradient of the input light intensity... Calculate the first k In a layered planar waveguide structure, the first i Line number j The finite element of the column in the first t Local gradient of density function in round iteration ; S56: Based on the local gradient of the density function Calculate the first layer of the planar waveguide structure layer by layer. i Line 1 j The finite element of the column in the first t Correction of density function in round iteration ; S57: Correction based on the density function In the layer-by-layer update of the planar waveguide structure, the first i Line number j The finite element of the column in the ( t +1) Density function in round iteration and relative permittivity .
7. The photonic integrated chip design method based on reverse design mechanism according to claim 6, characterized in that, The regional light intensity integral The calculation expression is: In the formula, O a Representing the a One output waveguide; The activation value of the normalization function The calculation expression is: In the formula, For normalization function, For activation functions; The binary cross-entropy The calculation expression is: In the formula, The number of output bits is equal to the number of selected output waveguides. a This is the number of the output waveguide. q This is the instance number; The local gradient of the input light intensity The calculation expression is: In the formula, For the first k Layered planar waveguide structure in the first t Source strength in round iteration, For the first k The activation value of the normalized function for the regional optical intensity integral of the layered planar waveguide structure; The local gradient of the density function The calculation expression is: In the formula, for diagonal matrix, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Propagation constant in round iteration The square of, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Density function in round iteration; The correction amount of the density function The calculation expression is: In the formula, η It's the learning rate. It is the ADAM optimizer; The density function and relative permittivity The calculation expression is: In the formula, This is the lower bound of the relative permittivity. This is the upper bound of the relative permittivity.
8. The photonic integrated chip design method based on reverse design mechanism according to claim 1, characterized in that, In step S2, the activation value of the normalized function of the optical intensity integral for each of the multiple output waveguides selected is... Each of them independently satisfies the following conditions: In the formula, q It is the instance index number of the numerical mapping relationship. It is the first K Layered planar waveguide structure, first t Round iteration, the first a The first output waveguide, the first q The normalized activation value of the light intensity integral value for each instance It is the target value of light intensity integral. The set of corresponding instances is defined as: If the activation value of the normalized function of the integral of the light intensity of each output waveguide is... If all of the above conditions are met, or if the accuracy of the output result of the photonic integrated chip reaches a preset accuracy threshold in the results of multiple adjacent iterations, then the accuracy of the output result of the photonic integrated chip is judged to have reached saturation.
9. The photonic integrated chip design method based on reverse design mechanism according to claim 1, characterized in that, The expression for calculating the relative permittivity by projection is as follows: In the formula, For the first k Layered planar waveguide structure i Line 1 j The finite element of the column in the first t Density function in round iteration, For the binarized center parameters, This is a parameter for the degree of binarization, and its value gradually increases during iterative training. For projection function, This is the lower bound of the relative permittivity. This is the upper bound of the relative permittivity. This is the relative permittivity after processing with the projection function.
10. A photonic integrated chip, characterized in that, The photonic integrated chip is designed using a photonic integrated chip design method based on a reverse design mechanism as described in any one of claims 1-9.
