A drive control board and a robot

Abstract

The application discloses a kind of drive control panel and robot, it is related to robot field, to solve the problem of low robot chassis controller integration, big interference between modules.Drive control panel includes power management circuit, STM32 main control circuit and the communication module connected STM32 main control circuit, load driving module and isolation IO and interface protection module;Power management circuit is responsible for power supply;Communication module includes RS485 communication circuit;Load driving module includes at least two of LED constant-current driving circuit, fan driving circuit, relay driving circuit, 12V switch driving circuit and sensor detection circuit;The isolation IO and interface protection module include IO isolation circuit and interface circuit.The multifunctional circuit is highly integrated and isolated in the application Protection, can independently select communication or control interface, realize one board multiple use, with the characteristics of small size, low power consumption.

Description

Technical Field

[0001] This invention relates to a chassis controller circuit for a robot, and more particularly to a drive control board and the robot. Background Technology

[0002] With the development of robotics technology, the demand for robot functions is becoming increasingly diverse. As a result, the controller of the chassis needs to integrate more and more functional modules, such as high-power LED drivers, multi-channel fan cooling, sensor acquisition, and complex communication interfaces.

[0003] Existing controllers often suffer from low integration, significant inter-module interference, and weak interface protection. Especially in complex environments such as airports and hospitals, ensuring the stability and anti-static capabilities of the control system under multiple loads is crucial. Therefore, developing a drive control board to integrate various robot function interfaces and ensure mutual isolation during multi-load operation is of paramount importance. Summary of the Invention

[0004] The purpose of this invention is to provide a drive control board and a robot to address all or part of the problems mentioned above, thereby solving the problems of low integration and large interference between modules in the robot chassis controller.

[0005] The technical solution adopted in this invention is as follows: In a first aspect, this application provides a drive control board configured on a robot chassis controller, comprising: Power management circuit; STM32 main control circuit; The communication module, load drive module, and isolation I / O and interface protection module are connected to the STM32 main control circuit. The power management circuit is connected to the STM32 main control circuit, the communication module, the load drive module, and the isolated I / O and interface protection module, respectively. The communication module includes an RS485 communication circuit; The load drive module includes at least two of the following: LED constant current drive circuit, fan drive circuit, relay drive circuit, 12V switch drive circuit, and sensor detection circuit. The isolated I / O and interface protection module includes an I / O isolation circuit and an interface circuit.

[0006] In a second aspect, this application also provides a robot, which includes a robot body and a chassis controller, wherein the chassis controller is equipped with the aforementioned drive control board.

[0007] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are: The drive control board designed in this application has highly integrated and isolated the multi-functional circuit. Users can select the corresponding interface for communication or control according to their own needs, realizing multiple uses of one board, improving data fusion while reducing development difficulty. The development board is highly integrated, small in size, low in power consumption, wide voltage input, and multi-level voltage output, compatible with drive control for various applications. Attached Figure Description

[0008] The present invention will be described by way of example and with reference to the accompanying drawings, wherein: Figure 1 This is a structural diagram of the drive control board.

[0009] Figure 2 This is the circuit diagram for a 48V-12V step-down circuit.

[0010] Figure 3 This is the circuit diagram for a 12V-5V step-down circuit.

[0011] Figure 4 This is the circuit diagram for a 5V-3.3V voltage regulator circuit.

[0012] Figure 5 This is a circuit diagram of a microcontroller circuit.

[0013] Figure 6 This is the circuit diagram of a clock circuit.

[0014] Figure 7 This is the circuit diagram of the reset circuit.

[0015] Figure 8 This is the circuit diagram of the startup circuit.

[0016] Figure 9 This is a circuit diagram of the DIP switch control circuit.

[0017] Figure 10 This is the circuit diagram for the signal indicator circuit.

[0018] Figure 11 This is a circuit diagram of an RS485 communication circuit.

[0019] Figure 12 This is the circuit diagram of an LED constant current drive circuit.

[0020] Figure 13 This is a circuit diagram of a fan drive circuit.

[0021] Figure 14 This is a circuit diagram of a 12V switch driver circuit.

[0022] Figure 15 This is a circuit diagram of a relay drive circuit.

[0023] Figure 16This is a circuit diagram of the sensor detection circuit.

[0024] Figure 17 This is the circuit diagram of an I / O isolation circuit.

[0025] Figure 18 This is the circuit diagram for the power output interface.

[0026] Figure 19 This is the circuit diagram for the fan connector.

[0027] Figure 20 This is the circuit diagram for the relay output interface.

[0028] Figure 21 This is a circuit diagram for a 3-channel UART interface.

[0029] Figure 22 This is the circuit diagram for the debugging interface.

[0030] Figure 23 This is a circuit diagram of a 485 bus interface.

[0031] Figure 24 This is the circuit diagram of the photosensitive acquisition interface.

[0032] Figure 25 This is the circuit diagram of the current sampling interface.

[0033] Figure 26 This is a circuit diagram of an optoelectronic interface.

[0034] Figure 27 This is the circuit diagram for the IIC interface.

[0035] Figure 28 This is the circuit diagram for the LED interface.

[0036] Figure 29 This is the circuit diagram of the I / O isolation interface.

[0037] Figure 30 This is a structural diagram of a robot equipped with a drive control board. Detailed Implementation

[0038] All features disclosed in this specification, or all steps in all disclosed methods or processes, may be combined in any way, except for mutually exclusive features and / or steps.

[0039] Any feature disclosed in this specification (including any appended claims and abstract) may be replaced by other equivalent or similar features, unless specifically stated otherwise. That is, unless specifically stated otherwise, each feature is merely one example of a series of equivalent or similar features.

[0040] This application provides an embodiment of a drive control board configured in a robot chassis controller, such as... Figure 1 As shown, the drive control board includes the following circuit modules.

[0041] (1) Power management circuit.

[0042] The power management circuit is connected to the STM32 main control circuit, communication module, load drive module and isolation I / O and interface protection module respectively, to provide working power to these circuits or modules respectively.

[0043] For example, the power management circuit provides three operating power supplies: 12V, 5V, or 3.3V, to achieve cascading supply of various voltage levels within the robot's internal system. Taking an input power of 48V as an example, the power management circuit includes a 48V-12V step-down circuit, a 12V-5V step-down circuit, and a 5V-3.3V voltage regulator circuit.

[0044] (1.1) 48V-12V step-down circuit.

[0045] like Figure 2 As shown, using TPS54360DDAR as the power conversion chip U1, the 48V-12V step-down circuit includes the power conversion chip U1, inductor L1, diode D1, resistors R1, R2, R3, R4, R5, R105, capacitors C1, C2, C3, C4, C5, C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, and C16.

[0046] The VIN pin of power converter chip U1 is electrically connected to the first terminals of capacitors C2, C3, C4, C5, C6, and C7, and the VCC_IN power supply terminal, respectively. The BOOT pin of power converter chip U1 is electrically connected to the first terminal of resistor R105. The second terminal of resistor R105 is electrically connected to the first terminal of capacitor C1. The second terminal of capacitor C1 is electrically connected to the SW pin of power converter chip U1. The EN pin of power converter chip U1 is electrically connected to the first terminal of resistor R3. The second terminal of resistor R3 is electrically connected to the DCDC_EN enable control terminal (of the STM32 main control circuit). The RT / CLK pin of power converter chip U1 is electrically connected to the first terminal of resistor R5. The COMP pin of power converter chip U1 is electrically connected to the first terminals of resistor R4 and capacitor C15, respectively. The second terminal of resistor R4 is electrically connected to the first terminal of capacitor C16. The FB pin of the power conversion chip U1 is electrically connected to the first terminal of resistor R1, the first terminal of resistor R2, and the first terminal of capacitor C14, respectively. The SW pin of the power conversion chip U1 is electrically connected to the second terminal of capacitor C1 (as described above), the first terminal of inductor L1, and the negative terminal of diode D1, respectively. The second terminal of inductor L1 is electrically connected to the second terminal of capacitor C14, the second terminal of resistor R1, the first terminal of capacitor C8, the first terminal of capacitor C9, the first terminal of capacitor C10, the first terminal of capacitor C11, the first terminal of capacitor C12 (output side), the first terminal of capacitor C13, and the voltage output terminal VCC_12V0 (output 12V). The second terminals of resistor R5, capacitor C15, capacitor C16, diode D1, resistor R2, capacitor C2, capacitor C3, capacitor C4, capacitor C5, capacitor C6, capacitor C7, capacitor C8, capacitor C9, capacitor C10, capacitor C11, capacitor C12, capacitor C13, and the GND and EP pins of power conversion chip U1 are grounded respectively.

[0047] In addition, a resistor R6 is reserved between the VCC_IN power supply terminal and the voltage output terminal VCC_12V0. When the input is 12V, the power supply is turned on through the resistor R6 to achieve a low power consumption design when the output voltage is low.

[0048] (1.2) 12V-5V step-down circuit.

[0049] like Figure 3As shown, using the SY8113IADC as the power conversion chip U2, the 12V-5V step-down circuit includes the power conversion chip U2, inductor L2, resistors R106, R7, and R8, and capacitors C17, C18, C19, C20, C21, C22, and C23. The IN and EN pins of the power conversion chip U2 are electrically connected to the first terminal of capacitor C20, the first terminal of capacitor C23, and the voltage input terminal VCC_12V0, respectively. The LX pin of the power conversion chip U2 is electrically connected to the first terminal of capacitor C17, the second terminal of capacitor C17 is electrically connected to the first terminal of resistor R106, and the second terminal of resistor R106 is electrically connected to the BS pin of the power conversion chip U2. The LX pin of the power conversion chip U2 is also electrically connected to the first terminal of inductor L2. The FB pin of the power conversion chip U2 is electrically connected to the first terminal of resistor R7, the first terminal of resistor R8, and the first terminal of capacitor C22, respectively. The second terminal of inductor L2 is electrically connected to the second terminal of resistor R7, the first terminal of capacitor C18, the first terminal of capacitor C19, the first terminal of capacitor C21, the second terminal of capacitor C22, and the voltage output terminal VCC_5V0 (output 5V), respectively. The second terminals of capacitor C20, C23, C18, C19, C21, resistor R8, and the GND pin of power conversion chip U2 are grounded, respectively.

[0050] (1.3) 5V-3.3V voltage regulator circuit.

[0051] like Figure 4 As shown, using the AMS1117-3.3V as the power conversion chip Q1, the 5V-3.3V voltage regulator circuit includes the power conversion chip Q1, capacitors C24, C25, C26, and C27. The VIN pin of the power conversion chip Q1 is electrically connected to the first terminal of capacitor C24, the first terminal of capacitor C25, and the voltage input terminal VCC_5V0. The VOUT pin of the power conversion chip Q1 is electrically connected to the first terminal of capacitor C26, the first terminal of capacitor C27, and the voltage output terminal VCC_3V3 (output VCC_3.3V). The second terminals of capacitors C24, C25, C26, and C27, and the ADJ / GND pin of the power conversion chip Q1 are grounded.

[0052] (2) STM32 main control circuit.

[0053] The STM32 main control circuit is the core of the drive control board. It uses the STM32 series microcontroller as the microcontroller (MCU) to construct the microcontroller circuit, and at the same time, it is combined with the necessary peripheral circuits to form the STM32 main control circuit.

[0054] like Figure 5As shown, taking the STM32F103RCT6 as the microcontroller chip U3 as an example, the STM32 main control circuit includes the microcontroller chip U3, capacitors C32, C33, C34, C35, C36, C37, and C38. The VBAT, VDD_4, VDD_1, VDD_2, VDD_3, and VDDA pins of the microcontroller chip U3 are all electrically connected to the VCC_3V3 power supply terminal. The VSSA, VSS_4, VSS_1, VSS_2, and VSS_3 pins of the microcontroller chip U3 are all grounded. The first terminals of capacitors C32, C33, C34, C35, C36, C37, and C38 are all electrically connected to the VCC_3V3 power supply terminal, and the second terminals of capacitors C32, C33, C34, C35, C36, C37, and C38 are all grounded. This constitutes a microcontroller circuit.

[0055] The peripheral circuits of the STM32 main control circuit include one or more of the following: clock circuit, reset circuit, startup circuit, DIP switch control circuit, and signal indicator circuit.

[0056] (2.1) Clock circuit.

[0057] like Figure 6 As shown, the clock circuit includes a 32.768kHz crystal X1, an 8MHz crystal X2, capacitors C28, C29, C30, and C31. The first terminal of crystal X1 is electrically connected to the first terminal of capacitor C28 and pin PC14 of microcontroller chip U3; the second terminal of crystal X1 is electrically connected to the first terminal of capacitor C29 and pin PC15 of microcontroller chip U3. The first terminal of crystal X2 is electrically connected to the first terminal of capacitor C30 and pin PD0 of microcontroller chip U3; the second terminal of crystal X2 is electrically connected to the first terminal of capacitor C31 and pin PD1 of microcontroller chip U3. The second terminals of capacitors C28, C29, C30, and C31 are all grounded.

[0058] (2.2) Reset circuit.

[0059] like Figure 7As shown, the reset circuit includes resistor R16, capacitor C39, and reset button SW1 (model TS3315A, with four ports: 1, 2, 3, and 4). The first terminal of resistor R16 is electrically connected to the VCC_3V3 power supply terminal. The second terminal of resistor R16 is electrically connected to the first terminal of capacitor C39 and the fourth terminal of reset button SW1. The third terminal of reset button SW1 is electrically connected to the NRST pin of microcontroller chip U3. The second terminal of capacitor C39 and the first and second terminals of reset button SW1 are both grounded.

[0060] (2.3) Start-up circuit.

[0061] like Figure 8 As shown, the startup circuit includes resistors R12, R13, R14, and R15. The first terminal of resistor R12 is electrically connected to the VCC_3V3 power supply terminal. The second terminal of resistor R12 is electrically connected to the first terminal of resistor R13 and the BOOT0 pin of microcontroller chip U3. The second terminal of resistor R13 is grounded. The first terminal of resistor R14 is electrically connected to the VCC_3V3 power supply terminal. The second terminal of resistor R14 is electrically connected to the first terminal of resistor R15 and the BOOT1 pin of microcontroller chip U3. The second terminal of resistor R15 is grounded.

[0062] (2.4) DIP switch control circuit.

[0063] like Figure 9 As shown, the DIP switch control circuit includes a DIP switch U4 (model DSHP-D2-TS-GER, with four ports: 1, 2, 3, and 4), resistors R17 and R18. The first terminal of DIP switch U4 is electrically connected to the second terminal of resistor R17 and the PC13 pin of microcontroller chip U3. The second terminal of DIP switch U4 is electrically connected to the second terminal of resistor R18 and the PC3 pin of microcontroller chip U3. The first terminals of resistors R17 and R18 are both electrically connected to the VCC_3V3 power supply terminal. The third and fourth terminals of DIP switch U4 are both grounded.

[0064] (2.5) Signal indicator circuit.

[0065] Figure 10As shown, the signal indicator circuit includes diode D2, dual-color LED LED1, single-color LED LED2, resistors R9, R10, and R11. The first terminal of resistor R9 is electrically connected to the VCC_3V3 power supply terminal, and the second terminal of resistor R9 is electrically connected to the green (G) positive terminal of LED1. The green negative terminal of LED1 is electrically connected to pin PA15 of microcontroller chip U3. The positive terminal of diode D2 is connected to the second terminal of resistor R9, and the negative terminal of diode D2 is connected to the red (R) negative terminal of LED1. The red positive terminal of LED1 is electrically connected to pin PA15 of microcontroller chip U3, and the red negative terminal of LED1 is electrically connected to the first terminal of resistor R10. The second terminal of resistor R10 is grounded. The first terminal of resistor R11 is electrically connected to the VCC_3V3 power supply terminal, and the second terminal of resistor R11 is electrically connected to the positive terminal of LED2. The negative terminal of LED2 is grounded.

[0066] (3) Communication module.

[0067] The communication module includes an RS485 communication circuit.

[0068] like Figure 11 As shown, taking CA-IS2092A as the isolation transceiver chip U5 as an example, the RS485 communication circuit includes the isolation transceiver chip U5, inductor L3, inductor L4 (model ACM3225-2P-161TF), inductor L5, diode D3 (model BZT52B5V1), resistors R19, R20, R21, R22, R24, R25, R26, R28, R29, R31, capacitors C40, C41, C42, C43, C44, C45, C46, ​​and C47.

[0069] On the power input side: the first terminal of inductor L3 is electrically connected to the VCC_3V3 power supply terminal, and the second terminal of inductor L3 is electrically connected to the first terminal of capacitor C40 and the power supply terminal VCC3V3_485 of the isolation transceiver chip. The first terminal of inductor L5 is electrically connected to the VCC_5V0 power supply terminal, and the second terminal of inductor L5 is electrically connected to the first terminal of capacitor C46, ​​the negative terminal of diode D3, and the power supply terminal VCC5V0_485 of the isolation transceiver chip. The positive terminal of diode D3, the second terminal of capacitor C40, and the second terminal of capacitor C46 are all grounded.

[0070] On the transceiver control side: the VDDL and VDDP pins of the isolation transceiver chip U5 are electrically connected to the first terminal of capacitor C41, the first terminal of capacitor C43, and the VCC3V3_485 respectively (or VCC5V0_485 can be selected according to the design). Figure 11The VDDP pin is connected to VCC5V0_485, and the VDDL pin is connected to VCC3V3_485. The RO pin of the isolated transceiver chip U5 is electrically connected to the first end of resistor R22. The second end of resistor R22 is electrically connected to the first end of resistor R19 and the transmit / receive data input terminal RS485_RX (PA3). The second end of resistor R19 is electrically connected to VCC3V3_485. The RE# and DE pins of the isolated transceiver chip U5 are electrically connected to the first ends of resistors R28 and R27, and the enable control terminal RS485_CTL (PA1). The second end of resistor R28 is grounded, and the second end of resistor R27 is connected to VCC3V3_485. The DI pin of the isolated transceiver chip U5 is electrically connected to the transmit data terminal RS485_TX (PA2) and the first end of resistor R23. The second end of resistor R23 is connected to VCC3V3_485. The SEL pin of the isolated transceiver chip U5 is electrically connected to the first terminals of resistors R29 and R30, as well as the mode switching terminal RS485_SEL. The second terminal of resistor R29 is electrically connected to the isolation-side power output terminal VISOIN_485, and the second terminal of resistor R30 is connected to the equipotential potential (isolation ground). The GND1 pin of the isolated transceiver chip U5 is grounded.

[0071] On the bus output side: The VISOOUT pin of the isolated transceiver chip U5 is electrically connected to the VISOIN_485, and is also electrically connected to the first terminals of capacitors C42, C44, and C45, respectively. The B pin of the isolated transceiver chip U5 is connected to the second terminal of inductor L4, and is electrically connected to the third terminal of inductor L4 through resistor R20. The third terminal of inductor L4 is electrically connected to the second terminal of resistor R21, the first terminal of resistor R24, and the bus interface RS485_B, respectively. The A pin of the isolated transceiver chip U5 is connected to the first terminal of inductor L4, and is also electrically connected to the fourth terminal of inductor L4 through resistor R25. The fourth terminal of inductor L4 is electrically connected to the first terminal of resistor R26, the second terminal of resistor R24, and the bus interface RS485_A, respectively. The second terminal of resistor R26 is electrically connected to VISOIN_485. The first terminal of resistor R21 is electrically connected to the VISOIN_485. The second terminals of resistor R21, capacitors C42, C44, and C45, as well as the GND2 pin of the isolation transceiver chip U5, are all connected to isolation ground. The isolation ground is electrically connected to the first terminal of capacitor C47 through resistor R31. The second terminal of capacitor C47 is connected to earth ground (PE). Resistor R31 and capacitor C47 are connected in parallel.

[0072] (4) Load driving module.

[0073] The load drive module includes at least two of the following: LED constant current drive circuit, fan drive circuit, relay drive circuit, 12V switch drive circuit, and sensor detection circuit.

[0074] (4.1) LED constant current drive circuit.

[0075] like Figure 12 As shown, taking the LGS63042B5 as an example of power conversion chips U8 / U9 / U12, the LED constant current drive circuit includes a three-channel drive circuit. Channel 1 includes power conversion chip U8, inductor U6, diode D4 (model DSK210), resistors R32, R34, and R36, capacitors C50, C51, and C48; Channel 2 includes power conversion chip U9, inductor U7, diode D5, resistors R33, R35, and R37, capacitors C52, C53, and C49; Channel 3 includes power conversion chip U12, inductor U10, diode D6, resistors R39, R45, and R46, capacitors C55, C56, and C54. Channels 1, 2, and 3 have the same structure.

[0076] Taking channel 1 as an example, the VIN pin of power converter chip U8 is electrically connected to the first terminal of capacitor C50, the first terminal of capacitor C51, and the VCC_IN power supply terminal, respectively. The EN pin of power converter chip U8 is electrically connected to the first terminals of resistor R34 and resistor R36, respectively. The second terminal of resistor R34 is electrically connected to the pulse width modulation signal input terminal LED1_PWM (PA6), and the second terminal of resistor R36 is grounded. The SW pin of power converter chip U8 is electrically connected to the positive terminal of diode D4 and the first terminal of inductor U6, respectively. The CSN pin of power converter chip U8 is electrically connected to the first terminal of capacitor C48 and the positive output terminal LED1+, respectively; the second terminal of resistor R32 is electrically connected to the negative terminal of diode D4 and the first terminal of resistor R32, respectively; the second terminal of inductor U6 is electrically connected to the second terminal of capacitor C48 and the negative output terminal LED1-, respectively. The GND pin of power converter chip U8, the second terminal of capacitor C50, and the second terminal of capacitor C51 are all grounded.

[0077] The power conversion chip corresponding to channel 2 is U9, the input terminal of the pulse width modulation signal is LED2_PWM(PA7), and the output is LED2+ / LED2-; the power conversion chip corresponding to channel 3 is U12, the input terminal of the pulse width modulation signal is LED3_PWM(PB0), and the output is LED3+ / LED3-.

[0078] In addition, the LED constant current driving circuit also includes an RGB-LED driving circuit, which includes resistors R38, R40, R41, R107, R108, R109, MOSFET Q9, MOSFET Q10, and MOSFET Q11. The first terminal of resistor R38 is connected to the LED_B_PWM (PC7) port, the first terminal of resistor R40 is connected to the LED_G_PWM (PC6) port, and the first terminal of resistor R41 is connected to the LED_R_PWM (PB1) port. The gate of MOSFET Q9 is connected to the second terminal of resistor R38 and the first terminal of resistor R107. The gate of MOSFET Q10 is connected to the second terminal of resistor R40 and the first terminal of resistor R108. The gate of MOSFET Q11 is connected to the second terminal of resistor R41 and the first terminal of resistor R109. The second terminals of resistors R107, R108, and R109, the source of MOSFET Q9, the source of MOSFET Q10, and the source of MOSFET Q11 are all grounded. The drain of MOSFET Q9 is electrically connected to LED_B. The drain of MOSFET Q10 is electrically connected to LED_G. The drain of MOSFET Q11 is electrically connected to LED_R.

[0079] (4.2) Fan drive circuit.

[0080] The fan drive circuit includes at least one fan drive and speed measurement circuit, and the construction of any one fan drive and speed measurement circuit is the same. Taking a circuit that includes a first fan drive and speed measurement circuit and a second fan drive and speed measurement circuit as an example.

[0081] like Figure 13 As shown, the first fan drive and speed measurement circuit includes MOSFET Q2, dual diodes U13, resistors R47, R48, R51, R53, R55, and R57, and capacitors C58, C60, and C61. The second fan drive and speed measurement circuit includes MOSFET Q3, dual diodes U14, resistors R49, R50, R52, R54, R56, and R58, and capacitors C59, C62, and C63. The two fan drive and speed measurement circuits have the same structure.

[0082] Taking the first fan drive and speed measurement circuit as an example, the gate of MOSFET Q2 is electrically connected to the second terminal of resistor R53, the second terminal of resistor R51, and the first terminal of capacitor C58. The first terminal of resistor R53 is electrically connected to the first pulse width modulation signal terminal FAN_PWM1 (PB6), and the first terminal of resistor R51 is electrically connected to the VCC_3V3 power supply terminal. The drain of MOSFET Q2 is electrically connected to the second terminal of resistor R47 and the first terminal of resistor R48. The first terminal of resistor R47 is electrically connected to the VCC_5V0 power supply terminal, and the second terminal of resistor R48 is electrically connected to the first fan drive output terminal FAN_DRIVE_1. The first terminal of resistor R57 is electrically connected to the first speed signal input terminal FAN_SPEED1 (PA8), and the second terminal of resistor R57 is electrically connected to the first terminal of capacitor C60, the first terminal of capacitor C61, the second terminal of resistor R55, the common terminal of dual diode U13, and the first fan speed measurement terminal FAN_TAC1. The first terminal of resistor R55 is electrically connected to the VCC_3V3 power supply terminal. The anode of dual diode U13 is grounded, and the cathode of dual diode U13 is electrically connected to the VCC_3V3 power supply terminal. The source of MOSFET Q2, the second terminal of capacitor C58, the second terminal of capacitor C60, and the second terminal of capacitor C61 are all grounded.

[0083] The second fan drive and speed measurement circuit is constructed in the same way as the first fan drive and speed measurement circuit, except that it is electrically connected to the second pulse width modulation signal terminal FAN_PWM2 (PB7), the second fan drive output terminal FAN_DRIVE_2, the second speed signal input terminal FAN_SPEED2 (PA0), and the second fan speed measurement terminal FAN_TAC2.

[0084] (4.3) 12V switch drive circuit.

[0085] There should be at least one 12V switch driver circuit. For example... Figure 14 As shown, this embodiment uses a two-channel 12V switch driver circuit as an example. The first channel 12V switch driver circuit and the second channel 12V switch driver circuit have the same structure.

[0086] Taking the first 12V switch driver circuit as an example, the first 12V switch driver circuit includes a MOSFET Q4, a transistor Q6, a diode D7, resistors R59, R61, R63, and R65, capacitors C64, C65, C66, and C67, and an interface CN1. The source of the P-channel MOSFET Q4 is electrically connected to the first terminal of resistor R59, the first terminal of capacitor C64, the first terminal of capacitor C65, the first terminal of capacitor C66, and the VCC_12V0 power supply terminal. The gate of the MOSFET Q4 is electrically connected to the second terminal of resistor R59, the second terminal of capacitor C66, the second terminal of capacitor C67, and the first terminal of resistor R61. The collector of transistor Q6 is electrically connected to the second terminal of resistor R61, its emitter is grounded, and its base is electrically connected to the second terminal of resistor R63 and the first terminal of resistor R65. The first terminal of resistor R63 is electrically connected to the drive control terminal DRIVE_1 (PA9), and the second terminal of resistor R65 is grounded. The drain of MOSFET Q4 is electrically connected to the first terminal of interface CN1, the first terminal of capacitor C67, and the cathode of diode D7. The second terminal of interface CN1 is electrically connected to the anode of diode D7 and grounded.

[0087] The second 12V switch driver circuit includes MOSFET Q5, transistor Q7, diode D8, resistors R60, R62, R64, and R66, capacitors C68, C69, C70, and C71, and interface CN2. The second 12V switch driver circuit is structurally identical to the first 12V switch driver circuit, except that it is electrically connected to the drive control terminal DRIVE_1 (PA9).

[0088] (4.4) Relay drive circuit.

[0089] The relay drive circuit must have at least one path. For example... Figure 15 As shown, an example is a circuit that includes two relay drive circuits.

[0090] The first relay driver circuit includes a light-controlled relay chip U15 (model GAQY211G25), resistors R67 and R69. Pin 1 (anode) of the light-controlled relay chip U15 is electrically connected to the relay control terminal RELAYS_CTR_1 (PC8) via resistor R67. The first end of resistor R67 is also grounded via resistor R69. Pin 2 (cathode) of the light-controlled relay chip U15 is grounded. Pin 4 of the light-controlled relay chip U15 is electrically connected to the relay output terminal RELAYS_OUT_1. Pin 3 of the light-controlled relay chip U15 is connected to power ground PGND_1. This power ground PGND_1 is grounded via resistor R71.

[0091] The second relay driver circuit includes a light-controlled relay chip U16, resistors R68 and R70. Pin 1 (anode) of the light-controlled relay chip U16 is electrically connected to the relay control terminal RELAYS_CTR_2 (PC9) via resistor R68. The first end of resistor R68 is also grounded via resistor R70. Pin 2 (cathode) of the light-controlled relay chip U16 is grounded. Pin 4 of the light-controlled relay chip U16 is electrically connected to the relay output terminal RELAYS_OUT_2. Pin 3 of the light-controlled relay chip U16 is connected to power ground PGND_1.

[0092] (4.5) Sensor detection circuit.

[0093] The sensor detection circuit should have at least one path. For example... Figure 16 As shown, an example is a detection circuit containing two sensors.

[0094] The first sensor detection circuit includes an optocoupler isolation chip U17, a diode D9, resistors R74 and R72. Pin 1 (anode) of the optocoupler isolation chip U17 is electrically connected to the sensor signal input terminal SENSOR_1 through resistor R74. The cathode of diode D9 is electrically connected to the sensor signal input terminal SENSOR_1, and the anode of diode D9 is grounded. Pin 2 (cathode) of the optocoupler isolation chip U17 is grounded. Pin 4 (collector) of the optocoupler isolation chip U17 is electrically connected to the second terminal of resistor R72 and the detection signal output terminal LIGHT_1 (PC4), and the first terminal of resistor R72 is electrically connected to the VCC_3V3 power supply terminal. Pin 3 (emitter) of the optocoupler isolation chip U17 is grounded.

[0095] The second sensor detection circuit includes an optocoupler isolation chip U18, a diode D10, resistors R75 and R73. Pin 1 (anode) of the optocoupler isolation chip U18 is electrically connected to the sensor signal input terminal SENSOR_2 via resistor R75. The cathode of diode D10 is electrically connected to the sensor signal input terminal SENSOR_2, and the anode of diode D10 is grounded. Pin 2 (cathode) of the optocoupler isolation chip U18 is grounded. Pin 4 (collector) of the optocoupler isolation chip U18 is electrically connected to the second terminal of resistor R73 and the detection signal output terminal LIGHT_2 (PC5), while the first terminal of resistor R73 is electrically connected to the VCC_3V3 power supply terminal. Pin 3 (emitter) of the optocoupler isolation chip U18 is grounded.

[0096] (5) Isolation IO and interface protection module.

[0097] The I / O isolation and interface protection module includes I / O isolation circuits and interface circuits.

[0098] (5.1) I / O isolation circuit.

[0099] like Figure 17 As shown, the IO isolation circuit includes a multi-channel digital isolation chip U19 (model CA-IS3760LB), resistors R78, R79, R80, R81, R82, R83, capacitors C72 and C73.

[0100] On the logic input side: the VDDA pin of the multi-channel digital isolation chip U19 is electrically connected to the first end of capacitor C72 and the VCC_3V3 power supply terminal, respectively, and the second end of capacitor C72 is grounded. The GNDA pin of the multi-channel digital isolation chip U19 is grounded. The six input pins VI1, VI2, VI3, VI4, VI5, and VI6 of the multi-channel digital isolation chip U19 are electrically connected to the six logic signal terminals EXT (PA11), EXT (PA12), EXT (PC2), EXT (PB3), EXT (PB4), and EXT (PB5), respectively; at the same time, pins VI1 to VI6 are grounded through pull-down resistors R78, R79, R80, R81, R82, and R83, respectively.

[0101] On the signal output side: The VDDB pin of the multi-channel digital isolation chip U19 is electrically connected to the first terminal of capacitor C73 and the external logic power supply output terminal VDDB_5V, respectively, and the second terminal of capacitor C73 is connected to the external reference ground. The GNDB pin of the multi-channel digital isolation chip U19 is connected to the external reference ground. The six output pins VO1, VO2, VO3, VO4, VO5, and VO6 of the multi-channel digital isolation chip U19 are electrically connected to the six isolated output signal terminals, respectively.

[0102] (5.2) Interface circuit.

[0103] The interface circuit includes a power output interface, a relay output interface, a fan interface, and a 485 bus interface. The interface circuit also includes multiple external connectors (such as CN6, CN13, CN8, CN9, CN10, CN11, etc.), transient diodes (such as D13, D14, etc.), inductors, and capacitors.

[0104] For example, such as Figure 18 As shown, a transient suppression diode D13 is connected in parallel to the 12V output interface CN9, and a transient suppression diode D15 is connected in parallel to the 5V output interface U22 to absorb surge voltage at the interface.

[0105] like Figure 19 As shown, the power supply terminals of fan interfaces CN8 and CN13 are connected to filter capacitors (C75, C74, C76, C77) to smooth out voltage fluctuations during motor startup.

[0106] like Figure 20 As shown, diodes D12 and D14 are connected in parallel to the relay output interfaces CN5 and CN10, respectively, as freewheeling diodes to protect the drive circuit from the back electromotive force impact when the inductive load is turned off.

[0107] The system includes a UART interface, an SWD debugging interface, and a 485 bus interface, and is equipped with dedicated ESD protection components. For example... Figure 21 As shown, the transmitting and receiving ends of the UART3, UART4, and UART5 interfaces are each connected to an electrostatic discharge (ESD) diode (U25, U26, U32, U33, U36, U35). The other end of the ESD diode is grounded to release the electrostatic charge on the communication cable.

[0108] like Figure 22 As shown, the SWCLK and SWDIO signal lines of the debugging interface J1 are connected in series with damping resistors (resistors R90 and R89) with a resistance range of 22Ω, and are equipped with dual ESD protection chips U27 and U28 to ensure the safety of the main control chip during the debugging process.

[0109] like Figure 23 As shown, the 485 bus interface and the 485 communication differential pair (RS485_A / B) are connected to plug-in U24, and a bidirectional transient suppression tube assembly U29 is connected in parallel to improve the reliability of long-distance communication.

[0110] like Figure 24 As shown, the photosensitive acquisition interface CN19 is pulled up to VCC_3V3 through resistor R96, and connected to the ADC channel (SAMP_LDR(PA4)) of the main control chip through an RC filter circuit (R96, C81, C82). Similarly, the temperature acquisition interface CN23 is pulled up through resistor R100 and connected to the main control channel (SAMP_NTC(PA5)) with a filter capacitor.

[0111] like Figure 25 As shown, the output of the current sampling interface CN18 is equipped with a precision sampling resistor and a dual-channel RC filter circuit consisting of resistors (R103, R104) and capacitors (C79, C80), which output current feedback signals CURRENT_ADC0 and CURRENT_ADC1 to the main control chip respectively.

[0112] In addition, the interface circuit may also include optoelectronic interfaces CN17 and CN20, the circuit of which is as follows: Figure 26 As shown; the IIC interface CN22, its circuit is as follows. Figure 27 As shown; the RGB tri-color LED interface CN11, its circuit is as follows. Figure 28 As shown; the I / O isolation interface CN15, its circuit is as follows. Figure 29 As shown.

[0113] Based on the ideas of this application, embodiments of this application also provide a robot in which the drive control board of the optional embodiments described above is configured in the chassis controller of the robot.

[0114] like Figure 30 As shown, the robot includes a robot body and a chassis controller, which houses a drive control board. Depending on the application, this drive control board connects to RGB-LEDs (tricolor LEDs), PWM fans, relays, peripherals, or photoelectric sensors via load drive modules; and connects to communication devices supporting interface protocols such as 485 / IO / IIC / SPI via communication modules and isolation I / O and interface protection modules, enabling the driving of multiple devices on a single drive control board.

[0115] The drive control board designed in this application has the following characteristics: High reliability: Through digital isolators, optocouplers and isolated power supply modules, electrical isolation between the main control core and external power loads is achieved, greatly reducing electromagnetic interference.

[0116] Comprehensive interface protection: All-round ESD protection and transient suppression design significantly improve the controller's survivability in industrial environments.

[0117] Precise control capabilities: It integrates constant current LED control and fan closed-loop speed measurement, enabling it to adapt to complex environmental sensing and feedback requirements.

[0118] This invention is not limited to the specific embodiments described above. The invention extends to any new feature or combination disclosed in this specification, as well as any new method or process step or combination disclosed herein.

Claims

1. A drive control board, configured on a robot chassis controller, characterized in that, include: Power management circuit; STM32 main control circuit; The communication module, load drive module, and isolation I / O and interface protection module are connected to the STM32 main control circuit. The power management circuit is connected to the STM32 main control circuit, the communication module, the load drive module, and the isolated I / O and interface protection module, respectively. The communication module includes an RS485 communication circuit; The load drive module includes at least two of the following: LED constant current drive circuit, fan drive circuit, relay drive circuit, 12V switch drive circuit, and sensor detection circuit. The isolated I / O and interface protection module includes an I / O isolation circuit and an interface circuit.

2. The drive control board as described in claim 1, characterized in that, The STM32 main control circuit includes a microcontroller chip U3; the clock circuit of the STM32 main control circuit includes a 32.768kHz crystal X1, an 8MHz crystal X2, capacitors C28, C29, C30, and C31. Specifically, the first end of crystal X1 is electrically connected to the first end of capacitor C28 and the PC14 pin of microcontroller chip U3; the second end of crystal X1 is electrically connected to the first end of capacitor C29 and the PC15 pin of microcontroller chip U3; and the first end of crystal X2 is electrically connected to the first end of capacitor C30 and the PD0 pin of microcontroller chip U3. The second terminal of crystal X2 is electrically connected to the first terminal of capacitor C31 and the PD1 pin of microcontroller chip U3, respectively; the second terminals of capacitors C28, C29, C30 and C31 are all grounded.

3. The drive control board as described in claim 1, characterized in that, The STM32 main control circuit includes a microcontroller chip U3; the signal indicator circuit of the STM32 main control circuit includes a diode D2, a dual-color LED LED1, a single-color LED LED2, resistors R9, R10, and R11. Specifically, resistor R9 has its first terminal connected to the VCC_3V3 power supply terminal, its second terminal connected to the green positive terminal of the dual-color LED1, and the green negative terminal of LED1 connected to pin PA15 of microcontroller chip U3. Diode D2's anode is connected to the second terminal of resistor R9, and its cathode is connected to the red negative terminal of LED1. LED1's red positive terminal is connected to pin PA15 of microcontroller chip U3, and its red negative terminal is connected to the first terminal of resistor R10, with the second terminal of R10 grounded. Resistor R11 has its first terminal connected to the VCC_3V3 power supply terminal, and its second terminal connected to the positive terminal of single-color LED2, with the negative terminal of LED2 grounded.

4. The drive control board as described in claim 1, characterized in that, The RS485 communication circuit includes an isolated transceiver chip U5, inductors L3, L4, and L5, a diode D3, resistors R19, R20, R21, R22, R24, R25, R26, R28, R29, and R31, and capacitors C40, C41, C42, C43, C44, C45, C46, ​​and C47. Specifically, the first terminal of inductor L3 is electrically connected to the VCC_3V3 power supply terminal, and the second terminal of inductor L3 is electrically connected to the first terminal of capacitor C40 and the power supply terminal VCC3V3_485 of the isolation transceiver chip. The first terminal of inductor L5 is electrically connected to the VCC_5V0 power supply terminal, and the second terminal of inductor L5 is electrically connected to the first terminal of capacitor C46, ​​the negative terminal of diode D3, and the power supply terminal VCC5V0_485 of the isolation transceiver chip. The positive terminal of diode D3, the second terminal of capacitor C40, and the second terminal of capacitor C46 are all grounded. The VDDL and VDDP pins of the isolated transceiver chip U5 are electrically connected to the first terminals of capacitor C41 and C43, respectively, and to VCC3V3_485 / VCC5V0_485. The RO pin of the isolated transceiver chip U5 is electrically connected to the first terminal of resistor R22. The second terminal of resistor R22 is electrically connected to the first terminal of resistor R19 and the transmit / receive data input terminal RS485_RX. The second terminal of resistor R19 is electrically connected to VCC3V3_485. After the RE# and DE pins of the isolated transceiver chip U5 are electrically connected, they are connected to the first terminals of resistor R28 and R27, respectively, and to the enable control terminal RS485_CT. The L pin is electrically connected; the second terminal of resistor R28 is grounded; the second terminal of resistor R27 is connected to VCC3V3_485; the DI pin of the isolation transceiver chip U5 is electrically connected to the transmit data terminal RS485_TX and the first terminal of resistor R23, respectively; the second terminal of resistor R23 is connected to VCC3V3_485; the SEL pin of the isolation transceiver chip U5 is electrically connected to the first terminals of resistor R29, resistor R30, and the mode switching terminal RS485_SEL, respectively; the second terminal of resistor R29 is electrically connected to the isolation side power output terminal VISOIN_485; the second terminal of resistor R30 is connected to the isolation ground; the GND1 pin of the isolation transceiver chip U5 is grounded. The VISOOUT pin of the isolated transceiver chip U5 is electrically connected to VISOIN_485, and is also electrically connected to the first terminals of capacitors C42, C44, and C45, respectively. The B pin of the isolated transceiver chip U5 is connected to the second terminal of inductor L4, and is electrically connected to the third terminal of inductor L4 through resistor R20. The third terminal of inductor L4 is electrically connected to the second terminal of resistor R21, the first terminal of resistor R24, and the bus interface RS485_B, respectively. The A pin of the isolated transceiver chip U5 is connected to the first terminal of inductor L4, and is electrically connected to the fourth terminal of inductor L4 through resistor R25. The fourth terminal of inductor L4 is electrically connected to the first terminal of resistor R26, the second terminal of resistor R24, and the bus interface RS485_A; the second terminal of resistor R26 is electrically connected to VISOIN_485; the first terminal of resistor R21 is electrically connected to VISOIN_485, and the second terminals of resistor R21, capacitors C42, C44, and C45, as well as the GND2 pin of the isolation transceiver chip U5, are all connected to isolation ground; the isolation ground is electrically connected to the first terminal of capacitor C47 through resistor R31, and the second terminal of capacitor C47 is grounded. Resistor R31 and capacitor C47 are connected in parallel.

5. The drive control board as described in claim 1, characterized in that, The LED constant current driving circuit includes a three-channel driving circuit, and the three channels have the same structure. The first channel driving circuit includes a power conversion chip U8, an inductor U6, a diode D4, resistors R32, R34, and R36, and capacitors C50, C51, and C48. The VIN pin of the power conversion chip U8 is electrically connected to the first terminals of capacitors C50 and C51, and the VCC_IN power supply terminal. The EN pin of the power conversion chip U8 is electrically connected to the first terminals of resistors R34 and R36, and the second terminal of resistor R34 is connected to the pulse width modulation signal input terminal LED1_PWM. The connection is as follows: the second terminal of resistor R36 is grounded; the SW pin of power conversion chip U8 is electrically connected to the positive terminal of diode D4 and the first terminal of inductor U6; the CSN pin of power conversion chip U8 is electrically connected to the first terminal and the positive output terminal of capacitor C48; the second terminal of resistor R32 is electrically connected to the negative terminal of diode D4 and the first terminal of resistor R32; the second terminal of inductor U6 is electrically connected to the second terminal and the negative output terminal of capacitor C48; the GND pin of power conversion chip U8, the second terminal of capacitor C50, and the second terminal of capacitor C51 are all grounded.

6. The drive control board as described in claim 1, characterized in that, The fan drive circuit includes at least one fan drive and speed measurement circuit, and the construction of each fan drive and speed measurement circuit is the same. The first fan drive and speed measurement circuit includes a MOSFET Q2, dual diodes U13, resistors R47, R48, R51, R53, R55, and R57, and capacitors C58, C60, and C61. The gate of MOSFET Q2 is electrically connected to the second terminals of resistors R53 and R51, and the first terminal of capacitor C58. The first terminal of resistor R53 is electrically connected to the first pulse width modulation signal terminal FAN_PWM1, and the first terminal of resistor R51 is electrically connected to the VCC_3V3 power supply terminal. The drain of MOSFET Q2 is electrically connected to the second terminals of resistors R47 and R48, and the first terminal of resistor R47 is electrically connected to the VCC_5V0 power supply terminal. The second end of resistor R48 is electrically connected to the first fan drive output terminal FAN_DRIVE_1; the first end of resistor R57 is electrically connected to the first speed signal input terminal FAN_SPEED1; the second end of resistor R57 is electrically connected to the first end of capacitor C60, the first end of capacitor C61, the second end of resistor R55, the common terminal of dual diode U13, and the first fan speed measurement terminal FAN_TAC1; the first end of resistor R55 is electrically connected to the VCC_3V3 power supply terminal; the anode of dual diode U13 is grounded; the cathode of dual diode U13 is electrically connected to the VCC_3V3 power supply terminal; the source of MOSFET Q2, the second end of capacitor C58, the second end of capacitor C60, and the second end of capacitor C61 are all grounded.

7. The drive control board as described in claim 1, characterized in that, The 12V switch drive circuit is at least one, and the construction of each 12V switch drive circuit is the same. The first 12V switch driver circuit includes a MOSFET Q4, a transistor Q6, a diode D7, resistors R59, R61, R63, and R65, capacitors C64, C65, C66, and C67, and an interface CN1. The source of MOSFET Q4 is electrically connected to the first terminal of resistor R59, the first terminal of capacitor C64, the first terminal of capacitor C65, the first terminal of capacitor C66, and the VCC_12V0 power supply terminal. The gate of MOSFET Q4 is connected to the second terminal of resistor R59, the second terminal of capacitor C66, and the second terminal of capacitor C67. The second terminal of resistor R67 and the first terminal of resistor R61 are electrically connected; the collector of transistor Q6 is electrically connected to the second terminal of resistor R61, and its emitter is grounded; the base of transistor Q6 is electrically connected to the second terminal of resistor R63 and the first terminal of resistor R65; the first terminal of resistor R63 is electrically connected to the drive control terminal DRIVE_1, and the second terminal of resistor R65 is grounded; the drain of MOSFET Q4 is electrically connected to the first terminal of interface CN1, the first terminal of capacitor C67, and the negative terminal of diode D7; the second terminal of interface CN1 is electrically connected to the positive terminal of diode D7 and grounded.

8. The drive control board as described in claim 1, characterized in that, The relay driving circuit is at least one, and the construction of each relay driving circuit is the same. The first relay drive circuit includes a light-controlled relay chip U15, resistors R67 and R69; pin 1 of the light-controlled relay chip U15 is electrically connected to the relay control terminal RELAYS_CTR_1 through resistor R67, and the first end of resistor R67 is also grounded through resistor R69; pin 2 of the light-controlled relay chip U15 is grounded; pin 4 of the light-controlled relay chip U15 is electrically connected to the relay output terminal RELAYS_OUT_1; pin 3 of the light-controlled relay chip U15 is connected to power ground PGND_1; this power ground PGND_1 is grounded through resistor R71.

9. The drive control board as described in claim 1, characterized in that, The I / O isolation circuit includes a multi-channel digital isolation chip U19, resistors R78, R79, R80, R81, R82, and R83, and capacitors C72 and C73. The VDDA pin of the multi-channel digital isolation chip U19 is electrically connected to the first terminal of capacitor C72 and the VCC_3V3 power supply terminal, respectively, while the second terminal of capacitor C72 is grounded. The GNDA pin of the multi-channel digital isolation chip U19 is grounded. The six input pins VI1, VI2, VI3, VI4, VI5, and VI6 of the multi-channel digital isolation chip U19 are electrically connected to the six logic signal terminals EXT, EXT, EXT, EXT, EXT, EXT, EXT, respectively. The output pins VI1 to VI6 are grounded via pull-down resistors R78, R79, R80, R81, R82, and R83, respectively. The VDDB pin of the multi-channel digital isolation chip U19 is electrically connected to the first end of capacitor C73 and the external logic power supply output terminal VDDB_5V, respectively. The second end of capacitor C73 is connected to the external reference ground. The GNDB pin of the multi-channel digital isolation chip U19 is connected to the external reference ground. The six output pins VO1, VO2, VO3, VO4, VO5, and VO6 of the multi-channel digital isolation chip U19 are electrically connected to the six isolated output signal terminals, respectively.

10. A robot, characterized in that, It includes a robot body and a chassis controller, wherein the chassis controller is equipped with a drive control board as described in any one of claims 1-9.

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