Intelligent scheduling method for glass kiln waste heat cascade utilization
Patent Information
- Application Number
- CN202611054212.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-15
- Publication Date
- 2026-10-30
AI Technical Summary
这种基于状态监测的补偿机制在面对换向带来的急剧瞬态扰动时,其调节动作难以与扰动的空间传播波前实现协同,容易导致控制指令与实际物理扰动在时空上产生错位,进而使得管网内的热力参数出现较大幅度的振荡失稳
1.通过监测控制元件机械动作产生的瞬变电流信号并生成同步阶跃电平,将系统时间基准的建立与换向动作的物理起始时刻进行了硬关联同步。该设置越过了常规传感器状态检测与反馈的数据处理环节,减少了系统从获取换向事件到确认事件发生之间的滞后时间,为后续的空间调度指令提供了统一且精确的全局时间起点,有助于缓解控制动作在时间轴上滞后于物理扰动的问题。
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Figure CN123010636A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the technical field of industrial process control and relates to an intelligent scheduling method for the cascade utilization of waste heat from glass kilns. Background Technology
[0002] In a waste heat recovery system for glass furnaces, the periodic reversing operation of the melting furnace is a routine step in maintaining its process stability. This reversing operation causes instantaneous fluctuations in physical parameters such as flue gas flow rate, temperature, and pressure. These transient disturbances impact heat exchangers at each stage of the cascade network along the flue gas flow path, leading to rapid shifts in the working fluid phase and heat transfer mechanism within the heat exchangers. This, in turn, causes oscillations in outlet steam parameters and temporary fluctuations in the overall system energy efficiency.
[0003] For temperature and thermal parameter control in pipeline systems, existing technologies typically employ active feedback or time-delay compensation mechanisms based on sensor status monitoring. For example, Chinese patent application publication number CN121326048A discloses an IoT-based method for controlling the temperature of thermal pipelines and its control system. This method acquires static parameters of the pipeline network and combines them with temperature and flow data collected by sensors to construct an estimation model with transmission time delay. Then, it utilizes a dual-timescale control framework to perform delay compensation and steady-state correction on the pipeline network, aiming to mitigate the hysteresis effects caused by thermal inertia.
[0004] However, the aforementioned existing technologies have limitations in addressing rapid transient disturbances caused by commutation in glass furnaces. These sensor-feedback-based control loops essentially rely on post-hoc compensation for parameter deviations that have already occurred. From sensor detection errors and controller computational models to actuator actions, the entire process involves inherent signal detection and physical response delays. When faced with abrupt transient disturbances caused by commutation, this state-monitoring-based compensation mechanism struggles to coordinate its adjustment actions with the spatial propagation wavefront of the disturbance. This can easily lead to a misalignment between control commands and the actual physical disturbance in time and space, resulting in significant oscillations and instability of thermal parameters within the pipeline network.
[0005] Therefore, how to solve the problem that existing control methods cause spatiotemporal misalignment between adjustment actions and physical disturbances due to response lag when dealing with transient disturbances during kiln reversal, thereby leading to instability of thermal parameters in the pipeline network, is a technical problem that urgently needs to be solved in this field. Summary of the Invention
[0006] To address the aforementioned problems, this invention provides an intelligent scheduling method for the cascade utilization of waste heat from glass kilns.
[0007] A smart scheduling method for the cascade utilization of waste heat from glass furnaces includes the following steps: S1. Monitor and acquire transient current signals of mechanical action of control elements, filter out interference features in transient current signals, and generate synchronous step level characterizing the system reset point; S2. Using the transition edge of the synchronous step level as the time coordinate reference, and combining it with the obtained physical space attributes of the cascade network, a spatiotemporal mapping is performed to generate a pulse control signal with time delay and timing coding. S3. Send pulse control signals with time delay and timing code to the underlying driver chip of each heat exchange node for matching and comparison, and output access control unlock signal command; S4. In response to the access control unlock signal command, the conventional feedback regulation control loop is cut off, the actuator hardware drive architecture is reconstructed, and a transient overload drive pulse sequence is generated. S5. Execute the transient overload drive pulse sequence to drive the water circulation components at all levels to extract low-temperature water medium from the end of the pipe network and form a reverse quenching fluid jet in the main pipe; S6. Based on the film boiling mechanism induced by the reverse rapid cooling fluid jet, a thermal resistance isolation barrier is constructed to output an energy stability confirmation signal.
[0008] A further aspect of the present invention generates a synchronous step level characterizing the system reset point, comprising the following steps: Monitor the electrical connection status of the main reversing four-way valve reversing mechanism during the operation of the glass furnace; Extract the transient current pulse generated during the transient state of the drive motor contactor closing when the electrical connection state changes abruptly, and use it as the transient current signal; The transient current pulse is processed by a differential filter to filter out the common-mode electromagnetic interference waveform, generating a transient current pulse after the common-mode electromagnetic interference waveform is removed.
[0009] A further aspect of the present invention involves generating a transient current pulse after filtering out common-mode electromagnetic interference waveforms, comprising the following steps: The transient current pulse after filtering out common-mode electromagnetic interference waveform is compared with a preset reference voltage threshold. When the amplitude of the transient current pulse signal after filtering out the common-mode electromagnetic interference waveform exceeds the reference voltage threshold, level flipping and edge shaping are performed. The analog waveform characteristics are converted into digital step signals by level flipping and edge shaping to generate synchronous step levels.
[0010] A further aspect of this invention uses the transition edge of the synchronous step level as a time coordinate reference, and performs spatiotemporal mapping in conjunction with the acquired physical spatial attributes of the cascade pipeline network, including the following steps: Extract the nominal inner diameter data of the corresponding physical pipe sections of each heat exchanger in the lower-level energy network and the acoustic impedance parameters under the corresponding operating conditions and flow velocities as physical space attributes; The nominal inner diameter data and acoustic impedance parameters are input into a preset solidified delay mapping array for time delay simulation. Based on the output results of the time delay simulation, the spatial transmission attenuation coefficients characterizing the cold wave front moving to each stage of the heat exchanger are obtained.
[0011] A further aspect of the present invention generates a pulse control signal with time-delay timing encoding, comprising the following steps: The rising edge of the synchronous step level is used as the trigger origin of the global time coordinate system; Pulse width modulation is performed based on the trigger origin and the spatial transmission attenuation coefficients calculated independently for each stage of the heat exchanger. The pulse control signal with time delay and timing code is generated by outputting a logic high-level duration corresponding to the attenuation coefficient through pulse width modulation. The remaining high-level time as time passes constitutes the time reciprocal constraint.
[0012] A further aspect of the present invention involves outputting an access control unlock signal command, comprising the following steps: Monitor the pulse control signals with time delay and timing code received by the underlying driver chip of each water pump; Activate the edge detection logic inside the underlying driver chip to continuously monitor the level status of the pulse control signal with delay timing encoding; The falling edge of the pulse control signal with time delay and timing code transitioning from logic high to logic low will be used as the trigger condition for time lock matching.
[0013] A further aspect of the present invention uses the falling edge of the pulse control signal with time delay coding transitioning from a logic high level to a logic low level as the trigger condition for satisfying the time lock matching comparison, and also includes the following steps: When the triggering condition for the time lock matching comparison is confirmed to be met, the output level of the pin of the underlying driver chip is immediately changed to conduct the digital logic isolation access control connected in series with the bypass unloading solenoid valve control port; The access control system uses digital logic isolation to transmit the enable signal to the drive circuit and output the access control unlock signal command.
[0014] A further aspect of the present invention generates a transient overload drive pulse sequence, comprising the following steps: In response to the access control unlock signal command, a hardware interrupt placeholder flag is fed back to the central distributed control unit; Based on the hardware interrupt placeholder flag, the feedback regulation control loop corresponding to the proportional-integral-derivative regulation analog voltage signal sent by the central distributed control unit is cut off at the physical and electrical level. The pre-defined drive waveform parameter table is called to inject an overload conduction current pulse into the insulated gate bipolar transistor, generating a corresponding transient overload drive pulse sequence.
[0015] A further aspect of the present invention involves constructing a reverse quenching fluid jet, comprising the following steps: Analyze the transient overload drive pulse sequence to extract the action amplitude coefficient and forced maintenance period parameter; Based on the action amplitude coefficient, the downstream water pump's operating frequency speed is increased in an overfrequency state to generate a local high-pressure zone, and the cross-stage unloading solenoid valve is opened to connect the fluid channel. By utilizing the local high-pressure zone and fluid channel, the low-temperature water medium is injected into the inner side of the evaporator heat exchange tube in the form of high-pressure atomization to create a jet impact, forming a reverse rapid cooling fluid jet.
[0016] A further aspect of the present invention utilizes the film boiling mechanism induced by the reverse quenching fluid jet to construct a thermal resistance barrier on the inner wall of the main pipe, comprising the following steps: The reverse rapid cooling fluid jet guides high-pressure atomized cold water droplets to impact the metal inner wall of the main pipe, which is in a dry-burning state, at high frequency. The mechanism of film boiling induced at the solid-liquid interface by utilizing the extreme temperature difference between cold water droplets and the inner metal wall of the main pipeline; Based on the film boiling mechanism, a vapor film isolation layer with high thermal resistance is generated on the inner metal wall surface of the main pipeline to form a thermal resistance isolation barrier, and a confirmation signal for the stable state of output energy maintenance after the decay of flue gas thermal impact and the recovery of nucleus boiling heat exchange.
[0017] In summary, the present invention has the following beneficial technical effects: 1. By monitoring the transient current signals generated by the mechanical actions of the control elements and generating a synchronous step level, the establishment of the system time base is hard-linked and synchronized with the physical start time of the commutation action. This setting bypasses the data processing stage of conventional sensor state detection and feedback, reduces the lag time between acquiring the commutation event and confirming its occurrence, and provides a unified and accurate global time starting point for subsequent spatial scheduling commands, helping to alleviate the problem of control actions lagging behind physical disturbances on the time axis.
[0018] 2. By combining the physical spatial attributes of the cascade pipe network with spatiotemporal mapping, pulse control signals with time-delay coding are generated, encoding the time delay information of the cold wave front propagating to each stage of heat exchanger into the control commands. This enables the control commands issued to each node to carry dynamic spatiotemporal information, allowing the bottom-level controller of each node to independently determine the timing of its actions based on its spatial location. This achieves spatiotemporal matching between multi-node control actions and the propagation wavefront of physical disturbances, improving the shortcomings of traditional centralized feedback control in adapting to the differences in the spatial distribution of pipe networks.
[0019] 3. A time-lock matching and comparison mechanism is introduced into the underlying controller. By comparing the remaining arrival time with a preset action response dead time threshold, the access control unlock signal command is output only before the physical critical point of the disturbance impact. While granting hardware access for forced intervention, the conventional feedback regulation control loop is actively cut off. This physical-level access isolation provides interference-free execution conditions for responding to transient disturbances, reducing the risk of command competition and actuator oscillation between conventional delayed feedback and transient emergency intervention.
[0020] 4. Upon confirmation of triggering, a reverse quenching fluid jet is constructed to guide the low-temperature working fluid at the end of the pipeline network to impact the superheated metal inner wall. This actively induces film boiling through a predetermined local temperature difference to generate a microscopic pure vapor film. This vapor film, utilizing its high thermal resistance, forms a temporary thermal barrier between the pipe wall and the flue gas, blocking the conduction path of sensible heat from the pipe wall metal to the low-temperature flue gas during the passage of the cold wave front. This phase intervention method suppresses the rapid drop in pipe wall temperature at the heat transfer mechanism level, maintaining the stability of the working fluid and thermodynamic parameters within the cascade pipeline network. Attached Figure Description
[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. The drawings are used to provide a further understanding of the present invention.
[0022] Figure 1 This is a schematic diagram of the method flow of an embodiment of this application.
[0023] Figure 2 The following is a timing waveform diagram of transient current signal processing and synchronous step level generation in an embodiment of this application.
[0024] Figure 3 This is a diagram showing the relationship between the transient overload drive pulse sequence and the motor current response in an embodiment of this application.
[0025] Figure 4 A graph showing the transient overclocking of the water pump speed and the reverse rapid cooling jet in the embodiments of this application is constructed.
[0026] Figure 5 This is a schematic diagram of the system module structure provided in an embodiment of this application. Detailed Implementation
[0027] The following is in conjunction with the appendix Figures 1-5 A preferred description of the present invention is provided below.
[0028] See attached document Figure 1 This invention proposes an intelligent scheduling method for the cascade utilization of waste heat from glass kilns, comprising the following steps: S1. Monitor and acquire transient current signals of mechanical action of control elements, filter out interference features in transient current signals, and generate synchronous step level characterizing the system reset point; S2. Using the transition edge of the synchronous step level as the time coordinate reference, and combining it with the obtained physical space attributes of the cascade network, a spatiotemporal mapping is performed to generate a pulse control signal with time delay and timing coding. S3. Send pulse control signals with time delay and timing code to the underlying driver chip of each heat exchange node for matching and comparison, and output access control unlock signal command; S4. In response to the access control unlock signal command, the conventional feedback regulation control loop is cut off, the actuator hardware drive architecture is reconstructed, and a transient overload drive pulse sequence is generated. S5. Execute the transient overload drive pulse sequence to drive the water circulation components at all levels to extract low-temperature water medium from the end of the pipe network and form a reverse quenching fluid jet in the main pipe; S6. Based on the film boiling mechanism induced by the reverse rapid cooling fluid jet, a thermal resistance isolation barrier is constructed to output an energy stability confirmation signal.
[0029] In one embodiment of the present invention, step S1 includes the following steps: Monitor the electrical connection status of the main reversing four-way valve reversing mechanism during the operation of the glass furnace; Extract the transient current pulse generated during the transient state of the drive motor contactor closing when the electrical connection state changes abruptly, and use it as the transient current signal; The transient current pulse is processed by a differential filter to filter out the common-mode electromagnetic interference waveform, generating a transient current pulse after the common-mode electromagnetic interference waveform is removed.
[0030] This embodiment provides a method for acquiring timing references for a control system. The execution unit, namely a front-end signal processing unit integrating high-precision data acquisition capabilities, deploys non-invasive hardware probes in parallel on one phase of the three-phase AC contactor of the drive motor of the main directional four-way valve of the glass furnace. The hardware probes are preferably Rogowski coils or closed-loop Hall effect current sensors, which can be installed without disconnecting the main circuit and possess excellent high-frequency response characteristics and linearity, capable of reproducing the details of transient current changes.
[0031] Hardware probes monitor the electrical connection status of the commutation mechanism in real time through the principle of electromagnetic induction. After the kiln control system issues a commutation command, the contactor of the drive motor changes from the open state to the closed state. During its closing transient, the motor winding absorbs a surge from the power grid that exceeds its rated operating current, forming a transient current pulse with a duration ranging from microseconds to milliseconds and an amplitude that varies.
[0032] A transient current pulse refers to an inrush current with an amplitude 5 to 8 times the rated current generated at the instant of motor startup, when the rotor is stationary, the induced electromotive force in the rotor windings is close to zero, and the stator windings are approximately a purely inductive load. At this time, the high-speed analog-to-digital converter inside the front-end signal processing unit uses a preset sampling frequency, such as no less than 1MHz. This sampling frequency is set because the surge current time width generated by the transient of the commutation contactor closing is typically on the order of microseconds, and its waveform edges are extremely steep. According to the Nyquist sampling theorem and practical engineering requirements, using a high sampling rate of no less than 1MHz ensures complete and distortion-free capture of the high-frequency abrupt changes in the surge waveform, thereby achieving millisecond-level or even microsecond-level absolute zero-point positioning of the system and avoiding aliasing distortion and timing delays caused by low-frequency sampling. The current signal sensed by the hardware probe is continuously sampled, and a current trigger threshold is set.
[0033] To effectively distinguish between normal motor operation fluctuations and commutation start-up surges, the current trigger threshold is typically set to 1.5 to 3 times the motor's rated operating current, or 20% to 40% of the measured transient surge peak. The rationale for this threshold range is that normal load fluctuations and grid glitches during normal motor operation usually do not exceed 1.2 times the rated current, while commutation surges can reach 5 to 8 times. If the trigger threshold is set below 1.5 times, it is easily falsely triggered by normal fluctuations; if the threshold is set above 3 times or 40% of the peak value, the triggering time will lag significantly behind the initial start point of the surge, disrupting the absolute zero-point significance of the system timing. Therefore, this range effectively resists interference and allows for rapid response in the very early stages of a surge, ensuring high reliability and zero delay in zero-point capture.
[0034] When the sampled value exceeds the current trigger threshold, the system determines that a commutation action has occurred and captures a data sequence of a predetermined duration containing the surge peak, forming the original transient current pulse waveform data. Subsequently, the original transient current pulse waveform data is input into a digital differential filter. The differential filter is specifically implemented using a subtraction circuit based on an operational amplifier or through FIR or IIR filter structures in the digital domain. It utilizes the characteristic that common-mode interference has the same amplitude and phase on two signal lines, and eliminates it through subtraction.
[0035] The filter removes common-mode electromagnetic interference (EMI) waveforms introduced by strong electromagnetic environments such as frequency converters and high-power switches by calculating the difference between the signal sequence and its sequence after a delay of one or more sampling periods in real time. Common-mode EMI waveforms refer to noise signals at the same potential that act simultaneously on all conductors in the signal transmission path, generated by power grid fluctuations, large equipment start-up and shutdown, etc. in industrial environments. After filtering, the differential-mode signal characterizing the physical process of motor startup is retained, and a transient current pulse is generated after denoising and removing the common-mode EMI waveform.
[0036] The transient current pulse, after filtering out common-mode electromagnetic interference, is fed into the level shaping circuit. The core of the level shaping circuit is a high-speed voltage comparator, whose positive input receives the transient current pulse and whose inverting input is connected to a preset reference voltage threshold.
[0037] The reference voltage threshold is set based on statistical analysis of multiple transient current pulse waveform measurements. It's determined to be a level that filters out residual background noise while ensuring reliable triggering, typically between 10% and 20% of the pulse peak amplitude. This parameter balances signal noise immunity and time sensitivity. Since weak high-frequency residual background noise may still exist after differential filtering, a comparator threshold set <10% can easily lead to false step signals due to incorrect topping; a threshold set >20% will cause unacceptable rise-edge time lag in the edge-shaped digital step signal, losing its guiding significance for underlying timing scheduling. 10% to 20% is a reasonable engineering tolerance range derived from statistical analysis. When the pulse signal amplitude exceeds this reference voltage threshold, the comparator output toggles from logic low to logic high.
[0038] Edge-shaping processing aims to convert noisy and slowly varying analog signals into ideal digital logic levels. This transforms current pulses with analog waveform characteristics into digital step signals that are strictly synchronized with the commutation mechanism's actions. This signal is the synchronous step level, characterizing the system's reset point. The synchronous step level is a binary logic signal, and its transition from logic low to logic high is defined as the absolute time zero point of the entire system scheduling. Subsequent timing operations are based on this, and its rising edge marks the time origin of the cascade scheduling system.
[0039] For example, assuming the rated current of the drive motor for the main reversing four-way valve of the glass furnace is 50A, the measured peak value of the start-up transient current pulse is approximately 350A. The hardware probe in the front-end signal processing unit is a Hall current sensor with a bandwidth of 2MHz, whose output voltage is proportional to the current, with a proportionality coefficient of 10mV / A.
[0040] During the commutation, the sensor detects a current increase from near 0A. The data acquisition system samples at a rate of 2MS / s and sets the trigger threshold at 100A, meaning data acquisition is triggered when the sensor output voltage is 1V.
[0041] When the contactor closes, the current reaches a peak of 350A within 50μs, and the voltage signal output by the sensor reaches a peak of 3.5V within 50μs. This signal is superimposed with common-mode noise of 0.2V amplitude and 10kHz frequency caused by the field frequency converter. The captured raw transient current pulse waveform data is sent to a digital differential filter. The filter uses an algorithm to eliminate the 10kHz common-mode noise, and the peak voltage of the transient current pulse after filtering out common-mode electromagnetic interference is 3.48V.
[0042] A pulse signal with a peak value of 3.48V is fed into a high-speed voltage comparator. The reference voltage threshold is set to 15% of the peak value, i.e., 3.48V × 15% ≈ 0.52V. When the input pulse voltage rises and exceeds this value, the comparator output voltage flips from 0V (logo 0) to 5V (logo 1). This generates a synchronous step level that represents the system reset point, transitioning from 0V to 5V after the commutation. The high-level state of the synchronous step level serves as the trigger signal for the next processing step.
[0043] See Figure 2 The figure shows the timing waveforms of transient current signal processing and synchronous step level generation in this embodiment. The solid line in the figure represents the original transient current containing 10kHz common-mode noise, which is then differentially filtered to extract a smooth equivalent voltage signal (thick solid line). When the amplitude of this equivalent voltage signal crosses the 0.52V trigger threshold (dashed line), the system generates a digital synchronous step level from 0V to 5V without delay (dotted line). The waveform diagram visually demonstrates that while filtering out strong electromagnetic interference, the precise positioning of the system's time origin is achieved.
[0044] In one embodiment of the present invention, step S2 includes the following steps: Extract the nominal inner diameter data of the corresponding physical pipe sections of each heat exchanger in the lower-level energy network and the acoustic impedance parameters under the corresponding operating conditions and flow velocities as physical space attributes; The nominal inner diameter data and acoustic impedance parameters are input into a preset solidified delay mapping array for time delay simulation. Based on the output results of the time delay simulation, the spatial transmission attenuation coefficients characterizing the cold wave front moving to each stage of the heat exchanger are obtained.
[0045] After generating a synchronization step level, the rising edge of the synchronization step level triggers a dedicated spatiotemporal mapping processing unit to execute the spatiotemporal mapping process. The spatiotemporal mapping processing unit retrieves pre-configured physical spatial attribute data of the cascade pipe network from its internally stored non-volatile memory. This data structuredly describes the geometric and medium parameters of the physical pipe sections corresponding to each stage of heat exchanger in the lower-level energy network, such as superheaters, evaporators, and economizers.
[0046] The downstream energy network refers to the cascaded flue gas waste heat recovery system composed of multiple heat exchangers and connecting pipes downstream of the main flue of the glass kiln. The processing unit extracts the nominal inner diameter data of the upstream connecting pipe section and the flue gas acoustic impedance parameters calibrated under standard operating conditions and flow rates for each heat exchanger node.
[0047] The nominal inner diameter data is obtained from the equipment's design drawings or engineering database; the acoustic impedance parameter characterizes the degree to which the flue gas medium impedes the propagation of sound waves or pressure waves, and its value is related to the temperature, pressure, and composition of the flue gas, obtained statistically or calibrated based on historical operating data under typical operating conditions. The spatiotemporal mapping processing unit inputs the extracted nominal inner diameter data and acoustic impedance parameters into the curing delay mapping array to calculate the time delay.
[0048] The solidified delay mapping array is a logical functional module implemented through embedded code or lookup tables. Internally, it solidifies the mapping relationship from pipeline physical parameters to propagation time, based on physical laws such as the simplified solution of the one-dimensional unsteady convection-diffusion equation. The computational model calculates the time delay of the cold wave front propagating from the reversing valve location to each heat exchanger node, based on the pipe size, length, and flue gas physical characteristics.
[0049] The cold wave front refers to the region where the flue gas cloud with a temperature lower than that under normal operating conditions intersects with the high-temperature flue gas as it advances through the duct after the kiln has reversed its direction. The time delay extrapolation output is a set of values, representing the spatial transmission attenuation coefficient of the cold wave front as it moves to each stage of the heat exchanger. The spatial transmission attenuation coefficient is a quantitative representation of the time delay, expressed in units such as seconds (s) or milliseconds (ms).
[0050] The spacetime mapping processing unit uses the rising edge of the received synchronization step level as the zero point of the global time coordinate system. Based on the calculated spatial transmission attenuation coefficient, i.e., time delay The central processing unit deducts the action response dead time threshold of each node's execution element at the core layer. This refers to the total response time of the bypass unloading solenoid valve. Specifically, it is the sum of the solenoid valve's rated response time and the preset safety time margin. The preset safety time margin is typically 20ms to 50ms. This margin is set because there is an unavoidable delay in industrial network communication (usually several milliseconds) between the issuance of the command and the actual action of the solenoid valve, the inherent delay in relay contact closure, and the initial hydraulic lag as the mechanical valve core overcomes static friction. A safety margin of 20ms to 50ms compensates for the combined inherent delays of the physical and electrical systems, ensuring that the mechanical valve is already substantially in the prescribed operating state the instant the cold wave front actually arrives at the heat exchange node, achieving rigid waiting rather than delayed catch-up.
[0051] For each node Independently execute pulse width modulation: in Time as a node Generate a logic high-level signal and maintain it until time. Reaching absolute trigger time When the signal is low, it is toggled to a logic low level and held.
[0052] This generates a digital signal stream for each heat exchanger node, with the falling edge of the pulse aligning with the trigger point of the intervention action. The collection of these digital signal streams constitutes a pulse control signal with time-delayed timing encoding. The pulse control signal with time-delayed timing encoding is a set of parallel digital signals, each corresponding to a spatial node. The falling edge of its high-level pulse encodes the physical trigger time of that node after deducting the response dead time. The mathematical expression for the pulse width modulation process that introduces the dead-time response time is as follows:
[0053] In the formula, Represented as the first Each heat exchanger node generates a time-delayed, time-coded pulse control signal, which is a pulse control signal that varies with time. A changing binary function; This indicates the time elapsed since the synchronous step level was triggered. Represents the propagation of the cold wave front to the first Physical time required for each heat exchanger node; This represents the preset action response dead time threshold corresponding to this node. Less than When the output is high (1), the output is logic high (1). Greater than or equal to When this happens, the output toggles to logic low (0). The central processing unit compensates for the hardware response delay and outputs a signal. The high-to-low transition edge is the absolute trigger instruction of the underlying execution unit. (Time variable) , and The unit for all values is seconds (s); function output It is a dimensionless logical value of 1 or 0.
[0054] For example, after the time-space mapping processing unit receives a synchronous step level transition from 0V to 5V, the internal timer starts from... Timing. Retrieve node 1, such as the evaporator tube section with a nominal inner diameter of 800mm and an acoustic impedance of 415Pa·s / m. 3 30m from the directional valve, lower limit of valve dead zone. The preset time is 0.15s; retrieve node 2, such as the economizer tube section with a nominal inner diameter of 700mm and an acoustic impedance of 410Pa·s / m. 3 50m from the reversing valve, lower limit of dead zone The preset time is 0.2s.
[0055] The above parameters are input into the solidified delay mapping array, and the average propagation velocity of the cold wave front is derived to be 20 m / s. The spatial transmission attenuation coefficient reaching node 1 is then calculated. Spatial transmission attenuation coefficient to node 2 The pulse width modulator generates a first-path pulse control signal with time delay coding for node 1. Switch to 5V high level, duration ,exist The timer flips to a low level of 0V; a second pulse control signal with time delay and timing encoding is generated for node 2. Switch to 5V high level, duration ,exist The timer flips to a low level of 0V. The two digital signals form a pulse control signal with time delay and timing encoding, which is then sent to the control node.
[0056] In one embodiment of the present invention, step S3 includes the following steps: Monitor the pulse control signals with time delay and timing code received by the underlying driver chip of each water pump; Activate the edge detection logic inside the underlying driver chip to continuously monitor the level status of the pulse control signal with delay timing encoding; The falling edge of the pulse control signal with time delay and timing code transitioning from logic high to logic low will be used as the trigger condition for time lock matching.
[0057] After generating parallel pulse control signals with time-delayed timing codes, the distribution and matching process is initiated. A high-frequency data transmission link is established between the central processing unit containing the solidified delay mapping array and the underlying driver chips of the feedwater pumps at each waste heat recovery pipeline node. The data transmission link is a communication physical layer that minimizes signal transmission delay and jitter, such as a point-to-point hard connection based on real-time industrial Ethernet technologies like LVDS or EtherCAT.
[0058] High-frequency data transmission links have microsecond-level deterministic delays, such as low-voltage differential signal serial buses implemented based on field-programmable gate arrays. The central processing unit routes pulse control signals with time-delayed timing codes to the corresponding feedwater pump underlying driver chips through the high-frequency data transmission links. The feedwater pump underlying driver chips are typically microcontrollers (MCUs) or FPGAs that integrate high-speed timers and programmable logic.
[0059] The hardware logic or firmware within the water pump's underlying driver chip remains silent and ready after receiving a pulse control signal with timing-encoded delay. The chip's internal edge detection logic continuously monitors the pulse signal level. When it detects a transition from logic high to logic low (falling edge), it changes the output level of a specific GPIO pin, such as driving it from low to high. The GPIO pin is connected to the enable pin of a digital logic isolation gate, and the gate's signal path is connected in series with the control port of the downstream bypass unloading solenoid valve.
[0060] Digital logic isolated access control systems utilize high-speed optocouplers or AND gate logic chips to physically isolate conventional control signals from emergency intervention signals. When the GPIO pin outputs a high level, the digital logic isolated access control system is activated, transmitting an enable signal to the solenoid valve drive circuit, which then outputs an access control unlock signal command, such as a 24V DC high-level control signal, triggering hardware driver reconfiguration.
[0061] For example, the central processing unit sends two parallel pulse control signals with time-delayed timing codes to the feedwater pump driver chips of the evaporator at node 1 and the economizer at node 2 via the LVDS bus. For the driver chip at node 1, hardware edge detection logic locks the received pulse signal. When the system time reaches... At that moment, the pulse signal received by node 1 flips from high to low. The driver chip captures this falling edge and outputs a 3.3V high level on the GPIO pin, turning on the digital logic isolation access control.
[0062] The isolation access control outputs a 24V DC high-level signal as the access control unlocking signal command for node 1, outputting it 150ms in advance to compensate for the 120ms valve response time and provide a 30ms safety margin. Similarly, the falling edge of the pulse signal received by node 2... When the moment arrives, the driver chip captures the edge and outputs the corresponding access control unlock signal command.
[0063] In one embodiment of the present invention, step S4 includes the following steps: In response to the access control unlock signal command, a hardware interrupt placeholder flag is fed back to the central distributed control unit; Based on the hardware interrupt placeholder flag, the feedback regulation control loop corresponding to the proportional-integral-derivative regulation analog voltage signal sent by the central distributed control unit is cut off at the physical and electrical level. The pre-defined drive waveform parameter table is called to inject an overload conduction current pulse into the insulated gate bipolar transistor, generating a corresponding transient overload drive pulse sequence.
[0064] After successfully receiving the access control unlock signal command, the underlying driver chips of each node's water pump independently and in parallel execute the control process. The internal hardware interrupt input port of the underlying driver chip continuously monitors the voltage level, capturing voltage transitions in the access control unlock signal command. For example, when the voltage rises from 0V to 24V, a non-maskable highest-priority hardware interrupt is triggered. The interrupt service routine feeds back a predefined hardware interrupt placeholder flag to the central distributed control unit (DCS system) via communication channels such as the controller area network bus. The hardware interrupt placeholder flag is a message with a specific ID and data payload, functionally equivalent to a bus control request in a preemptive protocol, used to declare that the driver chip has taken over the actuator and request the central controller to suspend normal control.
[0065] Upon receiving a hardware interrupt placeholder flag, the central distributed control unit disables the corresponding analog output channel via the I / O module or disconnects the solid-state relay in the analog signal output line, blocking the proportional-integral-derivative (PID) analog voltage signal representing conventional control commands, such as a 4-20mA current signal or a 0-10V voltage signal. The interrupt service routine of the underlying driver chip retrieves a pre-programmed drive waveform parameter table from its internal read-only memory and programs the gate drive signals of the IGBT array for the phase windings of the drive motor according to this parameter table.
[0066] The program generates a high-frequency pulse width modulation signal and applies it to the IGBT gate according to the timing and duty cycle defined in the parameter table. By applying a duty cycle higher than the rated steady-state value, the insulated gate bipolar transistor is turned on, injecting an overload current into the motor windings. The overload current is a short-time current value reaching 150% to 250% of the rated current, used to obtain starting or braking torque. The above pulse sequence, which does not rely on external feedback, constitutes the transient overload drive pulse sequence. The transient overload drive pulse sequence is an open-loop control instruction set stored inside the drive chip, defining the electrical state of the motor during emergency intervention.
[0067] For example, when the feedwater pump driver chip of Node 1 detects a 24V high-level access control unlock signal command on the GPIO_INT pin, it triggers a hardware interrupt. The interrupt service routine sends a message with ID 0x101 and data field 0xDEADBEEF via the CAN bus as a hardware interrupt placeholder. After receiving the message, the CAN bus monitoring module of the central distributed control unit executes an emergency handling program, clearing the enable bit of the AO-03 analog output channel that controls the speed of the feedwater pump of Node 1 to logic 0, and cutting off the corresponding proportional-integral-derivative (PID) control analog voltage signal. The analog voltage signal is typically 15.2mA, corresponding to 70% speed.
[0068] Simultaneously, the driver chip reads the two-stage transient overload drive pulse sequence parameters from its internal Flash memory: In the first stage, within a time window of 0ms to 100ms, a drive signal with a PWM frequency of 5kHz and a duty cycle of 99% is generated; in the second stage, within a time window of 101ms to 500ms, the frequency remains constant, but the duty cycle decreases to 75%. These parameters are then fed into the PWM generator to drive the six IGBTs. The 99% duty cycle in the first stage causes the motor current to surge to 220% of its rated value, generating peak torque. This completes the generation of the transient overload drive pulse sequence.
[0069] See Figure 3 As shown, the dynamic relationship between the transient overload drive pulse sequence and the motor current response in this embodiment is illustrated. In the first stage, from 0ms to 100ms in the start-up region, the system outputs a PWM duty cycle as high as 99%, causing the motor operating current to rise rapidly and reach 220% of the rated peak torque. In the second stage, from 101ms to 500ms in the impact maintenance region, the PWM duty cycle drops to 75%, maintaining the motor in a stable overload output state, providing transient high mechanical kinetic energy assurance for the subsequent construction of the high-pressure water jet.
[0070] In one embodiment of the present invention, step S5 includes the following steps: Analyze the transient overload drive pulse sequence to extract the action amplitude coefficient and forced maintenance period parameter; Based on the action amplitude coefficient, the downstream water pump's operating frequency speed is increased in an overfrequency state to generate a local high-pressure zone, and the cross-stage unloading solenoid valve is opened to connect the fluid channel. By utilizing the local high-pressure zone and fluid channel, the low-temperature water medium is injected into the inner side of the evaporator heat exchange tube in the form of high-pressure atomization to create a jet impact, forming a reverse rapid cooling fluid jet.
[0071] After the underlying driver chip of a certain level water pump generates a transient overload drive pulse sequence, the internal execution unit parses the action amplitude coefficient of the quantified drive intensity and the forced maintenance period parameter that defines the duration of the action. The action amplitude coefficient is a scaling factor of 1.5 to 2.5. The boundary between the action amplitude coefficient and the maintenance cycle is based on a comprehensive consideration of pipeline safety and thermodynamic phase change. If the action amplitude coefficient is lower than 1.5, it is impossible to overcome the original pressure difference of the pipeline network in a short time to establish a sufficient reverse high-pressure zone to achieve fluid atomization jet. If it is higher than 2.5, there is a risk of exceeding the transient overload limit of the frequency converter and water pump motor, which may cause the equipment to trip. The forced maintenance cycle parameter is a time constant of 300ms to 1000ms, which defines the duration of the reverse jet process. Since the formation and dynamic stability of the microscopic vapor film of film boiling usually takes hundreds of milliseconds, the lower limit of the maintenance cycle is set at 300ms to ensure the formation of the thermal resistance barrier. The upper limit is strictly limited to within 1000ms to prevent the water pump from overheating and burning out due to long-term overfrequency, and to avoid water hammer damage and excessive thermal shock to the heat exchange pipeline network caused by prolonged reverse high-pressure water jet.
[0072] The drive chip, through a coordinated control link, sends a synchronous overdrive command to the frequency converter of the circulating water pump belonging to the downstream economizer, based on the action amplitude coefficient, thereby increasing the output power frequency speed to the target speed. Simultaneously, the drive chip outputs a high-level signal to the control relay of the cross-stage unloading solenoid valve through its digital output port, activating the excitation leakage circuit and switching the solenoid valve to the fully open state.
[0073] The cross-stage unloading solenoid valve is installed on the bypass line connecting the evaporator water side and the economizer water side. During the time window maintaining the cycle parameters, the downstream economizer circulating water pump operates at overclocked frequency, establishing a local high-pressure zone. Utilizing the pressure difference and the opened cross-stage unloading solenoid valve, the low-temperature water medium in the economizer, such as at temperatures between 90°C and 130°C, is pushed back into the inner side of the evaporator heat exchange tubes. As the fluid passes through the solenoid valve orifice, it is throttled and depressurized, entering the evaporator heat exchange tubes in a high-pressure atomized form, such as a two-phase flow state of tiny droplets mixed with steam. This coordinated action constructs a counter-current quenching fluid jet composed of high-speed, low-temperature, atomized droplets on the inner wall of the heat exchange tubes.
[0074] For example, the underlying drive chip of the evaporator feedwater pump at node 1 executes a transient overload drive pulse sequence, which is parsed to obtain an action amplitude coefficient of 2.2 and a forced maintenance period parameter of 500ms. The drive chip sends a synchronous override command to the frequency converter of the economizer circulating water pump at node 2, increasing its normal operating frequency speed of 1450rpm to [a higher speed] within 20ms. Simultaneously, the excitation circuit of the cross-stage unloading solenoid valve is activated, and the valve fully opens within 120ms. The economizer water pump pressurizes the 95°C low-temperature water medium to approximately 2.0MPa, while the evaporator pipeline pressure is 1.2MPa. The pressure difference drives the water flow through the solenoid valve, atomizing it into a stream with a diameter of approximately... Tiny droplets, The jet is injected into the evaporator heat exchanger tube at a reverse velocity. The jet lasts for 500 ms, creating a reverse quenching fluid jet.
[0075] See Figure 4 The diagram illustrates the physical process curves of the transient overclocking of the water pump speed and the construction of the reverse quenching jet in this embodiment. The system controls the circulating water pump speed to increase from the conventional 1450 rpm to the target overclocking speed of 3190 rpm within 20 ms. With the increase in pump speed and the opening of the unloading valve, the reverse quenching jet velocity rises rapidly and remains stable at 30 m / s, forming a stable atomized jet zone with a strong scouring effect within the time window, completing the high-pressure extraction and reverse injection of the low-temperature medium at the end of the pipeline network.
[0076] In one embodiment of the present invention, step S6 includes the following steps: The reverse rapid cooling fluid jet guides high-pressure atomized cold water droplets to impact the metal inner wall of the main pipe, which is in a dry-burning state, at high frequency. The mechanism of film boiling induced at the solid-liquid interface by utilizing the extreme temperature difference between cold water droplets and the inner metal wall of the main pipeline; Based on the film boiling mechanism, a vapor film isolation layer with high thermal resistance is generated on the inner metal wall surface of the main pipeline to form a thermal resistance isolation barrier, and a confirmation signal for the stable state of output energy maintenance after the decay of flue gas thermal impact and the recovery of nucleus boiling heat exchange.
[0077] Within the forced maintenance cycle of the reverse quenching fluid jet, a physical phase change process is induced. The constructed reverse quenching fluid jet, through its inherent kinetic characteristics, guides high-pressure atomized cold water droplets to impact the inner metal wall of the main pipe, which is in a superheated, dry-burning state. The superheated, dry-burning state refers to the pipe wall temperature reaching or exceeding the water saturation temperature at that pressure.
[0078] A large temperature difference exists between the cold water droplets and the pipe wall, and the pipe wall is superheated relative to the saturation temperature at this pressure. Upon contact with the pipe wall, the liquid layer at the contact point evaporates, inducing film boiling. Film boiling occurs when the superheat between the heated wall and the saturated liquid exceeds 120°C, and its heat transfer efficiency is lower than that of nucleation boiling. When the liquid contacts a solid surface exceeding its boiling point, a vapor film is generated at the solid-liquid interface. This process occurs simultaneously on the inner surface of the pipe wall, forming a vapor film isolation layer with high thermal resistance.
[0079] The vapor film, formed by interconnected tiny vapor bubbles, ranges in thickness from tens to hundreds of micrometers. Its thermal conductivity is lower than that of water and metal, hindering heat transfer outwards. The vapor film alters the heat conduction path, blocking the reverse conduction of sensible heat from the pipe wall metal to the rapidly cooled flue gas outside the pipe. The heat energy of the pipe wall is confined within the metal. After the cold wave front passes and the forced maintenance cycle ends, the jet stops, and the vapor film collapses due to the loss of its cooling source, resuming the nucleus boiling heat exchange process. The system control unit outputs an energy stabilization confirmation signal after the flue gas temperature recovers and the pipeline pressure stabilizes.
[0080] For example, inside the evaporator tube at node 1, tiny water droplets at 95°C... The heat exchange tube impacts an inner wall temperature of 350°C, corresponding to a superheated wall surface with a saturation temperature of approximately 188°C under 1.2 MPa. The tube wall's relative saturation point reaches 162°C, i.e. The superheat induces film boiling at the impact point. Within milliseconds after contact, a film of approximately [thickness missing] thickness forms on the surface. The vapor membrane isolation layer.
[0081] Due to the thermal resistance of the vapor film, when the outside flue gas temperature drops from 900°C to 500°C, the reverse heat transfer path from the sensible heat at 350°C on the tube wall to the 500°C flue gas is blocked, and the tube wall temperature drops by less than 5°C within the 500ms forced maintenance period. After 500ms, the jet stops, the vapor film disappears, and nucleation boiling resumes inside the tube. The central DCS monitors that the evaporator outlet steam pressure fluctuation is less than 0.02MPa, generating an energy stability confirmation signal.
[0082] See Figure 5 The present invention also proposes an intelligent scheduling system for the cascade utilization of waste heat from glass kilns, comprising the following modules: The electrical event probe module monitors and acquires transient current signals of mechanical actions of control components, filters out interference features in the transient current signals, and generates a synchronous step level characterizing the system reset point. The spatiotemporal mapping processing module uses the transition edge of the synchronous step level as the time coordinate reference, and combines it with the acquired physical spatial attributes of the cascade pipeline network to perform spatiotemporal mapping and generate a pulse control signal with time delay and timing encoding. The distributed time lock module sends pulse control signals with time delay and timing encoding to the underlying driver chips of each heat exchange node for matching and comparison, and outputs access control unlocking signal commands. The drive architecture reconfiguration module, in response to the access control unlock signal command, cuts off the conventional feedback regulation control loop, reconfigures the actuator hardware drive architecture, and generates a transient overload drive pulse sequence; The reverse quenching jet generation module executes a transient overload drive pulse sequence to drive the water circulation components at all levels to extract low-temperature water medium from the end of the pipe network and form a reverse quenching fluid jet in the main pipe; The thermal resistance isolation barrier construction module relies on the film boiling mechanism induced by the reverse rapid cooling fluid jet to construct a thermal resistance isolation barrier and outputs an energy stability confirmation signal.
[0083] Each of the modules can be implemented in whole or in part through software, hardware, or a combination thereof. It supports hardware embedded in or independent of the processor in the computer device, and also supports software stored in the memory of the computer device, so that the processor can call and execute the operations corresponding to each of the above modules.
[0084] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.
Claims
1. A smart scheduling method for the cascade utilization of waste heat from a glass kiln, characterized in that, Includes the following steps: S1. Monitor and acquire transient current signals of mechanical action of control elements, filter out interference features in transient current signals, and generate synchronous step level characterizing the system reset point; S2. Using the transition edge of the synchronous step level as the time coordinate reference, and combining it with the obtained physical space attributes of the cascade network, a spatiotemporal mapping is performed to generate a pulse control signal with time delay and timing coding. S3. Send pulse control signals with time delay and timing code to the underlying driver chip of each heat exchange node for matching and comparison, and output access control unlock signal command; S4. In response to the access control unlock signal command, the conventional feedback regulation control loop is cut off, the actuator hardware drive architecture is reconstructed, and a transient overload drive pulse sequence is generated. S5. Execute the transient overload drive pulse sequence to drive the water circulation components at all levels to extract low-temperature water medium from the end of the pipe network and form a reverse quenching fluid jet in the main pipe; S6. Based on the film boiling mechanism induced by the reverse rapid cooling fluid jet, a thermal resistance isolation barrier is constructed to output an energy stability confirmation signal.
2. The intelligent scheduling method for the cascade utilization of waste heat in a glass furnace according to claim 1, characterized in that, Generating a synchronous step level representing the system reset point includes the following steps: Monitor the electrical connection status of the main reversing four-way valve reversing mechanism during the operation of the glass furnace; Extract the transient current pulse generated during the transient state of the drive motor contactor closing when the electrical connection state changes abruptly, and use it as the transient current signal; The transient current pulse is processed by a differential filter to filter out the common-mode electromagnetic interference waveform, generating a transient current pulse after the common-mode electromagnetic interference waveform is removed.
3. The intelligent scheduling method for the cascade utilization of waste heat in a glass furnace according to claim 2, characterized in that, Generating a transient current pulse after filtering out common-mode electromagnetic interference includes the following steps: The transient current pulse after filtering out common-mode electromagnetic interference waveform is compared with a preset reference voltage threshold. When the amplitude of the transient current pulse signal after filtering out the common-mode electromagnetic interference waveform exceeds the reference voltage threshold, level flipping and edge shaping are performed. The analog waveform characteristics are converted into digital step signals by level flipping and edge shaping to generate synchronous step levels.
4. The intelligent scheduling method for the cascade utilization of waste heat from a glass kiln according to claim 1, characterized in that, Using the transition edge of the synchronous step level as the time coordinate reference, and combining it with the acquired physical spatial attributes of the cascade pipeline network, spatiotemporal mapping is performed, including the following steps: Extract the nominal inner diameter data of the corresponding physical pipe sections of each heat exchanger in the lower-level energy network and the acoustic impedance parameters under the corresponding operating conditions and flow velocities as physical space attributes; The nominal inner diameter data and acoustic impedance parameters are input into a preset solidified delay mapping array for time delay simulation. Based on the output results of the time delay simulation, the spatial transmission attenuation coefficients characterizing the cold wave front moving to each stage of the heat exchanger are obtained.
5. The intelligent scheduling method for the cascade utilization of waste heat in a glass kiln according to claim 4, characterized in that, Generating a pulse control signal with time-delay timing encoding includes the following steps: The rising edge of the synchronous step level is used as the trigger origin of the global time coordinate system; Pulse width modulation is performed based on the trigger origin and the spatial transmission attenuation coefficients calculated independently for each stage of the heat exchanger. The pulse control signal with time delay and timing code is generated by outputting a logic high-level duration corresponding to the attenuation coefficient through pulse width modulation. The remaining high-level time as time passes constitutes the time reciprocal constraint.
6. The intelligent scheduling method for the cascade utilization of waste heat in a glass kiln according to claim 1, characterized in that, Outputting an access control unlock signal command includes the following steps: Monitor the pulse control signals with time delay and timing code received by the underlying driver chip of each water pump; Activate the edge detection logic inside the underlying driver chip to continuously monitor the level status of the pulse control signal with delay timing encoding; The falling edge of the pulse control signal with time delay and timing code transitioning from logic high to logic low will be used as the trigger condition for time lock matching.
7. The intelligent scheduling method for the cascade utilization of waste heat in a glass kiln according to claim 6, characterized in that, The falling edge of the pulse control signal with time delay coding transitioning from logic high to logic low is used as the trigger condition for time lock matching and comparison, and the process also includes the following steps: When the triggering condition for the time lock matching comparison is confirmed to be met, the output level of the pin of the underlying driver chip is immediately changed to conduct the digital logic isolation access control connected in series with the bypass unloading solenoid valve control port; The access control system uses digital logic isolation to transmit the enable signal to the drive circuit and output the access control unlock signal command.
8. The intelligent scheduling method for the cascade utilization of waste heat in a glass kiln according to claim 1, characterized in that, Generating a transient overload drive pulse sequence includes the following steps: In response to the access control unlock signal command, a hardware interrupt placeholder flag is fed back to the central distributed control unit; Based on the hardware interrupt placeholder flag, the feedback regulation control loop corresponding to the proportional-integral-derivative regulation analog voltage signal sent by the central distributed control unit is cut off at the physical and electrical level. The pre-defined drive waveform parameter table is called to inject an overload conduction current pulse into the insulated gate bipolar transistor, generating a corresponding transient overload drive pulse sequence.
9. The intelligent scheduling method for the cascade utilization of waste heat in a glass furnace according to claim 1, characterized in that, Constructing a reverse quench fluid jet includes the following steps: Analyze the transient overload drive pulse sequence to extract the action amplitude coefficient and forced maintenance period parameter; Based on the action amplitude coefficient, the downstream water pump's operating frequency speed is increased in an overfrequency state to generate a local high-pressure zone, and the cross-stage unloading solenoid valve is opened to connect the fluid channel. By utilizing the local high-pressure zone and fluid channel, the low-temperature water medium is injected into the inner side of the evaporator heat exchange tube in the form of high-pressure atomization to create a jet impact, forming a reverse rapid cooling fluid jet.
10. The intelligent scheduling method for the cascade utilization of waste heat from a glass kiln according to claim 1, characterized in that, The thermal resistance barrier is constructed by relying on the film boiling mechanism induced by the reverse quenching fluid jet to the inner wall of the main pipe, including the following steps: The reverse rapid cooling fluid jet guides high-pressure atomized cold water droplets to impact the metal inner wall of the main pipe, which is in a dry-burning state, at high frequency. The mechanism of film boiling induced at the solid-liquid interface by utilizing the extreme temperature difference between cold water droplets and the inner metal wall of the main pipeline; Based on the film boiling mechanism, a vapor film isolation layer with high thermal resistance is generated on the inner metal wall surface of the main pipeline to form a thermal resistance isolation barrier, and a confirmation signal for the stable state of output energy maintenance after the decay of flue gas thermal impact and the recovery of nucleus boiling heat exchange.
Citation Information
Patent Citations
Heat distribution pipeline temperature regulation and control method based on Internet of Things and control system thereof
CN121326048A
