A high-speed current modulation method with active energy injection

Abstract

The application relates to the field of pulse power and precise current control, and discloses a high-speed current modulation method of active energy injection, which comprises the following steps: obtaining the equivalent series inductance of a main power loop of a load and the steady-state working voltage drop of the load, receiving a target current waveform instruction, and obtaining loop parameters and the waveform instruction; inputting the loop parameters and the waveform instruction into an instruction calculation module, and calculating a forced voltage control sequence according to a physical model; inputting the forced voltage control sequence into a preset high-voltage source module, controlling the preset high-voltage source to output corresponding stable direct-current high voltage; inputting the forced voltage control sequence into a timing control module, and generating a switching control signal for driving a high-speed switching matrix; and driving the high-speed switching matrix according to the switching control signal, rapidly connecting or cutting off the stable direct-current high voltage to the load loop according to a predetermined timing, and obtaining a modulated load current waveform. The application realizes accurate presetting of the stable direct-current high voltage and accurate control of the driving timing of the high-speed switching matrix.

Description

Technical Field

[0001] This invention relates to the field of pulse power and precision current control, and in particular to a high-speed current modulation method with active energy injection. Background Technology

[0002] High-speed current modulation technology is a power electronics technology that precisely controls the rise and fall edge times and amplitude changes of the current waveform to meet the needs of specific applications. It is widely used in critical engineering fields requiring rapid current switching, such as pulsed laser driving, particle beam modulation, high-speed solenoid valve control, high-frequency switching power supplies, and radio frequency power supplies. In these applications, the inherent equivalent series inductance of the load circuit is the main physical factor limiting the rate of current change, directly affecting the dynamic response performance and control accuracy of the system.

[0003] In existing technologies, high-speed current modulation mainly employs passive adaptation of the loop inductance, including passively reducing the inductance path, passively utilizing the inductance path, and indirectly optimizing the control path. However, existing technologies using passive adaptation methods are limited by the physical limit of di / dt=V / L for the load current change rate, and are constrained by gate drive delay and loop stability. This prevents existing methods from achieving nanosecond-level current jump speeds; the current change rate is typically no more than 0.5A / ns, and the current rise / fall time is limited to the range of 1-5μs. Furthermore, the control precision is insufficient, and waveform programmability is lacking, failing to meet the performance requirements of high speed, precision, and programmability. Summary of the Invention

[0004] In view of this, the present invention proposes a high-speed current modulation method with active energy injection, which solves the problems of existing technologies that, due to the use of passive adaptation, still have the load current change rate limited by the physical limit of di / dt=V / L, and are constrained by gate drive delay and loop stability, which makes it impossible to achieve nanosecond-level current jump speed. The current change rate is usually no more than 0.5A / ns, the current rise / fall time is limited to the range of 1-5μs, the control precision is insufficient, and the waveform programmability is lacking, which cannot meet the performance requirements of high speed, accuracy, and programmability.

[0005] The technical solution of this invention is implemented as follows: This invention provides a high-speed current modulation method for active energy injection, comprising the following steps: Obtain the equivalent series inductance of the main power circuit of the load and the steady-state operating voltage drop of the load, and receive the target current waveform command to obtain the circuit parameters and waveform command; The circuit parameters and the waveform commands are input into the command calculation module, and the forced voltage control sequence is calculated based on the physical model. The forced voltage control sequence is input into the preset high voltage source module to control the preset high voltage source to output the corresponding stable DC high voltage. The forced voltage control sequence is input into the timing control module to generate a switching control signal that drives the high-speed switching matrix; Driven by the switch control signal, the high-speed switch matrix is ​​used to quickly connect or disconnect the stable DC high voltage to the load circuit according to a predetermined timing sequence, thereby obtaining the modulated load current waveform.

[0006] In some embodiments, the step of inputting the loop parameters and the waveform command into the command calculation module and calculating the forced voltage control sequence based on the physical model includes: The waveform command is parsed to obtain the target current value, target rise time, and target fall time. The target current value, target rise time, target fall time, equivalent series inductance, and steady-state operating voltage drop are input into the command calculation module to establish a physical model based on Kirchhoff's voltage law. The forced setup voltage and forced shutdown voltage are calculated using the physical model. The forced setup voltage corresponds to the target rising edge, and the forced shutdown voltage corresponds to the target falling edge. The forced setup voltage and the forced shutdown voltage are combined with their corresponding application times to generate a forced voltage control sequence.

[0007] In some embodiments, the physical model is a relationship between net voltage and loop inductance and rate of change of current. The process by which the instruction calculation module calculates the forced setup voltage and forced shutdown voltage based on the physical model includes: Calculate the target current change rate by dividing the target current value by the target rise time to obtain the rise current change rate, and divide the target current value by the target fall time to obtain the fall current change rate. The forced setup voltage is not less than the product of the rising current rate of change and the equivalent series inductance plus the steady-state operating voltage drop; The magnitude of the forced shutdown voltage is not less than the product of the rate of change of the decreasing current and the equivalent series inductance.

[0008] In some embodiments, the instruction calculation module supports high-side forced topology, low-side forced topology, and bilateral forced topology, and the methods for applying the forced setup voltage and forced shutdown voltage include: When a high-side forced topology is used, the forced setup voltage corresponds to applying a positive voltage on the high side of the load, and the forced shutdown voltage corresponds to applying a negative voltage on the high side of the load. When a low-side forced topology is used, the forced setup voltage corresponds to applying a negative voltage on the low side of the load, and the forced shutdown voltage corresponds to applying a positive voltage on the low side of the load. When a bilateral forced topology is used, the forced setup voltage corresponds to a combination of applying a positive voltage on the high side of the load and applying a negative voltage on the low side of the load, and the forced shutdown voltage corresponds to a combination of applying a negative voltage on the high side of the load and applying a positive voltage on the low side of the load.

[0009] In some embodiments, inputting the forced voltage control sequence into the timing control module to generate a switching control signal driving the high-speed switching matrix includes: The forced voltage control sequence is parsed into a waveform time diagram to obtain the current rise time, current rise duration, current fall time, and current fall duration. The waveform timing diagram is input into the timing control module, which includes a controller and timing logic circuits. The timing logic circuit generates a precise timing instruction based on the waveform timing diagram. The precise timing instruction includes the switching action time and switching state information. The controller outputs a corresponding switch control signal at nanosecond-level precision according to the precise timing command. The switch control signal is used to drive the corresponding switches in the high-speed switch matrix to turn on and off.

[0010] In some embodiments, the process by which the sequential logic circuit generates the precise timing instruction includes: The first switch action time is generated based on the current rise time, and the first switch action time corresponds to the time when the voltage is forcibly established to connect to the load circuit. The second switch action time is generated based on the duration of the current rise, and the second switch action time corresponds to the moment when the forced voltage cutoff will be achieved. The third switch action time is generated based on the current drop time, and the third switch action time corresponds to the time when the forced shutdown voltage is connected to the load circuit. The fourth switch action time is generated based on the duration of the current drop, and the fourth switch action time corresponds to the moment when the forced shutdown voltage is cut off. The timing of the first switch action, the timing of the second switch action, the timing of the third switch action, and the timing of the fourth switch action are combined with the corresponding switch identifiers to generate a precise timing command.

[0011] In some embodiments, the controller is a field-programmable gate array or a microcontroller unit, and the process of the controller outputting the switch control signal includes: When the current rises, the controller outputs a first set of switching control signals. The first set of switching control signals drives the high-speed power switching device corresponding to the forced establishment voltage to turn on, and at the same time drives the high-speed power switching devices other than the high-speed power switching device corresponding to the forced establishment voltage to turn off. When the current sustaining phase is reached, the controller outputs a second set of switching control signals. The second set of switching control signals drives all high-speed power switching devices corresponding to the forced voltage to turn off, switching the load circuit to steady-state power supply mode. When the current drops, the controller outputs a third set of switching control signals. The third set of switching control signals drives the high-speed power switching device corresponding to the forced turn-off voltage to turn on, and at the same time drives the high-speed power switching devices other than the high-speed power switching device corresponding to the forced turn-off voltage to turn off.

[0012] In some embodiments, obtaining the equivalent series inductance of the main power circuit of the load and the steady-state operating voltage drop of the load, and receiving the target current waveform command to obtain the circuit parameters and waveform command, includes: The equivalent series inductance of the main power circuit of the load is obtained through the parameter configuration module. The equivalent series inductance includes the sum of the conductor distribution inductance, connector inductance, load inductive component and small inductive element in the entire loop from the output of the drive source to the load and back. Obtain the steady-state operating voltage drop of the load, wherein the steady-state operating voltage drop is the voltage drop of the load under steady-state operating conditions; Receive a target current waveform command, the target current waveform command including the target current value, the target rise time, and the target fall time; The equivalent series inductance and the steady-state operating voltage drop are output as loop parameters, and the target current waveform command is output as a waveform command to obtain the loop parameters and the waveform command.

[0013] In some embodiments, inputting the forced voltage control sequence into a preset high-voltage source module and controlling the preset high-voltage source to output a corresponding stable DC high voltage includes: The forced voltage control sequence is input into a preset high voltage source module, which includes a programmable DC power supply. The programmable DC power supply is used to analyze the voltage value in the forced voltage control sequence and determine the stable DC high voltage level that needs to be preset for output. During the system initialization phase, the programmable DC power supply outputs and stabilizes at the required voltage value according to the voltage value in advance, generating one or more stable DC high voltages. The stable DC high voltages include a positive preset voltage and a negative preset voltage. The positive preset voltage is used to provide a forced setup voltage, and the negative preset voltage is used to provide a forced shutdown voltage. The programmable DC power supply performs stability control on each preset output voltage to ensure that the output accuracy meets the set requirements, and simultaneously provides the stabilized multiple DC high voltages to the high-speed switching matrix module.

[0014] In some embodiments, the step of driving a high-speed switching matrix according to the switching control signal to rapidly connect or disconnect the stable DC high voltage to the load circuit according to a predetermined timing sequence, and obtaining a modulated load current waveform, includes: The high-speed switch matrix receives the switch control signal and includes multiple high-speed power switching devices. Each high-speed power switching device independently controls the connection or disconnection of a corresponding stable DC high voltage. The high-speed power switching device is a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. According to the switch control signal, the corresponding high-speed power switching device is driven to perform conduction or cutoff actions. The single switching action time reaches the nanosecond level. When the current rises, the voltage is forcibly established to connect to the load circuit. During the current maintenance phase, the load circuit is switched to steady-state power supply mode. When the current falls, the voltage is forcibly cut off to connect to the load circuit. The load current waveform is modulated by the high-speed switching action with a predetermined timing.

[0015] The high-speed current modulation method for active energy injection of the present invention has the following advantages over the prior art: (1) This application generates a forced voltage control sequence by inputting the equivalent series inductance and steady-state working voltage drop of the main power circuit of the load into the instruction calculation module and generating the forced voltage control sequence based on the physical model feedforward calculation. Then, the forced voltage control sequence is input into the preset high voltage source module and the timing control module to realize the precise preset of stable DC high voltage and the precise control of the high-speed switching matrix drive timing, respectively. By using the three-level time decoupling architecture of "calculation-preset-switching", the physical constraints of the traditional passive adaptation circuit inductance are broken through, and the current modulation control paradigm is changed from "indirect and passive adaptation" to "direct and active control", thereby increasing the speed of the large current jump edge from microseconds to nanoseconds, reducing the current change rate control error, and stabilizing the current rise / fall time to below 100ns, thus realizing high-speed, precise and programmable load current modulation control. (2) This application parses the target current waveform command into the target current value, target rise time and target fall time, inputs them into the command calculation module and establishes a physical model based on Kirchhoff's voltage law; then, it accurately calculates the target current change rate through the physical model, multiplies the rise current change rate with the equivalent series inductance and adds the steady-state working voltage drop to obtain the forced setup voltage, multiplies the fall current change rate with the equivalent series inductance and adds the steady-state working voltage drop to obtain the forced turn-off voltage, and supports three flexible forced voltage application methods: high-side forced topology, low-side forced topology and double-side forced topology. It eliminates the uncertainty of traditional trial and error adjustment by using the physical model feedforward calculation, and adapts the voltage tolerance and control accuracy requirements of different application scenarios through multi-topology configuration, thereby obtaining the maximum driving voltage difference within the device's voltage tolerance range, and realizing accurate, predictable and configurable forced voltage control based on strict physical modeling; (3) This application resolves the forced voltage control sequence into a waveform time diagram including the current rise time, the current rise duration, the current fall time, and the current fall duration, and inputs it into a timing control module composed of timing logic circuits and a controller; then the timing logic circuit generates a precise timing instruction including the switching action time and switching state information according to the waveform time diagram. After receiving the precise timing instruction, the controller outputs the corresponding switching control signal at a nanosecond-level precision time. It supports field programmable gate arrays or microcontroller units as controllers. The precise timing control is achieved by driving the forced voltage access through the first set of switching control signals, driving the steady-state power supply mode switching through the second set of switching control signals, and driving the forced voltage access off through the third set of switching control signals. The hardware-level timing precision breaks through the time precision bottleneck of software control, improves the switching action timing precision from the microsecond level to the nanosecond level, and eliminates the influence of control delay and timing jitter on high-speed current modulation in traditional schemes. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart of a high-speed current modulation method for active energy injection according to the present invention; Figure 2 This is a schematic diagram of the three-level decoupling architecture of an embodiment of the present invention; Figure 3 This is a schematic diagram comparing the architecture of this invention with traditional solutions; Figure 4 This is a schematic diagram showing the relationship between the functional stages and waveforms in an embodiment of the present invention; Figure 5 This is a pulse shaping current waveform diagram according to an embodiment of the present invention; Figure 6 This is a circuit schematic diagram of an embodiment of the present invention; Figure 7 This is a measured waveform verification diagram of an embodiment of the present invention. Detailed Implementation

[0018] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0019] Currently, in critical engineering fields requiring rapid current switching, such as pulsed laser driving, particle beam modulation, high-speed solenoid valve control, high-frequency switching power supplies, and RF power supplies, the inherent equivalent series inductance of the load circuit is the main physical factor limiting the rate of current change, directly affecting the system's dynamic response performance and control accuracy. Existing technologies mainly employ passive adaptation techniques to the circuit inductance, including passively reducing the inductance path (reducing parasitic inductance through physical methods such as optimizing PCB layout, using low-inductance magnetic core materials, and shortening wire length), passively utilizing the inductance path (passively assisting commutation by utilizing transient voltage spikes generated by inductor energy storage, or transferring energy through preset topologies such as resonant circuits), and indirectly optimizing the control path (indirectly influencing the current edge by optimizing the gate drive waveform of power switching devices). However, the passive adaptation techniques used in the existing technology have fundamental problems: the load current change rate is still limited by the physical limit of di / dt=V / L, and is constrained by gate drive delay and loop stability, which means that the current change rate usually does not exceed 0.5A / ns, and the current rise / fall time is limited to the range of 1-5μs. At the same time, there are problems of insufficient control accuracy (error exceeding ±10%) and lack of waveform programmability, which makes it impossible to achieve active, direct and free editing of the load current waveform, especially the edge speed.

[0020] Based on this, in some embodiments, please refer to Figure 1 This invention provides a high-speed current modulation method for active energy injection, characterized by comprising the following steps: S1 obtains the equivalent series inductance of the main power circuit of the load and the steady-state operating voltage drop of the load, and receives the target current waveform command to obtain the circuit parameters and waveform command.

[0021] It can be understood that step S1 obtains the equivalent series inductance L of the main power loop of the load through the parameter configuration module. This equivalent series inductance refers to the inductance of all components in the entire main power loop from the output of the drive source to the load and back, which is affected by the rate of change of current. The sum of inductive parameters constituting the impedance includes, but is not limited to, conductor distribution inductance, connector inductance, the inductive component of the load itself, and small inductive elements inserted in series for other purposes. Simultaneously, the steady-state operating voltage drop of the load is obtained. It also receives a target current waveform command, which includes at least the target current value. Target rise time and target descent time Step S1 provides accurate input parameters for subsequent physical model calculations, ensuring the precise generation of the forced voltage control sequence.

[0022] S2, input the circuit parameters and the waveform command into the command calculation module, and calculate the forced voltage control sequence according to the physical model. The forced voltage control sequence includes voltage value and action time.

[0023] It is understandable that step S2 performs feedforward calculations using the instruction calculation module based on the physical model derived from Kirchhoff's Voltage Law (KVL). The physical model is as follows:

[0024] ; in, To be applied to both ends of the load and The net voltage difference; It is the target current change rate; It is the equivalent series inductance; The steady-state operating voltage drop of the load.

[0025] To achieve the target rising edge, the minimum net voltage required across the load is: ; To achieve the target falling edge, the maximum net voltage required across the load is: ; To achieve the target rising edge, a forced setup voltage needs to be applied. , The following relationship must be satisfied: For topology forced by high edge: Rising edge forced voltage ; Falling edge forced voltage ; For a low-side forced topology, the high-side is fixed to Vcc: Rising edge forced voltage ; Falling edge forced voltage ; For bilateral forced topology: Rising edge forced voltage ; Falling edge forced voltage .

[0026] The reason the above expression doesn't use an equal sign is because parasitic parameters such as loop resistance exist in engineering practice. To ensure that the current change rate reaches the target, the actual applied forced voltage often has a voltage margin added to the theoretical value. This margin can be estimated and needs to be fine-tuned based on the measured waveform. Regardless of whether a margin is added, as long as the forced voltage is not less than the theoretical value, it is within the protection scope of this invention.

[0027] in, This can be manifested as applying a positive voltage to the high side of the load ( Or apply a negative voltage to the low side of the load. ); This can be manifested as applying a negative voltage to the high side of the load. Or apply a positive voltage to the low side of the load. ); The target current value; The target rising edge time; The target falling edge time; It is the equivalent series inductance; The steady-state operating voltage drop of the load is calculated. Through precise physical model calculations, step S2 converts the target waveform command into a forced voltage control sequence that includes voltage values ​​and durations.

[0028] S3, input the forced voltage control sequence into the preset high voltage source module to control the preset high voltage source to output the corresponding stable DC high voltage.

[0029] It is understandable that step S3 is implemented using the preset layer in a two-level architecture of "preset multi-level high-voltage source + high-speed switching matrix". The preset high-voltage source module includes at least one high-precision programmable DC power supply, which outputs and stabilizes at the required voltage value in advance during the system initialization phase according to the forced voltage control sequence. The response speed requirement of the programmable DC power supply is not high (millisecond level), but the accuracy requirement is very high. The preset high-voltage source can output positive and negative voltages, forcibly establishing the voltage. This can be manifested as applying a positive voltage to the high side of the load ( Or apply a negative voltage to the low side of the load. Forced shutdown voltage This can be manifested as applying a negative voltage to the high side of the load. Or apply a positive voltage to the low side of the load. This preset method completely decouples high-precision voltage setting from high-speed voltage switching in time, solving the problem of the difficulty in achieving both high precision and high speed.

[0030] S4, input the forced voltage control sequence into the timing control module to generate a switching control signal that drives the high-speed switching matrix.

[0031] It is understandable that step S4 achieves precise timing coordination and waveform execution through the timing control module. The timing control module is connected to the instruction calculation module and the high-speed switching matrix module. After receiving the forced voltage control sequence, the controller generates a switching control timing sequence with nanosecond-level precision. This is necessary when a current increase is required. At any given time, a control signal will be generated that is preset. Connect to load loop, maintain duration During the current-maintaining phase, a control signal is generated to switch the load circuit to a constant current source or steady-state power supply mode; during the current-reducing phase... At any given time, a control signal will be generated that is preset. Connect to load loop, maintain duration .

[0032] S5, according to the switch control signal, drive the high-speed switch matrix to quickly connect or disconnect the stable DC high voltage to the load circuit according to a predetermined timing sequence, and obtain the modulated load current waveform.

[0033] It is understandable that the final current waveform modulation is achieved through a high-speed switching matrix module. The high-speed switching matrix consists of multiple high-speed power switching devices and their driving circuits. The input of the high-speed switching matrix is ​​connected to the output of a preset high-voltage source module, and the output is connected to the load circuit. Each switch independently controls the connection and disconnection of a preset high voltage, with a single switching action time reaching the nanosecond level. By driving the corresponding switches in the high-speed switching matrix at precise moments, the current is forced to... The slope increases linearly to Or with The slope decreases linearly, ultimately achieving high-speed, precise, and programmable modulation of the load current waveform.

[0034] In this embodiment, through the coordinated operation of steps S1-S5, a paradigm shift from "indirect, passive adaptation" to "direct, active control" is achieved. Compared to existing technologies, this embodiment achieves precise open-loop control based on feedforward calculations using a physical model, improving the current rise / fall time from the traditional 1-5μs to below 100ns, the current change rate from ≤0.5A / ns to above 5A / ns, and the control accuracy from above ±10% to below ±0.5%. It also possesses full waveform programmability, capable of generating arbitrary target waveforms such as flat-top pulses, ramp-up waveforms, and stepped waveforms. This embodiment employs a three-level decoupled architecture of "calculation-preset-switching," achieving high precision and high speed performance indicators that traditional coupled architectures cannot reach through a hierarchical design with independent functions and separated time scales, providing a reliable solution for high-speed current modulation technology.

[0035] In some embodiments, the present invention also provides a high-speed current modulation system with active energy injection, which adopts a three-level decoupled architecture of "computation-preset-switching", specifically including: Parameter configuration module: used to input or acquire target current waveform commands, equivalent series inductance of the loop, and steady-state operating voltage drop of the load. The parameter configuration module serves as the information input interface of the system, receiving external waveform command signals and acquiring the physical parameters of the load loop, providing complete input parameters for physical model calculation.

[0036] Command calculation module: connected to the parameter configuration module, used to convert the target waveform command into a forced voltage control sequence containing voltage value and action time according to the physical model. The command calculation module establishes an accurate physical model based on Kirchhoff's voltage law, determines the forced setup voltage and forced shutdown voltage through feedforward calculation, and supports three flexible configuration modes: high-side forced topology, low-side forced topology, and bilateral forced topology.

[0037] Preset high voltage source module: includes at least one programmable DC power supply, used to output one or more stable DC high voltages (positive or negative) according to the forced voltage control sequence. The preset high voltage source module outputs and stabilizes at the calculated voltage value in advance during the system initialization phase. Its accuracy determines the accuracy of the voltage, but the response speed no longer affects the high-speed switching process. Time decoupling eliminates the mutual constraint between accuracy and speed in the traditional scheme.

[0038] High-speed switch matrix module: Its input terminal is connected to the output terminal of the preset high-voltage source module, and its output terminal is connected to the load circuit. It consists of multiple high-speed power switching devices and their driving circuits, and is used to perform rapid access and disconnection of high voltage. The high-speed switch matrix module uses switching devices such as MOSFET, IGBT or relay. Each switch independently controls the access and disconnection of a preset high voltage. The single switching action time reaches the nanosecond level. The conduction and turn-off actions of the switch directly control the current edge speed.

[0039] Timing control module: connected to the instruction calculation module and the high-speed switch matrix module, used to receive the forced voltage control sequence and generate a nanosecond-level precision timing control signal to drive the high-speed switch matrix module. The timing control module includes a controller (such as FPGA, MCU) and timing logic circuits. It issues control signals at precise times according to the waveform timing diagram to drive the corresponding switch actions in the high-speed switch matrix.

[0040] Constant current sustaining module (optional): used to stabilize the current at the target value after the forced voltage is applied. The constant current sustaining module provides steady-state power supply during the current sustaining phase to ensure the quality of current flat-top.

[0041] Current monitoring module (optional): Used to monitor load current, its output is fed back to the timing control module for closed-loop fine-tuning or fault protection. The current monitoring module monitors load current in parallel but is only used for fault diagnosis (such as overcurrent, short circuit) and slow fine-tuning of long-term drift. It does not participate in the main control loop at high-speed edges, ensuring the open-loop high-speed characteristics of the main loop.

[0042] The parameter configuration module, acting as an information input, simultaneously transmits loop parameters and target waveform commands to the command calculation module. After performing feedforward calculations based on the physical model, the command calculation module outputs the generated forced voltage control sequence in parallel to the preset high-voltage source module and the timing control module. The preset high-voltage source module pre-stabilizes and outputs multiple DC high-voltage signals to the high-speed switching matrix module according to the voltage sequence. The timing control module generates precise switching control signals based on the time information in the voltage sequence to drive the high-speed switching matrix module. Under timing control, the high-speed switching matrix module connects or disconnects the preset high voltage to or from the load circuit as needed, completing current modulation. An optional current monitoring module forms a parallel feedback branch with the timing control module, used only for fault protection and slow fine-tuning, and does not participate in the main control loop, ensuring the system's open-loop high-speed characteristics.

[0043] In some embodiments, based on the above embodiments, step S1 includes: The equivalent series inductance of the main power circuit of the load is obtained through the parameter configuration module. The equivalent series inductance includes the sum of the conductor distribution inductance, connector inductance, load inductive component, and small inductive element inserted in series in the entire loop from the output of the drive source to the load and back.

[0044] For example, the equivalent series inductance is obtained by measuring the inductance of the main power circuit or setting it based on empirical values. The equivalent series inductance includes the conductor distribution inductance, connector inductance, the load's own inductive component, and the physical superposition of small inductive elements inserted in series for other purposes. The value range of the equivalent series inductance is typically from 10nH to 1μH. This parameter directly affects the calculation accuracy of the subsequent forced voltage and the control effect of the current change rate.

[0045] Obtain the steady-state operating voltage drop of the load, which is the voltage drop of the load under steady-state operating conditions.

[0046] It is understood that the steady-state operating voltage drop is obtained through actual measurement or calculation based on load characteristic parameters. The method for obtaining the steady-state operating voltage drop includes: measuring the voltage value across the load in constant current operating mode, or calculating it based on the ohmic characteristics of the load and the target operating current. The steady-state operating voltage drop is used as a reference voltage value in the forced voltage calculation to ensure energy balance during current switching.

[0047] Receive a target current waveform command, which includes a target current value, a target rise time, and a target fall time.

[0048] It is understood that the target current waveform command is obtained through user interface input or host computer communication, and includes complete waveform description information: the target current value reflects the required current amplitude, supporting a range of 0 to 200A; the target rise time defines the time window required for the current to change from the initial value to the target value, supporting a range of 20ns to 20μs; the target fall time defines the time window required for the current to change from the target value to the final value, also supporting a time range of 20ns to 20μs. The target current waveform command provides basic input parameters for physical model calculations, directly determining the amplitude and duration of the required forced voltage.

[0049] The equivalent series inductance and the steady-state operating voltage drop are output as loop parameters, and the target current waveform command is output as a waveform command to obtain the loop parameters and the waveform command.

[0050] It is understood that the output of the circuit parameters and waveform commands adopts a digital format to ensure the accuracy and real-time performance of parameter transmission, providing an accurate input basis for forced voltage calculation based on the physical model. All parameters have been validated to prevent control failure due to parameter abnormalities.

[0051] In some embodiments, based on the above embodiments, step S2 includes: The waveform command is parsed to obtain the target current value, target rise time, and target fall time.

[0052] It is understood that the waveform command is parsed by receiving the target current waveform command through a digital interface or communication protocol. The command calculation module then processes the waveform command to extract key waveform parameters, including: the target current value, which reflects the desired current amplitude and serves as the benchmark for calculating the current change rate; the target rise time, which defines the time constraint from the initial current value to the target current value and directly determines the rising current change rate; and the target fall time, which defines the time constraint from the target current value to the final current value and directly determines the falling current change rate. These three core parameters constitute the basic input for the physical model calculation, and the parsing accuracy of these three core parameters directly affects the accuracy of the forced voltage calculation.

[0053] The target current value, target rise time, target fall time, equivalent series inductance, and steady-state operating voltage drop are input into the command calculation module to establish a physical model based on Kirchhoff's voltage law.

[0054] It can be understood that the target current value, target rise time, target fall time, equivalent series inductance, and steady-state operating voltage drop are input into the command calculation module to establish a physical model based on Kirchhoff's voltage law. The core of this physical model is the relationship between the net voltage and the loop inductance and the rate of change of current: ,in, This is the net voltage difference that needs to be applied across the load. The equivalent series inductance of the circuit is... The target current change rate, This represents the steady-state operating voltage drop of the load. The physical model reveals the hindering effect of loop inductance on current changes, providing a theoretical basis for actively overcoming the influence of inductance and forming the core algorithmic foundation for achieving nanosecond-level current modulation.

[0055] The forced setup voltage and forced shutdown voltage are calculated using the physical model. The forced setup voltage corresponds to the target rising edge, and the forced shutdown voltage corresponds to the target falling edge.

[0056] It is understood that the forced setup voltage and forced shutdown voltage are calculated through the physical model, where the forced setup voltage corresponds to the energy requirement of the target rising edge, and the forced shutdown voltage corresponds to the energy requirement of the target falling edge. The calculation process first determines the current change rate, specifically: the rising current change rate equals the target current value divided by the target rising edge time, and the falling current change rate equals the target current value divided by the target falling edge time. Then, according to the physical model formulas, the forced setup voltage is calculated as the product of the rising current change rate and the equivalent series inductance, plus the steady-state operating voltage drop; the forced shutdown voltage is calculated as the product of the falling current change rate and the equivalent series inductance, plus the steady-state operating voltage drop. This calculation process ensures the physical accuracy and mathematical precision of the voltage values.

[0057] The forced setup voltage and the forced shutdown voltage are combined with their corresponding application times to generate a forced voltage control sequence.

[0058] It is understood that the forced setup voltage and the forced shutdown voltage are combined with their corresponding application times to generate a forced voltage control sequence. The forced voltage control sequence employs a time-series data structure, including complete information such as voltage value, application time, and application method, in the format of... The control sequence, as a standardized output of the instruction calculation module, provides precise control instructions for the coordinated operation of the preset high-voltage source module and the high-speed switching matrix module, ensuring the accurate application and precise timing of the forced voltage. It is a key data interface for realizing high-speed current modulation.

[0059] In some embodiments, based on the above embodiments, the physical model is a relationship between net voltage and loop inductance and current change rate. The process by which the instruction calculation module calculates the forced setup voltage and forced shutdown voltage according to the physical model includes: Calculate the target current change rate by dividing the target current value by the target rise time to obtain the rise current change rate, and divide the target current value by the target fall time to obtain the fall current change rate.

[0060] Understandably, the first step is to calculate the target current change rate, which is the fundamental step in the entire forced voltage calculation. During the calculation, the received target current value is used as the numerator, and the target rise time is used as the denominator. The rise current change rate is obtained through mathematical division. This value characterizes the rate of current increase per unit time, measured in amperes per nanosecond (A / ns). Similarly, dividing the target current value by the target falling edge time yields the rate of change of the falling current. This value characterizes the rate of current decay per unit time. These two current change rate parameters directly determine the calculation results of the forced voltage, and their calculation accuracy directly affects the final performance of the current modulation.

[0061] The forced setup voltage is not less than the product of the rising current rate of change and the equivalent series inductance plus the steady-state operating voltage drop.

[0062] It is understood that the forced setup voltage is calculated to overcome the back electromotive force effect of the loop inductance during the current rise process. The calculation process multiplies the rate of change of the rising current with the pre-obtained equivalent series inductance to obtain the additional voltage component required to overcome the inductive effect. This voltage component reflects the degree to which the inductor impedes changes in current, and its value is directly proportional to the inductance value and the rate of current change. In addition, the steady-state operating voltage drop of the load is added. The final forced setup voltage is obtained. This forced settling voltage value ensures that the target current change is achieved within the specified rise time while maintaining normal load operation.

[0063] The magnitude of the forced shutdown voltage is not less than the product of the rate of change of the decreasing current and the equivalent series inductance.

[0064] It is understandable that the calculation of the forced turn-off voltage follows the same physical principles and mathematical models. The calculation process multiplies the rate of change of the decreasing current by the equivalent series inductance to obtain the voltage component corresponding to the energy released by the inductor when the current decreases. This voltage component acts as a reverse driving force during the current decrease process, requiring precise control by applying a corresponding forced voltage. Combined with the steady-state operating voltage drop, the forced turn-off voltage is obtained. This forced shutdown voltage ensures that the current can accurately decay to the target value within a predetermined fall time, achieving fast and precise current shutdown.

[0065] In some embodiments, based on the above embodiments, the instruction calculation module supports high-side forced topology, low-side forced topology, and bilateral forced topology, and the application methods of the forced setup voltage and forced shutdown voltage include: When a high-side forced topology is used, the forced setup voltage corresponds to applying a positive voltage on the high side of the load, and the forced shutdown voltage corresponds to applying a negative voltage on the high side of the load.

[0066] When a low-side forced topology is used, the forced setup voltage corresponds to applying a negative voltage on the low side of the load, and the forced shutdown voltage corresponds to applying a positive voltage on the low side of the load.

[0067] When a bilateral forced topology is used, the forced setup voltage corresponds to a combination of applying a positive voltage on the high side of the load and applying a negative voltage on the low side of the load, and the forced shutdown voltage corresponds to a combination of applying a negative voltage on the high side of the load and applying a positive voltage on the low side of the load.

[0068] It is understood that the instruction calculation module supports three implementation methods: high-side forced topology, low-side forced topology, and bilateral forced topology, to adapt to different application scenarios and performance requirements. When using the high-side forced topology, the low-side voltage of the load is fixed at zero. The forced setup voltage is achieved by applying a positive voltage to the high-side of the load, and the forced shutdown voltage is achieved by applying a negative voltage to the high-side of the load. This high-side forced topology has a simple structure and is suitable for single-ended drive applications. When using the low-side forced topology, the high-side voltage of the load is fixed at the power supply voltage. The forced setup voltage is achieved by applying a negative voltage to the low-side of the load, and the forced shutdown voltage is achieved by applying a positive voltage to the low-side of the load. This is suitable for common-anode load configurations. When using the bilateral forced topology, forced voltages can be applied to both the high-side and low-side of the load. The forced setup voltage is achieved by a combination of a positive high-side voltage and a negative low-side voltage, and the forced shutdown voltage is achieved by a combination of a negative high-side voltage and a positive low-side voltage. This bilateral forced topology has the greatest design freedom and the highest potential for current change rate.

[0069] Through physical model calculation and topology selection in this embodiment, the instruction calculation module can transform abstract waveform requirements into specific voltage control instructions, achieving a precise mapping from user objectives to hardware execution. Step S2, based on Kirchhoff's voltage law feedforward calculation, abandons the traditional trial-and-error adjustment method and directly obtains the required forced voltage value through accurate prediction of the physical model. This lays the theoretical and data foundation for high-speed voltage switching and ensures the speed, accuracy, and predictability of the entire modulation process.

[0070] In some embodiments, based on the above embodiments, step S3 includes: The forced voltage control sequence is input into a preset high voltage source module, which includes a programmable DC power supply. The programmable DC power supply is used to analyze the voltage value in the forced voltage control sequence and determine the stable DC high voltage level that needs to be preset for output.

[0071] It is understood that the forced voltage control sequence received from the instruction calculation module is input to the preset high-voltage source module. This preset high-voltage source module, as the preset layer in the three-level decoupled architecture of "calculation-preset-switching," undertakes the function of a high-precision voltage source. After receiving the control sequence, the preset high-voltage source module first parses the data structure in the sequence to extract key information such as voltage value, application time, and application method. The control sequence adopts a standardized timing data format, containing... Complete voltage command information provides accurate parameter basis for voltage preset operation.

[0072] The core component of the preset high-voltage source module is a programmable DC power supply, which features high-precision output and fast response. The programmable DC power supply receives a forced voltage control sequence via a digital interface. Its built-in microprocessor analyzes the sequence data, identifying the voltage parameters that need to be preset. Based on the analysis results, the power supply's internal digital signal processing unit determines the stable DC high-voltage level that needs to be preset, including the specific values ​​of the positive and negative preset voltages. This analysis process ensures the accuracy and consistency of the voltage preset, laying the foundation for high-speed switching.

[0073] During the system initialization phase, the programmable DC power supply outputs and stabilizes at the required voltage value according to the voltage value in advance, generating one or more stable DC high voltages. The stable DC high voltages include a positive preset voltage and a negative preset voltage. The positive preset voltage is used to provide a forced setup voltage, and the negative preset voltage is used to provide a forced shutdown voltage.

[0074] It is understandable that the programmable DC power supply performs a voltage preset operation during the system initialization phase, outputting and stabilizing the voltage at the required value based on the analyzed voltage. The preset process employs a hierarchical setting strategy: the positive preset voltage is provided through the positive output terminal of the power supply, covering the required voltage for forced setup; the negative preset voltage is output through the power supply's reverse voltage setting function, achieving negative voltage output without additional hardware modifications. The setup time of each preset voltage is controlled within the millisecond range. Compared to the nanosecond-level current modulation requirements, this preset speed fully meets the design requirements of time decoupling, ensuring that all voltage sources are in a stable state before high-speed switching begins.

[0075] The generated stable DC high voltage includes two types of outputs: a positive preset voltage and a negative preset voltage. The positive preset voltage provides a forced setup voltage, calculated based on the energy required to overcome the loop inductance during the target current rise, typically ranging from tens to hundreds of volts. The negative preset voltage provides a forced shutdown voltage, corresponding to the energy release requirement of the inductor during the target current decline, achieving rapid current decay through the application of a negative voltage. Both types of preset voltages achieve an output accuracy of ±0.1%, with output ripple controlled below ±2mV, ensuring voltage stability and accuracy.

[0076] The programmable DC power supply performs stability control on each preset output voltage to ensure that the output accuracy meets the set requirements, and simultaneously provides the stabilized multiple DC high voltages to the high-speed switching matrix module.

[0077] It is understood that the programmable DC power supply performs strict stability control on each preset output voltage, monitoring the output voltage value in real time through a built-in feedback control loop. The stability control system employs a proportional-integral-derivative control algorithm to precisely adjust the voltage output, compensating for the impact of external factors such as load changes and temperature drift on voltage stability. Once the output accuracy reaches the set requirements, the power supply enters a stable maintenance mode, ensuring that the preset voltage remains constant throughout the modulation process. This stability control mechanism is a key guarantee for achieving high-precision current modulation and directly affects the final current control accuracy.

[0078] The stabilized multiple DC high voltage sources are simultaneously supplied to the high-speed switching matrix module, ensuring all preset voltages are ready through parallel output. A low-impedance connection is used between the preset high voltage source module and the high-speed switching matrix module to minimize voltage drop and delay along the transmission path. Each preset voltage is connected to the corresponding switching device input via an independent output channel, avoiding mutual interference between different voltage levels. This parallel power supply architecture enables the high-speed switching matrix to complete voltage switching within nanoseconds, achieving instantaneous access and disconnection of preset voltages, and providing robust energy support for rapid modulation of load current.

[0079] By precisely controlling and stably outputting a pre-set high-voltage source module, this embodiment achieves time decoupling between high-precision voltage setting and high-speed voltage switching. The slow process in the pre-setting stage ensures voltage accuracy, while the fast process in the switching stage achieves time response. The organic combination of these two processes overcomes the problem of mutual constraints between accuracy and speed in traditional current modulation, providing a reliable technical foundation for nanosecond-level current modulation.

[0080] In some embodiments, based on the above embodiments, step S4 includes: The forced voltage control sequence is parsed into a waveform time diagram to obtain the current rise time, current rise duration, current fall time, and current fall duration.

[0081] It is understandable that the waveform timing diagram analysis process maps the timestamp information in the forced voltage control sequence with the current change nodes to accurately extract parameters at each key moment. Current rise time. The duration of the current rise corresponds to the moment when the target current jumps upward from its steady-state value. The duration of the forced voltage application and the timing of the current drop are determined. The duration of the current drop corresponding to the moment when the target current begins to decrease from its peak value. Determine the duration for which the forced shutdown voltage is applied.

[0082] The waveform timing diagram is input into the timing control module, which includes a controller and timing logic circuits.

[0083] Understandably, the controller employs a field-programmable gate array (FPGA) or microcontroller unit (MCU), possessing nanosecond-level timing processing capabilities. The timing logic circuitry is responsible for converting the waveform time diagram into precise switching control commands, achieving a timing resolution at the nanosecond level to ensure accurate timing of switching actions.

[0084] The timing logic circuit generates precise timing instructions based on the waveform timing diagram. The precise timing instructions include the switching action time and switching state information.

[0085] It is understandable that the switching action is accurate to the nanosecond level, including absolute timestamps and relative delay information. The switching status information indicates the on or off state of each high-speed power switching device, ensuring that the correct circuit topology switching is achieved at the specified time.

[0086] The controller outputs a corresponding switch control signal at nanosecond-level precision according to the precise timing command. The switch control signal is used to drive the corresponding switches in the high-speed switch matrix to turn on and off.

[0087] It is understandable that the switch control signal adopts a high-speed differential drive method, with a signal amplitude of 15V, a rise time of less than 10ns, and a fall time of less than 5ns, to ensure that the high-speed power switching device can complete the state switching within a nanosecond time.

[0088] In some embodiments, based on the above embodiments, the process by which the sequential logic circuit generates the precise timing instruction includes: The first switch action time is generated based on the current rise time, and the first switch action time corresponds to the time when the voltage is forcibly established to connect to the load circuit.

[0089] It is understandable that the moment the first switch operates is equal to the moment the current rises. At this moment, the sequential logic circuit outputs a command to drive the corresponding forced establishment voltage ( The high-speed power switching device is turned on, while ensuring that other switching devices corresponding to preset voltages are turned off.

[0090] The second switch action time is generated based on the duration of the current rise, and the second switch action time corresponds to the moment when the forced voltage cutoff will be achieved.

[0091] It is understandable that the formula for calculating the timing of the second switch action is as follows: At this moment, the switching device corresponding to the established voltage is forcibly turned off, and the load circuit returns to the steady-state power supply mode. The timing accuracy of the cut-off operation directly affects the flat-top characteristic of the current waveform, requiring the timing error to be controlled within ±5ns.

[0092] The third switch action time is generated based on the current drop time, and the third switch action time corresponds to the time when the forced shutdown voltage is connected to the load circuit.

[0093] It is understandable that the moment the third switch operates is equal to the moment the current decreases. At this moment, the sequential logic circuit outputs a command to drive the corresponding forced shutdown voltage ( The high-speed power switching device is turned on, forcing the load current to drop rapidly.

[0094] The fourth switch action time is generated based on the duration of the current drop, and the fourth switch action time corresponds to the moment when the forced shutdown voltage is cut off.

[0095] It is understandable that the formula for calculating the timing of the fourth switch action is as follows: At this moment, the switching device corresponding to the forced shutdown voltage turns off, the current reduction process ends, and the system returns to steady-state operating mode.

[0096] The timing of the first switch action, the timing of the second switch action, the timing of the third switch action, and the timing of the fourth switch action are combined with the corresponding switch identifiers to generate a precise timing command.

[0097] It is understandable that the switch identification uses a binary encoding method, with each high-speed power switching device assigned a unique identification code. The data structure of the precise timing command includes a timestamp, switch identification, and action type (including on and off), ensuring that the controller can accurately identify and execute the corresponding switching operation.

[0098] In some embodiments, based on the above embodiments, the controller is a field-programmable gate array or a microcontroller unit, and the process of the controller outputting the switch control signal includes: When the current rises, the controller outputs a first set of switching control signals. The first set of switching control signals drives the high-speed power switching device corresponding to the forced establishment voltage to turn on, and at the same time drives the high-speed power switching devices other than the high-speed power switching device corresponding to the forced establishment voltage to turn off.

[0099] It is understandable that the timing of the first set of switch control signals strictly follows the preset forced voltage topology configuration to ensure that the correct forced voltage value is applied to the load circuit. The signal output adopts an interlocking mechanism to prevent circuit conflicts caused by multiple preset voltages being connected simultaneously.

[0100] When the current sustaining phase is reached, the controller outputs a second set of switching control signals. The second set of switching control signals drives all high-speed power switching devices corresponding to the forced voltage to turn off, switching the load circuit to steady-state power supply mode.

[0101] It is understandable that the second set of switch control signals ensures that the high-speed switching matrix is ​​in a fully off state, at which point the load current is maintained by the steady-state power supply, and the current value remains at the target level. The timing accuracy of the switching process directly affects the flatness of the current waveform.

[0102] When the current drops, the controller outputs a third set of switching control signals. The third set of switching control signals drives the high-speed power switching device corresponding to the forced turn-off voltage to turn on, and at the same time drives the high-speed power switching devices other than the high-speed power switching device corresponding to the forced turn-off voltage to turn off.

[0103] It is understandable that the third set of switch control signals is configured according to the forced shutdown voltage topology to ensure that the load circuit withstands the correct forced shutdown voltage and achieves a rapid decrease in current.

[0104] Based on timing coordination and waveform execution steps, this embodiment applies a pre-calculated forced voltage to the load circuit at precise moments through precise timing control and the high-speed switching capability of the switching matrix, directly shaping the time waveform of the load current. Step S4 is the key execution layer in the three-level decoupled architecture of "calculation-preset-switching," and its nanosecond-level timing accuracy and switching speed are the core technical guarantees for achieving high-speed current modulation. Through the precise timing of the timing control module and the rapid response of the high-speed switching matrix, the system can achieve high-performance current modulation effects with a current change rate exceeding 5A / ns and rise and fall times of less than 100ns.

[0105] In some embodiments, based on the above embodiments, step S5 includes: The high-speed switch matrix receives the switch control signal and includes multiple high-speed power switching devices. Each high-speed power switching device independently controls the connection or disconnection of a corresponding stable DC high voltage. The high-speed power switching device is a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor.

[0106] It is understood that by setting up a feedback monitoring module in parallel, the feedback monitoring module includes a current sensor, which is set in the load circuit to collect real-time numerical information of the load current; the feedback monitoring module further includes a signal processing unit, which is used to perform analog-to-digital conversion and filtering on the analog current signal output by the current sensor to generate a digital current feedback signal.

[0107] The feedback monitoring module performs fault diagnosis and detection in parallel according to a preset monitoring strategy. When the load current exceeds the preset overcurrent threshold, it sends an emergency protection signal to the timing coordination and waveform execution module to trigger the emergency shutdown action of the high-speed switching matrix. When the deviation between the load current and the target current value exceeds the preset long-term drift threshold, it generates a slow fine-tuning command to make a small adjustment to the preset voltage parameters of the waveform control cycle. The slow fine-tuning command does not participate in the main control loop of the current high-speed edge to ensure that the main control loop maintains the open-loop high-speed characteristics.

[0108] Specifically, the current sensor employs a Hall effect current sensor or a current transformer, achieving a current measurement accuracy of ±0.1%, a response time of less than 100ns, and a measurement bandwidth covering the DC to 100MHz frequency band, ensuring accurate capture of nanosecond-level current changes. The signal processing unit utilizes a high-speed analog-to-digital converter with a sampling rate exceeding 1GSPS, a resolution of at least 12 bits, and integrates a low-pass filter to suppress high-frequency noise interference, with the filter cutoff frequency set to 500MHz.

[0109] It is understood that the fault diagnosis and detection includes three modes: overcurrent protection detection, undercurrent protection detection, and short-circuit protection detection. The overcurrent threshold is set to 120% of the target current value, the undercurrent threshold is set to 80% of the target current value, and the short-circuit detection is determined by monitoring the current rise rate to exceed a preset slope threshold. The long-term drift threshold is set to ±2% of the target current value. When the current deviation exceeds this threshold within a continuous detection cycle, a slow fine-tuning mechanism is triggered. The adjustment range is limited to ±5% of the preset voltage value, and the adjustment frequency does not exceed 10 times per second to avoid affecting the high-speed response characteristics of the main control loop.

[0110] According to the switch control signal, the corresponding high-speed power switching device is driven to perform conduction or cutoff actions. The single switching action time reaches the nanosecond level. When the current rises, the voltage is forcibly established to connect to the load circuit. During the current maintenance phase, the load circuit is switched to steady-state power supply mode. When the current falls, the voltage is forcibly cut off to connect to the load circuit. The load current waveform is modulated by the high-speed switching action with a predetermined timing.

[0111] In this embodiment, by introducing a parallel working mechanism of the feedback monitoring module, while maintaining the high-speed characteristics of open-loop feedforward control, necessary system safety protection and long-term stability compensation are provided, further enhancing the reliability and adaptability of the system under complex operating conditions, and ensuring the safe and stable operation of the high-speed current modulation system in various application scenarios.

[0112] In one specific embodiment, please refer to Figure 2 This is a schematic diagram of the "calculation-preset-switching" three-level decoupled architecture of the present invention. It decomposes the traditional single control loop into three functionally independent and time-scale-separated levels. By assigning the traditionally contradictory requirements of high precision and high speed to different levels, it fundamentally overcomes the technical bottleneck of high-speed current modulation. Specifically: First level: Computational layer - top layer; The computational layer performs feedforward calculations based on the physical model, operating on a timescale of milliseconds to seconds. The input to this layer includes the target waveform parameters (…). , , (etc.) and system parameters (circuit equivalent series inductance) Load steady-state voltage The core processing of the computation layer is based on the physical model. Feedforward calculations are performed to convert the target waveform command into a forced voltage control sequence containing voltage values ​​and application times. The output forced voltage sequence uses... The format is such that each tuple contains a specific forced voltage value and its corresponding application time. The computation layer does not require high-speed response and can be processed using a standard microcontroller, significantly reducing system costs.

[0113] Level 2: Pre-set layer - intermediate layer; The preset layer receives the forced voltage control sequence output from the computation layer, operates on a millisecond timescale, and is responsible for providing a high-precision voltage source. The inputs to this layer include the forced voltage sequence and power supply setting interface parameters. , , The preset layer's processing involves controlling the output of the programmable high-voltage power supply and stabilizing it at the target voltage value, while simultaneously detecting and verifying the setting results. One or more high-precision programmable DC power supplies pre-output and stabilize at the required voltage value during the system initialization phase. The accuracy (±0.1%) of these power supplies determines the accuracy of the final voltage control, but their response speed requirement is not high (millisecond level), and does not affect the high-speed switching process. The preset layer outputs feedback information on the setting results to ensure that the switching layer can obtain a precise and stable high-voltage source.

[0114] Level 3: Switching Layer - Bottom Layer; The switching layer receives precise timing commands from the computation layer and executes voltage connection / disconnection actions at the nanosecond level, directly shaping the load current waveform. The input to this layer includes the address information of the high-speed switching matrix (…). , , The processing involves switching operations according to a preset timing table, applying or removing forced voltages. A high-speed switching matrix is ​​composed of multiple high-speed power switching devices (such as MOSFETs, IGBTs, or relays), with each switch independently controlling the connection and disconnection of a preset high voltage, achieving nanosecond-level switching times. The switching on and off actions (nanosecond-level) are crucial for directly controlling the current edge speed. The switching layer outputs the final switching result, precisely shaping the high-speed current waveform.

[0115] The core of this embodiment's "computation-preset-switching" three-level decoupling architecture lies in the synergistic effect of three decoupling mechanisms: Time decoupling: Calculation and preset actions are independent of the switching process. Calculation and preset do not need to be completed quickly, whereas in traditional schemes, calculation, adjustment, and sampling all need to be completed quickly to achieve high-speed modulation. The high-precision voltage setting (slow process) of the preset layer and the high-speed voltage switching (fast process) of the switching layer are completely decoupled in time. Presetting can be completed in advance during the system initialization phase, and the switching layer only needs to perform simple timed switching actions.

[0116] Accuracy and speed are decoupled: Accuracy is guaranteed by the pre-set layer, with the high precision (±0.1%) of the programmable power supply ensuring accurate voltage values; speed is guaranteed by the switching layer, with the nanosecond-level response of high-speed switches ensuring steep edges. Both can be optimized independently, eliminating the need to pursue both speed and accuracy simultaneously on a single module, thus avoiding the mutual constraints found in traditional architectures.

[0117] Functional decoupling: Calculation, pre-setting, and switching each perform their own functions, eliminating the need to handle multiple functions simultaneously and thus eliminating the bottleneck effect. In traditional solutions, speed is limited by the slowest component, while in this architecture, each layer can be independently optimized to its best performance.

[0118] Through the orderly flow of parameter transmission, preset ready signals, and high-voltage forced control signals, the three levels work together to ultimately generate a precise target current waveform on the load. This architecture enables current change rate control accuracy of ±0.5% and edge time control at the nanosecond level, achieving performance metrics that traditional coupled architectures cannot reach.

[0119] In some embodiments, please refer to Figure 3 This is a comparative analysis diagram of the architecture of this invention and traditional solutions. The fundamental difference between this invention and traditional solutions lies in the paradigm shift of the control logic. Figure 3 The traditional architecture includes two control loops: a digital closed loop and an analog closed loop. The controller drives the DAC and constant current module to form the analog closed loop to control the current amplitude, and the ADC collects the current value feedback to form the digital closed loop. Figure 3 The traditional process in C uses a trial-and-error mode: the DAC increases the current, the ADC samples the current, and it is determined whether the target has been reached. If the current is greater than the target value, the DAC decreases the current, and vice versa, it continues to increase the current, and so on to approach the target value.

[0120] The traditional solutions described above suffer from several technical bottlenecks: For high-speed modulation applications, according to the sampling theorem, both the DAC and ADC require high-speed components, and the controller also needs high-speed processing capabilities, resulting in high costs. Analog closed-loop circuits require adjustment time, making it difficult to achieve high-speed modulation; response times are typically around 20μs. System speed is limited by the slowest link, requiring calculation, adjustment, and sampling to be completed very quickly.

[0121] The innovative features of the architecture of this invention include: Figure 3 The architecture of this invention employs a three-level decoupled control system: "calculation → preset → execution". The controller generates forced voltage commands based on feedforward calculations of the physical model, controls the preset voltage source to output precise voltage values ​​through a DAC, and achieves high-speed voltage switching through a switching matrix. Figure 3 The process of this invention is extremely simple: the I / O port is turned on, the time is checked, and the I / O port is turned off after the time is reached. The whole process does not require complex feedback adjustment.

[0122] This invention eliminates the need for high-speed DACs and ADCs, as well as high-speed processing capabilities; a standard microcontroller suffices, significantly reducing system costs. It successfully decouples the analog closed-loop control from high-speed modulation, overcoming the limitations of analog closed-loop adjustment time. The traditional iterative "detection → feedback → adjustment" process is transformed into a one-step "calculation → preset → execution" control, improving the current change rate from ≤0.5A / ns to over 5A / ns, the response time from 20μs to below 100ns, and the control accuracy from ±10% to ±0.5%.

[0123] In some embodiments, please refer to Figure 4The schematic diagram showing the relationship between the three functional stages defined in this invention and the typical drive current and voltage waveforms clearly demonstrates the core working principle of this invention. Figure 4 It demonstrates the complete process of the load current reaching the target current from the initial current state through forced modulation. The entire process is precisely divided into three time-independent functional stages.

[0124] For the T1 forced setup phase: In this phase, the load current needs to rise rapidly from the initial current to the target current. At this point, the load voltage begins to change from its initial state by applying a forced start-up voltage. To overcome the impedance effect of the equivalent series inductance of the circuit. The magnitude of the forced voltage is determined based on the target current change rate and rise time. Precise calculations are required. During the forced setup phase, the current change rate is entirely determined by the forced voltage and the loop inductance, achieving a fundamental shift from passive adaptation to active control. The core of this phase lies in the pre-calculated forced voltage... In a very short time, the back electromotive force of the inductor is overcome, forcing the current to rise rapidly at a predetermined slope.

[0125] T2 Precision Holding Phase: Once the current successfully rises to the target value, the system enters the precision holding phase. During this phase, the load voltage stabilizes at the steady-state voltage. The system maintains a constant load current at the target value through a precise current control circuit. This stage demonstrates the advantages of this invention in high-precision current control, with the current waveform exhibiting an ideal flat-top characteristic. The duration of the maintenance phase can be flexibly set according to application requirements, during which the current control accuracy can reach a high level of ±0.5%.

[0126] T3 Discharge Turn-Off Phase: When it is necessary to stop the target current output, the system enters the discharge turn-off phase. A forced turn-off voltage is applied at this time. This forces the load current to drop rapidly back to its initial current level. This stage also demonstrates the high-speed control capability of the invention; through the action of the reverse forced voltage, the current drop time can be controlled at the nanosecond level. The calculation of the forced turn-off voltage follows the same physical model principle as the forced start-up voltage, ensuring precise and controllable current drop process.

[0127] Figure 4 The current waveform exhibits typical trapezoidal characteristics, with both the rising and falling edges having straight slopes, and the flat top remaining constant. This waveform characteristic directly reflects the "calculation-preset-switching" three-level decoupling architecture of this invention. Compared to the exponential transient process of traditional closed-loop control, the linearized current change process achieved by this invention has higher determinism and predictability, providing an ideal current waveform output for precision applications.

[0128] The three-stage control strategy in this embodiment achieves time decoupling from millisecond-level system calculation and millisecond-level voltage preset to nanosecond-level high-speed switching. It perfectly solves the technical bottleneck of mutual constraint between high precision and high speed in traditional solutions, and lays a solid theoretical and technical foundation for high-performance current modulation applications.

[0129] In some embodiments, please refer to Figure 5 , Figure 5 The pulse-shaped current waveform shown demonstrates the superior performance of the method of this invention in complex multi-segment current modulation applications. This embodiment addresses the beam current level control requirements in the ion implantation process of semiconductor devices, necessitating the generation of a precise pulse waveform containing multiple current plateaus and rapid transitions. The entire waveform comprises seven timing stages: T1 (200ns), T2 (200ns), T3 (90ns), T4 (180ns), T5 (85ns), T6 (200ns), and T7 (190ns), covering a wide dynamic range current control from 0A to 100A.

[0130] System Design Scheme: This embodiment adopts a low-side forced topology design. To accommodate multiple current levels, four sets of forced voltages VH_PU are pre-set, paired with a high-speed switching matrix, corresponding to four beam current levels. The system's four boost circuits V1, V2, V3, and V4 generate forced voltages of different amplitudes. Four MOSFETs K1 form a controllable forced voltage switching network, with each switch independently controlling the connection and disconnection of a pre-set high voltage. D1 and D2 form an isolation network, and Q2 and U1 constitute a precision constant current sustaining unit, ensuring high-precision and stable control during each current plateau.

[0131] Multi-stage current control process: In stage T1, a rapid current increase from 0A to 100A is achieved. The controller calculates the required forced voltage V1 = -95V, which is connected to the load circuit via a high-speed switching matrix. The current increases linearly at a rate of 0.5A / ns, accurately reaching the target value of 100A within 200ns. Stage T2 is the 100A constant current maintenance period. The control loop stabilizes the current at 100A and starts timing. In stage T3, a rapid current decrease from 100A to 60A is executed. The controller switches to position V2, and a forced voltage V2 ≈ 93.89V is applied to the negative terminal of the load. The current decreases at a rate of 0.44445A / ns, accurately dropping to 60A after 90ns. Stage T4 is the 60A constant current maintenance period, where the system remains stable for 180ns. In stage T5, a current increase from 60A to 90A is achieved. The controller switches to position V3, and a forced voltage V3 ≈ 65.59V drives the current to increase at a rate of 0.353A / ns, reaching 90A within 85ns. During stage T6, a constant current of 90A is maintained for 200ns. During stage T7, the current is reduced from 90A to 0A using a forced voltage V4≈99.74V, and the reduction process is completed within 190ns.

[0132] Preset high voltage generation scheme: The system uses two Uni-Trend UDP6900-15010 programmable DC power supplies to achieve preset positive and negative voltage outputs respectively. The positive power supply presets two voltages: V2≈93.89V and V4≈99.74V, with an output accuracy of ±0.1% and ripple ≤±2mV; the reverse power supply outputs V1=-95V and V3=65.59V, ensuring high-precision and stable output of the forced voltage at each stage.

[0133] Waveform characteristics and advantages: Figure 5 The waveform shown demonstrates the superior capabilities of this invention in complex multi-segment current modulation. Each transition edge exhibits a linear slope, each plateau segment maintains ideal flat-top characteristics, the current transition speed reaches the nanosecond level, and the control accuracy is better than ±0.5%. Compared to the millisecond-level response time of traditional solutions, this invention achieves a nearly 100-fold speed improvement, perfectly meeting the stringent requirements of high-end manufacturing processes for customized current waveforms. This embodiment fully verifies the advantages of the invention's "calculation-preset-switching" three-level decoupled architecture in generating complex multi-segment waveforms.

[0134] In some embodiments, please refer to Figure 6 This is a precision current source system with a high-speed rise time. The target parameter of this embodiment is: target output current. Rise time The equivalent series inductance of the circuit was determined through actual measurements. The load voltage drop is 33V. The system adopts a high-side forced topology circuit architecture.

[0135] In terms of hardware configuration, the system includes the following core components: a controllable forced voltage module consisting of a 100V high-voltage power supply and a power switch Q1; an isolation network implemented using a reverse recovery diode D1; current control, current monitoring, and isolation network functions are achieved collaboratively by a power switch Q2, an operational amplifier U1, and a sampling resistor R2; a GD32F101 microcontroller is used to implement digital control functions; and a pump serves as the actual load of the system. Based on feedforward calculations, the forced voltage VH_PU adopts a 100V voltage level and, combined with switch Q1, forms a controllable forced voltage source.

[0136] The controller design employs a dedicated circuit architecture. The GD32F101 integrates a 12-bit ADC module for real-time sampling of current monitoring signals, while an external 12-bit AD5624 chip acts as a DAC to generate precise current control command signals. For timing control, the controller's internal clock is set to 100MHz, utilizing a built-in timer to generate a precise 240ns pulse control signal, corresponding to 24 clock cycles of the timer. The timer is configured in a non-dividend mode, with a PWM period set to 1000ns and a 240ns high-level output duty cycle to ensure precise timing control of the forced voltage application.

[0137] The specific workflow includes: In the S1 calculation and execution phase, the controller first sets the current control voltage, causing the precision constant current sustaining unit to start operating at the target current of 30A. At this time, the current rise rate is severely limited by the loop inductance. The controller then opens the forced switch Q1, applying a 100V forced voltage to the load. According to the physical model calculation formula (100V-33V) / 536nH = 0.125A / ns, the load current rises rapidly at a rate of 0.125A / ns. After a precise timing of 240ns, the current successfully rises to the target value of 30A. At this point, the controller uses its internal timer to precisely time the current rise and closes the forced switch Q1 after 240ns, completing the high-speed current rise process. This embodiment fully demonstrates the technical advantages of the "calculation-preset-switching" three-level decoupled architecture of the present invention. By determining the forced parameters through feedforward calculation, presetting the high-voltage power supply, and accurately switching the timing, it realizes a fundamental transformation from traditional passive adaptation to actively overcoming the influence of loop inductance, improving the current rise speed from the microsecond level of the traditional solution to the nanosecond level, and achieving a control accuracy of within ±0.5%.

[0138] In some embodiments, please refer to Figure 7 The waveform diagram is a measured waveform used to verify the actual performance of the method of the present invention. The waveform diagram was obtained by measuring with a RIGOL oscilloscope with the following parameters: horizontal range 200ns / div, sampling rate 250MSa / s, 6.00M sampling points, measurement time base T=2.27700400ms, voltage range 17.6V, and probe magnification 10X.

[0139] Figure 7 The blue waveform represents the measured load current curve, and the red waveform represents the voltage across the pump terminals. Measurement results show that under a 100V forced voltage, the load current rises rapidly at the theoretically calculated rate of 0.125A / ns. According to the formula, when the target current is 30A, the equivalent series inductance of the circuit is L=536nH, and the load voltage is VOP=33V, the required forced rise voltage VH_PU=100V, and the forced action time is 240ns.

[0140] The measured waveform closely matches the theoretical expectation. The measured rise time is 235ns, only 5ns different from the theoretically calculated 240ns, with an error rate of approximately 2%, and the current remains stable at around 30A. This indicates that the three-stage time decoupling architecture of calculation-preset-switching adopted in this invention can accurately achieve the expected control target, verifying the effectiveness of feedforward calculation based on the physical model.

[0141] The waveforms show several key characteristics: First, the current rise process exhibits an ideal linear ramp shape, indicating that the 100V forced voltage successfully overcomes the limitation of the current change rate by the loop inductance; second, the current can be stably maintained after reaching the target value of 30A, indicating that the current control circuit can take over and maintain the target current in a timely manner; finally, the red voltage waveform has slight oscillations due to parasitic parameters, but this does not affect the accuracy and stability of the current control.

[0142] Compared to the 20μs rise time of traditional current modulation schemes, this invention achieves a fast response of 235ns, a speed increase of 83 times, fully demonstrating the superiority of the "active energy injection" technology. This experimental result verifies the technological breakthrough of this invention in the field of nanosecond-level current modulation, realizing a shift from passive adaptation to active forced control concepts, and providing a completely new technical path for high-speed current modulation applications.

[0143] By comparing the consistency between theoretical calculations and measured waveforms, it is demonstrated that the open-loop control strategy based on physical model feedforward proposed in this invention has the characteristics of high precision and high reliability. It can achieve precise nanosecond-level current control without relying on high-speed ADCs and complex feedback loops, laying a solid technical foundation for high-speed drive applications of inductive loads such as semiconductor lasers and solenoid valves.

[0144] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-speed current modulation method with active energy injection, characterized in that, Includes the following steps: Obtain the equivalent series inductance of the main power circuit of the load and the steady-state operating voltage drop of the load, and receive the target current waveform command to obtain the circuit parameters and waveform command; The circuit parameters and the waveform commands are input into the command calculation module, and the forced voltage control sequence is calculated based on the physical model. The forced voltage control sequence is input into the preset high voltage source module to control the preset high voltage source to output the corresponding stable DC high voltage. The forced voltage control sequence is input into the timing control module to generate a switching control signal that drives the high-speed switching matrix; Drive the high-speed switching matrix according to the switch control signal to quickly connect or disconnect the stable DC high voltage to the load circuit according to a predetermined timing sequence, and obtain the modulated load current waveform. In this process, the feedforward calculation of the instruction calculation module, the voltage stabilization process of the preset high voltage source module, and the nanosecond-level switching action of the high-speed switching matrix are decoupled from each other on the time scale. The modulation process does not depend on the real-time feedback adjustment of the load current during the rising and falling edges of the current. The forced voltage control sequence is completely determined by the feedforward calculation of the physical model.

2. The high-speed current modulation method for active energy injection as described in claim 1, characterized in that, The step of inputting the loop parameters and the waveform command into the command calculation module, and calculating the forced voltage control sequence based on the physical model, includes: The waveform command is parsed to obtain the target current value, target rise time, and target fall time. The target current value, target rise time, target fall time, equivalent series inductance, and steady-state operating voltage drop are input into the command calculation module to establish a physical model based on Kirchhoff's voltage law. The forced setup voltage and forced shutdown voltage are calculated using the physical model. The forced setup voltage corresponds to the target rising edge, and the forced shutdown voltage corresponds to the target falling edge. The forced setup voltage and the forced shutdown voltage are combined with their corresponding application times to generate a forced voltage control sequence.

3. The high-speed current modulation method for active energy injection as described in claim 2, characterized in that, The physical model is a relationship between net voltage and the loop inductance and rate of change of current. The process by which the instruction calculation module calculates the forced setup voltage and forced shutdown voltage based on the physical model includes: Calculate the target current change rate by dividing the target current value by the target rise time to obtain the rise current change rate, and divide the target current value by the target fall time to obtain the fall current change rate. The forced setup voltage is not less than the product of the rising current rate of change and the equivalent series inductance plus the steady-state operating voltage drop; The magnitude of the forced shutdown voltage is not less than the product of the rate of change of the decreasing current and the equivalent series inductance.

4. The high-speed current modulation method for active energy injection as described in claim 3, characterized in that, The instruction calculation module supports high-side forced topology, low-side forced topology, and bilateral forced topology. The methods for applying the forced setup voltage and forced shutdown voltage include: When a high-side forced topology is used, the forced setup voltage corresponds to applying a positive voltage on the high side of the load, and the forced shutdown voltage corresponds to applying a negative voltage on the high side of the load. When a low-side forced topology is used, the forced setup voltage corresponds to applying a negative voltage on the low side of the load, and the forced shutdown voltage corresponds to applying a positive voltage on the low side of the load. When a bilateral forced topology is used, the forced setup voltage corresponds to a combination of applying a positive voltage on the high side of the load and applying a negative voltage on the low side of the load, and the forced shutdown voltage corresponds to a combination of applying a negative voltage on the high side of the load and applying a positive voltage on the low side of the load.

5. The high-speed current modulation method for active energy injection as described in claim 1, characterized in that, The step of inputting the forced voltage control sequence into the timing control module to generate the switching control signal driving the high-speed switching matrix includes: The forced voltage control sequence is parsed into a waveform time diagram to obtain the current rise time, current rise duration, current fall time, and current fall duration. The waveform timing diagram is input into the timing control module, which includes a controller and timing logic circuits. The timing logic circuit generates a precise timing instruction based on the waveform timing diagram. The precise timing instruction includes the switching action time and switching state information. The controller outputs a corresponding switch control signal at nanosecond-level precision according to the precise timing command. The switch control signal is used to drive the corresponding switches in the high-speed switch matrix to turn on and off.

6. The high-speed current modulation method for active energy injection as described in claim 5, characterized in that, The process by which the sequential logic circuit generates the precise timing instruction includes: The first switch action time is generated based on the current rise time, and the first switch action time corresponds to the time when the voltage is forcibly established to connect to the load circuit. The second switch action time is generated based on the duration of the current rise, and the second switch action time corresponds to the moment when the forced voltage cutoff will be achieved. The third switch action time is generated based on the current drop time, and the third switch action time corresponds to the time when the forced shutdown voltage is connected to the load circuit. The fourth switch action time is generated based on the duration of the current drop, and the fourth switch action time corresponds to the moment when the forced shutdown voltage is cut off. The timing of the first switch action, the timing of the second switch action, the timing of the third switch action, and the timing of the fourth switch action are combined with the corresponding switch identifiers to generate a precise timing command.

7. The high-speed current modulation method for active energy injection as described in claim 5, characterized in that, The controller is a field-programmable gate array or a microcontroller unit, and the process by which the controller outputs the switch control signal includes: When the current rises, the controller outputs a first set of switching control signals. The first set of switching control signals drives the high-speed power switching device corresponding to the forced establishment voltage to turn on, and at the same time drives the high-speed power switching devices other than the high-speed power switching device corresponding to the forced establishment voltage to turn off. When the current sustaining phase is reached, the controller outputs a second set of switching control signals. The second set of switching control signals drives all high-speed power switching devices corresponding to the forced voltage to turn off, switching the load circuit to steady-state power supply mode. When the current drops, the controller outputs a third set of switching control signals. The third set of switching control signals drives the high-speed power switching device corresponding to the forced turn-off voltage to turn on, and at the same time drives the high-speed power switching devices other than the high-speed power switching device corresponding to the forced turn-off voltage to turn off.

8. The high-speed current modulation method for active energy injection as described in claim 1, characterized in that, The process of obtaining the equivalent series inductance of the main power circuit of the load and the steady-state operating voltage drop of the load, and receiving the target current waveform command to obtain the circuit parameters and waveform command, includes: The equivalent series inductance of the main power circuit of the load is obtained through the parameter configuration module. The equivalent series inductance includes the sum of the conductor distribution inductance, connector inductance, load inductive component and small inductive element in the entire loop from the output of the drive source to the load and back. Obtain the steady-state operating voltage drop of the load, wherein the steady-state operating voltage drop is the voltage drop of the load under steady-state operating conditions; Receive a target current waveform command, the target current waveform command including the target current value, the target rise time, and the target fall time; The equivalent series inductance and the steady-state operating voltage drop are output as loop parameters, and the target current waveform command is output as a waveform command to obtain the loop parameters and the waveform command.

9. The high-speed current modulation method for active energy injection as described in claim 1, characterized in that, The step of inputting the forced voltage control sequence into the preset high-voltage source module and controlling the preset high-voltage source to output the corresponding stable DC high voltage includes: The forced voltage control sequence is input into a preset high voltage source module, which includes a programmable DC power supply. The programmable DC power supply is used to analyze the voltage value in the forced voltage control sequence and determine the stable DC high voltage level that needs to be preset for output. During the system initialization phase, the programmable DC power supply outputs and stabilizes at the required voltage value according to the voltage value in advance, generating one or more stable DC high voltages. The stable DC high voltages include a positive preset voltage and a negative preset voltage. The positive preset voltage is used to provide a forced setup voltage, and the negative preset voltage is used to provide a forced shutdown voltage. The programmable DC power supply performs stability control on each preset output voltage to ensure that the output accuracy meets the set requirements, and simultaneously provides the stabilized multiple DC high voltages to the high-speed switching matrix module.

10. The high-speed current modulation method for active energy injection as described in claim 1, characterized in that, The step of driving a high-speed switching matrix according to the switching control signal to rapidly connect or disconnect the stable DC high voltage to the load circuit according to a predetermined timing sequence, and obtaining a modulated load current waveform, includes: The high-speed switch matrix receives the switch control signal and includes multiple high-speed power switching devices. Each high-speed power switching device independently controls the connection or disconnection of a corresponding stable DC high voltage. The high-speed power switching device is a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. According to the switch control signal, the corresponding high-speed power switching device is driven to perform conduction or cutoff actions. The single switching action time reaches the nanosecond level. When the current rises, the voltage is forcibly established to connect to the load circuit. During the current maintenance phase, the load circuit is switched to steady-state power supply mode. When the current falls, the voltage is forcibly cut off to connect to the load circuit. The load current waveform is modulated by the high-speed switching action with a predetermined timing.

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