Topological optical computing chip based on parallel control of projection angle and control method thereof

Abstract

The application discloses a kind of topology optical computing chip based on projection angle parallel control and control method thereof.The chip includes topology photonic waveguide array, phase parallel control module, light input coupling array, light output interference array, light detection array and weight control module.The method obtains target weight matrix through weight control module, calculates the projection angle sequence θ required for each topology photonic unit i, is output to all weight units at the same clock edge in parallel, and loads complete weight matrix at a time;Input optical signal enters all computing paths simultaneously, and after phase modulation, interference superposition is completed matrix-vector multiplication.The application realizes nanosecond-level parallel configuration of optical computing weight, and weight loading time is less than 1 nanosecond, and phase resolution is better than 0.001 radian, which can be widely applied to matrix multiplication acceleration, neural network inference, optical signal processing and quantum-classical hybrid computing field.

Description

Technical Field

[0001] This invention relates to the fields of optical computing and integrated photonics technology, specifically to a topological optical computing chip and its control method based on parallel control of projection angle. This invention is particularly applicable to scenarios involving matrix-vector multiplication acceleration, neural network inference acceleration, optical signal processing, artificial intelligence computing, and quantum-classical hybrid computing. Background Technology

[0002] Optical computing uses photons instead of electrons for information processing, offering inherent advantages such as ultra-high bandwidth, low power consumption, and low latency. As Moore's Law approaches its physical limits, optical computing is considered one of the key technologies poised to overcome the power consumption and speed bottlenecks of traditional electronic computing. Existing optical computing technologies can be mainly classified into the following categories: (I) Optical computation based on Mach-Zehnder interferometer array Matrix multiplication is achieved by cascading MZIs. This type of scheme has the following problems: (1) The phase control of each MZI unit adopts a serial loading method, which cannot achieve parallel configuration; (2) Phase adjustment depends on thermo-optic or electro-optic effects, and the response speed is slow (microsecond to millisecond level); (3) It is difficult to synchronously compensate for the phase drift of large-scale arrays; (4) The size of the MZI array increases linearly with the matrix dimension, which limits the integration. (II) Weight library based on micro-ring resonator array Weighting is achieved by tuning the resonant wavelength of a microring resonator. This type of scheme has the following problems: (1) slow thermo-optical tuning speed and high power consumption; (2) thermal crosstalk between microrings affects accuracy; (3) lack of a global parallel phase synchronization mechanism. (III) Optical computation based on diffractive optical elements Optical Fourier transform and convolution operations are achieved through spatial light modulators or metasurfaces. This type of scheme has the following problems: (1) the refresh rate of spatial light modulators is low (kHz level); (2) the system is bulky and difficult to integrate on a chip; (3) it lacks reconfigurable parallel phase control capability. (iv) Optical computing devices based on topological photonics Topological photonics utilizes topology-protected edge states to achieve low-loss optical transmission. However, existing schemes mainly focus on static topological photonic devices and have not yet realized a reconfigurable optical computing architecture with multi-channel parallel phase modulation. In summary, the fundamental deficiency of existing optical computing technologies lies in the lack of a topological optical computing chip architecture capable of achieving multi-channel parallel independent phase modulation and large-scale reconfigurability. This invention, for the first time, establishes a one-to-one correspondence between the phase branch array of the phase parallel modulation module and the topological photonic device array, realizing high-speed parallel configuration and dynamic reconfiguration of optical computing. Summary of the Invention

[0003] (a) Purpose of the invention This invention provides a topological optical computing chip and its control method based on parallel control of projection angle, aiming to solve the technical problems of slow serial loading speed of phase control, difficulty in large-scale phase synchronization, and lack of parallel reconfigurability of existing optical computing chips. (II) Technical Principles This invention is based on integrated photonics principles and a phase-parallel computing architecture. In this invention, the parallel computing of the optical computing chip is achieved through the following physical chain: The basic operation of optical computing: The core operation of optical computing is matrix-vector multiplication: y_i = Σⱼ Wᵢⱼ·xⱼ. In the optical domain, the weights Wᵢⱼ are encoded by the phase and amplitude of the light wave through each path, the input vector xⱼ is encoded by the amplitude of the input light field, and the output yᵢ is represented by the light intensity after interference at the output end. Topological photonic waveguide array: Topological photonic crystal waveguides possess topologically protected edge states, which prevent light propagation along the edge states from being affected by defects and scattering. In this invention, topological photonic waveguides are used to construct the core interconnection network for optical computing, achieving low-loss, high-fidelity optical signal transmission. Phase-parallel encoding weights: Each weight Wᵢⱼ corresponds to the phase control terminal of a topological photonic unit. The output θᵢⱼ of each phase branch of the phase-parallel control module is loaded in parallel to all weight units on the same clock edge, realizing the synchronous configuration of matrix weights. Parallel vector computation: The input optical signal simultaneously enters all computation paths, propagates through topological photonic waveguides, and undergoes phase modulation. The signals are then superimposed in parallel at the output, completing a full matrix-vector multiplication in one operation. Updating the weight matrix requires only one clock cycle (nanoseconds) without serial waiting. The fundamental difference from existing technologies: This invention is not a "serial configuration of MZI array" solution, but an optical computing architecture that achieves "simultaneous configuration of all weights and simultaneous parallel operation of all computing paths" through phase parallel control, thus eliminating serial loading delay. (III) Technical Solution A topological optical computing chip based on parallel control of projection angle, characterized in that it comprises: A topological photonic waveguide array, comprising multiple topological photonic units, each with an independent phase control terminal for encoding optical computation weights; The phase parallel control module contains multiple phase branches, each of which independently outputs a projection angle θ_i, which is connected to the phase control terminal of the corresponding topological photonic unit. An optical input coupling array, disposed at the input end of the waveguide array, is used to couple the input optical signal to the computing path; An optical output interference array, disposed at the output end of the waveguide array, is used to perform interference summation on the calculated optical signal; A photodetector array, connected to the photooutput interference array, is used to convert optical signals into electrical signals for output. The weight control module, connected to the phase parallel control module, is used to calculate the required projection angle distribution for each topological photonic unit based on the target matrix. A matrix-vector multiplication method for topological light computation based on parallel projection angle control, characterized by the following steps: S1: Obtain the target weight matrix W, calculate the phase encoding required for each topological photonic unit, and convert it into a projection angle sequence θ1, θ2, …, θ n ; S2: Through multiple phase branches of the phase parallel control module, the projection angle sequence is output in parallel to each topological photonic unit at the same clock edge, and the complete weight matrix is ​​loaded at once; S3: The input optical signal enters all computing paths simultaneously via the optical input coupling array; S4: The topological photonic units in each computation path apply phase modulation to the optical signal and encode the weight values; S5: The modulated optical signals are coherently superimposed in the optical output interference array to achieve optical summation of matrix-vector multiplication; S6: The photodetector array converts the output light intensity into an electrical signal and outputs the calculation results. (iv) Beneficial effects First, it achieves parallel configuration of optical computation weights, and loading the complete weight matrix only requires one clock cycle (nanosecond level), which is 3-4 orders of magnitude faster than serial MZI arrays. Second, the topological protection mechanism of the topological photonic waveguide results in extremely low optical transmission loss and higher computational accuracy than traditional silicon photonic MZI arrays. Third, parallel phase control enables the phase synchronization accuracy of each weight channel to be better than 0.01 radians, significantly improving the calculation accuracy. Fourth, the chip can be dynamically reconfigured, supporting real-time updates of neural network weights and switching between different computing tasks. Fifth, it is compatible with CMOS technology, enabling large-scale on-chip integration. Detailed Implementation

[0004] Example 1 (Parallel Matrix-Vector Multiplier) Step 1: Provide a topology optical computing chip. A 64×64 topological photonic waveguide array was fabricated on an SOI substrate. Each intersection contained a topological photonic weighting unit (based on a topological photonic crystal microring resonator), for a total of 4096 weighting units. Each unit was equipped with an independent phase control electrode. Step 2: Integrate the phase parallel control module. The phase parallel control module is configured with 4096 phase branches, each branch outputs a projection angle θ_i, with an update rate of 1GHz, and is connected to the phase control electrode of each weight unit. Step 3: Load the weight matrix in parallel. The weight control module calculates the projection angle required for each unit based on the target matrix (such as the weights of a 64×64 neural network), and the phase parallel control module synchronously outputs all 4096 θ_i on one clock edge, loading the complete weight matrix at once. Step 4: Execute optical computation. The 64-channel input optical signals enter the computing array simultaneously. After propagation through the topological photonic waveguide and weight modulation, they are interferometrically summed at the output end, and the 64-channel output optical signals are generated simultaneously, completing a 64×64 matrix-vector multiplication in one go. Step 5: Dynamic reconfiguration. When switching computational tasks, the weight control module recalculates the projection angle distribution corresponding to the weight matrix, and the phase parallel control module synchronously updates all weights at the next clock edge. Example 2 (Neural Network Inference Accelerator) Topological optical computing chips are used to accelerate neural network inference. The chip's matrix multiplication units can be configured with different sizes (supporting 64×64, 128×128, 256×256, etc.), and the matrix dimensions can be dynamically switched through the weight control module. During inference, all weights are calculated in parallel within a single light propagation, eliminating the need for multiple iteration cycles. Compared to GPUs, energy efficiency is improved by 10-100 times. Example 3 (Programmable Optical Signal Processor) The topological optical computing chip is configured as a programmable optical filter. By altering the weight distribution through parallel phase modulation, the frequency response shape of the filter can be adjusted in real time. The filter response switching time is less than 1 ns, which is three orders of magnitude faster than traditional tunable optical filters. Example 4 (Quantum-Classical Hybrid Computing Interface) A topological optical computing chip is deployed as an interface processor between a topological quantum computer and a classical computer. The optical computing chip converts the quantum state amplitude output from the quantum computing into the classical matrix calculation result, realizing a high-speed bridge for quantum-classical hybrid computing. Attached Figure Description

[0005] Figure 1 This is a block diagram of the overall architecture of the topology optical computing chip based on parallel control of projection angle according to the present invention. Figure 2 This is a schematic diagram showing the one-to-one correspondence between the phase branch and the topological photon weighting unit. Figure 3 This is a schematic diagram illustrating the principle of matrix-vector multiplication in optical computation. Figure 4 This is a flowchart of the optical computation matrix-vector multiplication method of the present invention. Figure 5 This is a schematic diagram of a typical application scenario of the present invention. Terminology Explanation

[0006] Projection angle θ: The phase control parameter output by each phase branch. The value of θ determines the phase modulation amount of the corresponding weight unit, and the value ranges from -π to +π. Optical computing: a technique that uses the interference, diffraction, and propagation of photons to perform mathematical operations. Topological photonic waveguide: A waveguide structure with topologically protected photonic edge states, where light propagates along the edge states unaffected by defects and scattering. Matrix-vector multiplication: the most basic operation in optical computing, which achieves parallel calculation of y = W·x through light field interference.

Claims

1. A topological light computation matrix-vector multiplication method based on parallel projection angle control, characterized in that, Includes the following steps: S1: Obtain the target weight matrix W, calculate the phase encoding required for each topological photonic unit, and convert it into a projection angle sequence θ1, θ2, …, θ n ; S2: Through multiple phase branches of the phase parallel control module, the projection angle sequence is output in parallel to each topological photonic unit at the same clock edge, and the complete weight matrix is ​​loaded at once; S3: The input optical signal enters all computing paths simultaneously via the optical input coupling array; S4: The topological photonic units in each computation path apply phase modulation to the optical signal and encode the weight values; S5: The modulated optical signals are coherently superimposed in the optical output interference array to achieve optical summation of matrix-vector multiplication; S6: The photodetector array converts the output light intensity into an electrical signal and outputs the calculation results.

2. A topological optical computing chip based on parallel control of projection angle, characterized in that, include: A topological photonic waveguide array, comprising multiple topological photonic units, each with an independent phase control terminal for encoding optical computation weights; The phase parallel control module contains multiple phase branches, each of which independently outputs a projection angle θ_i, which is connected to the phase control terminal of the corresponding topological photonic unit. An optical input coupling array, disposed at the input end of the waveguide array, is used to couple the input optical signal to the computing path; An optical output interference array, disposed at the output end of the waveguide array, is used to perform interference summation on the calculated optical signal; A photodetector array, connected to the photooutput interference array, is used to convert optical signals into electrical signals for output. The weight control module, connected to the phase parallel control module, is used to calculate the required projection angle distribution for each topological photonic unit based on the target matrix.

3. The method according to claim 1, characterized in that, The loading time of the weight matrix is ​​less than 1 nanosecond and is determined by only one synchronous clock edge.

4. The method according to claim 1, characterized in that, The material of the topological photonic waveguide array is at least one of silicon, silicon nitride, or indium phosphide.

5. The method according to claim 1, characterized in that, The calculation accuracy is determined by the phase resolution of the phase parallel control module, which is better than 0.001 radians.

6. The chip according to claim 2, characterized in that, The topological photonic unit is based on at least one structure of a topological photonic crystal microring resonator or a topological photonic waveguide (MZI).

7. The method according to claim 1, characterized in that, The method supports dynamic configuration of matrix dimensions, and switches between matrices of different dimensions through a weight control module.

8. The method according to claim 1, characterized in that, The computational delay of the method is determined solely by the propagation time of the optical signal within the chip, and is less than 10 nanoseconds.

9. The chip according to claim 2, characterized in that, The chip is compatible with CMOS technology and supports on-chip optoelectronic integration.

10. The method according to claim 1, characterized in that, When the method is applied to neural network inference, a single light propagation completes a matrix-vector multiplication operation for an entire layer of the neural network.

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