Storage device, chip, and control method for storage device

Abstract

The application discloses a storage device, a chip and a control method of the storage device. The storage device comprises at least one flash memory array, the at least one flash memory array comprising at least two types of storage media; a flash memory controller connected with the at least one flash memory array, used for defining at least two flash memory command templates, the at least two flash memory command templates corresponding to the at least two types of storage media one by one; wherein the flash memory controller is used for acquiring a flash memory operation command; selecting a target flash memory command template from the at least two flash memory command templates according to the flash memory operation command, and sending the flash memory operation command to the storage medium corresponding to the target flash memory command template according to the target flash memory command template, so as to execute a flash memory operation corresponding to the flash memory operation command on the storage medium. The application improves the performance of the storage device.

Description

Technical Field

[0001] The embodiments disclosed in this application relate to the field of flash memory technology, and more specifically, to a storage device, a chip, and a method for controlling the storage device. Background Technology

[0002] In recent years, solid-state storage technology has shown a trend of diversified media synergy development. Hybrid storage architectures based on heterogeneous media such as SLC / MLC / TLC / QLC have gradually become an important evolution direction for improving the overall performance of storage systems. However, the current NandFlash controller design is still based on a single media adaptation as its core architecture. Its control logic is fixed to the physical characteristics and operation timing of a specific storage medium, which makes it face fundamental technical obstacles when facing dual-media or multi-media hybrid scenarios. Summary of the Invention

[0003] According to embodiments of this application, this application proposes a storage device, a chip, and a control method for the storage device to solve the above-mentioned problems.

[0004] The first aspect of this application discloses a storage device, comprising: at least one flash memory array, the at least one flash memory array including at least two types of storage media; and a flash memory controller connected to the at least one flash memory array, configured to define at least two flash memory command templates, the at least two flash memory command templates corresponding one-to-one with the at least two types of storage media; wherein the flash memory controller is configured to: acquire flash memory operation commands; select a target flash memory command template from the at least two flash memory command templates according to the flash memory operation commands, and send the flash memory operation commands to the storage media corresponding to the target flash memory command template, so as to perform the flash memory operation corresponding to the flash memory operation commands on the storage media.

[0005] In some embodiments, selecting a target flash command template from the at least two flash command templates based on the flash operation command includes: parsing the flash operation command to obtain a corresponding physical address; extracting a corresponding code rate symbol from the physical address; determining the target flash command template from the at least two flash command templates based on the code rate symbol; and sending the flash operation command to the storage medium corresponding to the target flash command template according to the target flash command template includes: parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash command template to obtain address information of the flash operation command, so as to send the flash operation command to the corresponding storage medium according to the address information.

[0006] In some embodiments, the at least two types of storage media include a first type of storage media and / or a second type of storage media; the step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the address information of the flash memory operation command includes: parsing the physical address using the first parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the first address information of the flash memory operation command, wherein the first address information is used to characterize that the flash memory operation command is used for the first type of storage media or the second type of storage media.

[0007] In some embodiments, each type of storage medium includes a first arrangement of storage media and / or a second arrangement of storage media; the step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the address information of the flash memory operation command includes: parsing the physical address using the second parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the second address information of the flash memory operation command, wherein the second address information is used to characterize that the flash memory operation command is used for the first arrangement of storage media or the second arrangement of storage media.

[0008] In some embodiments, the step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash command template to obtain the address information of the flash operation command further includes: parsing the physical address using the third parsing parameters corresponding to the code rate symbol in the target flash command template to obtain the third address information of the flash operation command; and calculating the row address information of the flash operation command using the first address information, the second address information, and the third address information.

[0009] In some embodiments, the step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash command template to obtain the address information of the flash operation command includes: calculating the column address information of the flash operation command using the page size and sector identifier represented by the code rate symbol in the target flash command template.

[0010] In some embodiments, the flash controller is further configured to: determine the transfer length of the direct memory access corresponding to the flash operation command using the code rate symbol in the target flash command template.

[0011] In some embodiments, the at least two types of storage media include three-cell storage media and 1-cell storage media; and / or each type of storage media includes four-plane media and / or eight-plane media.

[0012] In some embodiments, the flash controller includes a flash interface connected to the at least one flash array, and the at least two flash command templates are stored in the flash interface.

[0013] In some embodiments, obtaining the flash memory operation command includes: obtaining an external operation instruction and converting the external operation instruction into an internal operation instruction; processing the internal operation instruction to obtain the flash memory operation command.

[0014] The second aspect of this application discloses a chip that includes the storage device described in the first aspect.

[0015] The third aspect of this application discloses a method for controlling a storage device, applied to the storage device described in the first aspect. The method includes: acquiring a flash memory operation command; selecting a target flash memory command template from at least two flash memory command templates according to the flash memory operation command; and sending the flash memory operation command to the storage medium corresponding to the target flash memory command template in accordance with the target flash memory command template, so as to perform a flash memory operation corresponding to the flash memory operation command on the storage medium.

[0016] The beneficial effects of this application are as follows: The storage device includes at least one flash memory array and a flash memory controller. The flash memory controller is connected to the at least one flash memory array. The at least one flash memory array includes at least two types of storage media. The flash memory controller is used to define at least two flash memory command templates, which correspond one-to-one with the at least two types of storage media. Flash memory operation commands are obtained through the flash memory controller. Based on the flash memory operation commands, a target flash memory command template is selected from the at least two flash memory command templates. The flash memory operation commands are sent to the storage media corresponding to the target flash memory command template to perform the flash memory operation corresponding to the flash memory operation commands on the storage media. This achieves compatibility of a single flash memory controller with multiple storage media and improves the performance of the storage device. Attached Figure Description

[0017] The present application will be further described below with reference to the accompanying drawings and embodiments. In the drawings:

[0018] Figure 1 This is a schematic diagram of the structure of a storage device according to an embodiment of this application;

[0019] Figure 2 This is a schematic diagram of the structure of a flash memory controller according to an embodiment of this application;

[0020] Figure 3 This is a schematic diagram of the structure of a flash memory interface according to an embodiment of this application;

[0021] Figure 4 This is a comparative schematic diagram of row address calculation according to an embodiment of this application;

[0022] Figure 5 This is a schematic diagram illustrating the effect of column address calculation according to an embodiment of this application;

[0023] Figure 6 This is a schematic flowchart of flash memory operation command processing according to an embodiment of this application;

[0024] Figure 7 This is a schematic diagram of the chip structure according to an embodiment of this application;

[0025] Figure 8 This is a flowchart illustrating the control method of a storage device according to an embodiment of this application. Detailed Implementation

[0026] In this application, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0027] In this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A alone, A and B simultaneously, and B alone. Additionally, the character " / " generally indicates that the preceding and following related objects are in an "or" relationship. Furthermore, "many" in this application means two or more. Moreover, the term "at least one" in this application means any combination of at least two of any one or more of a plurality of objects. For example, including at least one of A, B, and C can mean including any one or more elements selected from the set consisting of A, B, and C. Furthermore, the terms "first," "second," and "third" in this application are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features.

[0028] To enable those skilled in the art to better understand the technical solution of this application, the technical solution of this application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] Please see Figure 1 , Figure 1This is a schematic diagram of the structure of a storage device according to an embodiment of this application. The storage device 100 includes at least one flash memory array. The at least one flash memory array includes at least two types of storage media, such as single-level cells (SLC), multi-level cells (MLC), triple-level cells (TLC), quad-level cells (QLC), etc. The at least one flash memory array may include flash memory array 110, flash memory array 120...flash memory array 130. For example, the storage media type of flash memory array 110 may be different from that of flash memory array 120, or flash memory array 130 may include two types of storage media, etc. Figure 1 As shown, flash array 110 includes storage medium M0, flash array 120 includes storage medium M1, and flash array 130 includes storage medium M0 and storage medium M1.

[0030] The storage device 100 also includes a flash memory controller 20, which is connected to at least one flash memory array. The flash memory controller 20 is used to define at least two flash memory command templates; for example, at least two flash memory command templates can be pre-configured in the flash memory controller 20, such as... Figure 1 As shown, at least two flash command templates may include flash command template 201, flash command template 202, etc., wherein the flash command templates can be used to be compatible with the interface command timing of different types of storage media.

[0031] At least two flash command templates correspond one-to-one with at least two types of storage media. For example, flash arrays 110, 120, and 130 include storage media M0 and M1. Further, two flash command templates (e.g., flash command template 201 and flash command template 202) can be pre-configured in the flash controller 20, where flash command template 201 corresponds to storage media M0 and flash command template 202 corresponds to storage media M1. In other embodiments, if flash arrays 110, 120, and 130 include three types of storage media, for example, flash array 110 includes storage media M0, flash array 120 includes storage media M1, and flash array 130 includes storage media M3 (not shown in the figure), further, three flash command templates can be pre-configured in the flash controller 20, each corresponding one-to-one with storage media M0, M1, and M3.

[0032] The flash memory controller 20 is used to: acquire flash memory operation commands, select a target flash memory command template from at least two flash memory command templates based on the flash memory operation commands, and send the flash memory operation commands to the storage medium corresponding to the target flash memory command template in accordance with the target flash memory command template, so as to perform the flash memory operation corresponding to the flash memory operation commands on the storage medium.

[0033] The flash memory operation command can be an operation command for any of at least two types of storage media. Taking the flash memory arrays 110, 120, and 130 as examples of two types of storage media, if the flash memory operation command is a write command wr_1 for storage medium M0, a target flash memory command template is selected from flash memory command templates 201 and 202 based on the write command wr_1. The target flash memory command template is the flash memory command template 202210 corresponding to storage medium M0. Further, the write command wr_1 can be sent to the corresponding storage medium M0 according to the flash memory command template 202210 to perform a write operation on storage medium M0. Storage medium M0 can be in flash memory array 110 or flash memory array 120.

[0034] In this embodiment, the storage device 100 includes at least one flash memory array and a flash memory controller 20. The flash memory controller 20 is connected to the at least one flash memory array, which includes at least two types of storage media. The flash memory controller 20 defines at least two flash memory command templates, each corresponding to one of the at least two types of storage media. Flash memory operation commands are obtained through the flash memory controller 20. Based on the flash memory operation commands, a target flash memory command template is selected from the at least two flash memory command templates, and the flash memory operation command is sent to the storage media corresponding to the target flash memory command template to perform the flash memory operation corresponding to the flash memory operation command on that storage media. This achieves multi-media compatibility with a single flash memory controller, improving the performance of the storage device. In some embodiments, such as... Figure 2 As shown, Figure 2 This is a schematic diagram of a flash memory controller according to an embodiment of this application. The flash memory controller 20 includes a flash memory interface 210, which is connected to at least one flash memory array. At least two flash memory command templates are stored in the flash memory interface 210. The flash memory interface 210 may be a Nand Flash Interface module of the flash memory controller 20. In some examples, the flash memory interface 210 is used to acquire flash memory operation commands, select a target flash memory command template from at least two flash memory command templates based on the flash memory operation commands, and send the flash memory operation commands to the storage medium corresponding to the target flash memory command template according to the target flash memory command template, so as to realize the flash memory operation corresponding to the flash memory operation command on the storage medium.

[0035] Understandably, at least two flash command templates are stored in the memory area of ​​the flash controller 20. This means that the content and quantity of the flash command templates can be redefined by software according to the different media of the flash array. For example, when dual-media support is required, template data for two media can be placed in the memory area. When it is determined which media the read / write operation belongs to, the software sends the corresponding template number, and the flash interface 210 receives the corresponding template number and reads the template data. At this point, timing commands for two different media can be implemented within a single flash controller system. Furthermore, when the storage media is changed or updated, only the flash command templates need to be updated.

[0036] In some embodiments, obtaining a flash memory operation command includes: obtaining an external operation instruction and converting the external operation instruction into an internal operation instruction; processing the internal operation instruction to obtain a flash memory operation command.

[0037] In some examples, such as Figure 2 As shown, the flash controller 20 also includes firmware 220 and a front-end interface 230, with the front-end interface 230 connecting the firmware 220 and the host 30. The host 30, or host system, is responsible for core tasks such as data processing and operation. The front-end interface 230 can be used to process interface modules for protocols such as PCIe (Peripheral Component Interconnect Express), UFS (Universal Flash Storage), SATA (Serial Advanced Technology Attachment), and SAS (Serial Attached SCSI). For example, the front-end interface 230 can convert protocol I / O into internal I / O. The firmware 220 is the software part of the flash controller 20, used to process operation instructions, such as decomposing internal I / O into flash I / O.

[0038] In some examples, the front-end interface 230 obtains external operation instructions from the host 30 and converts them into internal operation instructions. The front-end interface 230 then transmits the internal operation instructions to the firmware 220. The firmware 220 processes the internal operation instructions to obtain flash memory operation commands, which can be converted into media commands belonging to the corresponding storage medium type, and then transmitted to the flash memory interface 210. The flash memory operation commands may include a Physical Page Number (PPN) containing a code rate symbol. The code rate symbol can be a preset flag symbol used to characterize the type of storage medium to which the physical address belongs. In some other examples, the flash controller 20 connects flash array 110 and flash array 120, which have different storage media types. For example, flash array 110 includes storage medium M0, and flash array 120 includes storage medium M1. The code rate symbol can be 0 or 1. The physical address x includes code rate symbol 0, which can be used to represent the operation command of flash array 110 corresponding to storage medium M0 at physical address x; the physical address y includes code rate symbol 1, which can be used to represent the operation command of flash array 120 corresponding to storage medium M1 at physical address y. In some other examples, the code rate symbol is 2 bits, i.e., 00, 01, 10, and 11, which can be used to represent operation commands corresponding to the four storage media types respectively. The specific code rate symbol can be adjusted according to the actual situation, and this application does not impose any specific limitations.

[0039] In some embodiments, selecting a target flash command template from at least two flash command templates based on a flash operation command includes: parsing the flash operation command to obtain a corresponding physical address, and extracting a corresponding code rate symbol from the physical address; determining the target flash command template from at least two flash command templates based on the code rate symbol; and sending the flash operation command to the storage medium corresponding to the target flash command template according to the target flash command template, including: parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash command template to obtain address information of the flash operation command, so as to send the flash operation command to the corresponding storage medium according to the address information.

[0040] In some examples, such as Figure 3 As shown, Figure 3This is a schematic diagram of a flash memory interface according to an embodiment of this application. Flash memory interface 210 connects flash memory arrays CH0 and CH1. Flash memory arrays CH0 and CH1 have different storage media types. Flash memory interface 210 stores flash command templates T0 and T1. For example, flash memory array CH0 includes storage medium M0, and flash memory array CH1 includes storage medium M1. Flash command template T0 can be used to store / transmit operation commands related to storage medium M0, and flash command template T1 can be used to store / transmit operation commands related to storage medium M1. The code rate symbol includes 0 or 1. Code rate symbol 0 can be used to represent an operation command whose physical address corresponds to storage medium M0, and code rate symbol 1 can be used to represent an operation command whose physical address corresponds to storage medium M1.

[0041] The flash memory operation command is parsed to obtain the corresponding physical address. The corresponding code rate symbol is extracted from the physical address. Based on the code rate symbol, the target flash memory command template is determined from at least two flash memory command templates. For example, if flash memory operation command 0 is an operation command about storage medium M0, parsing flash memory operation command 0 yields the corresponding physical address 0. The code rate symbol 0 is extracted from physical address 0, and then the target flash memory command template is determined from flash memory command template T0 and flash memory command template T1 based on the code rate symbol 0, i.e., flash memory command template T0 is selected. Alternatively, if flash memory operation command 1 is an operation command about storage medium M1, parsing flash memory operation command 1 yields the corresponding physical address 1. The code rate symbol 1 is extracted from physical address 1, and the target flash memory command template is determined from flash memory command template T0 and flash memory command template T1 based on the code rate symbol 1, i.e., flash memory command template T1 is selected.

[0042] Furthermore, by utilizing the parsing parameters corresponding to the rate symbols in the target flash command template, the physical address is parsed to obtain the address information of the flash operation command, so that the flash operation command is sent to the corresponding storage medium according to the address information. For example, the parsing parameters corresponding to the rate symbol 0 in the target flash command template 0 can be used to parse the physical address to obtain the address information of the flash operation command 0, so that the flash operation command 0 is sent to the flash array CH0 corresponding to the storage medium M0 according to the address information. Different rate symbols can correspond to different parsing parameters, and different parsing parameters can be used to process the physical address differently, thereby enabling the flash controller 20 to be compatible with data formats of different types of storage media.

[0043] In some embodiments, at least two types of storage media include a first type of storage media and / or a second type of storage media. In some examples, at least two types of storage media include a first type of storage media (e.g., the storage media M0 described above) and a second type of storage media (e.g., the storage media M1 described above).

[0044] Using the parsing parameters corresponding to the code rate symbol in the target flash command template, the physical address is parsed to obtain the address information of the flash operation command. This includes: using the first parsing parameter corresponding to the code rate symbol in the target flash command template, the physical address is parsed to obtain the first address information of the flash operation command. The first address information is used to indicate whether the flash operation command is used for a first type of storage medium or a second type of storage medium.

[0045] The first address information of the flash memory operation command is used to identify whether the flash memory operation command is used for a first type of storage medium or a second type of storage medium. The first address information of the flash memory operation command can be block field information; for example, the block field information can be used to identify whether the flash memory operation command is used for storage medium M0 or storage medium M1. In some examples, if the target flash memory command template is determined to be the aforementioned flash memory command template T1, the first parsing parameter corresponding to the code rate symbol 1 in the flash memory command template T1 can be used to parse the physical address 1 to obtain the block field 1 of the flash memory operation command. Block field 1 can be used to identify whether the flash memory operation command is used for storage medium M0.

[0046] In some embodiments, each type of storage medium includes a first arrangement of storage media and / or a second arrangement of storage media. In some examples, each type of storage medium includes a first arrangement of storage media and a second arrangement of storage media. For example, the first arrangement of storage media may be a 4-plane medium or an 8-plane medium. That is, the flash array CH0 (storage medium M0) may include 4-plane media and 8-plane media, and the flash array CH1 (storage medium M1) may include 4-plane media and 8-plane media.

[0047] Using the parsing parameters corresponding to the code rate symbols in the target flash memory command template, the physical address is parsed to obtain the address information of the flash memory operation command. This includes: using the second parsing parameters corresponding to the code rate symbols in the target flash memory command template, the physical address is parsed to obtain the second address information of the flash memory operation command. The second address information is used to characterize whether the flash memory operation command is used for the first arrangement of storage media or the second arrangement of storage media.

[0048] The second address information of the flash memory operation command is used to characterize whether the flash memory operation command is used for a first arrangement of storage media or a second arrangement of storage media. The second address information of the flash memory operation command can be plane segment information; for example, plane segment information can be used to characterize whether the flash memory operation command is used for a 4-plane medium or an 8-plane medium. In some examples, if the target flash memory command template is determined to be the aforementioned flash memory command template T0, the second parsing parameter corresponding to the code rate symbol 0 in the flash memory command template T0 can be used to parse the physical address 0 to obtain the plane segment 0 of the flash memory operation command. Plane segment 0 can be used to characterize whether the flash memory operation command is used for a 4-plane medium in the flash memory array CH0 (storage media M0); or, plane segment 1 of the flash memory operation command can be obtained by parsing the physical address 0. Plane segment 1 can be used to characterize whether the flash memory operation command is used for an 8-plane medium in the flash memory array CH0 (storage media M0).

[0049] In some embodiments, the physical address is parsed using the parsing parameters corresponding to the code rate symbol in the target flash command template to obtain the address information of the flash operation command. This further includes: parsing the physical address using the third parsing parameters corresponding to the code rate symbol in the target flash command template to obtain the third address information of the flash operation command; and calculating the row address information of the flash operation command using the first address information, the second address information, and the third address information.

[0050] The third address information of a flash memory operation command can be page segment information. In some examples, the target flash memory command template is determined to be the aforementioned flash memory command template T1. The page segment information can be obtained by resolving physical address 1 using the third parsing parameter corresponding to the code rate symbol 1 in flash memory command template T1. That is, the first, second, and third parsing parameters corresponding to the code rate symbol 1 in flash memory command template T1 can be used to parse physical address 1 to obtain block segment 1, plane segment 1, and page segment 1 of the flash memory operation command. Furthermore, the row (ROW) address information of the flash memory operation command can be calculated using block segment 1, plane segment 1, and page segment 1.

[0051] To facilitate understanding, an example is given illustrating the calculation of row address information for flash memory operation commands, such as... Figure 4 As shown, Figure 4This is a comparative schematic diagram of row address calculation according to an embodiment of this application. For a flash memory operation instruction acting on a first type of storage medium, physical address 0 is obtained by parsing. Physical address 0 includes fields such as code rate symbol 0, wafer number, block number, and page number, for example, {code rate symbol 0; Die_num; Block_num; Page_num}. Based on the parsing parameters corresponding to code rate symbol 0, physical address 0 is parsed to obtain wafer number offset 0, block number offset 0, and page number offset 0, for example, {Die_num_offset0; Block_num_offset0; Page_num_offset0}. Unnecessary parts are then removed using a mask to obtain row address 0. Row address 0 includes wafer number mask 0, block number mask 0, and page number mask 0, for example, {Die_num_mask0; Block_num_mask0; Page_num_mask}. 0}; For flash memory operation instructions applied to the second type of storage medium, physical address 1 is obtained by parsing. Physical address 1 includes fields such as code rate symbol 1, block number, wafer number, and page number, for example, {code rate symbol 1; Block_num; Die_num; Page_num}. Since the storage medium type is different, physical address 1 is different from physical address 0. Further, based on the parsing parameters corresponding to code rate symbol 1, physical address 1 is parsed to obtain wafer number offset 1, block number offset 1, and page number offset 1, for example, {Die_num_offset1; Block_num_offset1; Page_num_offset1}. Unnecessary parts are removed by masking to obtain row address 1. Row address 1 includes wafer number mask 1, block number mask 1, and page number mask 1, for example, {Die_num_mask1; Block_num_mask1; Page_num_mask1}.

[0052] In this embodiment, the physical address is parsed using the first parsing parameter, the second parsing parameter, and the third parsing parameter corresponding to the code rate symbol in the flash command template to obtain the first address information, the second address information, and the third address information of the flash operation command. Furthermore, the row address information of the flash operation command is calculated using the first address information, the second address information, and the third address information, which has high flexibility and improves the performance of the storage device.

[0053] In some embodiments, the physical address is parsed using the parsing parameters corresponding to the code rate symbol in the target flash command template to obtain the address information of the flash operation command, including: calculating the column address information of the flash operation command using the page size represented by the code rate symbol in the target flash command template and the sector identifier.

[0054] In some examples, the page size of the first type of storage medium is n KB and the page size of the second type of storage medium is m KB, where m is not equal to n. The column address information of the flash operation command is generated by calculating the page size represented by the code rate symbol in the target flash command template and the sector identifier. For example, the page size of storage medium M0 is n KB. The column address of the flash operation command can be generated by calculating the n KB corresponding to the code rate symbol 0 in the flash command template T0 and the sector identifier (sector id).

[0055] A page can be divided into 4 sectors. The sector identifiers can include 0, 1, 2, and 3. For example, sector 0, sector 1, sector 3, and sector 4 are arranged in sequence. If the sector identifier and page size corresponding to the current command are determined, the corresponding column address can be determined.

[0056] To facilitate understanding, an example is given illustrating the calculation of column address information for flash memory operation commands, such as... Figure 5 As shown, Figure 5 This is a schematic diagram illustrating the effect of column address calculation according to an embodiment of this application, for example, a page of a first type of storage medium (such as...). Figure 5 As shown, the size of page 0 is 16800KB, that is, Page_size0 is 16800KB. The page size of the second type of storage medium (such as...) Figure 5 As shown, page 1) is 17200KB in size, meaning Page_size1 is 17200KB. The starting addresses of the sector columns for pages 0 and 1 can be calculated, as follows: Figure 5 As shown, the column address (Sector0_col_addr) corresponding to sector 0 of page 0 is 4200KB, or 16800*(1 / 4)KB. The length of the user data corresponding to sector 0 in page 0 can be 4112KB, or Data_length4112KB, and the length of the parity data can be 88KB, or Parity_length88KB. The column address (Sector0_col_addr) corresponding to sector 0 of page 1 is 4300KB, or 17200*(1 / 4)KB. The length of the user data corresponding to sector 0 in page 1 can be 4224KB, or Data_length 4224KB, and the length of the parity data can be 76KB, or Parity_length 76KB.

[0057] Furthermore, in some embodiments, the flash memory controller 20 is also configured to: determine the transfer length of the direct memory access corresponding to the flash memory operation command using the code rate symbol in the target flash memory command template.

[0058] Using the code rate symbol in the target flash command template, the Direct Memory Access (DMA) length corresponding to the flash operation command is determined. For example, the page size of storage medium M0 can be determined based on the code rate symbol 0 in the target flash command template T0, and the corresponding DMA length is D0. The page size of storage medium M1 can be determined based on the code rate symbol 1 in the target flash command template T1, and the corresponding DMA length is D1. Since the code rate symbol 0 represents the flash operation command acting on storage medium M0, and the code rate symbol 1 represents the flash operation command acting on storage medium M1, the lengths D0 and D1 are different.

[0059] In this embodiment, the transfer length of the direct memory access corresponding to the flash memory operation command is determined by using the code rate symbol in the target flash memory command template. It can be understood that DMA transfer can select different lengths according to the code rate symbol, thereby achieving data format compatibility with multiple media.

[0060] In some embodiments, at least two types of storage media include three-cell storage media and four-cell storage media; and / or each type of storage media includes four-plane media and / or eight-plane media.

[0061] For example, at least one flash memory array includes flash memory array CH0 and flash memory array CH1, wherein the storage medium of flash memory array CH0 is TLC and the storage medium of flash memory array CH1 is QLC; or, at least one flash memory array includes flash memory array CH0, wherein the storage medium of flash memory array CH0 includes TLC and QLC. Further, TLC may also include 4-Plane and 8-Plane media, and QLC may include 4-Plane and 8-Plane media. In this case, there are four types of media, namely TLC_4-Plane, TLC_8-Plane, QLC_4-Plane, and QLC_8-Plane, which can be represented by different code rate symbols to indicate the target of the corresponding flash memory operation instructions.

[0062] In this embodiment, the flash memory controller 20 can connect to a flash memory array including TLC and QLC media. TLC media has higher performance but is more expensive for the same nominal capacity. It has better error correction performance but requires weaker LDPC error correction capability than QLC media. QLC media has weaker performance but is cheaper for the same nominal capacity. It has poorer error correction performance but requires stronger LDPC error correction capability. The two media use different LDPC decoding capabilities, i.e., different code rates. The flash memory controller 20 can achieve compatibility with storage media with different code rates. For example, the flash memory controller 20 can first store data in TLC and then move it to QLC after the data has cooled down. In this way, high performance is maintained while reducing product cost.

[0063] In some examples, at least one flash memory array includes flash memory array CH0 and flash memory array CH1. Flash memory arrays CH0 and CH1 have different storage media types; that is, flash memory arrays CH0 and CH1 can be two independent interfaces. Flash memory array CH0 includes both C0 and C1 media, and flash memory array CH1 also includes both C0 and C1 media. For example, flash memory array CH0 includes storage medium M0, and flash memory array CH1 includes storage medium M1. Storage medium M0 includes both C0 and C1 media, and storage medium M1 also includes both C0 and C1 media. Figure 6 As shown, Figure 6 This is a schematic flowchart of flash memory operation command processing according to an embodiment of this application. Firmware 220 converts external operation instructions (e.g., I / O command 0, I / O command 1, I / O command 2, I / O command 3) into flash memory operation commands, which may include multi-plane write / read commands (e.g., C1_multi_plane_wr, C0_multi_plane_wr), cache write / read commands (e.g., C0_cache_wr, C1_cache_wr), etc., and sends them to the command queue buffer (cmd_queue_buf) of flash memory interface 210.

[0064] For example, the cache wr command in flash command template T0 is selected based on the bitrate symbol in the first command (C0_cache_wr). According to this template, the command can be sent to the C0 type medium (CH0_Nand_flash_C0) of CH0. The cache wr command in flash command template T1 is selected based on the bitrate symbol in the second command (C1_cache_wr). According to this template, the command can be sent to the C1 type medium (CH1_Nand_flash_C1) of CH1. This achieves compatibility with different bitrates and different media of multiple command templates under the control of the same flash interface.

[0065] Please see Figure 7 , Figure 7This is a schematic diagram of the chip structure according to an embodiment of this application. The chip 700 includes the aforementioned storage device 100, wherein the storage device 100 includes at least one flash memory array and a flash memory controller 20. The flash memory controller 20 is connected to the at least one flash memory array, and the at least one flash memory array includes at least two types of storage media. The flash memory controller 20 is used to define at least two flash memory command templates, and the at least two flash memory command templates correspond one-to-one with at least two types of storage media. Flash memory operation commands are obtained through the flash memory controller 20. Based on the flash memory operation commands, a target flash memory command template is selected from the at least two flash memory command templates, and the flash memory operation commands are sent to the storage media corresponding to the target flash memory command template in accordance with the target flash memory command template, so as to perform the flash memory operation corresponding to the flash memory operation command on the storage media. This realizes that a single flash memory controller is compatible with multiple storage media, thereby improving the performance of the chip.

[0066] Please see Figure 8 , Figure 8 This is a flowchart illustrating a control method for a storage device according to an embodiment of this application. This method can be applied to the storage device 100 described above. It should be noted that if substantially the same result is achieved, the method of this application is not necessarily identical. Figure 8 The sequence of processes shown is limited.

[0067] In some possible implementations, such as Figure 8 As shown, the method may include the following steps:

[0068] S81: Get flash memory operation commands.

[0069] S82: Based on the flash operation command, select the target flash command template from at least two flash command templates, and send the flash operation command to the storage medium corresponding to the target flash command template in accordance with the target flash command template, so as to perform the flash operation corresponding to the flash operation command on the storage medium.

[0070] The flash memory operation command can be an operation command for any of at least two types of storage media. Taking the flash memory arrays 110, 120, and 130 as examples of two types of storage media, if the flash memory operation command is a write command wr_1 for storage medium M0, a target flash memory command template is selected from flash memory command templates 201 and 202 based on the write command wr_1. The target flash memory command template is the flash memory command template 201 corresponding to storage medium M0. Furthermore, the write command wr_1 can be sent to the corresponding storage medium M0 according to the flash memory command template 201 to perform a write operation on storage medium M0. Storage medium M0 can be in flash memory array 110 or flash memory array 120.

[0071] Those skilled in the art will understand that, in the above-described method of the specific implementation, the order in which each step is written does not imply a strict execution order and does not constitute any limitation on the implementation process. The specific execution order of each step should be determined by its function and possible internal logic.

[0072] The description of the various embodiments above tends to emphasize the differences between the various embodiments. The similarities or similarities between them can be referred to, and for the sake of brevity, they will not be repeated here.

[0073] In the several embodiments provided in this application, it should be understood that the disclosed methods and related devices can be implemented in other ways. For example, the related device implementations described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication disconnection shown or discussed may be indirect coupling or communication disconnection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0074] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0075] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0076] Those skilled in the art will readily recognize that numerous modifications and variations can be made to the apparatus and method while maintaining the teachings of this application. Therefore, the above disclosure should be considered limited only by the scope of the appended claims.

Claims

1. A storage device, characterized in that, include: At least one flash memory array, the at least one flash memory array comprising at least two types of storage media; A flash memory controller, connected to the at least one flash memory array, is used to define at least two flash memory command templates, each of which corresponds to one of the at least two types of storage media. The flash memory controller is used for: Obtain flash memory operation commands; Based on the flash memory operation command, a target flash memory command template is selected from the at least two flash memory command templates, and the flash memory operation command is sent to the storage medium corresponding to the target flash memory command template in accordance with the target flash memory command template, so as to perform the flash memory operation corresponding to the flash memory operation command on the storage medium.

2. The device according to claim 1, characterized in that, The step of selecting a target flash command template from the at least two flash command templates based on the flash operation command includes: The flash memory operation commands are parsed to obtain the corresponding physical addresses; Extract the corresponding code rate symbol from the physical address; The target flash command template is determined from the at least two flash command templates based on the code rate symbol. Sending the flash memory operation command to the storage medium corresponding to the target flash memory command template according to the target flash memory command template includes: Using the parsing parameters corresponding to the code rate symbol in the target flash command template, the physical address is parsed to obtain the address information of the flash operation command, so as to send the flash operation command to the corresponding storage medium according to the address information.

3. The device according to claim 2, characterized in that, The at least two types of storage media include a first type of storage media and / or a second type of storage media; The step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the address information of the flash memory operation command includes: Using the first parsing parameter corresponding to the code rate symbol in the target flash memory command template, the physical address is parsed to obtain the first address information of the flash memory operation command. The first address information is used to indicate that the flash memory operation command is used for the first type of storage medium or the second type of storage medium.

4. The device according to claim 2 or 3, characterized in that, Each type of storage medium includes a first arrangement of storage media and / or a second arrangement of storage media; The step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the address information of the flash memory operation command includes: Using the second parsing parameter corresponding to the code rate symbol in the target flash memory command template, the physical address is parsed to obtain the second address information of the flash memory operation command. The second address information is used to characterize whether the flash memory operation command is used for the first arrangement of storage media or the second arrangement of storage media.

5. The device according to claim 4, characterized in that, The step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the address information of the flash memory operation command further includes: Using the third parsing parameter corresponding to the code rate symbol in the target flash memory command template, the physical address is parsed to obtain the third address information of the flash memory operation command; The row address information of the flash memory operation command is generated by calculating using the first address information, the second address information, and the third address information.

6. The device according to claim 2, characterized in that, The step of parsing the physical address using the parsing parameters corresponding to the code rate symbol in the target flash memory command template to obtain the address information of the flash memory operation command includes: The column address information of the flash operation command is generated by calculating the page size and sector identifier represented by the code rate symbol in the target flash command template.

7. The device according to claim 2, characterized in that, The flash memory controller is also used for: Using the rate symbol in the target flash command template, the transfer length of the direct memory access corresponding to the flash operation command is determined.

8. The device according to claim 1, characterized in that, The at least two types of storage media include three-level cell storage media and single-level cell storage media; and / or Each type of storage medium includes four-plane media and / or eight-plane media.

9. The device according to claim 1, characterized in that, The flash controller includes a flash interface connected to the at least one flash array, and the at least two flash command templates are stored in the flash interface.

10. The device according to claim 1, characterized in that, The command to acquire flash memory includes: Obtain external operation instructions and convert the external operation instructions into internal operation instructions; The internal operation instructions are processed to obtain flash memory operation commands.

11. A chip, characterized in that, Includes the storage device as described in any one of claims 1-10.

12. A method for controlling a storage device, characterized in that, Applied to the storage device as described in any one of claims 1-10, the method comprises: Obtain flash memory operation commands; Based on the flash memory operation command, a target flash memory command template is selected from the at least two flash memory command templates, and the flash memory operation command is sent to the storage medium corresponding to the target flash memory command template in accordance with the target flash memory command template, so as to perform the flash memory operation corresponding to the flash memory operation command on the storage medium.

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